|
100 | 100 | };
|
101 | 101 | };
|
102 | 102 |
|
103 |
| - mcc { |
104 |
| - compatible = "arm,vexpress,config-bus"; |
105 |
| - arm,vexpress,config-bridge = <&v2m_sysreg>; |
106 |
| - |
107 |
| - oscclk0 { |
108 |
| - /* MCC static memory clock */ |
109 |
| - compatible = "arm,vexpress-osc"; |
110 |
| - arm,vexpress-sysreg,func = <1 0>; |
111 |
| - freq-range = <25000000 60000000>; |
112 |
| - #clock-cells = <0>; |
113 |
| - clock-output-names = "v2m:oscclk0"; |
114 |
| - }; |
115 |
| - |
116 |
| - v2m_oscclk1: oscclk1 { |
117 |
| - /* CLCD clock */ |
118 |
| - compatible = "arm,vexpress-osc"; |
119 |
| - arm,vexpress-sysreg,func = <1 1>; |
120 |
| - freq-range = <23750000 65000000>; |
121 |
| - #clock-cells = <0>; |
122 |
| - clock-output-names = "v2m:oscclk1"; |
123 |
| - }; |
124 |
| - |
125 |
| - v2m_oscclk2: oscclk2 { |
126 |
| - /* IO FPGA peripheral clock */ |
127 |
| - compatible = "arm,vexpress-osc"; |
128 |
| - arm,vexpress-sysreg,func = <1 2>; |
129 |
| - freq-range = <24000000 24000000>; |
130 |
| - #clock-cells = <0>; |
131 |
| - clock-output-names = "v2m:oscclk2"; |
132 |
| - }; |
133 |
| - |
134 |
| - volt-vio { |
135 |
| - /* Logic level voltage */ |
136 |
| - compatible = "arm,vexpress-volt"; |
137 |
| - arm,vexpress-sysreg,func = <2 0>; |
138 |
| - regulator-name = "VIO"; |
139 |
| - regulator-always-on; |
140 |
| - label = "VIO"; |
141 |
| - }; |
142 |
| - |
143 |
| - temp-mcc { |
144 |
| - /* MCC internal operating temperature */ |
145 |
| - compatible = "arm,vexpress-temp"; |
146 |
| - arm,vexpress-sysreg,func = <4 0>; |
147 |
| - label = "MCC"; |
148 |
| - }; |
149 |
| - |
150 |
| - reset { |
151 |
| - compatible = "arm,vexpress-reset"; |
152 |
| - arm,vexpress-sysreg,func = <5 0>; |
153 |
| - }; |
154 |
| - |
155 |
| - muxfpga { |
156 |
| - compatible = "arm,vexpress-muxfpga"; |
157 |
| - arm,vexpress-sysreg,func = <7 0>; |
158 |
| - }; |
159 |
| - |
160 |
| - shutdown { |
161 |
| - compatible = "arm,vexpress-shutdown"; |
162 |
| - arm,vexpress-sysreg,func = <8 0>; |
163 |
| - }; |
164 |
| - |
165 |
| - reboot { |
166 |
| - compatible = "arm,vexpress-reboot"; |
167 |
| - arm,vexpress-sysreg,func = <9 0>; |
168 |
| - }; |
169 |
| - |
170 |
| - dvimode { |
171 |
| - compatible = "arm,vexpress-dvimode"; |
172 |
| - arm,vexpress-sysreg,func = <11 0>; |
173 |
| - }; |
174 |
| - }; |
175 |
| - |
176 | 103 | bus@8000000 {
|
177 | 104 | motherboard-bus {
|
178 | 105 | model = "V2M-P1";
|
|
435 | 362 | };
|
436 | 363 | };
|
437 | 364 | };
|
| 365 | + |
| 366 | + mcc { |
| 367 | + compatible = "arm,vexpress,config-bus"; |
| 368 | + arm,vexpress,config-bridge = <&v2m_sysreg>; |
| 369 | + |
| 370 | + oscclk0 { |
| 371 | + /* MCC static memory clock */ |
| 372 | + compatible = "arm,vexpress-osc"; |
| 373 | + arm,vexpress-sysreg,func = <1 0>; |
| 374 | + freq-range = <25000000 60000000>; |
| 375 | + #clock-cells = <0>; |
| 376 | + clock-output-names = "v2m:oscclk0"; |
| 377 | + }; |
| 378 | + |
| 379 | + v2m_oscclk1: oscclk1 { |
| 380 | + /* CLCD clock */ |
| 381 | + compatible = "arm,vexpress-osc"; |
| 382 | + arm,vexpress-sysreg,func = <1 1>; |
| 383 | + freq-range = <23750000 65000000>; |
| 384 | + #clock-cells = <0>; |
| 385 | + clock-output-names = "v2m:oscclk1"; |
| 386 | + }; |
| 387 | + |
| 388 | + v2m_oscclk2: oscclk2 { |
| 389 | + /* IO FPGA peripheral clock */ |
| 390 | + compatible = "arm,vexpress-osc"; |
| 391 | + arm,vexpress-sysreg,func = <1 2>; |
| 392 | + freq-range = <24000000 24000000>; |
| 393 | + #clock-cells = <0>; |
| 394 | + clock-output-names = "v2m:oscclk2"; |
| 395 | + }; |
| 396 | + |
| 397 | + volt-vio { |
| 398 | + /* Logic level voltage */ |
| 399 | + compatible = "arm,vexpress-volt"; |
| 400 | + arm,vexpress-sysreg,func = <2 0>; |
| 401 | + regulator-name = "VIO"; |
| 402 | + regulator-always-on; |
| 403 | + label = "VIO"; |
| 404 | + }; |
| 405 | + |
| 406 | + temp-mcc { |
| 407 | + /* MCC internal operating temperature */ |
| 408 | + compatible = "arm,vexpress-temp"; |
| 409 | + arm,vexpress-sysreg,func = <4 0>; |
| 410 | + label = "MCC"; |
| 411 | + }; |
| 412 | + |
| 413 | + reset { |
| 414 | + compatible = "arm,vexpress-reset"; |
| 415 | + arm,vexpress-sysreg,func = <5 0>; |
| 416 | + }; |
| 417 | + |
| 418 | + muxfpga { |
| 419 | + compatible = "arm,vexpress-muxfpga"; |
| 420 | + arm,vexpress-sysreg,func = <7 0>; |
| 421 | + }; |
| 422 | + |
| 423 | + shutdown { |
| 424 | + compatible = "arm,vexpress-shutdown"; |
| 425 | + arm,vexpress-sysreg,func = <8 0>; |
| 426 | + }; |
| 427 | + |
| 428 | + reboot { |
| 429 | + compatible = "arm,vexpress-reboot"; |
| 430 | + arm,vexpress-sysreg,func = <9 0>; |
| 431 | + }; |
| 432 | + |
| 433 | + dvimode { |
| 434 | + compatible = "arm,vexpress-dvimode"; |
| 435 | + arm,vexpress-sysreg,func = <11 0>; |
| 436 | + }; |
| 437 | + }; |
438 | 438 | };
|
439 | 439 | };
|
440 | 440 | };
|
|
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