Hardware Accleration Support #33
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Signed-off-by: Chunhai Zhang <[email protected]>
Signed-off-by: Chunhai Zhang <[email protected]>
Signed-off-by: Chunhai Zhang <[email protected]>
Signed-off-by: Chunhai Zhang <[email protected]>
Signed-off-by: Chunhai Zhang <[email protected]>
dylan-fan
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Apr 21, 2022
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Signed-off-by: Chunhai.Zhang [email protected]
This is the proposal for FATE issue #3811
This proposal intends to allow FATE to leverage hardware-based accelerators, such as GPU/FPGA, for better performance.
This proposal will contribute a universal architecture for FATE to use these hardware-based accelerators, including APIs, memory layout standards, data structure, and so on.
This proposal mainly targets accelerating cryptographic operations, such as Paillier encryption, ciphertext computation, and so on.