SA-1 RAM write protection (Contra SA-1)

[paulb-nl]

Contra III SA-1 v1.1 does not boot on a real SA-1 cart because RAM write protection is enabled by default. This version does work on the SNES core but IMO it should behave like a real cart.

Contra III SA-1 v1.2 fixes this by disabling write protection:
https://github.com/VitorVilela7/SA1-Root/releases/tag/v1.8
VitorVilela7/SA1-Root@8ec85aa
VitorVilela7/SA1-Root@b67c8cc

This version fixes an issue regarding on how I-RAM (SA-1 internal RAM) is set up on boot code. At boot time, the I-RAM write stays disabled and you must enable it before making writes. However, my boot time attempts setting up the data bank register (DBR) that requires a stack operation (PHA - PLB) and the PHA opcode requires writing to I-RAM. Because write is disabled, the write is ignored and the DBR receives an undefined value instead (likely static randomic), which made some games not boot up at all. Contra III in particular never booted up on hardware because it requires the DBR to be 0x05 since the beginning, while Gradius III and Super R-Type had mixed results on hardware.

Now that the root cause has been found and fixed, Contra III, Gradius III and Super R-Type should work as expected on real hardware.

The SA-1 documentation in book2.pdf states that all RAM write protection is enabled by default: SBWE, CBWE, BWPA, SIWP & CIWP.

[paulb-nl]

@srg320 Thanks for working on this!

Here is more information about BW-RAM protection and Kirby Dreamland:
ares-emulator/ares@70f3610

Apparently both SNES and SA-1 write enable registers need to be 0 for BW-RAM protection to work. So because it sets SWEN to 1 both SNES CPU and SA-1 can write to BW-RAM.

Protection Test ROM:
https://github.com/absindx/SNES-TestRoms/tree/main/SA1RamProtectionTest

[srg320]

Here is more information about BW-RAM protection and Kirby Dreamland: ares-emulator/ares@70f3610

Apparently both SNES and SA-1 write enable registers need to be 0 for BW-RAM protection to work. So because it sets SWEN to 1 both SNES CPU and SA-1 can write to BW-RAM.

Protection Test ROM: https://github.com/absindx/SNES-TestRoms/tree/main/SA1RamProtectionTest

Thank you, this information is very helpful.

[paulb-nl]

Testing with release 20241228. The SA1 Protection test now fails at test ID 155 which is TestID_SNES_BwRamMirror_400000

https://github.com/absindx/SNES-TestRoms/blob/2de2a7a565cb5aa2b361dbaa10c308e53f6ec0e8/SA1RamProtectionTest/MessageID.asm#L203

It says something in the readme about unmapped memory for test 145-162.

TEST ID : 145-162
It seems that the unmapped area on the SA-1 side returns the old data bus value. (similar to PPU open bus...?)
(Probably) The initial value is an undefined value for a cold boot, and the previous value for a momentary power off or reset button.
Macro %SetSa1Databus() sets the bus to any value.
Since the details are still unknown, I plan to create another test ROM.