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ps2.xml
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ps2.xml
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<?xml version="1.0" encoding="utf-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<name>PlayStation2</name>
<series>other</series>
<version>1</version>
<description>Sony PlayStation 2</description>
<cpu>
<name>other</name>
<revision>r1p0</revision>
<endian>little</endian>
<mpuPresent>false</mpuPresent>
<fpuPresent>false</fpuPresent>
<nvicPrioBits>0</nvicPrioBits>
<vendorSystickConfig>false</vendorSystickConfig>
</cpu>
<addressUnitBits>128</addressUnitBits>
<width>128</width>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<peripherals>
<peripheral>
<name>TIMER</name>
<version>1</version>
<description>Programmable Timers. See EE User's Manual, Chapter 4.</description>
<groupName>TIMER</groupName>
<baseAddress>0xB0000000</baseAddress>
<registers>
<register>
<name>T0_COUNT</name>
<description>Counter register</description>
<addressOffset>0x0000</addressOffset>
<resetMask>0x0000FFFF</resetMask>
<fields>
<field>
<name>COUNT</name>
<description>Counter Value. The counter value is incremented according
to the conditions of the clock and the gate signal specified in the
Tn_MODE.</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>T0_MODE</name>
<description>Register for setting modes and reading status</description>
<addressOffset>0x0010</addressOffset>
<resetMask>0x00000FFF</resetMask>
<fields>
<field>
<name>CLKS</name>
<description>Clock Selection</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>BUSCLK</name>
<description>BUSCLK (147.456MHz)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUSCLK16</name>
<description>1/16 of the BUSCLK</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>BUSCLK256</name>
<description>1/256 of the BUSCLK</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>HBLNK</name>
<description>External Clock (H-BLNK)</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATE</name>
<description>Gate Function Enable</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Gate function is not used.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Gate function is used.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATS</name>
<description>Gate Selection</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HBLNK</name>
<description>H-BLNK (Disabled when CLKS equals to 11.)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>VBLNK</name>
<description>V-BLNK</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATM</name>
<description>Gate Mode</description>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOW</name>
<description>Counts while the gate signal is low.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Resets and starts counting at the gate signal's
rising edge.</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Resets and starts counting at the gate signal's
falling edge.</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>BOTH</name>
<description>Resets and starts counting at both edges of the
gate signal.</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ZRET</name>
<description>Zero Return</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>The counter keeps counting, ignoring the reference
value.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>The counter is cleared to 0 when the counter value
is equal to the reference value.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CUE</name>
<description>Count Up Enable</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Stops counting.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Starts/restarts counting.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CMPE</name>
<description>Compare-Interrupt Enable</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>A compare-interrupt is not generated.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>An interrupt is generated when the counter value is
equal to the reference value.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OVFE</name>
<description>Overflow-Interrupt Enable</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>An overflow interrupt is not generated.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>An interrupt is generated when an overflow occurs.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EQUF</name>
<description>Equal Flag</description>
<bitRange>[10:10]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>Clear</name>
<description>No compare-interrupt has occurred.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Set</name>
<description>A compare-interrupt has occurred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OVFF</name>
<description>Overflow Flag</description>
<bitRange>[11:11]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>Clear</name>
<description>No overflow-interrupt has occurred.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Set</name>
<description>An overflow-interrupt has occurred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>T0_COMP</name>
<description>Comparison register</description>
<addressOffset>0x0020</addressOffset>
<resetMask>0x0000FFFF</resetMask>
<fields>
<field>
<name>COMP</name>
<description>Compare Value. Reference value to be compared with
Tn_COUNT.</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>T0_HOLD</name>
<description>Hold register</description>
<addressOffset>0x0030</addressOffset>
<resetMask>0x0000FFFF</resetMask>
<fields>
<field>
<name>HOLD</name>
<description>Hold Value. The value of Tn_COUNT is copied when an SBUS
interrupt occurs.</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<!-- The following is exactly the ugly hack you think it is. -->
<register derivedFrom="T0_COUNT">
<name>T1_COUNT</name>
<description>Counter register</description>
<addressOffset>0x0800</addressOffset>
</register>
<register derivedFrom="T0_MODE">
<name>T1_MODE</name>
<description>Register for setting modes and reading status</description>
<addressOffset>0x0810</addressOffset>
</register>
<register derivedFrom="T0_COMP">
<name>T1_COMP</name>
<description>Comparison register</description>
<addressOffset>0x0820</addressOffset>
</register>
<register derivedFrom="T0_HOLD">
<name>T1_HOLD</name>
<description>Hold register</description>
<addressOffset>0x0830</addressOffset>
</register>
<register derivedFrom="T0_COUNT">
<name>T2_COUNT</name>
<description>Counter register</description>
<addressOffset>0x1000</addressOffset>
</register>
<register derivedFrom="T0_MODE">
<name>T2_MODE</name>
<description>Register for setting modes and reading status</description>
<addressOffset>0x1010</addressOffset>
</register>
<register derivedFrom="T0_COMP">
<name>T2_COMP</name>
<description>Comparison register</description>
<addressOffset>0x0820</addressOffset>
</register>
<register derivedFrom="T0_COUNT">
<name>T3_COUNT</name>
<description>Counter register</description>
<addressOffset>0x1800</addressOffset>
</register>
<register derivedFrom="T0_MODE">
<name>T3_MODE</name>
<description>Register for setting modes and reading status</description>
<addressOffset>0x1810</addressOffset>
</register>
<register derivedFrom="T0_COMP">
<name>T3_COMP</name>
<description>Comparison register</description>
<addressOffset>0x1820</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>IPU</name>
<version>1</version>
<description>Image Data Processor. See EE User's Manual, Chapter 8.</description>
<groupName>IPU</groupName>
<baseAddress>0xB0002000</baseAddress>
<registers>
<register>
<name>IPU_CMD</name>
<description>IPU Decoded-code read register / command register</description>
<addressOffset>0x00</addressOffset>
<size>64</size>
<access>read-write</access>
<fields>
<field>
<name>OPTION</name>
<description>Command Option. Contents differ depending on executed
command.</description>
<bitRange>[27:0]</bitRange>
<access>write-only</access>
</field>
<field>
<name>CODE</name>
<description>Command code.</description>
<bitRange>[31:28]</bitRange>
<access>write-only</access>
</field>
<field>
<name>DATA</name>
<description>VDEC / FDEC decoded value.</description>
<bitRange>[31:0]</bitRange>
<access>read-only</access>
</field>
<field>
<name>BUSY</name>
<description>VDEC / FDEC command busy</description>
<bitRange>[63:63]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ENABLE</name>
<description>DATA field enabled (available to read.)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DISABLE</name>
<description>DATA field disabled (VDEC / FDEC still in
execution.)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IPU_CTRL</name>
<description>IPU control</description>
<addressOffset>0x10</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>IFC</name>
<description>Input FIFO counter. Same as IPU_BP IFC field.</description>
<bitRange>[3:0]</bitRange>
<access>read-only</access>
</field>
<field>
<name>OFC</name>
<description>Output FIFO counter.</description>
<bitRange>[7:4]</bitRange>
<access>read-only</access>
</field>
<field>
<name>CBP</name>
<description>Coded block pattern.</description>
<bitRange>[13:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>ECD</name>
<description>Error code detection. Set to 0 when a new command is
issued, then set to 1 if an error is encountered.</description>
<bitRange>[14:14]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NOT_DETECTED</name>
<description>Not detected.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DETECTED</name>
<description>Detected.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SCD</name>
<description>Start code detection. Set to 0 when a new command is
issued, then set to 1 if a start code is encountered.</description>
<bitRange>[15:15]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NOT_DETECTED</name>
<description>Not detected.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DETECTED</name>
<description>Detected.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IDP</name>
<description>Intra DC presition.</description>
<bitRange>[17:16]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BITS8</name>
<description>8 bits.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BITS9</name>
<description>9 bits.</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>BITS10</name>
<description>10 bits.</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>RESERVED</name>
<description>Reserved.</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- Bits 18-19 are unused. -->
<field>
<name>AS</name>
<description>Alternate scan.</description>
<bitRange>[20:20]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ZIGZAG</name>
<description>Zigzag scanning.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALTERNATE</name>
<description>Alternate scanning.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IVF</name>
<description>Intra VLC format.</description>
<bitRange>[21:21]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MPEG1_COMPATIBLE</name>
<description>MPEG1-compatible 2-dimensional VLC table.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INTRA_MACRO_BLOCK</name>
<description>2-dimensional VLC table specially for intra macro
block.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>QST</name>
<description>Q scale step.</description>
<bitRange>[22:22]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LINEAR</name>
<description>Linear step.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>NON_LINEAR</name>
<description>Non-linear step.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MP1</name>
<description>Bit stream MPEG version.</description>
<bitRange>[23:23]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MPEG2</name>
<description>MPEG2 bit stream.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>MPEG1</name>
<description>MPEG1 bit stream.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PCT</name>
<description>Picture type.</description>
<bitRange>[26:24]</bitRange>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>RESERVED</name>
<description>Reserved.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>I_PICTURE</name>
<description>I-PICTURE.</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>P_PICTURE</name>
<description>P-PICTURE.</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>B_PICTURE</name>
<description>B-PICTURE.</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>D_PICTURE</name>
<description>D-PICTURE.</description>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- Bits 27-29 are unused. -->
<field>
<name>RST</name>
<description>Reset. Writing 1 will force-abandon the current command and
data, and reset the IPU.</description>
<bitRange>[30:30]</bitRange>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>RESET</name>
<description>Trigger Reset.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY</name>
<description>IPU BUSY status.</description>
<bitRange>[31:31]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>READY</name>
<description>IPU ready (idle).</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUSY</name>
<description>IPU busy (executing a command.)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IPU_BP</name>
<description>IPU input FIFO control.</description>
<addressOffset>0x20</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>BP</name>
<description>Bit stream pointer to bit position in first 128-bit data to
start decoding.</description>
<bitRange>[6:0]</bitRange>
</field>
<!-- Bit 7 is unused. -->
<field>
<name>IFC</name>
<description>Input FIFO counter. Equal to number of qwords in
IPU_in_FIFO.</description>
<bitRange>[11:8]</bitRange>
</field>
<field>
<name>FP</name>
<description>FIFO pointer. Equal to number of qwords remaining in IPU
except IPU_in_FIFO.</description>
<bitRange>[17:16]</bitRange>
</field>
<!-- Bits 17-31 are unused. -->
</fields>
</register>
<register>
<name>IPU_TOP</name>
<description>Reads the first 32 bits of the bit stream after execution of a BDEC
/ IDEC / VDEC / FDEC command completes.</description>
<addressOffset>0x30</addressOffset>
<size>64</size>
<access>read-only</access>
<fields>
<field>
<name>BSTOP</name>
<description>Top 32 bits of the bit stream data.</description>
<bitRange>[31:0]</bitRange>
</field>
<field>
<name>BUSY</name>
<description>Command busy status.</description>
<bitRange>[63:63]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ENABLE</name>
<description>BSTOP field is enabled (ready to read.)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DISABLE</name>
<description>BSTOP field is disabled (decoding still in
execution.)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GIF</name>
<version>1</version>
<description>GS Interface. See EE User's Manual, Chapter 7.</description>
<groupName>GIF</groupName>
<baseAddress>0xB0003000</baseAddress>
<registers>
<register>
<name>GIF_CTRL</name>
<description>GIF control</description>
<addressOffset>0x00</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>RST</name>
<description>GIF reset</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>NO_RESET</name>
<description>Does nothing.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET</name>
<description>When set, the GIF is reset and the internal
register returns to the initial value.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PSE</name>
<description>Temporary transfer stop</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>TRANSFER_RESTART</name>
<description>Restarts transfer processing. When set, the other
GIF registers can no longer be read.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>TEMP_STOP</name>
<description>Temporarily stops transfer processing. When set,
allows reading the other GIF registers for debugging.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>GIF_MODE</name>
<description>GIF mode setting</description>
<addressOffset>0x10</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>M3R</name>
<description>PATH3 MASK</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>MASK_CANCEL</name>
<description>Mask cancel(Initial value)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>MASK</name>
<description>Enables the PATH3 mask. If set during a
transmission, the mask is enabled after the end of
transmission.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IMT</name>
<description>PATH3 transfer mode specification</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS_TRANSFER</name>
<description>(Initial value) Continuous transfer mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INTERMITTENT_TRANSFER_MODE</name>
<description>Intermittent transfer mode in every 8 qwords.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>GIF_STAT</name>
<description>GIF status</description>
<addressOffset>0x20</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>M3R</name>
<description>PATH3 mask status.</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ENABLE</name>
<description>(Initial value) Enabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DISABLE</name>
<description>Disabled (Masked by the MR3 flag of the GIF_MODE
register.)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>M3P</name>
<description>PATH3 VIF mask status.</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ENABLE</name>
<description>(Initial value) Enabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DISABLE</name>
<description>Disabled (Masked by the VIF MASKP3 register.)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IMT</name>
<description>PATH3 IMT status.</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS_TRANSFER_MODE</name>
<description>(Initial value) Continuous transfer mode.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INTERMITTENT_TRANSFER_MODE</name>
<description>Intermittent transfer mode.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PSE</name>
<description>Temporary transfer stop.</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>(Initial value) Normal.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>TEMP_STOP</name>
<description>Temporary stop state triggered by PSE flag of
GIF_CTRL register.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<!-- Bit 4 is unused. -->
<field>
<name>IP3</name>
<description>Interrupted PATH3.</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>NO_INTERRUPT</name>
<description>(Initial value) No interrupted transfer via PATH3.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INTERRUPT</name>
<description>Interrupted transfer via PATH3.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>P3Q</name>
<description>PATH3 in queue.</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>NO_REQUEST</name>
<description>(Initial value) No request to wait for processing
in PATH3.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>REQUEST</name>
<description>Request to wait for processing in PATH3.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>P2Q</name>
<description>PATH2 in queue.</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>NO_REQUEST</name>
<description>(Initial value) No request to wait for processing
in PATH2.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>REQUEST</name>
<description>Request to wait for processing in PATH2.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>P1Q</name>
<description>PATH1 in queue.</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>NO_REQUEST</name>
<description>(Initial value) No request to wait for processing
in PATH1.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>REQUEST</name>
<description>Request to wait for processing in PATH1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OPH</name>
<description>Output path.</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>IDLE</name>
<description>(Initial value) Idle state.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>OUTPUTTING</name>
<description>Outputting data.</description>
<value>1</value>
</enumeratedValue>