Incorrect Loop Transform

[TiemoJung]

Hi,

we found a quite tricky case where the loop transform and/or variable remapping just fails.
Consider this:

loop
   ige r2.z, r2.y, r0.w
   breakc_nz r2.z
   lt r2.z, cb0[[r2 + 16]].z, l(0)
   .....
   if_nz r2.z
     iadd r2.z, r2.y, l(1)
    .....
     mov r2.y, r2.z
   endif
   iadd r2.y, r2.y, l(1)
endloop

The move at the end of the if block gets turned into a write to a temp that is never used so the iadd r2z, r2.y, l(1) is lost.

[aet]

Hi @TiemoJung, could you provide HLSL that triggers this? There's been another upstream merge into Github, if you have time to go through your existing issues to see if some of them are still valid or resolved? Thanks