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Usage and sim/formal reports completed and updated
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‎bench/formal/report.html

+26-22
Original file line numberDiff line numberDiff line change
@@ -1,59 +1,63 @@
11
<HTML><HEAD><TITLE>Formal Verification Report</TITLE></HEAD>
22
<BODY>
33
<H1 align=center>SD Controller Formal Verification Report</H1>
4-
<H2 align=center>20250102</H2>
4+
<H2 align=center>20250423</H2>
55
<TABLE border>
66
<TR><TH>Status</TH><TH>Component</TD><TH>Proof</TH><TH>Component description</TH></TR>
77
<TR></TR>
8-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prf</TD><TD rowspan=5>Low-Level SPI handler</TD></TR>
9-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prfa</TD></TR>
8+
<TR><TD bgcolor=#caeec8>7 Cover points</TD><TD>llsdspi</TD><TD>_cvr</TD><TD rowspan=5>Low-Level SPI handler</TD></TR>
109
<TR><TD bgcolor=#caeec8>7 Cover points</TD><TD>llsdspi</TD><TD>_cvra</TD></TR>
1110
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prfc</TD></TR>
12-
<TR><TD bgcolor=#caeec8>7 Cover points</TD><TD>llsdspi</TD><TD>_cvr</TD></TR>
11+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prfa</TD></TR>
12+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prf</TD></TR>
1313
<TR></TR>
14-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfdma</TD><TD rowspan=5>SDIO AXI-Lite Bus handler</TD></TR>
14+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfds</TD><TD rowspan=5>SDIO AXI-Lite Bus handler</TD></TR>
1515
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prf</TD></TR>
16-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfds</TD></TR>
17-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfdr</TD></TR>
16+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfdma</TD></TR>
1817
<TR><TD bgcolor=#caeec8>18 Cover points</TD><TD>sdaxil</TD><TD>_cvr</TD></TR>
18+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfdr</TD></TR>
1919
<TR></TR>
2020
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prf</TD><TD rowspan=6>SDIO Divided clock generator</TD></TR>
2121
<TR><TD bgcolor=#caeec8>12 Cover points</TD><TD>sdckgen</TD><TD>_cvrd</TD></TR>
2222
<TR><TD bgcolor=#caeec8>9 Cover points</TD><TD>sdckgen</TD><TD>_cvr</TD></TR>
23-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prfd</TD></TR>
2423
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prf8</TD></TR>
24+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prfd</TD></TR>
2525
<TR><TD bgcolor=#caeec8>14 Cover points</TD><TD>sdckgen</TD><TD>_cvr8</TD></TR>
2626
<TR></TR>
27-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdcmd</TD><TD>_prf</TD><TD rowspan=3>SDIO CMD wire controller</TD></TR>
27+
<TR><TD bgcolor=#caeec8>8 Cover points</TD><TD>sdcmd</TD><TD>_cvr</TD><TD rowspan=3>SDIO CMD wire controller</TD></TR>
2828
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdcmd</TD><TD>_prfds</TD></TR>
29-
<TR><TD bgcolor=#caeec8>8 Cover points</TD><TD>sdcmd</TD><TD>_cvr</TD></TR>
29+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdcmd</TD><TD>_prf</TD></TR>
3030
<TR></TR>
31-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prfs</TD><TD rowspan=3>SDIO receive data handler</TD></TR>
31+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prf</TD><TD rowspan=5>SDIO receive data handler</TD></TR>
32+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prfs4</TD></TR>
33+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prfs</TD></TR>
3234
<TR><TD bgcolor=#caeec8>25 Cover points</TD><TD>sdrxframe</TD><TD>_cvr</TD></TR>
33-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prf</TD></TR>
35+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prf4</TD></TR>
3436
<TR></TR>
3537
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdspi</TD><TD>_prf</TD><TD rowspan=1>SDSPI Top level controller</TD></TR>
3638
<TR></TR>
37-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prfs</TD><TD rowspan=4>SDIO transmit data controller</TD></TR>
39+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prfs</TD><TD rowspan=6>SDIO transmit data controller</TD></TR>
40+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prf4</TD></TR>
3841
<TR><TD bgcolor=#caeec8>12 Cover points</TD><TD>sdtxframe</TD><TD>_cvr</TD></TR>
39-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prf</TD></TR>
42+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prfs4</TD></TR>
4043
<TR><TD bgcolor=#caeec8>43 Cover points</TD><TD>sdtxframe</TD><TD>_cvrs</TD></TR>
44+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prf</TD></TR>
4145
<TR></TR>
42-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfdr</TD><TD rowspan=5>SDIO Wishbone Bus handler</TD></TR>
46+
<TR><TD bgcolor=#caeec8>19 Cover points</TD><TD>sdwb</TD><TD>_cvr</TD><TD rowspan=5>SDIO Wishbone Bus handler</TD></TR>
4347
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfds</TD></TR>
4448
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prf</TD></TR>
45-
<TR><TD bgcolor=#caeec8>19 Cover points</TD><TD>sdwb</TD><TD>_cvr</TD></TR>
4649
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfdma</TD></TR>
50+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfdr</TD></TR>
4751
<TR></TR>
48-
<TR><TD bgcolor=#caeec8>11 Cover points</TD><TD>spicmd</TD><TD>_cvr</TD><TD rowspan=2>SPI Command processor</TD></TR>
49-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spicmd</TD><TD>_prf</TD></TR>
52+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spicmd</TD><TD>_prf</TD><TD rowspan=2>SPI Command processor</TD></TR>
53+
<TR><TD bgcolor=#caeec8>11 Cover points</TD><TD>spicmd</TD><TD>_cvr</TD></TR>
5054
<TR></TR>
51-
<TR><TD bgcolor=#caeec8>16 Cover points</TD><TD>spirxdata</TD><TD>_cvr</TD><TD rowspan=3>SPI Data receive handler</TD></TR>
55+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spirxdata</TD><TD>_prf</TD><TD rowspan=3>SPI Data receive handler</TD></TR>
5256
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spirxdata</TD><TD>_prfle</TD></TR>
53-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spirxdata</TD><TD>_prf</TD></TR>
57+
<TR><TD bgcolor=#caeec8>16 Cover points</TD><TD>spirxdata</TD><TD>_cvr</TD></TR>
5458
<TR></TR>
55-
<TR><TD bgcolor=#caeec8>14 Cover points</TD><TD>spitxdata</TD><TD>_cvr</TD><TD rowspan=3>SPI Data transmit handler</TD></TR>
59+
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spitxdata</TD><TD>_prfle</TD><TD rowspan=3>SPI Data transmit handler</TD></TR>
5660
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spitxdata</TD><TD>_prf</TD></TR>
57-
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spitxdata</TD><TD>_prfle</TD></TR>
61+
<TR><TD bgcolor=#caeec8>13 Cover points</TD><TD>spitxdata</TD><TD>_cvr</TD></TR>
5862
</TABLE>
5963
</BODY></HTML>

‎bench/verilog/gen_report.pl

+159
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,159 @@
1+
#!/bin/perl
2+
################################################################################
3+
##
4+
## Filename: bench/verilog/gen_report.pl
5+
## {{{
6+
## Project: SD-Card controller
7+
##
8+
## Purpose: Generate an HTML report file, containing the status of the
9+
## last simulation run.
10+
##
11+
## Creator: Dan Gisselquist, Ph.D.
12+
## Gisselquist Technology, LLC
13+
##
14+
################################################################################
15+
## }}}
16+
## Copyright (C) 2025, Gisselquist Technology, LLC
17+
## {{{
18+
## This program is free software (firmware): you can redistribute it and/or
19+
## modify it under the terms of the GNU General Public License as published
20+
## by the Free Software Foundation, either version 3 of the License, or (at
21+
## your option) any later version.
22+
##
23+
## This program is distributed in the hope that it will be useful, but WITHOUT
24+
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
25+
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26+
## for more details.
27+
##
28+
## You should have received a copy of the GNU General Public License along
29+
## with this program. (It's in the $(ROOT)/doc directory. Run make with no
30+
## target there if the PDF file isn't present.) If not, see
31+
## <http://www.gnu.org/licenses/> for a copy.
32+
## }}}
33+
## License: GPL, v3, as defined and found on www.gnu.org,
34+
## {{{
35+
## http://www.gnu.org/licenses/gpl.html
36+
##
37+
################################################################################
38+
##
39+
## }}}
40+
$filelist = "dev_files.txt";
41+
$rawreport= "report.txt";
42+
$htmlfil= "report.html";
43+
my $last_mtime = 0;
44+
my $last_tstamp = "";
45+
46+
################################################################################
47+
##
48+
## Get the last file modified time
49+
## {{{
50+
open(FLIST, $filelist);
51+
while($line = <FLIST>) {
52+
if ($line =~ /\s*(\S+)\s*$/) {
53+
$fname = $1;
54+
} else {
55+
next;
56+
}
57+
58+
my ($dev, $ino, $mode, $nlink, $uid, $gid, $rdev, $size,
59+
$atime, $mtime, $ctime, $blksize, $blocks) = stat($fname);
60+
61+
if ($mtime > $last_mtime) {
62+
$last_mtime = $mtime;
63+
}
64+
}
65+
close FLIST;
66+
67+
my $sc, $mn, $hr, $dy, $mo, $yr, $wd, $yd, $isdst;
68+
($sc, $mn, $hr, $dy, $mo, $yr, $wd, $yd, $isdst) = localtime($last_mtime);
69+
$yr = $yr+1900; $mo=$mo+1;
70+
$last_tstamp = sprintf("%04d/%02d/%02d %02d:%02d:%02d",
71+
$yr,$mo,$dy,$hr,$mn,$sc);
72+
## }}}
73+
################################################################################
74+
##
75+
## Get the latest test result
76+
## {{{
77+
my $n=0;
78+
my %STAT;
79+
80+
open(REPORT, $rawreport);
81+
while($line = <REPORT>) {
82+
next if ($line =~ /^-/);
83+
if ($line =~ /(\S+)\s+(\d\d\d\d.\d\d.\d\d.\d\d:\d\d:\d\d)\s+(\S+)\s+..\s+(\S+)\s*$/) {
84+
$status = $1;
85+
$tstamp = $2;
86+
$tool = $3;
87+
$test = $4;
88+
89+
if ("$tstamp" lt "$last_tstamp") {
90+
$STAT{$test} = "Out-of-date";
91+
$TOOL{$test} = $tool;
92+
$TSTAMP{$test} = $tstamp;
93+
next;
94+
}
95+
if (exists $STAT{$test}) {
96+
my $last_tool, $last_stat;
97+
98+
$last_tool = $TOOL{$test};
99+
$last_stat = $STAT{$test};
100+
101+
if ($last_tool =~ /$tool/) {
102+
} else {
103+
$TOOL{$test} = "$last_tool, $tool";
104+
}
105+
106+
if ($last_stat =~ /fail/i) {
107+
} elsif ($last_stat =~ /error/i) {
108+
} elsif ($last_stat =~ /warn/i) {
109+
if ($stat =~ /fail/i) {
110+
$STAT{$test} = $status;
111+
} elsif ($stat =~ /error/i) {
112+
$STAT{$test} = $status;
113+
}
114+
} else {
115+
$STAT{$test} = $status;
116+
}
117+
} else {
118+
$STAT{$test} = $status;
119+
$TOOL{$test} = $tool;
120+
}
121+
122+
$TSTAMP{$test} = $tstamp;
123+
}
124+
}
125+
126+
printf("Last timestamp: $last_tstamp\n");
127+
128+
close REPORT;
129+
130+
foreach $key (sort (keys %STAT)) {
131+
printf("%-12s %12s $TSTAMP{$key} -- $TOOL{$key}\n", $key, $STAT{$key});
132+
}
133+
134+
open(HTML, "> $htmlfil");
135+
print HTML "<HTML><HEAD><TITLE>Simulation report</TITLE></HEAD><BODY>\n";
136+
print HTML "<H1 align=center>SD Controller Simulation Report</H1>\n";
137+
print HTML "<TABLE>\n";
138+
print HTML "<TR><TH>Test</TH><TH>Status</TH><TH>Sim Timestamp</TH><TH>Tool</TH></TR>\n";
139+
foreach $key (sort (keys %STAT)) {
140+
my $lin, $st;
141+
142+
$st = $STAT{$key};
143+
$clr="white";
144+
if ($st =~ /fail/i) {
145+
$clr="#ffa4a";
146+
} elsif ($st =~ /err/i) {
147+
$clr="#ffa4a";
148+
} elsif ($st =~ /warn/i) {
149+
$clr="#ffffca";
150+
} elsif ($st =~ /out-of-date/i) {
151+
$clr="#ffffca";
152+
} elsif ($st =~ /pass/i) {
153+
$clr="#caeec8";
154+
}
155+
$lin = sprintf("<TR><TH>%s</TH><TD bgcolor=$clr>%s</TD><TD>$TSTAMP{$key}</TD><TD>$TOOL{$key}</TD></TR>\n", $key, $st);
156+
print HTML $lin;
157+
}
158+
print HTML "</TABLE></BODY></HTML>\n";
159+
close HTML;

‎bench/verilog/report.html

+21
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
<HTML><HEAD><TITLE>Simulation report</TITLE></HEAD><BODY>
2+
<H1 align=center>SD Controller Simulation Report</H1>
3+
<TABLE>
4+
<TR><TH>Test</TH><TH>Status</TH><TH>Sim Timestamp</TH><TH>Tool</TH></TR>
5+
<TR><TH>axdmachk</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:04:51</TD><TD>IVerilog</TD></TR>
6+
<TR><TH>axemmc8x</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:11:05</TD><TD>IVerilog</TD></TR>
7+
<TR><TH>axemmcddr</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:09:03</TD><TD>IVerilog</TD></TR>
8+
<TR><TH>axemmcio</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:08:35</TD><TD>IVerilog</TD></TR>
9+
<TR><TH>axsdio8x</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:07:20</TD><TD>IVerilog</TD></TR>
10+
<TR><TH>axsdioddr</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:06:01</TD><TD>IVerilog</TD></TR>
11+
<TR><TH>axsdioio</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:05:47</TD><TD>IVerilog</TD></TR>
12+
<TR><TH>axsdstream</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:04:37</TD><TD>IVerilog</TD></TR>
13+
<TR><TH>emmc8x</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:07:56</TD><TD>IVerilog</TD></TR>
14+
<TR><TH>emmcddr</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:04:37</TD><TD>IVerilog</TD></TR>
15+
<TR><TH>emmcio</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:03:55</TD><TD>IVerilog</TD></TR>
16+
<TR><TH>sddmachk</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:02:20</TD><TD>IVerilog</TD></TR>
17+
<TR><TH>sdio8x</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:04:46</TD><TD>IVerilog</TD></TR>
18+
<TR><TH>sdioddr</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:02:42</TD><TD>IVerilog</TD></TR>
19+
<TR><TH>sdioio</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:02:44</TD><TD>IVerilog</TD></TR>
20+
<TR><TH>sdstream</TH><TD bgcolor=#caeec8>Pass</TD><TD>2025/04/21 18:02:27</TD><TD>IVerilog</TD></TR>
21+
</TABLE></BODY></HTML>

‎rtl/exportspi.v

+5-5
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
////////////////////////////////////////////////////////////////////////////////
22
//
3-
// Filename: rtl/exportspi.v
3+
// Filename: rtl/sdspi.v
44
// {{{
55
// Project: SD-Card controller
66
//
@@ -1048,7 +1048,7 @@ endmodule
10481048
//
10491049
////////////////////////////////////////////////////////////////////////////////
10501050
// }}}
1051-
// Copyright (C) 2016-2024, Gisselquist Technology, LLC
1051+
// Copyright (C) 2016-2025, Gisselquist Technology, LLC
10521052
// {{{
10531053
// This program is free software (firmware): you can redistribute it and/or
10541054
// modify it under the terms of the GNU General Public License as published
@@ -1561,7 +1561,7 @@ endmodule
15611561
//
15621562
////////////////////////////////////////////////////////////////////////////////
15631563
// }}}
1564-
// Copyright (C) 2016-2024, Gisselquist Technology, LLC
1564+
// Copyright (C) 2016-2025, Gisselquist Technology, LLC
15651565
// {{{
15661566
// This program is free software (firmware): you can redistribute it and/or
15671567
// modify it under the terms of the GNU General Public License as published
@@ -2293,7 +2293,7 @@ endmodule
22932293
//
22942294
////////////////////////////////////////////////////////////////////////////////
22952295
// }}}
2296-
// Copyright (C) 2016-2024, Gisselquist Technology, LLC
2296+
// Copyright (C) 2016-2025, Gisselquist Technology, LLC
22972297
// {{{
22982298
// This program is free software (firmware): you can redistribute it and/or
22992299
// modify it under the terms of the GNU General Public License as published
@@ -3038,7 +3038,7 @@ endmodule
30383038
//
30393039
////////////////////////////////////////////////////////////////////////////////
30403040
// }}}
3041-
// Copyright (C) 2016-2024, Gisselquist Technology, LLC
3041+
// Copyright (C) 2016-2025, Gisselquist Technology, LLC
30423042
// {{{
30433043
// This program is free software (firmware): you can redistribute it and/or
30443044
// modify it under the terms of the GNU General Public License as published

‎rtl/usage.pl

+24-2
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,10 @@
33
## Configuration definitions
44
## {{{
55
my $sdspi = "";
6-
my $sdio_nodma = " -chparam OPT_DMA 1\'b0";
7-
my $sdio_dma = " -chparam OPT_DMA 1\'b1 -chparam OPT_ISTREAM 1\'b1 -chparam OPT_OSTREAM 1\'b1 -chparam DMA_DW 64";
6+
my $sdio_nodma = " -chparam OPT_DMA 1\'b0 -chparam NUMIO 4 -chparam OPT_EMMC 1\'b0";
7+
my $emmc_nodma = " -chparam OPT_DMA 1\'b0 -chparam NUMIO 8 -chparam OPT_EMMC 1\'b1";
8+
my $sdio_dma = " -chparam OPT_DMA 1\'b1 -chparam OPT_EMMC 1\'b0 -chparam NUMIO 4 -chparam OPT_ISTREAM 1\'b1 -chparam OPT_OSTREAM 1\'b1 -chparam DMA_DW 64";
9+
my $emmc_dma = " -chparam OPT_DMA 1\'b1 -chparam OPT_EMMC 1\'b1 -chparam NUMIO 8 -chparam OPT_ISTREAM 1\'b1 -chparam OPT_OSTREAM 1\'b1 -chparam DMA_DW 64";
810
## }}}
911

1012
## Files
@@ -88,16 +90,36 @@
8890
calcusage($xilinxsynth,"sdio", "wb", $sdio_nodma,""),
8991
calcusage($asicsynth, "sdio", "wb", $sdio_nodma,$asicpost));
9092

93+
$result = $result . sprintf("EMMC(AXIL): %5d %5d %7d\n",
94+
calcusage($ice40synth, "sdio", "axil", $emmc_nodma,""),
95+
calcusage($xilinxsynth,"sdio", "axil", $emmc_nodma,""),
96+
calcusage($asicsynth, "sdio", "axil", $emmc_nodma,$asicpost));
97+
98+
$result = $result . sprintf("EMMC(WB): %5d %5d %7d\n",
99+
calcusage($ice40synth, "sdio", "wb", $emmc_nodma,""),
100+
calcusage($xilinxsynth,"sdio", "wb", $emmc_nodma,""),
101+
calcusage($asicsynth, "sdio", "wb", $emmc_nodma,$asicpost));
102+
91103
$result = $result . sprintf("SDIO w/DMA: %5d %5d %7d\n",
92104
calcusage($ice40synth, "sdio", "wb", $sdio_dma,""),
93105
calcusage($xilinxsynth,"sdio", "wb", $sdio_dma,""),
94106
calcusage($asicsynth, "sdio", "wb", $sdio_dma,$asicpost));
95107

108+
$result = $result . sprintf("EMMC w/DMA: %5d %5d %7d\n",
109+
calcusage($ice40synth, "sdio", "wb", $emmc_dma,""),
110+
calcusage($xilinxsynth,"sdio", "wb", $emmc_dma,""),
111+
calcusage($asicsynth, "sdio", "wb", $emmc_dma,$asicpost));
112+
96113
$result = $result . sprintf("SDAXI w/DMA: %5d %5d %7d\n",
97114
calcusage($ice40synth, "sdio", "axil", $sdio_dma,""),
98115
calcusage($xilinxsynth,"sdio", "axil", $sdio_dma,""),
99116
calcusage($asicsynth, "sdio", "axil", $sdio_dma,$asicpost));
100117

118+
$result = $result . sprintf("EMAXI w/DMA: %5d %5d %7d\n",
119+
calcusage($ice40synth, "sdio", "axil", $emmc_dma,""),
120+
calcusage($xilinxsynth,"sdio", "axil", $emmc_dma,""),
121+
calcusage($asicsynth, "sdio", "axil", $emmc_dma,$asicpost));
122+
101123
$result = $result . sprintf("SDSPI: %5d %5d %7d\n",
102124
calcusage($ice40synth, "sdspi", "wb", "",""),
103125
calcusage($xilinxsynth,"sdspi", "wb", "",""),

‎rtl/usage.txt

+8-4
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,12 @@
11
iCE40 X7-s RAW
22
Controller 4LUT 6LUT NANDs
33
-----------------------------------
4-
SDIO(AXIL): 3032 1534 731021
5-
SDIO(WB): 2986 1461 730143
6-
SDIO w/DMA: 5461 2955 993003
7-
SDAXI w/DMA: 6665 3576 802472
4+
SDIO(AXIL): 2999 1478 732363
5+
SDIO(WB): 2937 1420 731900
6+
EMMC(AXIL): 3812 2132 729782
7+
EMMC(WB): 3731 2085 733185
8+
SDIO w/DMA: 5408 2869 970077
9+
EMMC w/DMA: 6227 3491 997149
10+
SDAXI w/DMA: 6621 3569 802136
11+
EMAXI w/DMA: 7442 4254 807292
812
SDSPI: 1000 544 12719

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