@@ -415,7 +415,7 @@ event_wait(struct ethr_mutex_base_ *mtxb,
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/* Need to enqueue and wait... */
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tse -> uflgs = type ;
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- ethr_atomic_set (& tse -> uaflgs , type );
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+ ethr_atomic32_set (& tse -> uaflgs , type );
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ETHR_MTX_Q_LOCK (& mtxb -> qlck );
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locked = 1 ;
@@ -560,15 +560,15 @@ event_wait(struct ethr_mutex_base_ *mtxb,
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while (1 ) {
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ethr_event_reset (& tse -> event );
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- act = ethr_atomic_read_acqb (& tse -> uaflgs );
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+ act = ethr_atomic32_read_acqb (& tse -> uaflgs );
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if (!act )
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goto done ; /* Got it */
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ETHR_ASSERT (act == type );
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ethr_event_swait (& tse -> event , spincount );
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/* swait result: 0 || EINTR */
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- act = ethr_atomic_read_acqb (& tse -> uaflgs );
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+ act = ethr_atomic32_read_acqb (& tse -> uaflgs );
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if (!act )
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goto done ; /* Got it */
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}
@@ -588,7 +588,7 @@ wake_writer(struct ethr_mutex_base_ *mtxb, int is_rwmtx)
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dequeue (& mtxb -> q , tse , tse );
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ETHR_ASSERT (tse -> uflgs == ETHR_RWMTX_W_WAIT_FLG__ );
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- ETHR_ASSERT (ethr_atomic_read (& tse -> uaflgs ) == ETHR_RWMTX_W_WAIT_FLG__ );
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+ ETHR_ASSERT (ethr_atomic32_read (& tse -> uaflgs ) == ETHR_RWMTX_W_WAIT_FLG__ );
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#ifdef ETHR_MTX_HARD_DEBUG_WSQ
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mtxb -> ws -- ;
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#endif
@@ -598,7 +598,7 @@ wake_writer(struct ethr_mutex_base_ *mtxb, int is_rwmtx)
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ETHR_MTX_Q_UNLOCK (& mtxb -> qlck );
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- ethr_atomic_set (& tse -> uaflgs , 0 );
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+ ethr_atomic32_set (& tse -> uaflgs , 0 );
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ethr_event_set (& tse -> event );
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}
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@@ -973,7 +973,7 @@ enqueue_mtx(ethr_mutex *mtx, ethr_ts_event *tse_start, ethr_ts_event *tse_end)
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ETHR_MTX_HARD_DEBUG_CHK_Q (mtx );
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ETHR_MTX_Q_UNLOCK (& mtx -> mtxb .qlck );
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- ethr_atomic_set (& tse_start -> uaflgs , 0 );
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+ ethr_atomic32_set (& tse_start -> uaflgs , 0 );
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ethr_event_set (& tse_start -> event );
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}
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break ;
@@ -1064,9 +1064,9 @@ ethr_cond_signal(ethr_cond *cnd)
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ETHR_MTX_HARD_DEBUG_FENCE_CHK (mtx );
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ETHR_ASSERT (tse -> uflgs == ETHR_RWMTX_W_WAIT_FLG__ );
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- ETHR_ASSERT (ethr_atomic_read (& tse -> uaflgs ) == ETHR_CND_WAIT_FLG__ );
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+ ETHR_ASSERT (ethr_atomic32_read (& tse -> uaflgs ) == ETHR_CND_WAIT_FLG__ );
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- ethr_atomic_set (& tse -> uaflgs , ETHR_RWMTX_W_WAIT_FLG__ );
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+ ethr_atomic32_set (& tse -> uaflgs , ETHR_RWMTX_W_WAIT_FLG__ );
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dequeue (& cnd -> q , tse , tse );
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@@ -1117,11 +1117,11 @@ ethr_cond_broadcast(ethr_cond *cnd)
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/* The normal case */
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ETHR_ASSERT (tse_tmp -> uflgs == ETHR_RWMTX_W_WAIT_FLG__ );
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- ETHR_ASSERT (ethr_atomic_read (& tse_tmp -> uaflgs )
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+ ETHR_ASSERT (ethr_atomic32_read (& tse_tmp -> uaflgs )
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== ETHR_CND_WAIT_FLG__ );
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- ethr_atomic_set (& tse_tmp -> uaflgs ,
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- ETHR_RWMTX_W_WAIT_FLG__ );
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+ ethr_atomic32_set (& tse_tmp -> uaflgs ,
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+ ETHR_RWMTX_W_WAIT_FLG__ );
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}
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else {
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/* Should be very unusual */
@@ -1174,7 +1174,7 @@ ethr_cond_wait(ethr_cond *cnd, ethr_mutex *mtx)
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tse -> udata = (void * ) mtx ;
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tse -> uflgs = ETHR_RWMTX_W_WAIT_FLG__ ; /* Prep for mutex lock op */
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- ethr_atomic_set (& tse -> uaflgs , ETHR_CND_WAIT_FLG__ );
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+ ethr_atomic32_set (& tse -> uaflgs , ETHR_CND_WAIT_FLG__ );
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ETHR_MTX_Q_LOCK (& cnd -> qlck );
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@@ -1191,7 +1191,7 @@ ethr_cond_wait(ethr_cond *cnd, ethr_mutex *mtx)
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ethr_event_reset (& tse -> event );
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- act = ethr_atomic_read_acqb (& tse -> uaflgs );
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+ act = ethr_atomic32_read_acqb (& tse -> uaflgs );
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if (!act )
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break ; /* Mtx locked */
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@@ -1207,7 +1207,7 @@ ethr_cond_wait(ethr_cond *cnd, ethr_mutex *mtx)
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*/
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if (act == ETHR_CND_WAIT_FLG__ ) {
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ETHR_MTX_Q_LOCK (& cnd -> qlck );
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- act = ethr_atomic_read (& tse -> uaflgs );
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+ act = ethr_atomic32_read (& tse -> uaflgs );
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ETHR_ASSERT (act == ETHR_CND_WAIT_FLG__
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|| act == ETHR_RWMTX_W_WAIT_FLG__ );
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/*
@@ -1409,7 +1409,7 @@ wake_readers(ethr_rwmutex *rwmtx, int rs)
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rwmtx -> rq_end = NULL ;
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ETHR_ASSERT (!rwmtx -> mtxb .q
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- || (ethr_atomic_read (& rwmtx -> mtxb .q -> uaflgs )
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+ || (ethr_atomic32_read (& rwmtx -> mtxb .q -> uaflgs )
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== ETHR_RWMTX_W_WAIT_FLG__ ));
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ETHR_RWMTX_HARD_DEBUG_CHK_Q (rwmtx );
@@ -1420,15 +1420,15 @@ wake_readers(ethr_rwmutex *rwmtx, int rs)
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#ifdef ETHR_DEBUG
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ETHR_ASSERT (tse -> uflgs == ETHR_RWMTX_R_WAIT_FLG__ );
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- ETHR_ASSERT (ethr_atomic_read (& tse -> uaflgs )
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+ ETHR_ASSERT (ethr_atomic32_read (& tse -> uaflgs )
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== ETHR_RWMTX_R_WAIT_FLG__ );
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drs ++ ;
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#endif
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tse_next = tse -> next ; /* we aren't allowed to read tse->next
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after we have reset uaflgs */
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- ethr_atomic_set (& tse -> uaflgs , 0 );
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+ ethr_atomic32_set (& tse -> uaflgs , 0 );
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ethr_event_set (& tse -> event );
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tse = tse_next ;
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}
@@ -2812,7 +2812,7 @@ hard_debug_chk_q__(struct ethr_mutex_base_ *mtxb, int is_rwmtx)
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ETHR_MTX_HARD_ASSERT (tse -> next -> prev == tse );
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ETHR_MTX_HARD_ASSERT (tse -> prev -> next == tse );
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- type = ethr_atomic_read (& tse -> uaflgs );
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+ type = ethr_atomic32_read (& tse -> uaflgs );
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ETHR_MTX_HARD_ASSERT (type == tse -> uflgs );
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switch (type ) {
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case ETHR_RWMTX_W_WAIT_FLG__ :
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