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Right now, I am designing percpu struct in hypercraft. When initializing SMP, I need to obtain information about all of cpu info, such as the number of hart, whether it supports AIA and SSTC, and so on. This information needs to be probed and parsed through device trees. However, these pieces of information are not actually part of the core content of the hypervisor. Is it necessary to add CPU probe information in ArceOS, just like https://github.com/rivosinc/salus/blob/main/drivers/src/cpu.rs#L34 ?
The text was updated successfully, but these errors were encountered:
It is okay to get CPU-related information from the device tree. But this feature is not yet a critical development direction of ArceOS. Some progress can be seen in the multicore branch and this commit: 12b1ebc
Right now, I am designing
percpu
struct in hypercraft. When initializing SMP, I need to obtain information about all of cpu info, such as the number of hart, whether it supports AIA and SSTC, and so on. This information needs to be probed and parsed through device trees. However, these pieces of information are not actually part of the core content of the hypervisor. Is it necessary to add CPU probe information in ArceOS, just like https://github.com/rivosinc/salus/blob/main/drivers/src/cpu.rs#L34 ?The text was updated successfully, but these errors were encountered: