diff --git a/drivers/net/wireless/rtl8192cu/Kconfig b/drivers/net/wireless/rtl8192cu/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/Makefile b/drivers/net/wireless/rtl8192cu/Makefile old mode 100755 new mode 100644 index 1b4e84147a6dbd..b52cace2a2e7ae --- a/drivers/net/wireless/rtl8192cu/Makefile +++ b/drivers/net/wireless/rtl8192cu/Makefile @@ -252,7 +252,7 @@ ifeq ($(CONFIG_PLATFORM_ARM_BCM2708), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ARCH := arm CROSS_COMPILE ?= -KVER := 3.2.27+ +KVER := 3.6.11+ KSRC := /lib/modules/$(KVER)/build endif diff --git a/drivers/net/wireless/rtl8192cu/clean b/drivers/net/wireless/rtl8192cu/clean old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c b/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c b/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c b/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c old mode 100755 new mode 100644 index 513e8ab9dd5812..bdfec5da6eddb5 --- a/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c +++ b/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c @@ -683,8 +683,8 @@ _func_enter_; init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); - psurveyPara->bsslimit = cpu_to_le32(48); - psurveyPara->scan_mode = cpu_to_le32(pmlmepriv->scan_mode); + psurveyPara->bsslimit = 48; + psurveyPara->scan_mode = pmlmepriv->scan_mode; _rtw_memset(psurveyPara->ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); @@ -2395,6 +2395,7 @@ _func_enter_; _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); +#ifdef CONFIG_FW_MLMLE //endian_convert pnetwork->Length = le32_to_cpu(pnetwork->Length); pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); @@ -2411,7 +2412,7 @@ _func_enter_; pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); pnetwork->IELength = le32_to_cpu(pnetwork->IELength); - +#endif _enter_critical_bh(&pmlmepriv->lock, &irqL); diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_debug.c b/drivers/net/wireless/rtl8192cu/core/rtw_debug.c old mode 100755 new mode 100644 index 96e5bd186fc2a5..04e472d7c76d5d --- a/drivers/net/wireless/rtl8192cu/core/rtw_debug.c +++ b/drivers/net/wireless/rtl8192cu/core/rtw_debug.c @@ -453,6 +453,53 @@ int proc_set_rx_signal(struct file *file, const char *buffer, } +int proc_get_ampdu_enable(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct registry_priv *pregpriv = &padapter->registrypriv; + + int len = 0; + + if(pregpriv) + len += snprintf(page + len, count - len, + "%d\n", + pregpriv->ampdu_enable + ); + + *eof = 1; + return len; +} + +int proc_set_ampdu_enable(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + struct net_device *dev = (struct net_device *)data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct registry_priv *pregpriv = &padapter->registrypriv; + char tmp[32]; + u32 mode; + + if (count < 1) + return -EFAULT; + + if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { + + int num = sscanf(tmp, "%d ", &mode); + + if( pregpriv && mode >= 0 && mode < 3 ) + { + pregpriv->ampdu_enable= mode; + printk("ampdu_enable=%d\n", mode); + } + } + + return count; + +} + int proc_get_rssi_disp(char *page, char **start, off_t offset, int count, int *eof, void *data) diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c b/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c b/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_io.c b/drivers/net/wireless/rtl8192cu/core/rtw_io.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_query.c b/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_query.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_rtl.c b/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_rtl.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_set.c b/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_set.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_iol.c b/drivers/net/wireless/rtl8192cu/core/rtw_iol.c old mode 100755 new mode 100644 index ce3d1a92bddfd7..f725ad4d82feb1 --- a/drivers/net/wireless/rtl8192cu/core/rtw_iol.c +++ b/drivers/net/wireless/rtl8192cu/core/rtw_iol.c @@ -1,266 +1,266 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include - -#ifdef CONFIG_IOL -struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter) -{ - struct xmit_frame *xmit_frame; - struct xmit_buf *xmitbuf; - struct pkt_attrib *pattrib; - struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); - -#if 1 - if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL) - { - DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__); - goto exit; - } - - if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) - { - DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__); - rtw_free_xmitframe_ex(pxmitpriv, xmit_frame); - xmit_frame=NULL; - goto exit; - } - - xmit_frame->frame_tag = MGNT_FRAMETAG; - xmit_frame->pxmitbuf = xmitbuf; - xmit_frame->buf_addr = xmitbuf->pbuf; - xmitbuf->priv_data = xmit_frame; - - pattrib = &xmit_frame->attrib; - update_mgntframe_attrib(adapter, pattrib); - pattrib->qsel = 0x10; - pattrib->pktlen = pattrib->last_txcmdsz = 0; - -#else - if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__); - } - else { - pattrib = &xmit_frame->attrib; - update_mgntframe_attrib(adapter, pattrib); - pattrib->qsel = 0x10; - pattrib->pktlen = pattrib->last_txcmdsz = 0; - } -#endif - -exit: - return xmit_frame; -} - - -int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len) -{ - struct pkt_attrib *pattrib = &xmit_frame->attrib; - u16 buf_offset; - u32 ori_len; - -//Todo: bulkout without this offset -#ifdef CONFIG_USB_HCI - buf_offset = TXDESC_OFFSET; -#else - buf_offset = 0; -#endif - - ori_len = buf_offset+pattrib->pktlen; - - //check if the io_buf can accommodate new cmds - if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) { - DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__ - , ori_len + cmd_len + 8, MAX_XMITBUF_SZ); - return _FAIL; - } - - _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len); - pattrib->pktlen += cmd_len; - pattrib->last_txcmdsz += cmd_len; - - //DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); - - return _SUCCESS; -} - -int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) -{ - IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0}; - - RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary); - - return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); -} - -int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value) -{ - IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0}; - - RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); - RTW_PUT_BE32((u8*)&cmd.value, (u32)value); - - return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); -} - -int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value) -{ - IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0}; - - RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); - RTW_PUT_BE32((u8*)&cmd.value, (u32)value); - - return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); -} - -int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) -{ - IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0}; - u8* pos = (u8 *)&cmd; - - RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); - RTW_PUT_BE32((u8*)&cmd.value, (u32)value); - - return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); -} - -#ifdef DBG_IO -int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) -{ - if(addr + 1 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) - DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value); - - return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); -} - -int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) -{ - if(addr + 2 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) - DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value); - - return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); -} - -int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) -{ - if(addr + 4 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) - DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value); - - return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); -} -#endif - -int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) -{ - IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0}; - - RTW_PUT_BE32((u8*)&cmd.value, (u32)us); - - //DBG_871X("%s %u\n", __FUNCTION__, us); - - return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); -} - -int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) -{ - IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0}; - - RTW_PUT_BE32((u8*)&cmd.value, (u32)ms); - - //DBG_871X("%s %u\n", __FUNCTION__, ms); - - return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); -} - -int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) -{ - struct pkt_attrib *pattrib = &xmit_frame->attrib; - u16 buf_offset; - u32 ori_len; - IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; - -//Todo: bulkout without this offset -#ifdef CONFIG_USB_HCI - buf_offset = TXDESC_OFFSET; -#else - buf_offset = 0; -#endif - - ori_len = buf_offset+pattrib->pktlen; - - //check if the io_buf can accommodate new cmds - if(ori_len + 8 > MAX_XMITBUF_SZ) { - DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate end cmd\n", __FUNCTION__ - , ori_len + 8, MAX_XMITBUF_SZ); - return _FAIL; - } - - _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, (u8*)&end_cmd, 8); - pattrib->pktlen += 8; - pattrib->last_txcmdsz += 8; - - //DBG_871X("%s ori:%u + 8 = %u\n", __FUNCTION__ , ori_len, buf_offset+pattrib->pktlen); - - return _SUCCESS; -} - -int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) -{ - if(adapter->HalFunc.IOL_exec_cmds_sync) - return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); - - return _FAIL; -} - -int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms) -{ - struct xmit_frame *xmit_frame; - - if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL) - return _FAIL; - - if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL) - return _FAIL; - - return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); -} - -int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms) -{ - IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; - return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms); -} - -bool rtw_IOL_applied(ADAPTER *adapter) -{ - if(adapter->registrypriv.force_iol) - return _TRUE; - -#ifdef CONFIG_USB_HCI - if(!adapter->dvobjpriv.ishighspeed) - return _TRUE; -#endif - - return _FALSE; -} - -#endif //CONFIG_IOL - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include + +#ifdef CONFIG_IOL +struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter) +{ + struct xmit_frame *xmit_frame; + struct xmit_buf *xmitbuf; + struct pkt_attrib *pattrib; + struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); + +#if 1 + if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL) + { + DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__); + goto exit; + } + + if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) + { + DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__); + rtw_free_xmitframe_ex(pxmitpriv, xmit_frame); + xmit_frame=NULL; + goto exit; + } + + xmit_frame->frame_tag = MGNT_FRAMETAG; + xmit_frame->pxmitbuf = xmitbuf; + xmit_frame->buf_addr = xmitbuf->pbuf; + xmitbuf->priv_data = xmit_frame; + + pattrib = &xmit_frame->attrib; + update_mgntframe_attrib(adapter, pattrib); + pattrib->qsel = 0x10; + pattrib->pktlen = pattrib->last_txcmdsz = 0; + +#else + if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__); + } + else { + pattrib = &xmit_frame->attrib; + update_mgntframe_attrib(adapter, pattrib); + pattrib->qsel = 0x10; + pattrib->pktlen = pattrib->last_txcmdsz = 0; + } +#endif + +exit: + return xmit_frame; +} + + +int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len) +{ + struct pkt_attrib *pattrib = &xmit_frame->attrib; + u16 buf_offset; + u32 ori_len; + +//Todo: bulkout without this offset +#ifdef CONFIG_USB_HCI + buf_offset = TXDESC_OFFSET; +#else + buf_offset = 0; +#endif + + ori_len = buf_offset+pattrib->pktlen; + + //check if the io_buf can accommodate new cmds + if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) { + DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__ + , ori_len + cmd_len + 8, MAX_XMITBUF_SZ); + return _FAIL; + } + + _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len); + pattrib->pktlen += cmd_len; + pattrib->last_txcmdsz += cmd_len; + + //DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); + + return _SUCCESS; +} + +int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) +{ + IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0}; + + RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary); + + return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); +} + +int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value) +{ + IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0}; + + RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); + RTW_PUT_BE32((u8*)&cmd.value, (u32)value); + + return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); +} + +int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value) +{ + IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0}; + + RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); + RTW_PUT_BE32((u8*)&cmd.value, (u32)value); + + return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); +} + +int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) +{ + IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0}; + u8* pos = (u8 *)&cmd; + + RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); + RTW_PUT_BE32((u8*)&cmd.value, (u32)value); + + return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); +} + +#ifdef DBG_IO +int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) +{ + if(addr + 1 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) + DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value); + + return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); +} + +int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) +{ + if(addr + 2 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) + DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value); + + return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); +} + +int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) +{ + if(addr + 4 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) + DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value); + + return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); +} +#endif + +int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) +{ + IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0}; + + RTW_PUT_BE32((u8*)&cmd.value, (u32)us); + + //DBG_871X("%s %u\n", __FUNCTION__, us); + + return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); +} + +int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) +{ + IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0}; + + RTW_PUT_BE32((u8*)&cmd.value, (u32)ms); + + //DBG_871X("%s %u\n", __FUNCTION__, ms); + + return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); +} + +int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) +{ + struct pkt_attrib *pattrib = &xmit_frame->attrib; + u16 buf_offset; + u32 ori_len; + IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; + +//Todo: bulkout without this offset +#ifdef CONFIG_USB_HCI + buf_offset = TXDESC_OFFSET; +#else + buf_offset = 0; +#endif + + ori_len = buf_offset+pattrib->pktlen; + + //check if the io_buf can accommodate new cmds + if(ori_len + 8 > MAX_XMITBUF_SZ) { + DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate end cmd\n", __FUNCTION__ + , ori_len + 8, MAX_XMITBUF_SZ); + return _FAIL; + } + + _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, (u8*)&end_cmd, 8); + pattrib->pktlen += 8; + pattrib->last_txcmdsz += 8; + + //DBG_871X("%s ori:%u + 8 = %u\n", __FUNCTION__ , ori_len, buf_offset+pattrib->pktlen); + + return _SUCCESS; +} + +int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) +{ + if(adapter->HalFunc.IOL_exec_cmds_sync) + return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); + + return _FAIL; +} + +int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms) +{ + struct xmit_frame *xmit_frame; + + if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL) + return _FAIL; + + if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL) + return _FAIL; + + return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); +} + +int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms) +{ + IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; + return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms); +} + +bool rtw_IOL_applied(ADAPTER *adapter) +{ + if(adapter->registrypriv.force_iol) + return _TRUE; + +#ifdef CONFIG_USB_HCI + if(!adapter->dvobjpriv.ishighspeed) + return _TRUE; +#endif + + return _FALSE; +} + +#endif //CONFIG_IOL + diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_mlme.c b/drivers/net/wireless/rtl8192cu/core/rtw_mlme.c old mode 100755 new mode 100644 index 647d67a8427c68..2e11d9d417ae43 --- a/drivers/net/wireless/rtl8192cu/core/rtw_mlme.c +++ b/drivers/net/wireless/rtl8192cu/core/rtw_mlme.c @@ -1109,7 +1109,13 @@ _func_enter_; _enter_critical_bh(&pmlmepriv->lock, &irqL); - pmlmepriv->probereq_wpsie_len = 0 ;//reset to zero + if(pmlmepriv->wps_probe_req_ie) + { + u32 free_len = pmlmepriv->wps_probe_req_ie_len; + pmlmepriv->wps_probe_req_ie_len = 0; + rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); + pmlmepriv->wps_probe_req_ie = NULL; + } RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv))); @@ -1931,8 +1937,8 @@ _func_enter_; } //to do : init sta_info variable - psta->qos_option = 0; - psta->mac_id = le32_to_cpu((uint)pstassoc->cam_id); + psta->qos_option = 0; + psta->mac_id = (uint)pstassoc->cam_id; //psta->aid = (uint)pstassoc->cam_id; if(adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_mlme_ext.c b/drivers/net/wireless/rtl8192cu/core/rtw_mlme_ext.c old mode 100755 new mode 100644 index 7aaf136800412b..e1e496d08e70fb --- a/drivers/net/wireless/rtl8192cu/core/rtw_mlme_ext.c +++ b/drivers/net/wireless/rtl8192cu/core/rtw_mlme_ext.c @@ -143,7 +143,7 @@ ChannelPlan definitions static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 - {{1,2,3,4,5,6,7,8,9,10,11,13,13},13}, // 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 + {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 {{1,2,3,4,5,6,7,8,9,10,11},11}, // 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 {{10,11,12,13},4}, // 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 @@ -6169,7 +6169,7 @@ void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 blnbc) pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); } - +#if 0 //add wps_ie for wps2.0 if(pmlmepriv->probereq_wpsie_len>0 && pmlmepriv->probereq_wpsie_lenpktlen += pmlmepriv->probereq_wpsie_len; //pmlmepriv->probereq_wpsie_len = 0 ;//reset to zero } - +#else + //add wps_ie for wps2.0 + if(pmlmepriv->wps_probe_req_ie_len>0 && pmlmepriv->wps_probe_req_ie) + { + _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); + pframe += pmlmepriv->wps_probe_req_ie_len; + pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; + //pmlmepriv->wps_probe_req_ie_len = 0 ;//reset to zero + } +#endif pattrib->last_txcmdsz = pattrib->pktlen; @@ -7533,60 +7542,41 @@ BOOLEAN IsLegal5GChannel( void site_survey(_adapter *padapter) { - unsigned char survey_channel, val8; - RT_SCAN_TYPE ScanType; + unsigned char survey_channel = 0, val8; + RT_SCAN_TYPE ScanType = SCAN_PASSIVE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u32 initialgain = 0; + #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo= &(padapter->wdinfo); static unsigned char prev_survey_channel = 0; static unsigned int p2p_scan_count = 0; -#endif //CONFIG_P2P - -#ifdef CONFIG_P2P - survey_channel = 0; - ScanType = SCAN_PASSIVE; - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) + if(rtw_p2p_findphase_ex_is_social(pwdinfo)) { - if ( pwdinfo->find_phase_state_exchange_cnt != 0 ) - { - // Commented by Albert 2011/06/03 - // The driver is in the find phase, it should go through the social channel. - survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx]; - ScanType = SCAN_ACTIVE; - } - else - { - // Commented by Albert 2011/06/03 - // The driver is in the scan phase, it should go through all the channel. - survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; - ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType; - } + // Commented by Albert 2011/06/03 + // The driver is in the find phase, it should go through the social channel. + survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx]; } - else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) - { - // Commented by Albert 20110805 - // The following code will be executed only when the P2P is disable. - survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; - ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType; - } -#else + else +#endif //CONFIG_P2P { survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; - ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType; } -#endif //CONFIG_P2P + + ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType; + + //DBG_871X("switching to ch:%d (cnt:%u,idx:%d) at %dms, %c%c%c\n" + // , survey_channel + // , pwdinfo->find_phase_state_exchange_cnt, pmlmeext->sitesurvey_res.channel_idx + // , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) + // , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' + // , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' + //); if(survey_channel != 0) { - - //DBG_871X("switching to ch:%d at %dms, %c%c%c\n" - // , survey_channel, rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) - // , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' - // , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' - //); //PAUSE 4-AC Queue when site_survey //padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); //val8 |= 0x0f; @@ -7652,8 +7642,7 @@ void site_survey(_adapter *padapter) #endif } - if ( ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) ) && - ( pwdinfo->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_CNT ) ) + if(rtw_p2p_findphase_ex_is_needed(pwdinfo)) { // Set the P2P State to the listen state of find phase and set the current channel to the listen channel set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); @@ -7665,7 +7654,6 @@ void site_survey(_adapter *padapter) } else #endif //CONFIG_P2P - { #ifdef CONFIG_ANTENNA_DIVERSITY @@ -7687,6 +7675,7 @@ void site_survey(_adapter *padapter) { rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); } + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); #endif //CONFIG_P2P pmlmeext->sitesurvey_res.state = SCAN_COMPLETE; @@ -8819,13 +8808,20 @@ void survey_timer_hdl(_adapter *padapter) #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) { - pwdinfo->find_phase_state_exchange_cnt = P2P_FINDPHASE_EX_CNT; + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); pmlmeext->sitesurvey_res.channel_idx = 3; + DBG_871X("%s idx:%d, cnt:%u\n", __FUNCTION__ + , pmlmeext->sitesurvey_res.channel_idx + , pwdinfo->find_phase_state_exchange_cnt + ); } else #endif { pmlmeext->sitesurvey_res.channel_idx = pmlmeext->max_chan_nums; + DBG_871X("%s idx:%d\n", __FUNCTION__ + , pmlmeext->sitesurvey_res.channel_idx + ); } pmlmeext->scan_abort = _FALSE;//reset @@ -9245,9 +9241,11 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); //config the initial gain under linking, need to write the BB registers + #ifndef CONFIG_BEFORE_LINKED_DIG initialgain = 0x1E; padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); - + #endif + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); join_type = 0; padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); @@ -9326,15 +9324,15 @@ u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) pmlmeext->sitesurvey_res.channel_idx = 0; for(i=0;issid[i].SsidLength)) { + if(pparm->ssid[i].SsidLength) { _rtw_memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); - pmlmeext->sitesurvey_res.ssid[i].SsidLength= le32_to_cpu(pparm->ssid[i].SsidLength); + pmlmeext->sitesurvey_res.ssid[i].SsidLength= pparm->ssid[i].SsidLength; } else { pmlmeext->sitesurvey_res.ssid[i].SsidLength= 0; } } - pmlmeext->sitesurvey_res.scan_mode = le32_to_cpu(pparm->scan_mode); + pmlmeext->sitesurvey_res.scan_mode = pparm->scan_mode; //issue null data if associating to the AP if (is_client_associated_to_ap(padapter) == _TRUE) @@ -9370,8 +9368,9 @@ u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) if((wdev_to_priv(padapter->rtw_wdev))->p2p_enabled == _TRUE) initialgain = 0x27; else -#endif +#endif initialgain = 0x17; + #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) initialgain = 0x27; diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_mp.c b/drivers/net/wireless/rtl8192cu/core/rtw_mp.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_mp_ioctl.c b/drivers/net/wireless/rtl8192cu/core/rtw_mp_ioctl.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_p2p.c b/drivers/net/wireless/rtl8192cu/core/rtw_p2p.c old mode 100755 new mode 100644 index bdfcdf1c8552bd..1df9d62a7bcf65 --- a/drivers/net/wireless/rtl8192cu/core/rtw_p2p.c +++ b/drivers/net/wireless/rtl8192cu/core/rtw_p2p.c @@ -1,3498 +1,3498 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTW_P2P_C_ - -#include -#include -#include - -#ifdef CONFIG_P2P - -int is_any_client_associated( _adapter *padapter ) -{ - _irqL irqL; - _list *phead, *plist; - int intFound = _FALSE; - - struct sta_priv *pstapriv = &padapter->stapriv; - - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - phead = &pstapriv->asoc_list; - plist = get_next(phead); - - if ( rtw_end_of_queue_search(phead, plist) == _TRUE ) - { - intFound = _FALSE; - } - else - { - intFound = _TRUE; - } - - _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - return( intFound ); - -} - -static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - _irqL irqL; - _list *phead, *plist; - u32 len=0; - u16 attr_len = 0; - u8 tmplen, *pdata_attr, *pstart, *pcur; - struct sta_info *psta = NULL; - _adapter *padapter = pwdinfo->padapter; - struct sta_priv *pstapriv = &padapter->stapriv; - - DBG_871X("%s\n", __FUNCTION__); - - pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN); - - pstart = pdata_attr; - pcur = pdata_attr; - - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - phead = &pstapriv->asoc_list; - plist = get_next(phead); - - //look up sta asoc_queue - while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) - { - psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); - - plist = get_next(plist); - - - if(psta->is_p2p_device) - { - tmplen = 0; - - pcur++; - - //P2P device address - _rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN); - pcur += ETH_ALEN; - - //P2P interface address - _rtw_memcpy(pcur, psta->hwaddr, ETH_ALEN); - pcur += ETH_ALEN; - - *pcur = psta->dev_cap; - pcur++; - - //*(u16*)(pcur) = cpu_to_be16(psta->config_methods); - RTW_PUT_BE16(pcur, psta->config_methods); - pcur += 2; - - _rtw_memcpy(pcur, psta->primary_dev_type, 8); - pcur += 8; - - *pcur = psta->num_of_secdev_type; - pcur++; - - _rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8); - pcur += psta->num_of_secdev_type*8; - - if(psta->dev_name_len>0) - { - //*(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); - RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME); - pcur += 2; - - //*(u16*)(pcur) = cpu_to_be16( psta->dev_name_len ); - RTW_PUT_BE16(pcur, psta->dev_name_len); - pcur += 2; - - _rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len); - pcur += psta->dev_name_len; - } - - - tmplen = (u8)(pcur-pstart); - - *pstart = (tmplen-1); - - attr_len += tmplen; - - //pstart += tmplen; - pstart = pcur; - - } - - - } - _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - if(attr_len>0) - { - len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr); - } - - rtw_mfree(pdata_attr, MAX_P2P_IE_LEN); - - return len; - -} - -static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - _adapter *padapter = pwdinfo->padapter; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame - u32 p2poui = cpu_to_be32(P2POUI); - u8 oui_subtype = P2P_GO_DISC_REQUEST; - u8 dialogToken=0; - - DBG_871X("[%s]\n", __FUNCTION__); - - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - return; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); - - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_ACTION); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - //Build P2P action frame header - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); - - //there is no IE in this P2P action frame - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(padapter, pmgntframe); - -} - -static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - _adapter *padapter = pwdinfo->padapter; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; - u8 action = P2P_PUB_ACTION_ACTION; - u32 p2poui = cpu_to_be32(P2POUI); - u8 oui_subtype = P2P_DEVDISC_RESP; - u8 p2pie[8] = { 0x00 }; - u32 p2pielen = 0; - - DBG_871X("[%s]\n", __FUNCTION__); - - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - return; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN); - - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_ACTION); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - //Build P2P public action frame header - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); - - - //Build P2P IE - // P2P OUI - p2pielen = 0; - p2pie[ p2pielen++ ] = 0x50; - p2pie[ p2pielen++ ] = 0x6F; - p2pie[ p2pielen++ ] = 0x9A; - p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - // P2P_ATTR_STATUS - p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); - - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen); - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(padapter, pmgntframe); - -} - -static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, u8* frame_body, u16 config_method) -{ - _adapter *padapter = pwdinfo->padapter; - unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; - u8 action = P2P_PUB_ACTION_ACTION; - u8 dialogToken = frame_body[7]; // The Dialog Token of provisioning discovery request frame. - u32 p2poui = cpu_to_be32(P2POUI); - u8 oui_subtype = P2P_PROVISION_DISC_RESP; - u8 wpsie[ 100 ] = { 0x00 }; - u8 wpsielen = 0; -#ifdef CONFIG_WFD - u32 wfdielen = 0; -#endif //CONFIG_WFD - - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - return; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); - - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_ACTION); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); - - wpsielen = 0; - // WPS OUI - //*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); - RTW_PUT_BE32(wpsie, WPSOUI); - wpsielen += 4; - -#if 0 - // WPS version - // Type: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); - wpsielen += 2; - - // Length: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); - wpsielen += 2; - - // Value: - wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 -#endif - - // Config Method - // Type: - //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); - RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); - wpsielen += 2; - - // Length: - //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); - RTW_PUT_BE16(wpsie + wpsielen, 0x0002); - wpsielen += 2; - - // Value: - //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); - RTW_PUT_BE16(wpsie + wpsielen, config_method); - wpsielen += 2; - - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); - -#ifdef CONFIG_WFD - wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); - pframe += wfdielen; - pattrib->pktlen += wfdielen; -#endif //CONFIG_WFD - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(padapter, pmgntframe); - - return; - -} - -static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - _adapter *padapter = pwdinfo->padapter; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame - u32 p2poui = cpu_to_be32(P2POUI); - u8 oui_subtype = P2P_PRESENCE_RESPONSE; - u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; - u8 noa_attr_content[32] = { 0x00 }; - u32 p2pielen = 0; - - DBG_871X("[%s]\n", __FUNCTION__); - - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - return; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); - - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_ACTION); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - //Build P2P action frame header - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); - - - //Add P2P IE header - // P2P OUI - p2pielen = 0; - p2pie[ p2pielen++ ] = 0x50; - p2pie[ p2pielen++ ] = 0x6F; - p2pie[ p2pielen++ ] = 0x9A; - p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - //Add Status attribute in P2P IE - p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); - - //Add NoA attribute in P2P IE - noa_attr_content[0] = 0x1;//index - noa_attr_content[1] = 0x0;//CTWindow and OppPS Parameters - - //todo: Notice of Absence Descriptor(s) - - p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content); - - - - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen)); - - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(padapter, pmgntframe); - -} - -u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; - u16 capability=0; - u32 len=0, p2pielen = 0; - - - // P2P OUI - p2pielen = 0; - p2pie[ p2pielen++ ] = 0x50; - p2pie[ p2pielen++ ] = 0x6F; - p2pie[ p2pielen++ ] = 0x9A; - p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - - // According to the P2P Specification, the beacon frame should contain 3 P2P attributes - // 1. P2P Capability - // 2. P2P Device ID - // 3. Notice of Absence ( NOA ) - - // P2P Capability ATTR - // Type: - // Length: - // Value: - // Device Capability Bitmap, 1 byte - // Be able to participate in additional P2P Groups and - // support the P2P Invitation Procedure - // Group Capability Bitmap, 1 byte - capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; - capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8); - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) - capability |= (P2P_GRPCAP_GROUP_FORMATION<<8); - - capability = cpu_to_le16(capability); - - p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8*)&capability); - - - // P2P Device ID ATTR - p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr); - - - // Notice of Absence ATTR - // Type: - // Length: - // Value: - - //go_add_noa_attr(pwdinfo); - - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); - - - return len; - -} - -#ifdef CONFIG_WFD -u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110812 - // According to the WFD Specification, the beacon frame should contain 4 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID - // 3. Coupled Sink Information - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - - if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - if ( is_any_client_associated( pwdinfo->padapter ) ) - { - // WFD primary sink + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - } - else - { - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - } - - } - else - { - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - } - - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110812 - // According to the WFD Specification, the probe request frame should contain 4 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID - // 3. Coupled Sink Information - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110812 - // According to the WFD Specification, the probe response frame should contain 4 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID - // 3. Coupled Sink Information - // 4. WFD Session Information - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - - if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - if ( is_any_client_associated( pwdinfo->padapter ) ) - { - // WFD primary sink + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - } - else - { - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - } - - } - else - { - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - } - - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) - { - // WFD Session Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0000); - wfdielen += 2; - - // Todo: to add the list of WFD device info descriptor in WFD group. - - } - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = NULL; - struct mlme_priv *pmlmepriv = NULL; - struct wifi_display_info *pwfd_info = NULL; - - // WFD OUI - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) - { - return 0; - } - - padapter = pwdinfo->padapter; - pmlmepriv = &padapter->mlmepriv; - pwfd_info = &padapter->wdinfo.wfd_info; - - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110812 - // According to the WFD Specification, the probe request frame should contain 4 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID - // 3. Coupled Sink Information - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110812 - // According to the WFD Specification, the probe request frame should contain 4 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID - // 3. Coupled Sink Information - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110825 - // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID ( Optional ) - // 3. Local IP Adress ( Optional ) - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110825 - // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID ( Optional ) - // 3. Local IP Adress ( Optional ) - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110825 - // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID ( Optional ) - // 3. Local IP Adress ( Optional ) - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110825 - // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID ( Optional ) - // 3. Local IP Adress ( Optional ) - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - -u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; - u32 len=0, wfdielen = 0; - _adapter *padapter = pwdinfo->padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; - - // WFD OUI - wfdielen = 0; - wfdie[ wfdielen++ ] = 0x50; - wfdie[ wfdielen++ ] = 0x6F; - wfdie[ wfdielen++ ] = 0x9A; - wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 - - // Commented by Albert 20110825 - // According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes - // 1. WFD Device Information - // 2. Associated BSSID ( Optional ) - // 3. Local IP Adress ( Optional ) - - - // WFD Device Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value1: - // WFD device information - // WFD primary sink + available for WFD session + WiFi Direct mode - RTW_PUT_BE16(wfdie + wfdielen, 0x0011); - wfdielen += 2; - - // Value2: - // Session Management Control Port - // Default TCP port for RTSP messages is 554 - RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); - wfdielen += 2; - - // Value3: - // WFD Device Maximum Throughput - // 300Mbps is the maximum throughput - RTW_PUT_BE16(wfdie + wfdielen, 300); - wfdielen += 2; - - // Associated BSSID ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0006); - wfdielen += 2; - - // Value: - // Associated BSSID - if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) - { - _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); - } - else - { - _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); - } - - wfdielen += ETH_ALEN; - - // Coupled Sink Information ATTR - // Type: - wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; - - // Length: - // Note: In the WFD specification, the size of length field is 2. - RTW_PUT_BE16(wfdie + wfdielen, 0x0001); - wfdielen += 2; - - // Value: - // Coupled Sink Status bitmap - // Not coupled/available for Coupling - wfdie[ wfdielen++ ] = 0; - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); - - return len; - -} - - -#endif //CONFIG_WFD - -u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; - u32 len=0, p2pielen = 0; - - // P2P OUI - p2pielen = 0; - p2pie[ p2pielen++ ] = 0x50; - p2pie[ p2pielen++ ] = 0x6F; - p2pie[ p2pielen++ ] = 0x9A; - p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - // Commented by Albert 20100907 - // According to the P2P Specification, the probe response frame should contain 5 P2P attributes - // 1. P2P Capability - // 2. Extended Listen Timing - // 3. Notice of Absence ( NOA ) ( Only GO needs this ) - // 4. Device Info - // 5. Group Info ( Only GO need this ) - - // P2P Capability ATTR - // Type: - p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); - RTW_PUT_LE16(p2pie + p2pielen, 0x0002); - p2pielen += 2; - - // Value: - // Device Capability Bitmap, 1 byte - // Be able to participate in additional P2P Groups and - // support the P2P Invitation Procedure - p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; - - // Group Capability Bitmap, 1 byte - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - p2pie[ p2pielen ] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS); - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) - p2pie[ p2pielen ] |= P2P_GRPCAP_GROUP_FORMATION; - - p2pielen++; - } - else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) ) - { - // Group Capability Bitmap, 1 byte - p2pie[ p2pielen++ ] = 0x00; - } - - // Extended Listen Timing ATTR - // Type: - p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); - RTW_PUT_LE16(p2pie + p2pielen, 0x0004); - p2pielen += 2; - - // Value: - // Availability Period - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); - RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); - p2pielen += 2; - - // Availability Interval - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); - RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); - p2pielen += 2; - - - // Notice of Absence ATTR - // Type: - // Length: - // Value: - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - //go_add_noa_attr(pwdinfo); - } - - // Device Info ATTR - // Type: - p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; - - // Length: - // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) - // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); - RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); - p2pielen += 2; - - // Value: - // P2P Device Address - _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); - p2pielen += ETH_ALEN; - - // Config Method - // This field should be big endian. Noted by P2P specification. - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); - RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); - p2pielen += 2; - - // Primary Device Type - // Category ID - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI); - p2pielen += 2; - - // OUI - //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); - RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); - p2pielen += 4; - - // Sub Category ID - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP); - p2pielen += 2; - - // Number of Secondary Device Types - p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List - - // Device Name - // Type: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); - p2pielen += 2; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); - RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); - p2pielen += 2; - - // Value: - _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); - p2pielen += pwdinfo->device_name_len; - - - // Group Info ATTR - // Type: - // Length: - // Value: - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen); - } - - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); - - - return len; - -} - -u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ) -{ - u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; - u32 len=0, p2pielen = 0; - - // P2P OUI - p2pielen = 0; - p2pie[ p2pielen++ ] = 0x50; - p2pie[ p2pielen++ ] = 0x6F; - p2pie[ p2pielen++ ] = 0x9A; - p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - // Commented by Albert 20110301 - // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes - // 1. P2P Capability - // 2. Device Info - // 3. Group ID ( When joining an operating P2P Group ) - - // P2P Capability ATTR - // Type: - p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); - RTW_PUT_LE16(p2pie + p2pielen, 0x0002); - p2pielen += 2; - - // Value: - // Device Capability Bitmap, 1 byte - // Be able to participate in additional P2P Groups and - // support the P2P Invitation Procedure - p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; - - // Group Capability Bitmap, 1 byte - p2pie[ p2pielen++ ] = 0x00; - - - // Device Info ATTR - // Type: - p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; - - // Length: - // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) - // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); - RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); - p2pielen += 2; - - // Value: - // P2P Device Address - _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); - p2pielen += ETH_ALEN; - - // Config Method - // This field should be big endian. Noted by P2P specification. - if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) - { - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC); - } - else - { - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY); - } - - p2pielen += 2; - - // Primary Device Type - // Category ID - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI); - p2pielen += 2; - - // OUI - //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); - RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); - p2pielen += 4; - - // Sub Category ID - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP); - p2pielen += 2; - - // Number of Secondary Device Types - p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List - - // Device Name - // Type: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); - RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); - p2pielen += 2; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); - RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); - p2pielen += 2; - - // Value: - _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); - p2pielen += pwdinfo->device_name_len; - - if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) - { - // Added by Albert 2011/05/19 - // In this case, the pdev_raddr is the device address of the group owner. - - // P2P Group ID ATTR - // Type: - p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen ); - RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen); - p2pielen += 2; - - // Value: - _rtw_memcpy( p2pie + p2pielen, pdev_raddr, ETH_ALEN ); - p2pielen += ETH_ALEN; - - _rtw_memcpy( p2pie + p2pielen, pssid, ussidlen ); - p2pielen += ussidlen; - - } - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); - - - return len; - -} - - -u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code) -{ - u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; - u32 len=0, p2pielen = 0; - - // P2P OUI - p2pielen = 0; - p2pie[ p2pielen++ ] = 0x50; - p2pie[ p2pielen++ ] = 0x6F; - p2pie[ p2pielen++ ] = 0x9A; - p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - // According to the P2P Specification, the Association response frame should contain 2 P2P attributes - // 1. Status - // 2. Extended Listen Timing (optional) - - - // Status ATTR - p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code); - - - // Extended Listen Timing ATTR - // Type: - // Length: - // Value: - - - pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); - - return len; - -} - -u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) -{ - u32 len=0; - - return len; -} - -u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -{ - u8 *p; - u32 ret=_FALSE; - u8 *p2pie; - u32 p2pielen = 0; - int ssid_len=0, rate_cnt = 0; - - p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt, - len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); - - if ( rate_cnt <= 4 ) - { - int i, g_rate =0; - - for( i = 0; i < rate_cnt; i++ ) - { - if ( ( ( *( p + 2 + i ) & 0xff ) != 0x02 ) && - ( ( *( p + 2 + i ) & 0xff ) != 0x04 ) && - ( ( *( p + 2 + i ) & 0xff ) != 0x0B ) && - ( ( *( p + 2 + i ) & 0xff ) != 0x16 ) ) - { - g_rate = 1; - } - } - - if ( g_rate == 0 ) - { - // There is no OFDM rate included in SupportedRates IE of this probe request frame - // The driver should response this probe request. - return ret; - } - } - else - { - // rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4. - // We should proceed the following check for this probe request. - } - - // Added comments by Albert 20100906 - // There are several items we should check here. - // 1. This probe request frame must contain the P2P IE. (Done) - // 2. This probe request frame must contain the wildcard SSID. (Done) - // 3. Wildcard BSSID. (Todo) - // 4. Destination Address. ( Done in mgt_dispatcher function ) - // 5. Requested Device Type in WSC IE. (Todo) - // 6. Device ID attribute in P2P IE. (Todo) - - p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len, - len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); - - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - if((p2pie=rtw_get_p2p_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen))) - { - if ( (p != NULL) && _rtw_memcmp( ( void * ) ( p+2 ), ( void * ) pwdinfo->p2p_wildcard_ssid , 7 )) - { - //todo: - //Check Requested Device Type attributes in WSC IE. - //Check Device ID attribute in P2P IE - - ret = _TRUE; - } - } - else - { - //non -p2p device - } - - } - - - return ret; - -} - -u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta) -{ - u8 status_code = P2P_STATUS_SUCCESS; - u8 *pbuf, *pattr_content=NULL; - u32 attr_contentlen = 0; - u16 cap_attr=0; - unsigned short frame_type, ie_offset=0; - u8 * ies; - u32 ies_len; - u8 * p2p_ie; - u32 p2p_ielen = 0; - - if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - return P2P_STATUS_FAIL_REQUEST_UNABLE; - - frame_type = GetFrameSubType(pframe); - if (frame_type == WIFI_ASSOCREQ) - { - ie_offset = _ASOCREQ_IE_OFFSET_; - } - else // WIFI_REASSOCREQ - { - ie_offset = _REASOCREQ_IE_OFFSET_; - } - - ies = pframe + WLAN_HDR_A3_LEN + ie_offset; - ies_len = len - WLAN_HDR_A3_LEN - ie_offset; - - p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen); - - if ( !p2p_ie ) - { - DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); - status_code = P2P_STATUS_FAIL_INVALID_PARAM; - } - else - { - DBG_8192C( "[%s] P2P IE Found!!\n", __FUNCTION__ ); - } - - while ( p2p_ie ) - { - //Check P2P Capability ATTR - if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) - { - DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); - cap_attr = le16_to_cpu(cap_attr); - psta->dev_cap = cap_attr&0xff; - } - - //Check Extended Listen Timing ATTR - - - //Check P2P Device Info ATTR - if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint*)&attr_contentlen)) - { - DBG_8192C( "[%s] Got P2P DEVICE INFO Attr!!\n", __FUNCTION__ ); - pattr_content = pbuf = rtw_zmalloc(attr_contentlen); - if(pattr_content) - { - u8 num_of_secdev_type; - u16 dev_name_len; - - - rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint*)&attr_contentlen); - - _rtw_memcpy(psta->dev_addr, pattr_content, ETH_ALEN);//P2P Device Address - - pattr_content += ETH_ALEN; - - _rtw_memcpy(&psta->config_methods, pattr_content, 2);//Config Methods - psta->config_methods = be16_to_cpu(psta->config_methods); - - pattr_content += 2; - - _rtw_memcpy(psta->primary_dev_type, pattr_content, 8); - - pattr_content += 8; - - num_of_secdev_type = *pattr_content; - pattr_content += 1; - - if(num_of_secdev_type==0) - { - psta->num_of_secdev_type = 0; - } - else - { - u32 len; - - psta->num_of_secdev_type = num_of_secdev_type; - - len = (sizeof(psta->secdev_types_list)<(num_of_secdev_type*8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8); - - _rtw_memcpy(psta->secdev_types_list, pattr_content, len); - - pattr_content += (num_of_secdev_type*8); - } - - - //dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); - psta->dev_name_len=0; - if(WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16*)pattr_content)) - { - dev_name_len = be16_to_cpu(*(u16*)(pattr_content+2)); - - psta->dev_name_len = (sizeof(psta->dev_name)dev_name):dev_name_len; - - _rtw_memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len); - } - - rtw_mfree(pbuf, attr_contentlen); - - } - - } - - //Get the next P2P IE - p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); - - } - - return status_code; - -} - -u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -{ - u8 *frame_body; - u8 status, dialogToken; - struct sta_info *psta = NULL; - _adapter *padapter = pwdinfo->padapter; - struct sta_priv *pstapriv = &padapter->stapriv; - u8 *p2p_ie; - u32 p2p_ielen = 0; - - frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); - - dialogToken = frame_body[7]; - status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; - - if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) - { - u8 groupid[ 38 ] = { 0x00 }; - u8 dev_addr[ETH_ALEN] = { 0x00 }; - u32 attr_contentlen = 0; - - if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) - { - if(_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && - _rtw_memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len)) - { - attr_contentlen=0; - if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) - { - _irqL irqL; - _list *phead, *plist; - - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - phead = &pstapriv->asoc_list; - plist = get_next(phead); - - //look up sta asoc_queue - while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) - { - psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); - - plist = get_next(plist); - - if(psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) && - _rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) - { - - //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - //issue GO Discoverability Request - issue_group_disc_req(pwdinfo, psta->hwaddr); - //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - status = P2P_STATUS_SUCCESS; - - break; - } - else - { - status = P2P_STATUS_FAIL_INFO_UNAVAILABLE; - } - - } - _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - } - else - { - status = P2P_STATUS_FAIL_INVALID_PARAM; - } - - } - else - { - status = P2P_STATUS_FAIL_INVALID_PARAM; - } - - } - - } - - - //issue Device Discoverability Response - issue_p2p_devdisc_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); - - - return (status==P2P_STATUS_SUCCESS) ? _TRUE:_FALSE; - -} - -u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -{ - return _TRUE; -} - -u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) -{ - u8 *frame_body; - u8 *wpsie; - uint wps_ielen = 0, attr_contentlen = 0; - u16 uconfig_method = 0; - - - frame_body = (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); - - if ( (wpsie=rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) - { - if ( rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , ( u8* ) &uconfig_method, &attr_contentlen) ) - { - uconfig_method = be16_to_cpu( uconfig_method ); - switch( uconfig_method ) - { - case WPS_CM_DISPLYA: - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); - break; - } - case WPS_CM_LABEL: - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3 ); - break; - } - case WPS_CM_PUSH_BUTTON: - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); - break; - } - case WPS_CM_KEYPAD: - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); - break; - } - } - issue_p2p_provision_resp( pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method); - } - } - DBG_8192C( "[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); - return _TRUE; - -} - -u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe) -{ - - return _TRUE; -} - - - -u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) -{ - u8 result = P2P_STATUS_SUCCESS; - u32 p2p_ielen = 0, wps_ielen = 0; - u8 * ies; - u32 ies_len; - u8 * p2p_ie; - u8 *wpsie; - u16 wps_devicepassword_id = 0x0000; - uint wps_devicepassword_id_len = 0; -#ifdef CONFIG_WFD - u8 wfd_ie[ 128 ] = { 0x00 }; - u32 wfd_ielen = 0; -#endif // CONFIG_WFD - - if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) - { - result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - return( result ); - } - - if ( (wpsie=rtw_get_wps_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) - { - // Commented by Kurt 20120113 - // If some device wants to do p2p handshake without sending prov_disc_req - // We have to get peer_req_cm from here. - if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) - { - rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); - wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); - - if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); - } - else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); - } - else - { - _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); - } - } - } - else - { - DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); - result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - return( result ); - } - - ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; - ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; - - p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); - - if ( !p2p_ie ) - { - DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); - result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - } - - while ( p2p_ie ) - { - u8 attr_content = 0x00; - u32 attr_contentlen = 0; - - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); - - if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) - { - DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); - pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. - - if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) - { - // Try to match the tie breaker value - if ( pwdinfo->intent == P2P_MAX_INTENT ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; - } - else - { - if ( attr_content & 0x01 ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - } - else - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - } - } - else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - else - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - } - - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - // Store the group id information. - _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); - _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); - } - } - - - attr_contentlen = 0; - if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) - { - if ( attr_contentlen != ETH_ALEN ) - { - _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); - } - } - - //Get the next P2P IE - p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); - } - -#ifdef CONFIG_WFD - // Added by Albert 20110823 - // Try to get the TCP port information when receiving the negotiation request. - if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) - { - u8 attr_content[ 10 ] = { 0x00 }; - u32 attr_contentlen = 0; - - DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); - rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); - if ( attr_contentlen ) - { - pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); - DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); - } - } -#endif // CONFIG_WFD - - return( result ); -} - -u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) -{ - u8 result = P2P_STATUS_SUCCESS; - u32 p2p_ielen, wps_ielen; - u8 * ies; - u32 ies_len; - u8 * p2p_ie; -#ifdef CONFIG_WFD - u8 wfd_ie[ 128 ] = { 0x00 }; - u32 wfd_ielen = 0; -#endif // CONFIG_WFD - - ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; - ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; - - // Be able to know which one is the P2P GO and which one is P2P client. - - if ( rtw_get_wps_ie( ies, ies_len, NULL, &wps_ielen) ) - { - - } - else - { - DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); - result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - } - - p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); - if ( !p2p_ie ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; - } - else - { - u8 attr_content = 0x00; - u32 attr_contentlen = 0; - u8 operatingch_info[5] = { 0x00 }; - uint ch_cnt = 0; - u8 ch_content[50] = { 0x00 }; - u8 groupid[ 38 ]; - - while ( p2p_ie ) // Found the P2P IE. - { - - rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); - if ( attr_contentlen == 1 ) - { - DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content ); - if ( attr_content == P2P_STATUS_SUCCESS ) - { - // Do nothing. - } - else - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - result = attr_content; - break; - } - } - - // Try to get the peer's interface address - attr_contentlen = 0; - if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) - { - if ( attr_contentlen != ETH_ALEN ) - { - _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); - } - } - - // Try to get the peer's intent and tie breaker value. - attr_content = 0x00; - attr_contentlen = 0; - if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) - { - DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); - pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. - - if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) - { - // Try to match the tie breaker value - if ( pwdinfo->intent == P2P_MAX_INTENT ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - } - else - { - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - if ( attr_content & 0x01 ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - } - else - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - } - } - else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) - { - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - else - { - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - } - - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - // Store the group id information. - _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); - _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); - - } - } - - // Try to get the operation channel information - - attr_contentlen = 0; - if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) - { - DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); - pwdinfo->peer_operating_ch = operatingch_info[4]; - } - - // Try to get the channel list information - if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt) ) - { - pwdinfo->channel_cnt = ch_content[ 4 ]; // Number of Channels - _rtw_memcpy( pwdinfo->channel_list, &ch_content[ 5 ], pwdinfo->channel_cnt ); // Channel List - DBG_8192C( "[%s] channel count = %d\n", __FUNCTION__, pwdinfo->channel_cnt ); - } - else - { - DBG_8192C( "[%s] channel list attribute not found!\n", __FUNCTION__); - } - - // Try to get the group id information if peer is GO - attr_contentlen = 0; - _rtw_memset( groupid, 0x00, 38 ); - if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) - { - _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); - _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); - } - - //Get the next P2P IE - p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); - } - - } - -#ifdef CONFIG_WFD - // Added by Albert 20111122 - // Try to get the TCP port information when receiving the negotiation response. - if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) - { - u8 attr_content[ 10 ] = { 0x00 }; - u32 attr_contentlen = 0; - - DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); - rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); - if ( attr_contentlen ) - { - pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); - DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); - } - } -#endif // CONFIG_WFD - - return( result ); - -} - -u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) -{ - u8 * ies; - u32 ies_len; - u8 * p2p_ie; - u32 p2p_ielen = 0; - u8 result = P2P_STATUS_SUCCESS; - - ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; - ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; - - p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); - while ( p2p_ie ) // Found the P2P IE. - { - u8 attr_content = 0x00, operatingch_info[5] = { 0x00 }; - u8 groupid[ 38 ] = { 0x00 }; - u32 attr_contentlen = 0; - - pwdinfo->negotiation_dialog_token = 1; - rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); - if ( attr_contentlen == 1 ) - { - DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content ); - result = attr_content; - - if ( attr_content == P2P_STATUS_SUCCESS ) - { - u8 bcancelled = 0; - - _cancel_timer( &pwdinfo->restore_p2p_state_timer, &bcancelled ); - - // Commented by Albert 20100911 - // Todo: Need to handle the case which both Intents are the same. - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - if ( ( pwdinfo->intent ) > ( pwdinfo->peer_intent >> 1 ) ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - else if ( ( pwdinfo->intent ) < ( pwdinfo->peer_intent >> 1 ) ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - } - else - { - // Have to compare the Tie Breaker - if ( pwdinfo->peer_intent & 0x01 ) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - } - else - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - } - } - else - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); - break; - } - } - - // Try to get the group id information - attr_contentlen = 0; - _rtw_memset( groupid, 0x00, 38 ); - if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) - { - DBG_8192C( "[%s] Ssid = %s, ssidlen = %d\n", __FUNCTION__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]) ); - _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); - _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); - } - - attr_contentlen = 0; - if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) - { - DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); - pwdinfo->peer_operating_ch = operatingch_info[4]; - } - - //Get the next P2P IE - p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); - - } - - return( result ); -} - -u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) -{ - u8 *frame_body; - u8 dialogToken=0; - u8 status = P2P_STATUS_SUCCESS; - - frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); - - dialogToken = frame_body[6]; - - //todo: check NoA attribute - - issue_p2p_presence_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); - - return _TRUE; -} - -void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) -{ - u8 * ies; - u32 ies_len; - u8 * p2p_ie; - u32 p2p_ielen = 0; - u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2 - u32 attr_contentlen = 0; - - struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); - u8 find_p2p = _FALSE, find_p2p_ps = _FALSE; - u8 noa_offset, noa_num, noa_index; - -_func_enter_; - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - return; - } - - if(IELength <= _BEACON_IE_OFFSET_) - return; - - ies = IEs + _BEACON_IE_OFFSET_; - ies_len = IELength - _BEACON_IE_OFFSET_; - - p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen); - - while(p2p_ie) - { - find_p2p = _TRUE; - // Get Notice of Absence IE. - if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen)) - { - find_p2p_ps = _TRUE; - noa_index = noa_attr[0]; - - if( (pwdinfo->p2p_ps_enable == _FALSE) || - (noa_index != pwdinfo->noa_index) )// if index change, driver should reconfigure related setting. - { - pwdinfo->noa_index = noa_index; - pwdinfo->opp_ps = noa_attr[1] >> 7; - pwdinfo->ctwindow = noa_attr[1] & 0x7F; - - noa_offset = 2; - noa_num = 0; - // NoA length should be n*(13) + 2 - if(attr_contentlen > 2) - { - while(noa_offset < attr_contentlen) - { - //_rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); - pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; - noa_offset += 1; - - _rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4); - noa_offset += 4; - - _rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4); - noa_offset += 4; - - _rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4); - noa_offset += 4; - - noa_num++; - } - } - pwdinfo->noa_num = noa_num; - - if( pwdinfo->opp_ps == 1 ) - { - pwdinfo->p2p_ps_enable = _TRUE; - // driver should wait LPS for entering CTWindow - if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) - { - p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); - } - } - else if( pwdinfo->noa_num > 0 ) - { - pwdinfo->p2p_ps_enable = _TRUE; - p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); - } - else if( pwdinfo->p2p_ps_enable == _TRUE) - { - p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); - } - } - - break; // find target, just break. - } - - //Get the next P2P IE - p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); - - } - - if(find_p2p == _TRUE) - { - if( (pwdinfo->p2p_ps_enable == _TRUE) && (find_p2p_ps == _FALSE) ) - { - p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); - } - } - -_func_exit_; -} - -void find_phase_handler( _adapter* padapter ) -{ - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - NDIS_802_11_SSID ssid; - _irqL irqL; - u8 _status = 0; - -_func_enter_; - - _rtw_memset((unsigned char*)&ssid, 0, sizeof(NDIS_802_11_SSID)); - _rtw_memcpy(ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); - ssid.SsidLength = P2P_WILDCARD_SSID_LEN; - - rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); - - _enter_critical_bh(&pmlmepriv->lock, &irqL); - _status = rtw_sitesurvey_cmd(padapter, &ssid, 1); - _exit_critical_bh(&pmlmepriv->lock, &irqL); - - -_func_exit_; -} - -void restore_p2p_state_handler( _adapter* padapter ) -{ - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - -_func_enter_; - - rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) - { - // In the P2P client mode, the driver should not switch back to its listen channel - // because this P2P client should stay at the operating channel of P2P GO. - set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - } -_func_exit_; -} - -void pre_tx_provdisc_handler( _adapter* padapter ) -{ - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - u8 val8 = 1; -_func_enter_; - - set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); - issue_probereq_p2p( padapter ); - _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); - -_func_exit_; -} - -void pre_tx_negoreq_handler( _adapter* padapter ) -{ - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - u8 val8 = 1; -_func_enter_; - - set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); - issue_probereq_p2p( padapter ); - _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); - -_func_exit_; -} - -#ifdef CONFIG_IOCTL_CFG80211 -void ro_ch_handler( _adapter* padapter ) -{ - struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; -_func_enter_; - -// if( pcfg80211_wdinfo->restore_channel != pmlmeext->cur_channel ) -// set_channel_bwmode(padapter, pcfg80211_wdinfo->restore_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - - #if 0 - // Disable P2P Listen State - if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - - rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); - _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); - - if(pwrpriv->bips_processing == _FALSE){ - rtw_set_pwr_state_check_timer(pwrpriv); - } - } - } - else - #endif - { - if( pcfg80211_wdinfo->restore_channel != pmlmeext->cur_channel ) - { - pmlmeext->cur_channel = pcfg80211_wdinfo->restore_channel; - set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - } - - rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -#ifdef CONFIG_DEBUG_CFG80211 - DBG_871X("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -#endif - } - - cfg80211_remain_on_channel_expired(pcfg80211_wdinfo->remain_on_ch_dev, - pcfg80211_wdinfo->remain_on_ch_cookie, - &pcfg80211_wdinfo->remain_on_ch_channel, - pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL); -_func_exit_; -} -#endif //CONFIG_IOCTL_CFG80211 - -void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType) -{ - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - -_func_enter_; - - switch(intCmdType) - { - case P2P_FIND_PHASE_WK: - { - find_phase_handler( padapter ); - break; - } - case P2P_RESTORE_STATE_WK: - { - restore_p2p_state_handler( padapter ); - break; - } - case P2P_PRE_TX_PROVDISC_PROCESS_WK: - { - pre_tx_provdisc_handler( padapter ); - break; - } - case P2P_PRE_TX_NEGOREQ_PROCESS_WK: - { - pre_tx_negoreq_handler( padapter ); - break; - } -#ifdef CONFIG_IOCTL_CFG80211 - case P2P_RO_CH_WK: - { - ro_ch_handler( padapter ); - break; - } -#endif //CONFIG_IOCTL_CFG80211 - } - -_func_exit_; -} - - - -void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) -{ - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - -_func_enter_; - - // Pre action for p2p state - switch(p2p_ps_state) - { - case P2P_PS_ENABLE: - if( pwdinfo->ctwindow > 0 ) - { - if(pwrpriv->smart_ps != 0) - { - pwrpriv->smart_ps = 0; - DBG_871X("%s(): Enter CTW, change SmartPS\n", __FUNCTION__); - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); - } - } - break; - default: - break; - } - - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); - - // clear P2P SW status - if(p2p_ps_state == P2P_PS_DISABLE) - { - pwdinfo->noa_index = 0; - pwdinfo->ctwindow = 0; - pwdinfo->opp_ps = 0; - pwdinfo->noa_num = 0; - pwdinfo->p2p_ps_enable = _FALSE; - if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) - { - if(pwrpriv->smart_ps == 0) - { - pwrpriv->smart_ps = 2; - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); - } - } - } - -_func_exit_; -} - -u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue) -{ - struct cmd_obj *ph2c; - struct drvextra_cmd_parm *pdrvextra_cmd_parm; - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - u8 res = _SUCCESS; - -_func_enter_; - - if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || - ( pwdinfo->p2p_ps == p2p_ps_state ) ) - { - return res; - } - - // driver only perform p2p ps when GO have Opp_Ps or NoA - if( pwdinfo->p2p_ps_enable ) - { - pwdinfo->p2p_ps = p2p_ps_state; - - if(enqueue) - { - ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); - if(ph2c==NULL){ - res= _FAIL; - goto exit; - } - - pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); - if(pdrvextra_cmd_parm==NULL){ - rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); - res= _FAIL; - goto exit; - } - - pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID; - pdrvextra_cmd_parm->type_size = p2p_ps_state; - pdrvextra_cmd_parm->pbuf = NULL; - - init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); - - res = rtw_enqueue_cmd(pcmdpriv, ph2c); - } - else - { - p2p_ps_wk_hdl(padapter, p2p_ps_state); - } - } - -exit: - -_func_exit_; - - return res; - -} - -static void restore_p2p_state_timer_process (void *FunctionContext) -{ - _adapter *adapter = (_adapter *)FunctionContext; - struct wifidirect_info *pwdinfo = &adapter->wdinfo; - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - return; - - p2p_protocol_wk_cmd( adapter, P2P_RESTORE_STATE_WK ); -} - -static void pre_tx_scan_timer_process (void *FunctionContext) -{ - _adapter *adapter = (_adapter *) FunctionContext; - struct wifidirect_info *pwdinfo = &adapter->wdinfo; - _irqL irqL; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - u8 _status = 0; - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - return; - - _enter_critical_bh(&pmlmepriv->lock, &irqL); - - // Commented by Albert 20110805 - // Todo: Use the issuing probe request directly instead of using the rtw_sitesurvey_cmd!! - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) - { - if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) // the provision discovery request frame is trigger to send or not - { - p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK ); - //issue_probereq_p2p( adapter ); - //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); - } - } - else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) - { - if ( _TRUE == pwdinfo->nego_req_info.benable ) - { - p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK ); - //issue_probereq_p2p( adapter ); - //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); - } - } - else - { - DBG_8192C( "[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); - } - - _exit_critical_bh(&pmlmepriv->lock, &irqL); -} - -static void find_phase_timer_process (void *FunctionContext) -{ - _adapter *adapter = (_adapter *)FunctionContext; - struct wifidirect_info *pwdinfo = &adapter->wdinfo; - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - return; - - adapter->wdinfo.find_phase_state_exchange_cnt++; - - p2p_protocol_wk_cmd( adapter, P2P_FIND_PHASE_WK ); -} - -#ifdef CONFIG_IOCTL_CFG80211 -static void ro_ch_timer_process (void *FunctionContext) -{ - _adapter *adapter = (_adapter *)FunctionContext; - - //printk("%s \n", __FUNCTION__); - - p2p_protocol_wk_cmd( adapter, P2P_RO_CH_WK); -} - -void rtw_init_cfg80211_wifidirect_info( _adapter* padapter) -{ - struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; - - _rtw_memset(pcfg80211_wdinfo, 0x00, sizeof(struct cfg80211_wifidirect_info) ); - - _init_timer( &pcfg80211_wdinfo->remain_on_ch_timer, padapter->pnetdev, ro_ch_timer_process, padapter ); -} -#endif //CONFIG_IOCTL_CFG80211 - -void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role) -{ - struct wifidirect_info *pwdinfo; - - pwdinfo = &padapter->wdinfo; - - pwdinfo->padapter = padapter; - - //init device&interface address - _rtw_memcpy(pwdinfo->device_addr, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwdinfo->interface_addr, myid(&(padapter->eeprompriv)), ETH_ALEN); - - // 1, 6, 11 are the social channel defined in the WiFi Direct specification. - pwdinfo->social_chan[0] = 1; - pwdinfo->social_chan[1] = 6; - pwdinfo->social_chan[2] = 11; - pwdinfo->social_chan[3] = 0; // channel 0 for scanning ending in site survey function. - - // Use the channel 11 as the listen channel - pwdinfo->listen_channel = 11; - - if (role == P2P_ROLE_DEVICE) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); - pwdinfo->intent = 1; - } - else if (role == P2P_ROLE_CLIENT) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - pwdinfo->intent = 1; - } - else if (role == P2P_ROLE_GO) - { - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - pwdinfo->intent = 15; - } - - //rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE); - rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_LISTEN); - -// Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) - pwdinfo->support_rate[0] = 0x8c; // 6(B) - pwdinfo->support_rate[1] = 0x92; // 9(B) - pwdinfo->support_rate[2] = 0x18; // 12 - pwdinfo->support_rate[3] = 0x24; // 18 - pwdinfo->support_rate[4] = 0x30; // 24 - pwdinfo->support_rate[5] = 0x48; // 36 - pwdinfo->support_rate[6] = 0x60; // 48 - pwdinfo->support_rate[7] = 0x6c; // 54 - - _rtw_memcpy( ( void* ) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7 ); - - _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); - _rtw_memcpy( pwdinfo->device_name, "Realtek DMP Device", 18 ); - pwdinfo->device_name_len = 18; - - _rtw_memset( &pwdinfo->invitereq_info, 0x00, sizeof( struct tx_invite_req_info ) ); - pwdinfo->invitereq_info.token = 3; // Token used for P2P invitation request frame. - pwdinfo->invitereq_info.peer_operation_ch = pwdinfo->listen_channel; - - _rtw_memset( &pwdinfo->inviteresp_info, 0x00, sizeof( struct tx_invite_resp_info ) ); - pwdinfo->inviteresp_info.token = 0; - - pwdinfo->profileindex = 0; - _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); - - _init_timer( &pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter ); - _init_timer( &pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter ); - _init_timer( &pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter ); - - pwdinfo->find_phase_state_exchange_cnt = 0; - - pwdinfo->listen_dwell = ( u8 ) (( rtw_get_current_time() % 3 ) + 1); - //DBG_8192C( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell ); - - _rtw_memset( &pwdinfo->tx_prov_disc_info, 0x00, sizeof( struct tx_provdisc_req_info ) ); - pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE; - - _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); - - pwdinfo->device_password_id_for_nego = WPS_DPID_PBC; - pwdinfo->negotiation_dialog_token = 1; - - _rtw_memset( pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN ); - pwdinfo->nego_ssidlen = 0; - - pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; -#ifdef CONFIG_WFD - pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY; - _rtw_memset( &pwdinfo->wfd_info, 0x00, sizeof( struct wifi_display_info ) ); - pwdinfo->wfd_info.rtsp_ctrlport = 554; - pwdinfo->wfd_info.peer_rtsp_ctrlport = 0; // Reset to 0 -#else - pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD; -#endif //CONFIG_WFD - pwdinfo->channel_cnt = 0; - _rtw_memset( pwdinfo->channel_list, 0x00, 13 ); - - _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4 ); - _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3 ); - _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); - -} - -#ifdef CONFIG_IOCTL_CFG80211 -int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) -{ - int is_p2p_frame = (-1); - unsigned char *frame_body; - u8 category, action, OUI_Subtype, dialogToken=0; - struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); - - frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); - category = frame_body[0]; - //just for check - if(category == RTW_WLAN_CATEGORY_PUBLIC) - { - action = frame_body[ 1 ]; - OUI_Subtype = frame_body[ 6 ]; - dialogToken = frame_body[7]; - - if ( action == ACT_PUBLIC_P2P ) - { -#ifdef CONFIG_DEBUG_CFG80211 - DBG_871X("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); -#endif - - is_p2p_frame = OUI_Subtype; - - switch( OUI_Subtype )//OUI Subtype - { - case P2P_GO_NEGO_REQ: - DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - - if(tx) - { - if(pwdev_priv->provdisc_req_issued == _FALSE) - rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); - - //pwdev_priv->provdisc_req_issued = _FALSE; - } - - break; - case P2P_GO_NEGO_RESP: - DBG_871X("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - - if(!tx) - pwdev_priv->provdisc_req_issued = _FALSE; - - break; - case P2P_GO_NEGO_CONF: - DBG_871X("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - break; - case P2P_INVIT_REQ: - DBG_871X("RTW_%s:P2P_INVIT_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - break; - case P2P_INVIT_RESP: - DBG_871X("RTW_%s:P2P_INVIT_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - break; - case P2P_DEVDISC_REQ: - DBG_871X("RTW_%s:P2P_DEVDISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - break; - case P2P_DEVDISC_RESP: - DBG_871X("RTW_%s:P2P_DEVDISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - break; - case P2P_PROVISION_DISC_REQ: - { - size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); - u8 *p2p_ie; - uint p2p_ielen = 0; - uint contentlen = 0; - - DBG_871X("RTW_%s:P2P_PROVISION_DISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - - //if(tx) - { - pwdev_priv->provdisc_req_issued = _FALSE; - - if( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen))) - { - - if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) - { - pwdev_priv->provdisc_req_issued = _FALSE;//case: p2p_client join p2p GO - } - else - { - DBG_871X("provdisc_req_issued is _TRUE\n"); - pwdev_priv->provdisc_req_issued = _TRUE;//case: p2p_devices connection before Nego req. - } - - } - } - } - break; - case P2P_PROVISION_DISC_RESP: - DBG_871X("RTW_%s:P2P_PROVISION_DISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); - break; - default: - DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", OUI_Subtype, dialogToken); - break; - } - - } - else - { - DBG_871X("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); - } - - } - else if(category == RTW_WLAN_CATEGORY_P2P) - { - OUI_Subtype = frame_body[5]; - dialogToken = frame_body[6]; - -#ifdef CONFIG_DEBUG_CFG80211 - DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); -#endif - - is_p2p_frame = OUI_Subtype; - - switch(OUI_Subtype) - { - case P2P_NOTICE_OF_ABSENCE: - DBG_871X("RTW_%s:P2P_NOTICE_OF_ABSENCE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); - break; - case P2P_PRESENCE_REQUEST: - DBG_871X("RTW_%s:P2P_PRESENCE_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); - break; - case P2P_PRESENCE_RESPONSE: - DBG_871X("RTW_%s:P2P_PRESENCE_RESPONSE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); - break; - case P2P_GO_DISC_REQUEST: - DBG_871X("RTW_%s:P2P_GO_DISC_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); - break; - default: - DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", OUI_Subtype, dialogToken); - break; - } - - } - else - { - DBG_871X("%s, action frame category=%d\n", __func__, category); - //is_p2p_frame = (-1); - } - - return is_p2p_frame; -} -#endif //CONFIG_IOCTL_CFG80211 - -#ifdef CONFIG_DBG_P2P -char * p2p_role_str[] = { - "P2P_ROLE_DISABLE", - "P2P_ROLE_DEVICE", - "P2P_ROLE_CLIENT", - "P2P_ROLE_GO" -}; - -char * p2p_state_str[] = { - "P2P_STATE_NONE", - "P2P_STATE_IDLE", - "P2P_STATE_LISTEN", - "P2P_STATE_SCAN", - "P2P_STATE_FIND_PHASE_LISTEN", - "P2P_STATE_FIND_PHASE_SEARCH", - "P2P_STATE_TX_PROVISION_DIS_REQ", - "P2P_STATE_RX_PROVISION_DIS_RSP", - "P2P_STATE_RX_PROVISION_DIS_REQ", - "P2P_STATE_GONEGO_ING", - "P2P_STATE_GONEGO_OK", - "P2P_STATE_GONEGO_FAIL", - "P2P_STATE_RECV_INVITE_REQ", - "P2P_STATE_PROVISIONING_ING", - "P2P_STATE_PROVISIONING_DONE" -}; - -void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) -{ - if(!_rtw_p2p_chk_state(wdinfo, state)) { - enum P2P_STATE old_state = _rtw_p2p_state(wdinfo); - _rtw_p2p_set_state(wdinfo, state); - DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state from %s to %s\n", caller, line - , p2p_state_str[old_state], p2p_state_str[_rtw_p2p_state(wdinfo)] - ); - } else { - DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state to same state %s\n", caller, line - , p2p_state_str[_rtw_p2p_state(wdinfo)] - ); - } -} -void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) -{ - if(_rtw_p2p_pre_state(wdinfo) != state) { - enum P2P_STATE old_state = _rtw_p2p_pre_state(wdinfo); - _rtw_p2p_set_pre_state(wdinfo, state); - DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state from %s to %s\n", caller, line - , p2p_state_str[old_state], p2p_state_str[_rtw_p2p_pre_state(wdinfo)] - ); - } else { - DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state to same state %s\n", caller, line - , p2p_state_str[_rtw_p2p_pre_state(wdinfo)] - ); - } -} -#if 0 -void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line) -{ - if(wdinfo->pre_p2p_state != -1) { - DBG_871X("[CONFIG_DBG_P2P]%s:%d restore from %s to %s\n", caller, line - , p2p_state_str[wdinfo->p2p_state], p2p_state_str[wdinfo->pre_p2p_state] - ); - _rtw_p2p_restore_state(wdinfo); - } else { - DBG_871X("[CONFIG_DBG_P2P]%s:%d restore no pre state, cur state %s\n", caller, line - , p2p_state_str[wdinfo->p2p_state] - ); - } -} -#endif -void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line) -{ - if(wdinfo->role != role) { - enum P2P_ROLE old_role = wdinfo->role; - _rtw_p2p_set_role(wdinfo, role); - DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role from %s to %s\n", caller, line - , p2p_role_str[old_role], p2p_role_str[wdinfo->role] - ); - } else { - DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role to same role %s\n", caller, line - , p2p_role_str[wdinfo->role] - ); - } -} -#endif //CONFIG_DBG_P2P - - -int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) -{ - int ret = _SUCCESS; - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - - if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT|| role == P2P_ROLE_GO) - { - u8 channel, ch_offset; - u16 bwmode; - - //leave IPS/Autosuspend - if(_FAIL == rtw_pwr_wakeup(padapter)) - { - ret = _FAIL; - goto exit; - } - - #ifdef CONFIG_P2P_AGAINST_NOISE - //Sometimes dongle would difficult to receive p2p_probe_req caused by platform noise. Kurt - rtw_write8(padapter, 0xc41, 0x42); - DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41)); - #endif - - //Enable P2P function - init_wifidirect_info(padapter, role); - - } - else if (role == P2P_ROLE_DISABLE) - { - #ifdef CONFIG_P2P_AGAINST_NOISE - rtw_write8(padapter, 0xc41, 0x40); - DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41)); - #endif - - //Disable P2P function - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); - _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); - } - - if(pwrpriv->bips_processing == _FALSE){ - rtw_set_pwr_state_check_timer(pwrpriv); - } - } - -exit: - return ret; -} - -#endif //CONFIG_P2P - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTW_P2P_C_ + +#include +#include +#include + +#ifdef CONFIG_P2P + +int is_any_client_associated( _adapter *padapter ) +{ + _irqL irqL; + _list *phead, *plist; + int intFound = _FALSE; + + struct sta_priv *pstapriv = &padapter->stapriv; + + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + phead = &pstapriv->asoc_list; + plist = get_next(phead); + + if ( rtw_end_of_queue_search(phead, plist) == _TRUE ) + { + intFound = _FALSE; + } + else + { + intFound = _TRUE; + } + + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + return( intFound ); + +} + +static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + _irqL irqL; + _list *phead, *plist; + u32 len=0; + u16 attr_len = 0; + u8 tmplen, *pdata_attr, *pstart, *pcur; + struct sta_info *psta = NULL; + _adapter *padapter = pwdinfo->padapter; + struct sta_priv *pstapriv = &padapter->stapriv; + + DBG_871X("%s\n", __FUNCTION__); + + pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN); + + pstart = pdata_attr; + pcur = pdata_attr; + + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + phead = &pstapriv->asoc_list; + plist = get_next(phead); + + //look up sta asoc_queue + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); + + plist = get_next(plist); + + + if(psta->is_p2p_device) + { + tmplen = 0; + + pcur++; + + //P2P device address + _rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN); + pcur += ETH_ALEN; + + //P2P interface address + _rtw_memcpy(pcur, psta->hwaddr, ETH_ALEN); + pcur += ETH_ALEN; + + *pcur = psta->dev_cap; + pcur++; + + //*(u16*)(pcur) = cpu_to_be16(psta->config_methods); + RTW_PUT_BE16(pcur, psta->config_methods); + pcur += 2; + + _rtw_memcpy(pcur, psta->primary_dev_type, 8); + pcur += 8; + + *pcur = psta->num_of_secdev_type; + pcur++; + + _rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8); + pcur += psta->num_of_secdev_type*8; + + if(psta->dev_name_len>0) + { + //*(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); + RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME); + pcur += 2; + + //*(u16*)(pcur) = cpu_to_be16( psta->dev_name_len ); + RTW_PUT_BE16(pcur, psta->dev_name_len); + pcur += 2; + + _rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len); + pcur += psta->dev_name_len; + } + + + tmplen = (u8)(pcur-pstart); + + *pstart = (tmplen-1); + + attr_len += tmplen; + + //pstart += tmplen; + pstart = pcur; + + } + + + } + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + if(attr_len>0) + { + len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr); + } + + rtw_mfree(pdata_attr, MAX_P2P_IE_LEN); + + return len; + +} + +static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da) +{ + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + _adapter *padapter = pwdinfo->padapter; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame + u32 p2poui = cpu_to_be32(P2POUI); + u8 oui_subtype = P2P_GO_DISC_REQUEST; + u8 dialogToken=0; + + DBG_871X("[%s]\n", __FUNCTION__); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_ACTION); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + + //Build P2P action frame header + pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); + + //there is no IE in this P2P action frame + + pattrib->last_txcmdsz = pattrib->pktlen; + + dump_mgntframe(padapter, pmgntframe); + +} + +static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) +{ + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + _adapter *padapter = pwdinfo->padapter; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; + u8 action = P2P_PUB_ACTION_ACTION; + u32 p2poui = cpu_to_be32(P2POUI); + u8 oui_subtype = P2P_DEVDISC_RESP; + u8 p2pie[8] = { 0x00 }; + u32 p2pielen = 0; + + DBG_871X("[%s]\n", __FUNCTION__); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_ACTION); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + + //Build P2P public action frame header + pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); + + + //Build P2P IE + // P2P OUI + p2pielen = 0; + p2pie[ p2pielen++ ] = 0x50; + p2pie[ p2pielen++ ] = 0x6F; + p2pie[ p2pielen++ ] = 0x9A; + p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + // P2P_ATTR_STATUS + p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen); + + pattrib->last_txcmdsz = pattrib->pktlen; + + dump_mgntframe(padapter, pmgntframe); + +} + +static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, u8* frame_body, u16 config_method) +{ + _adapter *padapter = pwdinfo->padapter; + unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; + u8 action = P2P_PUB_ACTION_ACTION; + u8 dialogToken = frame_body[7]; // The Dialog Token of provisioning discovery request frame. + u32 p2poui = cpu_to_be32(P2POUI); + u8 oui_subtype = P2P_PROVISION_DISC_RESP; + u8 wpsie[ 100 ] = { 0x00 }; + u8 wpsielen = 0; +#ifdef CONFIG_WFD + u32 wfdielen = 0; +#endif //CONFIG_WFD + + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_ACTION); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + + pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); + + wpsielen = 0; + // WPS OUI + //*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); + RTW_PUT_BE32(wpsie, WPSOUI); + wpsielen += 4; + +#if 0 + // WPS version + // Type: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); + wpsielen += 2; + + // Length: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); + wpsielen += 2; + + // Value: + wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 +#endif + + // Config Method + // Type: + //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); + RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); + wpsielen += 2; + + // Length: + //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); + RTW_PUT_BE16(wpsie + wpsielen, 0x0002); + wpsielen += 2; + + // Value: + //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); + RTW_PUT_BE16(wpsie + wpsielen, config_method); + wpsielen += 2; + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); + +#ifdef CONFIG_WFD + wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +#endif //CONFIG_WFD + + pattrib->last_txcmdsz = pattrib->pktlen; + + dump_mgntframe(padapter, pmgntframe); + + return; + +} + +static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) +{ + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + _adapter *padapter = pwdinfo->padapter; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame + u32 p2poui = cpu_to_be32(P2POUI); + u8 oui_subtype = P2P_PRESENCE_RESPONSE; + u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; + u8 noa_attr_content[32] = { 0x00 }; + u32 p2pielen = 0; + + DBG_871X("[%s]\n", __FUNCTION__); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_ACTION); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + + //Build P2P action frame header + pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); + + + //Add P2P IE header + // P2P OUI + p2pielen = 0; + p2pie[ p2pielen++ ] = 0x50; + p2pie[ p2pielen++ ] = 0x6F; + p2pie[ p2pielen++ ] = 0x9A; + p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + //Add Status attribute in P2P IE + p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); + + //Add NoA attribute in P2P IE + noa_attr_content[0] = 0x1;//index + noa_attr_content[1] = 0x0;//CTWindow and OppPS Parameters + + //todo: Notice of Absence Descriptor(s) + + p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content); + + + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen)); + + + pattrib->last_txcmdsz = pattrib->pktlen; + + dump_mgntframe(padapter, pmgntframe); + +} + +u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; + u16 capability=0; + u32 len=0, p2pielen = 0; + + + // P2P OUI + p2pielen = 0; + p2pie[ p2pielen++ ] = 0x50; + p2pie[ p2pielen++ ] = 0x6F; + p2pie[ p2pielen++ ] = 0x9A; + p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + + // According to the P2P Specification, the beacon frame should contain 3 P2P attributes + // 1. P2P Capability + // 2. P2P Device ID + // 3. Notice of Absence ( NOA ) + + // P2P Capability ATTR + // Type: + // Length: + // Value: + // Device Capability Bitmap, 1 byte + // Be able to participate in additional P2P Groups and + // support the P2P Invitation Procedure + // Group Capability Bitmap, 1 byte + capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; + capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8); + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) + capability |= (P2P_GRPCAP_GROUP_FORMATION<<8); + + capability = cpu_to_le16(capability); + + p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8*)&capability); + + + // P2P Device ID ATTR + p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr); + + + // Notice of Absence ATTR + // Type: + // Length: + // Value: + + //go_add_noa_attr(pwdinfo); + + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); + + + return len; + +} + +#ifdef CONFIG_WFD +u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110812 + // According to the WFD Specification, the beacon frame should contain 4 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID + // 3. Coupled Sink Information + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + + if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + if ( is_any_client_associated( pwdinfo->padapter ) ) + { + // WFD primary sink + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + } + else + { + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + } + + } + else + { + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + } + + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110812 + // According to the WFD Specification, the probe request frame should contain 4 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID + // 3. Coupled Sink Information + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110812 + // According to the WFD Specification, the probe response frame should contain 4 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID + // 3. Coupled Sink Information + // 4. WFD Session Information + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + + if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + if ( is_any_client_associated( pwdinfo->padapter ) ) + { + // WFD primary sink + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + } + else + { + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + } + + } + else + { + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + } + + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) + { + // WFD Session Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0000); + wfdielen += 2; + + // Todo: to add the list of WFD device info descriptor in WFD group. + + } + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = NULL; + struct mlme_priv *pmlmepriv = NULL; + struct wifi_display_info *pwfd_info = NULL; + + // WFD OUI + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) + { + return 0; + } + + padapter = pwdinfo->padapter; + pmlmepriv = &padapter->mlmepriv; + pwfd_info = &padapter->wdinfo.wfd_info; + + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110812 + // According to the WFD Specification, the probe request frame should contain 4 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID + // 3. Coupled Sink Information + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110812 + // According to the WFD Specification, the probe request frame should contain 4 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID + // 3. Coupled Sink Information + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110825 + // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID ( Optional ) + // 3. Local IP Adress ( Optional ) + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110825 + // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID ( Optional ) + // 3. Local IP Adress ( Optional ) + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110825 + // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID ( Optional ) + // 3. Local IP Adress ( Optional ) + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110825 + // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID ( Optional ) + // 3. Local IP Adress ( Optional ) + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + +u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; + u32 len=0, wfdielen = 0; + _adapter *padapter = pwdinfo->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; + + // WFD OUI + wfdielen = 0; + wfdie[ wfdielen++ ] = 0x50; + wfdie[ wfdielen++ ] = 0x6F; + wfdie[ wfdielen++ ] = 0x9A; + wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 + + // Commented by Albert 20110825 + // According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes + // 1. WFD Device Information + // 2. Associated BSSID ( Optional ) + // 3. Local IP Adress ( Optional ) + + + // WFD Device Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value1: + // WFD device information + // WFD primary sink + available for WFD session + WiFi Direct mode + RTW_PUT_BE16(wfdie + wfdielen, 0x0011); + wfdielen += 2; + + // Value2: + // Session Management Control Port + // Default TCP port for RTSP messages is 554 + RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); + wfdielen += 2; + + // Value3: + // WFD Device Maximum Throughput + // 300Mbps is the maximum throughput + RTW_PUT_BE16(wfdie + wfdielen, 300); + wfdielen += 2; + + // Associated BSSID ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0006); + wfdielen += 2; + + // Value: + // Associated BSSID + if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) + { + _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); + } + else + { + _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); + } + + wfdielen += ETH_ALEN; + + // Coupled Sink Information ATTR + // Type: + wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; + + // Length: + // Note: In the WFD specification, the size of length field is 2. + RTW_PUT_BE16(wfdie + wfdielen, 0x0001); + wfdielen += 2; + + // Value: + // Coupled Sink Status bitmap + // Not coupled/available for Coupling + wfdie[ wfdielen++ ] = 0; + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); + + return len; + +} + + +#endif //CONFIG_WFD + +u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; + u32 len=0, p2pielen = 0; + + // P2P OUI + p2pielen = 0; + p2pie[ p2pielen++ ] = 0x50; + p2pie[ p2pielen++ ] = 0x6F; + p2pie[ p2pielen++ ] = 0x9A; + p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + // Commented by Albert 20100907 + // According to the P2P Specification, the probe response frame should contain 5 P2P attributes + // 1. P2P Capability + // 2. Extended Listen Timing + // 3. Notice of Absence ( NOA ) ( Only GO needs this ) + // 4. Device Info + // 5. Group Info ( Only GO need this ) + + // P2P Capability ATTR + // Type: + p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); + RTW_PUT_LE16(p2pie + p2pielen, 0x0002); + p2pielen += 2; + + // Value: + // Device Capability Bitmap, 1 byte + // Be able to participate in additional P2P Groups and + // support the P2P Invitation Procedure + p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; + + // Group Capability Bitmap, 1 byte + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + p2pie[ p2pielen ] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS); + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) + p2pie[ p2pielen ] |= P2P_GRPCAP_GROUP_FORMATION; + + p2pielen++; + } + else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) ) + { + // Group Capability Bitmap, 1 byte + p2pie[ p2pielen++ ] = 0x00; + } + + // Extended Listen Timing ATTR + // Type: + p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); + RTW_PUT_LE16(p2pie + p2pielen, 0x0004); + p2pielen += 2; + + // Value: + // Availability Period + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); + RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); + p2pielen += 2; + + // Availability Interval + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); + RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); + p2pielen += 2; + + + // Notice of Absence ATTR + // Type: + // Length: + // Value: + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + //go_add_noa_attr(pwdinfo); + } + + // Device Info ATTR + // Type: + p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; + + // Length: + // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) + // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); + RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); + p2pielen += 2; + + // Value: + // P2P Device Address + _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); + p2pielen += ETH_ALEN; + + // Config Method + // This field should be big endian. Noted by P2P specification. + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); + RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); + p2pielen += 2; + + // Primary Device Type + // Category ID + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI); + p2pielen += 2; + + // OUI + //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); + RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); + p2pielen += 4; + + // Sub Category ID + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP); + p2pielen += 2; + + // Number of Secondary Device Types + p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List + + // Device Name + // Type: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); + p2pielen += 2; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); + RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); + p2pielen += 2; + + // Value: + _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); + p2pielen += pwdinfo->device_name_len; + + + // Group Info ATTR + // Type: + // Length: + // Value: + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen); + } + + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); + + + return len; + +} + +u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ) +{ + u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; + u32 len=0, p2pielen = 0; + + // P2P OUI + p2pielen = 0; + p2pie[ p2pielen++ ] = 0x50; + p2pie[ p2pielen++ ] = 0x6F; + p2pie[ p2pielen++ ] = 0x9A; + p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + // Commented by Albert 20110301 + // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes + // 1. P2P Capability + // 2. Device Info + // 3. Group ID ( When joining an operating P2P Group ) + + // P2P Capability ATTR + // Type: + p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); + RTW_PUT_LE16(p2pie + p2pielen, 0x0002); + p2pielen += 2; + + // Value: + // Device Capability Bitmap, 1 byte + // Be able to participate in additional P2P Groups and + // support the P2P Invitation Procedure + p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; + + // Group Capability Bitmap, 1 byte + p2pie[ p2pielen++ ] = 0x00; + + + // Device Info ATTR + // Type: + p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; + + // Length: + // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) + // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); + RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); + p2pielen += 2; + + // Value: + // P2P Device Address + _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); + p2pielen += ETH_ALEN; + + // Config Method + // This field should be big endian. Noted by P2P specification. + if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) + { + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC); + } + else + { + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY); + } + + p2pielen += 2; + + // Primary Device Type + // Category ID + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI); + p2pielen += 2; + + // OUI + //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); + RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); + p2pielen += 4; + + // Sub Category ID + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP); + p2pielen += 2; + + // Number of Secondary Device Types + p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List + + // Device Name + // Type: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); + RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); + p2pielen += 2; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); + RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); + p2pielen += 2; + + // Value: + _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); + p2pielen += pwdinfo->device_name_len; + + if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) + { + // Added by Albert 2011/05/19 + // In this case, the pdev_raddr is the device address of the group owner. + + // P2P Group ID ATTR + // Type: + p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen ); + RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen); + p2pielen += 2; + + // Value: + _rtw_memcpy( p2pie + p2pielen, pdev_raddr, ETH_ALEN ); + p2pielen += ETH_ALEN; + + _rtw_memcpy( p2pie + p2pielen, pssid, ussidlen ); + p2pielen += ussidlen; + + } + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); + + + return len; + +} + + +u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code) +{ + u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; + u32 len=0, p2pielen = 0; + + // P2P OUI + p2pielen = 0; + p2pie[ p2pielen++ ] = 0x50; + p2pie[ p2pielen++ ] = 0x6F; + p2pie[ p2pielen++ ] = 0x9A; + p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + // According to the P2P Specification, the Association response frame should contain 2 P2P attributes + // 1. Status + // 2. Extended Listen Timing (optional) + + + // Status ATTR + p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code); + + + // Extended Listen Timing ATTR + // Type: + // Length: + // Value: + + + pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); + + return len; + +} + +u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) +{ + u32 len=0; + + return len; +} + +u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) +{ + u8 *p; + u32 ret=_FALSE; + u8 *p2pie; + u32 p2pielen = 0; + int ssid_len=0, rate_cnt = 0; + + p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt, + len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); + + if ( rate_cnt <= 4 ) + { + int i, g_rate =0; + + for( i = 0; i < rate_cnt; i++ ) + { + if ( ( ( *( p + 2 + i ) & 0xff ) != 0x02 ) && + ( ( *( p + 2 + i ) & 0xff ) != 0x04 ) && + ( ( *( p + 2 + i ) & 0xff ) != 0x0B ) && + ( ( *( p + 2 + i ) & 0xff ) != 0x16 ) ) + { + g_rate = 1; + } + } + + if ( g_rate == 0 ) + { + // There is no OFDM rate included in SupportedRates IE of this probe request frame + // The driver should response this probe request. + return ret; + } + } + else + { + // rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4. + // We should proceed the following check for this probe request. + } + + // Added comments by Albert 20100906 + // There are several items we should check here. + // 1. This probe request frame must contain the P2P IE. (Done) + // 2. This probe request frame must contain the wildcard SSID. (Done) + // 3. Wildcard BSSID. (Todo) + // 4. Destination Address. ( Done in mgt_dispatcher function ) + // 5. Requested Device Type in WSC IE. (Todo) + // 6. Device ID attribute in P2P IE. (Todo) + + p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len, + len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); + + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + if((p2pie=rtw_get_p2p_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen))) + { + if ( (p != NULL) && _rtw_memcmp( ( void * ) ( p+2 ), ( void * ) pwdinfo->p2p_wildcard_ssid , 7 )) + { + //todo: + //Check Requested Device Type attributes in WSC IE. + //Check Device ID attribute in P2P IE + + ret = _TRUE; + } + } + else + { + //non -p2p device + } + + } + + + return ret; + +} + +u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta) +{ + u8 status_code = P2P_STATUS_SUCCESS; + u8 *pbuf, *pattr_content=NULL; + u32 attr_contentlen = 0; + u16 cap_attr=0; + unsigned short frame_type, ie_offset=0; + u8 * ies; + u32 ies_len; + u8 * p2p_ie; + u32 p2p_ielen = 0; + + if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + return P2P_STATUS_FAIL_REQUEST_UNABLE; + + frame_type = GetFrameSubType(pframe); + if (frame_type == WIFI_ASSOCREQ) + { + ie_offset = _ASOCREQ_IE_OFFSET_; + } + else // WIFI_REASSOCREQ + { + ie_offset = _REASOCREQ_IE_OFFSET_; + } + + ies = pframe + WLAN_HDR_A3_LEN + ie_offset; + ies_len = len - WLAN_HDR_A3_LEN - ie_offset; + + p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen); + + if ( !p2p_ie ) + { + DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); + status_code = P2P_STATUS_FAIL_INVALID_PARAM; + } + else + { + DBG_8192C( "[%s] P2P IE Found!!\n", __FUNCTION__ ); + } + + while ( p2p_ie ) + { + //Check P2P Capability ATTR + if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) + { + DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); + cap_attr = le16_to_cpu(cap_attr); + psta->dev_cap = cap_attr&0xff; + } + + //Check Extended Listen Timing ATTR + + + //Check P2P Device Info ATTR + if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint*)&attr_contentlen)) + { + DBG_8192C( "[%s] Got P2P DEVICE INFO Attr!!\n", __FUNCTION__ ); + pattr_content = pbuf = rtw_zmalloc(attr_contentlen); + if(pattr_content) + { + u8 num_of_secdev_type; + u16 dev_name_len; + + + rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint*)&attr_contentlen); + + _rtw_memcpy(psta->dev_addr, pattr_content, ETH_ALEN);//P2P Device Address + + pattr_content += ETH_ALEN; + + _rtw_memcpy(&psta->config_methods, pattr_content, 2);//Config Methods + psta->config_methods = be16_to_cpu(psta->config_methods); + + pattr_content += 2; + + _rtw_memcpy(psta->primary_dev_type, pattr_content, 8); + + pattr_content += 8; + + num_of_secdev_type = *pattr_content; + pattr_content += 1; + + if(num_of_secdev_type==0) + { + psta->num_of_secdev_type = 0; + } + else + { + u32 len; + + psta->num_of_secdev_type = num_of_secdev_type; + + len = (sizeof(psta->secdev_types_list)<(num_of_secdev_type*8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8); + + _rtw_memcpy(psta->secdev_types_list, pattr_content, len); + + pattr_content += (num_of_secdev_type*8); + } + + + //dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); + psta->dev_name_len=0; + if(WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16*)pattr_content)) + { + dev_name_len = be16_to_cpu(*(u16*)(pattr_content+2)); + + psta->dev_name_len = (sizeof(psta->dev_name)dev_name):dev_name_len; + + _rtw_memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len); + } + + rtw_mfree(pbuf, attr_contentlen); + + } + + } + + //Get the next P2P IE + p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); + + } + + return status_code; + +} + +u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) +{ + u8 *frame_body; + u8 status, dialogToken; + struct sta_info *psta = NULL; + _adapter *padapter = pwdinfo->padapter; + struct sta_priv *pstapriv = &padapter->stapriv; + u8 *p2p_ie; + u32 p2p_ielen = 0; + + frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); + + dialogToken = frame_body[7]; + status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; + + if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) + { + u8 groupid[ 38 ] = { 0x00 }; + u8 dev_addr[ETH_ALEN] = { 0x00 }; + u32 attr_contentlen = 0; + + if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) + { + if(_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && + _rtw_memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len)) + { + attr_contentlen=0; + if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) + { + _irqL irqL; + _list *phead, *plist; + + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + phead = &pstapriv->asoc_list; + plist = get_next(phead); + + //look up sta asoc_queue + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); + + plist = get_next(plist); + + if(psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) && + _rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) + { + + //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + //issue GO Discoverability Request + issue_group_disc_req(pwdinfo, psta->hwaddr); + //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + status = P2P_STATUS_SUCCESS; + + break; + } + else + { + status = P2P_STATUS_FAIL_INFO_UNAVAILABLE; + } + + } + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + } + else + { + status = P2P_STATUS_FAIL_INVALID_PARAM; + } + + } + else + { + status = P2P_STATUS_FAIL_INVALID_PARAM; + } + + } + + } + + + //issue Device Discoverability Response + issue_p2p_devdisc_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); + + + return (status==P2P_STATUS_SUCCESS) ? _TRUE:_FALSE; + +} + +u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) +{ + return _TRUE; +} + +u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) +{ + u8 *frame_body; + u8 *wpsie; + uint wps_ielen = 0, attr_contentlen = 0; + u16 uconfig_method = 0; + + + frame_body = (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); + + if ( (wpsie=rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) + { + if ( rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , ( u8* ) &uconfig_method, &attr_contentlen) ) + { + uconfig_method = be16_to_cpu( uconfig_method ); + switch( uconfig_method ) + { + case WPS_CM_DISPLYA: + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); + break; + } + case WPS_CM_LABEL: + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3 ); + break; + } + case WPS_CM_PUSH_BUTTON: + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); + break; + } + case WPS_CM_KEYPAD: + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); + break; + } + } + issue_p2p_provision_resp( pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method); + } + } + DBG_8192C( "[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); + return _TRUE; + +} + +u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe) +{ + + return _TRUE; +} + + + +u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) +{ + u8 result = P2P_STATUS_SUCCESS; + u32 p2p_ielen = 0, wps_ielen = 0; + u8 * ies; + u32 ies_len; + u8 * p2p_ie; + u8 *wpsie; + u16 wps_devicepassword_id = 0x0000; + uint wps_devicepassword_id_len = 0; +#ifdef CONFIG_WFD + u8 wfd_ie[ 128 ] = { 0x00 }; + u32 wfd_ielen = 0; +#endif // CONFIG_WFD + + if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) + { + result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + return( result ); + } + + if ( (wpsie=rtw_get_wps_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) + { + // Commented by Kurt 20120113 + // If some device wants to do p2p handshake without sending prov_disc_req + // We have to get peer_req_cm from here. + if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) + { + rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); + wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); + + if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); + } + else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); + } + else + { + _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); + } + } + } + else + { + DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); + result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + return( result ); + } + + ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; + ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; + + p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); + + if ( !p2p_ie ) + { + DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); + result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + } + + while ( p2p_ie ) + { + u8 attr_content = 0x00; + u32 attr_contentlen = 0; + + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); + + if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) + { + DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); + pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. + + if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) + { + // Try to match the tie breaker value + if ( pwdinfo->intent == P2P_MAX_INTENT ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; + } + else + { + if ( attr_content & 0x01 ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + } + else + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + } + } + else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + else + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + } + + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + // Store the group id information. + _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); + _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); + } + } + + + attr_contentlen = 0; + if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) + { + if ( attr_contentlen != ETH_ALEN ) + { + _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); + } + } + + //Get the next P2P IE + p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); + } + +#ifdef CONFIG_WFD + // Added by Albert 20110823 + // Try to get the TCP port information when receiving the negotiation request. + if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) + { + u8 attr_content[ 10 ] = { 0x00 }; + u32 attr_contentlen = 0; + + DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); + rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); + if ( attr_contentlen ) + { + pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); + DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); + } + } +#endif // CONFIG_WFD + + return( result ); +} + +u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) +{ + u8 result = P2P_STATUS_SUCCESS; + u32 p2p_ielen, wps_ielen; + u8 * ies; + u32 ies_len; + u8 * p2p_ie; +#ifdef CONFIG_WFD + u8 wfd_ie[ 128 ] = { 0x00 }; + u32 wfd_ielen = 0; +#endif // CONFIG_WFD + + ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; + ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; + + // Be able to know which one is the P2P GO and which one is P2P client. + + if ( rtw_get_wps_ie( ies, ies_len, NULL, &wps_ielen) ) + { + + } + else + { + DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); + result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + } + + p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); + if ( !p2p_ie ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; + } + else + { + u8 attr_content = 0x00; + u32 attr_contentlen = 0; + u8 operatingch_info[5] = { 0x00 }; + uint ch_cnt = 0; + u8 ch_content[50] = { 0x00 }; + u8 groupid[ 38 ]; + + while ( p2p_ie ) // Found the P2P IE. + { + + rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); + if ( attr_contentlen == 1 ) + { + DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content ); + if ( attr_content == P2P_STATUS_SUCCESS ) + { + // Do nothing. + } + else + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + result = attr_content; + break; + } + } + + // Try to get the peer's interface address + attr_contentlen = 0; + if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) + { + if ( attr_contentlen != ETH_ALEN ) + { + _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); + } + } + + // Try to get the peer's intent and tie breaker value. + attr_content = 0x00; + attr_contentlen = 0; + if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) + { + DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); + pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. + + if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) + { + // Try to match the tie breaker value + if ( pwdinfo->intent == P2P_MAX_INTENT ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + } + else + { + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + if ( attr_content & 0x01 ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + } + else + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + } + } + else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) + { + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + else + { + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + } + + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + // Store the group id information. + _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); + _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); + + } + } + + // Try to get the operation channel information + + attr_contentlen = 0; + if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) + { + DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); + pwdinfo->peer_operating_ch = operatingch_info[4]; + } + + // Try to get the channel list information + if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt) ) + { + pwdinfo->channel_cnt = ch_content[ 4 ]; // Number of Channels + _rtw_memcpy( pwdinfo->channel_list, &ch_content[ 5 ], pwdinfo->channel_cnt ); // Channel List + DBG_8192C( "[%s] channel count = %d\n", __FUNCTION__, pwdinfo->channel_cnt ); + } + else + { + DBG_8192C( "[%s] channel list attribute not found!\n", __FUNCTION__); + } + + // Try to get the group id information if peer is GO + attr_contentlen = 0; + _rtw_memset( groupid, 0x00, 38 ); + if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) + { + _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); + _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); + } + + //Get the next P2P IE + p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); + } + + } + +#ifdef CONFIG_WFD + // Added by Albert 20111122 + // Try to get the TCP port information when receiving the negotiation response. + if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) + { + u8 attr_content[ 10 ] = { 0x00 }; + u32 attr_contentlen = 0; + + DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); + rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); + if ( attr_contentlen ) + { + pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); + DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); + } + } +#endif // CONFIG_WFD + + return( result ); + +} + +u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) +{ + u8 * ies; + u32 ies_len; + u8 * p2p_ie; + u32 p2p_ielen = 0; + u8 result = P2P_STATUS_SUCCESS; + + ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; + ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; + + p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); + while ( p2p_ie ) // Found the P2P IE. + { + u8 attr_content = 0x00, operatingch_info[5] = { 0x00 }; + u8 groupid[ 38 ] = { 0x00 }; + u32 attr_contentlen = 0; + + pwdinfo->negotiation_dialog_token = 1; + rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); + if ( attr_contentlen == 1 ) + { + DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content ); + result = attr_content; + + if ( attr_content == P2P_STATUS_SUCCESS ) + { + u8 bcancelled = 0; + + _cancel_timer( &pwdinfo->restore_p2p_state_timer, &bcancelled ); + + // Commented by Albert 20100911 + // Todo: Need to handle the case which both Intents are the same. + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + if ( ( pwdinfo->intent ) > ( pwdinfo->peer_intent >> 1 ) ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + else if ( ( pwdinfo->intent ) < ( pwdinfo->peer_intent >> 1 ) ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + } + else + { + // Have to compare the Tie Breaker + if ( pwdinfo->peer_intent & 0x01 ) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + } + else + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + } + } + else + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); + break; + } + } + + // Try to get the group id information + attr_contentlen = 0; + _rtw_memset( groupid, 0x00, 38 ); + if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) + { + DBG_8192C( "[%s] Ssid = %s, ssidlen = %d\n", __FUNCTION__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]) ); + _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); + _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); + } + + attr_contentlen = 0; + if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) + { + DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); + pwdinfo->peer_operating_ch = operatingch_info[4]; + } + + //Get the next P2P IE + p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); + + } + + return( result ); +} + +u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) +{ + u8 *frame_body; + u8 dialogToken=0; + u8 status = P2P_STATUS_SUCCESS; + + frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); + + dialogToken = frame_body[6]; + + //todo: check NoA attribute + + issue_p2p_presence_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); + + return _TRUE; +} + +void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) +{ + u8 * ies; + u32 ies_len; + u8 * p2p_ie; + u32 p2p_ielen = 0; + u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2 + u32 attr_contentlen = 0; + + struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); + u8 find_p2p = _FALSE, find_p2p_ps = _FALSE; + u8 noa_offset, noa_num, noa_index; + +_func_enter_; + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + return; + } + + if(IELength <= _BEACON_IE_OFFSET_) + return; + + ies = IEs + _BEACON_IE_OFFSET_; + ies_len = IELength - _BEACON_IE_OFFSET_; + + p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen); + + while(p2p_ie) + { + find_p2p = _TRUE; + // Get Notice of Absence IE. + if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen)) + { + find_p2p_ps = _TRUE; + noa_index = noa_attr[0]; + + if( (pwdinfo->p2p_ps_enable == _FALSE) || + (noa_index != pwdinfo->noa_index) )// if index change, driver should reconfigure related setting. + { + pwdinfo->noa_index = noa_index; + pwdinfo->opp_ps = noa_attr[1] >> 7; + pwdinfo->ctwindow = noa_attr[1] & 0x7F; + + noa_offset = 2; + noa_num = 0; + // NoA length should be n*(13) + 2 + if(attr_contentlen > 2) + { + while(noa_offset < attr_contentlen) + { + //_rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); + pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; + noa_offset += 1; + + _rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4); + noa_offset += 4; + + _rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4); + noa_offset += 4; + + _rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4); + noa_offset += 4; + + noa_num++; + } + } + pwdinfo->noa_num = noa_num; + + if( pwdinfo->opp_ps == 1 ) + { + pwdinfo->p2p_ps_enable = _TRUE; + // driver should wait LPS for entering CTWindow + if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) + { + p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); + } + } + else if( pwdinfo->noa_num > 0 ) + { + pwdinfo->p2p_ps_enable = _TRUE; + p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); + } + else if( pwdinfo->p2p_ps_enable == _TRUE) + { + p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); + } + } + + break; // find target, just break. + } + + //Get the next P2P IE + p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); + + } + + if(find_p2p == _TRUE) + { + if( (pwdinfo->p2p_ps_enable == _TRUE) && (find_p2p_ps == _FALSE) ) + { + p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); + } + } + +_func_exit_; +} + +void find_phase_handler( _adapter* padapter ) +{ + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + NDIS_802_11_SSID ssid; + _irqL irqL; + u8 _status = 0; + +_func_enter_; + + _rtw_memset((unsigned char*)&ssid, 0, sizeof(NDIS_802_11_SSID)); + _rtw_memcpy(ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); + ssid.SsidLength = P2P_WILDCARD_SSID_LEN; + + rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); + + _enter_critical_bh(&pmlmepriv->lock, &irqL); + _status = rtw_sitesurvey_cmd(padapter, &ssid, 1); + _exit_critical_bh(&pmlmepriv->lock, &irqL); + + +_func_exit_; +} + +void restore_p2p_state_handler( _adapter* padapter ) +{ + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + +_func_enter_; + + rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) + { + // In the P2P client mode, the driver should not switch back to its listen channel + // because this P2P client should stay at the operating channel of P2P GO. + set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + } +_func_exit_; +} + +void pre_tx_provdisc_handler( _adapter* padapter ) +{ + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + u8 val8 = 1; +_func_enter_; + + set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + issue_probereq_p2p( padapter ); + _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); + +_func_exit_; +} + +void pre_tx_negoreq_handler( _adapter* padapter ) +{ + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + u8 val8 = 1; +_func_enter_; + + set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); + issue_probereq_p2p( padapter ); + _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); + +_func_exit_; +} + +#ifdef CONFIG_IOCTL_CFG80211 +void ro_ch_handler( _adapter* padapter ) +{ + struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; +_func_enter_; + +// if( pcfg80211_wdinfo->restore_channel != pmlmeext->cur_channel ) +// set_channel_bwmode(padapter, pcfg80211_wdinfo->restore_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + + #if 0 + // Disable P2P Listen State + if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + + rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); + _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); + + if(pwrpriv->bips_processing == _FALSE){ + rtw_set_pwr_state_check_timer(pwrpriv); + } + } + } + else + #endif + { + if( pcfg80211_wdinfo->restore_channel != pmlmeext->cur_channel ) + { + pmlmeext->cur_channel = pcfg80211_wdinfo->restore_channel; + set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + } + + rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +#ifdef CONFIG_DEBUG_CFG80211 + DBG_871X("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +#endif + } + + cfg80211_remain_on_channel_expired(pcfg80211_wdinfo->remain_on_ch_dev, + pcfg80211_wdinfo->remain_on_ch_cookie, + &pcfg80211_wdinfo->remain_on_ch_channel, + pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL); +_func_exit_; +} +#endif //CONFIG_IOCTL_CFG80211 + +void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType) +{ + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + +_func_enter_; + + switch(intCmdType) + { + case P2P_FIND_PHASE_WK: + { + find_phase_handler( padapter ); + break; + } + case P2P_RESTORE_STATE_WK: + { + restore_p2p_state_handler( padapter ); + break; + } + case P2P_PRE_TX_PROVDISC_PROCESS_WK: + { + pre_tx_provdisc_handler( padapter ); + break; + } + case P2P_PRE_TX_NEGOREQ_PROCESS_WK: + { + pre_tx_negoreq_handler( padapter ); + break; + } +#ifdef CONFIG_IOCTL_CFG80211 + case P2P_RO_CH_WK: + { + ro_ch_handler( padapter ); + break; + } +#endif //CONFIG_IOCTL_CFG80211 + } + +_func_exit_; +} + + + +void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) +{ + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + +_func_enter_; + + // Pre action for p2p state + switch(p2p_ps_state) + { + case P2P_PS_ENABLE: + if( pwdinfo->ctwindow > 0 ) + { + if(pwrpriv->smart_ps != 0) + { + pwrpriv->smart_ps = 0; + DBG_871X("%s(): Enter CTW, change SmartPS\n", __FUNCTION__); + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); + } + } + break; + default: + break; + } + + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); + + // clear P2P SW status + if(p2p_ps_state == P2P_PS_DISABLE) + { + pwdinfo->noa_index = 0; + pwdinfo->ctwindow = 0; + pwdinfo->opp_ps = 0; + pwdinfo->noa_num = 0; + pwdinfo->p2p_ps_enable = _FALSE; + if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) + { + if(pwrpriv->smart_ps == 0) + { + pwrpriv->smart_ps = 2; + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); + } + } + } + +_func_exit_; +} + +u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue) +{ + struct cmd_obj *ph2c; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + u8 res = _SUCCESS; + +_func_enter_; + + if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || + ( pwdinfo->p2p_ps == p2p_ps_state ) ) + { + return res; + } + + // driver only perform p2p ps when GO have Opp_Ps or NoA + if( pwdinfo->p2p_ps_enable ) + { + pwdinfo->p2p_ps = p2p_ps_state; + + if(enqueue) + { + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if(ph2c==NULL){ + res= _FAIL; + goto exit; + } + + pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if(pdrvextra_cmd_parm==NULL){ + rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); + res= _FAIL; + goto exit; + } + + pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID; + pdrvextra_cmd_parm->type_size = p2p_ps_state; + pdrvextra_cmd_parm->pbuf = NULL; + + init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + res = rtw_enqueue_cmd(pcmdpriv, ph2c); + } + else + { + p2p_ps_wk_hdl(padapter, p2p_ps_state); + } + } + +exit: + +_func_exit_; + + return res; + +} + +static void restore_p2p_state_timer_process (void *FunctionContext) +{ + _adapter *adapter = (_adapter *)FunctionContext; + struct wifidirect_info *pwdinfo = &adapter->wdinfo; + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + return; + + p2p_protocol_wk_cmd( adapter, P2P_RESTORE_STATE_WK ); +} + +static void pre_tx_scan_timer_process (void *FunctionContext) +{ + _adapter *adapter = (_adapter *) FunctionContext; + struct wifidirect_info *pwdinfo = &adapter->wdinfo; + _irqL irqL; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + u8 _status = 0; + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + return; + + _enter_critical_bh(&pmlmepriv->lock, &irqL); + + // Commented by Albert 20110805 + // Todo: Use the issuing probe request directly instead of using the rtw_sitesurvey_cmd!! + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) + { + if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) // the provision discovery request frame is trigger to send or not + { + p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK ); + //issue_probereq_p2p( adapter ); + //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); + } + } + else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) + { + if ( _TRUE == pwdinfo->nego_req_info.benable ) + { + p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK ); + //issue_probereq_p2p( adapter ); + //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); + } + } + else + { + DBG_8192C( "[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); + } + + _exit_critical_bh(&pmlmepriv->lock, &irqL); +} + +static void find_phase_timer_process (void *FunctionContext) +{ + _adapter *adapter = (_adapter *)FunctionContext; + struct wifidirect_info *pwdinfo = &adapter->wdinfo; + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + return; + + adapter->wdinfo.find_phase_state_exchange_cnt++; + + p2p_protocol_wk_cmd( adapter, P2P_FIND_PHASE_WK ); +} + +#ifdef CONFIG_IOCTL_CFG80211 +static void ro_ch_timer_process (void *FunctionContext) +{ + _adapter *adapter = (_adapter *)FunctionContext; + + //printk("%s \n", __FUNCTION__); + + p2p_protocol_wk_cmd( adapter, P2P_RO_CH_WK); +} + +void rtw_init_cfg80211_wifidirect_info( _adapter* padapter) +{ + struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; + + _rtw_memset(pcfg80211_wdinfo, 0x00, sizeof(struct cfg80211_wifidirect_info) ); + + _init_timer( &pcfg80211_wdinfo->remain_on_ch_timer, padapter->pnetdev, ro_ch_timer_process, padapter ); +} +#endif //CONFIG_IOCTL_CFG80211 + +void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role) +{ + struct wifidirect_info *pwdinfo; + + pwdinfo = &padapter->wdinfo; + + pwdinfo->padapter = padapter; + + //init device&interface address + _rtw_memcpy(pwdinfo->device_addr, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwdinfo->interface_addr, myid(&(padapter->eeprompriv)), ETH_ALEN); + + // 1, 6, 11 are the social channel defined in the WiFi Direct specification. + pwdinfo->social_chan[0] = 1; + pwdinfo->social_chan[1] = 6; + pwdinfo->social_chan[2] = 11; + pwdinfo->social_chan[3] = 0; // channel 0 for scanning ending in site survey function. + + // Use the channel 11 as the listen channel + pwdinfo->listen_channel = 11; + + if (role == P2P_ROLE_DEVICE) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); + pwdinfo->intent = 1; + } + else if (role == P2P_ROLE_CLIENT) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + pwdinfo->intent = 1; + } + else if (role == P2P_ROLE_GO) + { + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + pwdinfo->intent = 15; + } + + //rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE); + rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_LISTEN); + +// Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) + pwdinfo->support_rate[0] = 0x8c; // 6(B) + pwdinfo->support_rate[1] = 0x92; // 9(B) + pwdinfo->support_rate[2] = 0x18; // 12 + pwdinfo->support_rate[3] = 0x24; // 18 + pwdinfo->support_rate[4] = 0x30; // 24 + pwdinfo->support_rate[5] = 0x48; // 36 + pwdinfo->support_rate[6] = 0x60; // 48 + pwdinfo->support_rate[7] = 0x6c; // 54 + + _rtw_memcpy( ( void* ) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7 ); + + _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); + _rtw_memcpy( pwdinfo->device_name, "Realtek DMP Device", 18 ); + pwdinfo->device_name_len = 18; + + _rtw_memset( &pwdinfo->invitereq_info, 0x00, sizeof( struct tx_invite_req_info ) ); + pwdinfo->invitereq_info.token = 3; // Token used for P2P invitation request frame. + pwdinfo->invitereq_info.peer_operation_ch = pwdinfo->listen_channel; + + _rtw_memset( &pwdinfo->inviteresp_info, 0x00, sizeof( struct tx_invite_resp_info ) ); + pwdinfo->inviteresp_info.token = 0; + + pwdinfo->profileindex = 0; + _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); + + _init_timer( &pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter ); + _init_timer( &pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter ); + _init_timer( &pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter ); + + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); + + pwdinfo->listen_dwell = ( u8 ) (( rtw_get_current_time() % 3 ) + 1); + //DBG_8192C( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell ); + + _rtw_memset( &pwdinfo->tx_prov_disc_info, 0x00, sizeof( struct tx_provdisc_req_info ) ); + pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE; + + _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); + + pwdinfo->device_password_id_for_nego = WPS_DPID_PBC; + pwdinfo->negotiation_dialog_token = 1; + + _rtw_memset( pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN ); + pwdinfo->nego_ssidlen = 0; + + pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; +#ifdef CONFIG_WFD + pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY; + _rtw_memset( &pwdinfo->wfd_info, 0x00, sizeof( struct wifi_display_info ) ); + pwdinfo->wfd_info.rtsp_ctrlport = 554; + pwdinfo->wfd_info.peer_rtsp_ctrlport = 0; // Reset to 0 +#else + pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD; +#endif //CONFIG_WFD + pwdinfo->channel_cnt = 0; + _rtw_memset( pwdinfo->channel_list, 0x00, 13 ); + + _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4 ); + _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3 ); + _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); + +} + +#ifdef CONFIG_IOCTL_CFG80211 +int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) +{ + int is_p2p_frame = (-1); + unsigned char *frame_body; + u8 category, action, OUI_Subtype, dialogToken=0; + struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); + + frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); + category = frame_body[0]; + //just for check + if(category == RTW_WLAN_CATEGORY_PUBLIC) + { + action = frame_body[ 1 ]; + OUI_Subtype = frame_body[ 6 ]; + dialogToken = frame_body[7]; + + if ( action == ACT_PUBLIC_P2P ) + { +#ifdef CONFIG_DEBUG_CFG80211 + DBG_871X("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); +#endif + + is_p2p_frame = OUI_Subtype; + + switch( OUI_Subtype )//OUI Subtype + { + case P2P_GO_NEGO_REQ: + DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + + if(tx) + { + if(pwdev_priv->provdisc_req_issued == _FALSE) + rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); + + //pwdev_priv->provdisc_req_issued = _FALSE; + } + + break; + case P2P_GO_NEGO_RESP: + DBG_871X("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + + if(!tx) + pwdev_priv->provdisc_req_issued = _FALSE; + + break; + case P2P_GO_NEGO_CONF: + DBG_871X("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + break; + case P2P_INVIT_REQ: + DBG_871X("RTW_%s:P2P_INVIT_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + break; + case P2P_INVIT_RESP: + DBG_871X("RTW_%s:P2P_INVIT_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + break; + case P2P_DEVDISC_REQ: + DBG_871X("RTW_%s:P2P_DEVDISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + break; + case P2P_DEVDISC_RESP: + DBG_871X("RTW_%s:P2P_DEVDISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + break; + case P2P_PROVISION_DISC_REQ: + { + size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); + u8 *p2p_ie; + uint p2p_ielen = 0; + uint contentlen = 0; + + DBG_871X("RTW_%s:P2P_PROVISION_DISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + + //if(tx) + { + pwdev_priv->provdisc_req_issued = _FALSE; + + if( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen))) + { + + if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) + { + pwdev_priv->provdisc_req_issued = _FALSE;//case: p2p_client join p2p GO + } + else + { + DBG_871X("provdisc_req_issued is _TRUE\n"); + pwdev_priv->provdisc_req_issued = _TRUE;//case: p2p_devices connection before Nego req. + } + + } + } + } + break; + case P2P_PROVISION_DISC_RESP: + DBG_871X("RTW_%s:P2P_PROVISION_DISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); + break; + default: + DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", OUI_Subtype, dialogToken); + break; + } + + } + else + { + DBG_871X("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); + } + + } + else if(category == RTW_WLAN_CATEGORY_P2P) + { + OUI_Subtype = frame_body[5]; + dialogToken = frame_body[6]; + +#ifdef CONFIG_DEBUG_CFG80211 + DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); +#endif + + is_p2p_frame = OUI_Subtype; + + switch(OUI_Subtype) + { + case P2P_NOTICE_OF_ABSENCE: + DBG_871X("RTW_%s:P2P_NOTICE_OF_ABSENCE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); + break; + case P2P_PRESENCE_REQUEST: + DBG_871X("RTW_%s:P2P_PRESENCE_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); + break; + case P2P_PRESENCE_RESPONSE: + DBG_871X("RTW_%s:P2P_PRESENCE_RESPONSE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); + break; + case P2P_GO_DISC_REQUEST: + DBG_871X("RTW_%s:P2P_GO_DISC_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); + break; + default: + DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", OUI_Subtype, dialogToken); + break; + } + + } + else + { + DBG_871X("%s, action frame category=%d\n", __func__, category); + //is_p2p_frame = (-1); + } + + return is_p2p_frame; +} +#endif //CONFIG_IOCTL_CFG80211 + +#ifdef CONFIG_DBG_P2P +char * p2p_role_str[] = { + "P2P_ROLE_DISABLE", + "P2P_ROLE_DEVICE", + "P2P_ROLE_CLIENT", + "P2P_ROLE_GO" +}; + +char * p2p_state_str[] = { + "P2P_STATE_NONE", + "P2P_STATE_IDLE", + "P2P_STATE_LISTEN", + "P2P_STATE_SCAN", + "P2P_STATE_FIND_PHASE_LISTEN", + "P2P_STATE_FIND_PHASE_SEARCH", + "P2P_STATE_TX_PROVISION_DIS_REQ", + "P2P_STATE_RX_PROVISION_DIS_RSP", + "P2P_STATE_RX_PROVISION_DIS_REQ", + "P2P_STATE_GONEGO_ING", + "P2P_STATE_GONEGO_OK", + "P2P_STATE_GONEGO_FAIL", + "P2P_STATE_RECV_INVITE_REQ", + "P2P_STATE_PROVISIONING_ING", + "P2P_STATE_PROVISIONING_DONE" +}; + +void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) +{ + if(!_rtw_p2p_chk_state(wdinfo, state)) { + enum P2P_STATE old_state = _rtw_p2p_state(wdinfo); + _rtw_p2p_set_state(wdinfo, state); + DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state from %s to %s\n", caller, line + , p2p_state_str[old_state], p2p_state_str[_rtw_p2p_state(wdinfo)] + ); + } else { + DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state to same state %s\n", caller, line + , p2p_state_str[_rtw_p2p_state(wdinfo)] + ); + } +} +void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) +{ + if(_rtw_p2p_pre_state(wdinfo) != state) { + enum P2P_STATE old_state = _rtw_p2p_pre_state(wdinfo); + _rtw_p2p_set_pre_state(wdinfo, state); + DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state from %s to %s\n", caller, line + , p2p_state_str[old_state], p2p_state_str[_rtw_p2p_pre_state(wdinfo)] + ); + } else { + DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state to same state %s\n", caller, line + , p2p_state_str[_rtw_p2p_pre_state(wdinfo)] + ); + } +} +#if 0 +void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line) +{ + if(wdinfo->pre_p2p_state != -1) { + DBG_871X("[CONFIG_DBG_P2P]%s:%d restore from %s to %s\n", caller, line + , p2p_state_str[wdinfo->p2p_state], p2p_state_str[wdinfo->pre_p2p_state] + ); + _rtw_p2p_restore_state(wdinfo); + } else { + DBG_871X("[CONFIG_DBG_P2P]%s:%d restore no pre state, cur state %s\n", caller, line + , p2p_state_str[wdinfo->p2p_state] + ); + } +} +#endif +void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line) +{ + if(wdinfo->role != role) { + enum P2P_ROLE old_role = wdinfo->role; + _rtw_p2p_set_role(wdinfo, role); + DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role from %s to %s\n", caller, line + , p2p_role_str[old_role], p2p_role_str[wdinfo->role] + ); + } else { + DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role to same role %s\n", caller, line + , p2p_role_str[wdinfo->role] + ); + } +} +#endif //CONFIG_DBG_P2P + + +int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) +{ + int ret = _SUCCESS; + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + + if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT|| role == P2P_ROLE_GO) + { + u8 channel, ch_offset; + u16 bwmode; + + //leave IPS/Autosuspend + if(_FAIL == rtw_pwr_wakeup(padapter)) + { + ret = _FAIL; + goto exit; + } + + #ifdef CONFIG_P2P_AGAINST_NOISE + //Sometimes dongle would difficult to receive p2p_probe_req caused by platform noise. Kurt + rtw_write8(padapter, 0xc41, 0x42); + DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41)); + #endif + + //Enable P2P function + init_wifidirect_info(padapter, role); + + } + else if (role == P2P_ROLE_DISABLE) + { + #ifdef CONFIG_P2P_AGAINST_NOISE + rtw_write8(padapter, 0xc41, 0x40); + DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41)); + #endif + + //Disable P2P function + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); + _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); + } + + if(pwrpriv->bips_processing == _FALSE){ + rtw_set_pwr_state_check_timer(pwrpriv); + } + } + +exit: + return ret; +} + +#endif //CONFIG_P2P + diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_pwrctrl.c b/drivers/net/wireless/rtl8192cu/core/rtw_pwrctrl.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_recv.c b/drivers/net/wireless/rtl8192cu/core/rtw_recv.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_rf.c b/drivers/net/wireless/rtl8192cu/core/rtw_rf.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_security.c b/drivers/net/wireless/rtl8192cu/core/rtw_security.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_sta_mgt.c b/drivers/net/wireless/rtl8192cu/core/rtw_sta_mgt.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_wlan_util.c b/drivers/net/wireless/rtl8192cu/core/rtw_wlan_util.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/core/rtw_xmit.c b/drivers/net/wireless/rtl8192cu/core/rtw_xmit.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/hal_init.c b/drivers/net/wireless/rtl8192cu/hal/hal_init.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c old mode 100755 new mode 100644 index 6c53f89d1aedaf..971ef6c3c5e70b --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c @@ -1,1361 +1,1361 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#define _RTL8192C_CMD_C_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - - -#if 0 -static BOOLEAN -CheckWriteMSG( - IN PADAPTER Adapter, - IN u8 BoxNum -) -{ - u8 valHMETFR; - BOOLEAN Result = _FALSE; - - valHMETFR = rtw_read8(Adapter, REG_HMETFR); - - //DbgPrint("CheckWriteH2C(): Reg[0x%2x] = %x\n",REG_HMETFR, valHMETFR); - - if(((valHMETFR>>BoxNum)&BIT0) == 1) - Result = _TRUE; - - return Result; - -} - -static BOOLEAN CheckFwReadLastMSG( - IN PADAPTER Adapter, - IN u8 BoxNum -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 valHMETFR, valMCUTST_1; - BOOLEAN Result = _FALSE; - - valHMETFR = rtw_read8(Adapter, REG_HMETFR); - valMCUTST_1 = rtw_read8(Adapter, (REG_MCUTST_1+BoxNum)); - - //DbgPrint("REG[%x] = %x, REG[%x] = %x\n", - // REG_HMETFR, valHMETFR, REG_MCUTST_1+BoxNum, valMCUTST_1 ); - - // Do not seperate to 91C and 88C, we use the same setting. Suggested by SD4 Filen. 2009.12.03. - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - if(((valHMETFR>>BoxNum)&BIT0) == 0) - Result = _TRUE; - } - else - { - if((((valHMETFR>>BoxNum)&BIT0) == 0) && (valMCUTST_1 == 0)) - { - Result = _TRUE; - } - } - - return Result; -} -#endif - - -#define RTL92C_MAX_H2C_BOX_NUMS 4 -#define RTL92C_MAX_CMD_LEN 5 -#define MESSAGE_BOX_SIZE 4 -#define EX_MESSAGE_BOX_SIZE 2 - -static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 isvern, u8 msgbox_num) -{ - u8 read_down = _FALSE; - int retry_cnts = 100; - - u8 valid; - -// DBG_8192C(" _is_fw_read_cmd_down ,isnormal_chip(%x),reg_1cc(%x),msg_box(%d)...\n",isvern,rtw_read8(padapter,REG_HMETFR),msgbox_num); - - do{ - valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); - if(isvern){ - if(0 == valid ){ - read_down = _TRUE; - } - } - else{ - if((0 == valid) && (0 == rtw_read8(padapter, REG_MCUTST_1+msgbox_num))){ - read_down = _TRUE; - } - } - }while( (!read_down) && (retry_cnts--)); - - return read_down; - -} - - -/***************************************** -* H2C Msg format : -*| 31 - 8 |7 | 6 - 0 | -*| h2c_msg |Ext_bit |CMD_ID | -* -******************************************/ -int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer) -{ -#if 1 - u8 bcmd_down = _FALSE; - int retry_cnts = 100; - u8 h2c_box_num; - u32 msgbox_addr; - u32 msgbox_ex_addr; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 isnchip =IS_NORMAL_CHIP(pHalData->VersionID); - u32 h2c_cmd = 0; - u16 h2c_cmd_ex = 0; - int ret = _FAIL; - - _func_enter_; - - if(!pCmdBuffer){ - goto exit; - } - if(CmdLen > RTL92C_MAX_CMD_LEN){ - goto exit; - } - //pay attention to if race condition happened in H2C cmd setting. - do{ - h2c_box_num = pHalData->LastHMEBoxNum; - - if(!_is_fw_read_cmd_down(padapter, isnchip, h2c_box_num)){ - DBG_8192C(" fw read cmd failed...\n"); - goto exit; - } - - if(CmdLen<=3) - { - _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); - } - else{ - _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE); - _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE)); - *(u8*)(&h2c_cmd) |= BIT(7); - } - - *(u8*)(&h2c_cmd) |= ElementID; - - if(h2c_cmd & BIT(7)){ - msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE); - h2c_cmd_ex = cpu_to_le16( h2c_cmd_ex ); - rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex); - } - msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE); - h2c_cmd = cpu_to_le32( h2c_cmd ); - rtw_write32(padapter,msgbox_addr, h2c_cmd); - - if(!isnchip){//for Test chip - if(! (rtw_read8(padapter, REG_HMETFR) & BIT(h2c_box_num))){ - DBG_8192C("Chip test - check fw write failed, write again..\n"); - continue; - } - // Fill H2C protection register. - rtw_write8(padapter,REG_MCUTST_1+h2c_box_num, 0xFF); - } - bcmd_down = _TRUE; - - // DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" - // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); - - pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS ; - - }while((!bcmd_down) && (retry_cnts--)); -/* - if(bcmd_down) - DBG_8192C("H2C Cmd exe down. \n" ); - else - DBG_8192C("H2C Cmd exe failed. \n" ); -*/ - ret = _SUCCESS; - _func_exit_; - -#else - u8 BoxNum; - u16 BOXReg, BOXExtReg; - u8 BoxContent[4], BoxExtContent[2]; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 BufIndex=0; - u8 bWriteSucess = _FALSE; - u8 IsFwRead = _FALSE; - u8 WaitH2cLimmit = 100; - - u32 h2c_cmd = 0; - u16 h2c_cmd_ex = 0; - -_func_enter_; - - //DBG_8192C("FillH2CCmd : ElementID=%d \n",ElementID); - - while(!bWriteSucess) - { - // 2. Find the last BOX number which has been writen. - BoxNum = pHalData->LastHMEBoxNum; - switch(BoxNum) - { - case 0: - BOXReg = REG_HMEBOX_0; - BOXExtReg = REG_HMEBOX_EXT_0; - break; - case 1: - BOXReg = REG_HMEBOX_1; - BOXExtReg = REG_HMEBOX_EXT_1; - break; - case 2: - BOXReg = REG_HMEBOX_2; - BOXExtReg = REG_HMEBOX_EXT_2; - break; - case 3: - BOXReg = REG_HMEBOX_3; - BOXExtReg = REG_HMEBOX_EXT_3; - break; - default: - break; - } - - // 3. Check if the box content is empty. - IsFwRead = CheckFwReadLastMSG(padapter, BoxNum); - while(!IsFwRead) - { - //wait until Fw read - WaitH2cLimmit--; - if(WaitH2cLimmit == 0) - { - DBG_8192C("FillH2CCmd92C(): Wating too long for FW read clear HMEBox(%d)!!!\n", BoxNum); - break; - } - rtw_msleep_os(10); //us - IsFwRead = CheckFwReadLastMSG(padapter, BoxNum); - //U1btmp = PlatformEFIORead1Byte(Adapter, 0x1BF); - //RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C(): Wating for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n", BoxNum, U1btmp)); - } - - // If Fw has not read the last H2C cmd, break and give up this H2C. - if(!IsFwRead) - { - DBG_8192C("FillH2CCmd92C(): Write H2C register BOX[%d] fail!!!!! Fw do not read. \n", BoxNum); - break; - } - - // 4. Fill the H2C cmd into box - _rtw_memset(BoxContent, 0, sizeof(BoxContent)); - _rtw_memset(BoxExtContent, 0, sizeof(BoxExtContent)); - - BoxContent[0] = ElementID; // Fill element ID - - //DBG_8192C("FillH2CCmd92C():Write ElementID BOXReg(%4x) = %2x \n", BOXReg, ElementID); - - switch(CmdLen) - { - case 1: - { - BoxContent[0] &= ~(BIT7); - _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 1); - rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); - h2c_cmd = *((u32*)BoxContent); - break; - } - case 2: - { - BoxContent[0] &= ~(BIT7); - _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 2); - rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); - h2c_cmd = *((u32*)BoxContent); - break; - } - case 3: - { - BoxContent[0] &= ~(BIT7); - _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 3); - rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); - h2c_cmd = *((u32*)BoxContent); - break; - } - case 4: - { - BoxContent[0] |= (BIT7); - _rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2); - _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 2); - rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent)); - rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); - h2c_cmd = *((u32*)BoxContent); - h2c_cmd_ex = *((u32*)BoxExtContent); - break; - } - case 5: - { - BoxContent[0] |= (BIT7); - _rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2); - _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 3); - rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent)); - rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); - h2c_cmd = *((u32*)BoxContent); - h2c_cmd_ex = *((u32*)BoxExtContent); - break; - } - default: - break; - - } - - - DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" - ,pHalData->LastHMEBoxNum ,CmdLen,BOXReg,h2c_cmd,BOXExtReg,h2c_cmd_ex); - - //DBG_8192C("FillH2CCmd(): BoxExtContent=0x%x\n", *(u16*)BoxExtContent); - //DBG_8192C("FillH2CCmd(): BoxContent=0x%x\n", *(u32*)BoxContent); - - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - // 5. Normal chip does not need to check if the H2C cmd has be written successfully. - bWriteSucess = _TRUE; - } - else - { - // 5. Check if the H2C cmd has be written successfully. - bWriteSucess = CheckWriteMSG(padapter, BoxNum); - if(!bWriteSucess) //If not then write again. - continue; - - //6. Fill H2C protection register. - - rtw_write8(padapter, REG_MCUTST_1+BoxNum, 0xFF); - //RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C():Write Reg(%4x) = 0xFF \n", REG_MCUTST_1+BoxNum)); - } - - // Record the next BoxNum - pHalData->LastHMEBoxNum = BoxNum+1; - if(pHalData->LastHMEBoxNum == 4) // loop to 0 - pHalData->LastHMEBoxNum = 0; - - //DBG_8192C("FillH2CCmd92C():pHalData->LastHMEBoxNum = %d\n", pHalData->LastHMEBoxNum); - - } - -_func_exit_; - -#endif - -#ifdef CONFIG_CONCURRENT_MODE - //_exit_critical_mutex(padapter->ph2c_fwcmd_mutex, NULL); -#endif -exit: - return ret; - -} - -u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) -{ - u8 ElementID, CmdLen; - u8 *pCmdBuffer; - struct cmd_msg_parm *pcmdmsg; - - if(!pbuf) - return H2C_PARAMETERS_ERROR; - - pcmdmsg = (struct cmd_msg_parm*)pbuf; - ElementID = pcmdmsg->eid; - CmdLen = pcmdmsg->sz; - pCmdBuffer = pcmdmsg->buf; - - rtl8192c_FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer); - - return H2C_SUCCESS; -} - -#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) -u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) -{ - u8 res=_SUCCESS; - struct H2C_SS_RFOFF_PARAM param; - DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); - param.gpio_period = period;//Polling GPIO_11 period time - param.ROFOn = (_TRUE == bfwpoll)?1:0; - rtl8192c_FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); - return res; -} -#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED - -u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param) -{ - u8 res=_SUCCESS; - -_func_enter_; - - *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); - - rtl8192c_FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param); - -_func_exit_; - - return res; -} - -u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg) -{ - u8 buf[5]; - u8 res=_SUCCESS; - -_func_enter_; - - _rtw_memset(buf, 0, 5); - mask = cpu_to_le32( mask ); - _rtw_memcpy(buf, &mask, 4); - buf[4] = arg; - - rtl8192c_FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf); - -_func_exit_; - - return res; - -} - -u8 rtl8192c_set_ext_macid_period_cmd(_adapter*padapter, u8 period) -{ - u8 ext_macid_period=0; - u8 res=_SUCCESS; - -_func_enter_; - - ext_macid_period=period; - - rtl8192c_FillH2CCmd(padapter, EXT_MACID_PERIOD_EID, 1, &ext_macid_period); - -_func_exit_; - - return res; - -} - -u8 rtl8192c_set_raid64_cmd(_adapter*padapter, u32 mask, u8 arg) -{ - u8 buf[5]; - u8 res=_SUCCESS; - -_func_enter_; - - _rtw_memset(buf, 0, 5); - mask = cpu_to_le32( mask ); - _rtw_memcpy(buf, &mask, 4); - buf[4] = arg; - - rtl8192c_FillH2CCmd(padapter, MACID64_CONFIG_EID, 5, buf); - -_func_exit_; - - return res; - -} -//bitmap[0:27] = tx_rate_bitmap -//bitmap[28:31]= Rate Adaptive id -//arg[0:4] = macid -//arg[5] = Short GI -void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - if(pHalData->fw_ractrl == _TRUE) - { - DBG_8192C("%s() pHalData->fw_ractrl == _TRUE\n",__FUNCTION__); -#ifdef SUPPORT_64_STA - if(mac_id >=FW_CTRL_MACID){ - rtl8192c_set_ext_macid_period_cmd(pAdapter,20); - rtl8192c_set_raid64_cmd(pAdapter, bitmap, arg); - DBG_8192C("%s() rtl8192c_set_raid64_cmd, bitmap=0x%x, arg =0x%x\n",__FUNCTION__,bitmap,arg); - } - else -#endif //SUPPORT_64_STA - { - rtl8192c_set_raid_cmd(pAdapter, bitmap, arg); - DBG_8192C("%s() rtl8192c_set_raid_cmd, bitmap=0x%x, arg =0x%x\n",__FUNCTION__,bitmap,arg); - } - - } - else - { - u8 macid, init_rate, shortGIrate=_FALSE; - - init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; - - macid = arg&0x1f; - - shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; - - if (shortGIrate==_TRUE) - init_rate |= BIT(6); - - rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); - } - -} - -void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode) -{ - SETPWRMODE_PARM H2CSetPwrMode; - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - -_func_enter_; - - DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps); - - H2CSetPwrMode.Mode = Mode; - - H2CSetPwrMode.SmartPS = pwrpriv->smart_ps; - - H2CSetPwrMode.BcnPassTime = 1;//pPSC->RegMaxLPSAwakeIntvl; - - rtl8192c_FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); - -_func_exit_; -} - -void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u32 rate_len, pktlen; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - - //DBG_871X("%s\n", __FUNCTION__); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); - - SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); - //pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_BEACON); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); - - //timestamp will be inserted by hardware - pframe += 8; - pktlen += 8; - - // beacon interval: 2 bytes - _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); - - pframe += 2; - pktlen += 2; - - // capability info: 2 bytes - _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); - - pframe += 2; - pktlen += 2; - - if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - { - //DBG_871X("ie len=%d\n", cur_network->IELength); - pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); - _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); - - goto _ConstructBeacon; - } - - //below for ad-hoc mode - - // SSID - pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); - - // supported rates... - rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); - - // DS parameter set - pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); - - if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) - { - u32 ATIMWindow; - // IBSS Parameter Set... - //ATIMWindow = cur->Configuration.ATIMWindow; - ATIMWindow = 0; - pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); - } - - - //todo: ERP IE - - - // EXTERNDED SUPPORTED RATE - if (rate_len > 8) - { - pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); - } - - - //todo:HT for adhoc - -_ConstructBeacon: - - if ((pktlen + TXDESC_SIZE) > 512) - { - DBG_871X("beacon frame too large\n"); - return; - } - - *pLength = pktlen; - - //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); - -} - -void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u32 pktlen; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - //DBG_871X("%s\n", __FUNCTION__); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - // Frame control. - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - SetPwrMgt(fctrl); - SetFrameSubType(pframe, WIFI_PSPOLL); - - // AID. - SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); - - // BSSID. - _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - // TA. - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - - *pLength = 16; -} - -void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u32 pktlen; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - if (bForcePowerSave) - { - SetPwrMgt(fctrl); - } - - switch(cur_network->network.InfrastructureMode) - { - case Ndis802_11Infrastructure: - SetToDs(fctrl); - _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); - break; - case Ndis802_11APMode: - SetFrDs(fctrl); - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); - break; - case Ndis802_11IBSS: - default: - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - break; - } - - SetSeqNum(pwlanhdr, 0); - - SetFrameSubType(pframe, WIFI_DATA_NULL); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - *pLength = pktlen; -} - -void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u8 *mac, *bssid; - u32 pktlen; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - - - //DBG_871X("%s\n", __FUNCTION__); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - mac = myid(&(padapter->eeprompriv)); - bssid = cur_network->MacAddress; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); - - SetSeqNum(pwlanhdr, 0); - SetFrameSubType(fctrl, WIFI_PROBERSP); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - pframe += pktlen; - - if(cur_network->IELength>MAX_IE_SZ) - return; - - _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); - pframe += cur_network->IELength; - pktlen += cur_network->IELength; - - *pLength = pktlen; -} - -// -// Description: In normal chip, we should send some packet to Hw which will be used by Fw -// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then -// Fw can tell Hw to send these packet derectly. -// Added by tynli. 2009.10.15. -// -static VOID -FillFakeTxDescriptor92C( - IN PADAPTER Adapter, - IN u8* pDesc, - IN u32 BufferLen, - IN BOOLEAN IsPsPoll -) -{ - struct tx_desc *ptxdesc = (struct tx_desc *)pDesc; - - // Clear all status - _rtw_memset(pDesc, 0, 32); - - //offset 0 - ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; - - ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); - } - else - { - ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number - ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. - } - - //offset 16 - ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate - -#ifdef CONFIG_USB_HCI - // USB interface drop packet if the checksum of descriptor isn't correct. - // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). - rtl8192cu_cal_txdesc_chksum(ptxdesc); -#endif - - //RT_PRINT_DATA(COMP_CMD, DBG_TRACE, "TxFillCmdDesc8192C(): H2C Tx Cmd Content ----->\n", pDesc, TX_DESC_SIZE); -} - -// To check if reserved page content is destroyed by beacon beacuse beacon is too large. -// 2010.06.23. Added by tynli. -VOID -CheckFwRsvdPageContent( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); - u32 MaxBcnPageNum; - - if(pHalData->FwRsvdPageStartOffset != 0) - { - /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); - RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), - ("CheckFwRsvdPageContent(): The reserved page content has been"\ - "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", - MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ - } -} - -// -// Description: Fill the reserved packets that FW will use to RSVD page. -// Now we just send 4 types packet to rsvd page. -// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. -// Input: -// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, -// so we need to set the packet length to total lengh. -// TRUE: At the second time, we should send the first packet (default:beacon) -// to Hw again and set the lengh in descriptor to the real beacon lengh. -// 2009.10.15 by tynli. -static void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u32 BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength; - u8 *ReservedPagePacket; - u8 PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0; - u16 BufIndex=0; - u32 TotalPacketLen; - RSVDPAGE_LOC RsvdPageLoc; - BOOLEAN bDLOK = _FALSE; - - DBG_871X("%s\n", __FUNCTION__); - - ReservedPagePacket = (u8*)rtw_malloc(1000); - if(ReservedPagePacket == NULL){ - DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__); - return; - } - - _rtw_memset(ReservedPagePacket, 0, 1000); - - TxDescLen = 32;//TX_DESC_SIZE; - -#ifdef CONFIG_USB_HCI - BufIndex = TXDESC_OFFSET; - TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor. -#else - BufIndex = 0; - TxDescOffset = 0; -#endif - - //(1) beacon - ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength); - - //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", &ReservedPagePacket[BufIndex], (BeaconLength+BufIndex)); - -//-------------------------------------------------------------------- - - // When we count the first page size, we need to reserve description size for the RSVD - // packet, it will be filled in front of the packet in TXPKTBUF. - U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen); - PageNum += U1bTmp; - // To reserved 2 pages for beacon buffer. 2010.06.24. - if(PageNum == 1) - PageNum+=1; - pHalData->FwRsvdPageStartOffset = PageNum; - - BufIndex = (PageNum*128) + TxDescOffset; - - //(2) ps-poll - ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength); - - FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE); - - //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); - - RsvdPageLoc.LocPsPoll = PageNum; - -//------------------------------------------------------------------ - - U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen); - PageNum += U1bTmp; - - BufIndex = (PageNum*128) + TxDescOffset; - - //(3) null data - ConstructNullFunctionData( - Adapter, - &ReservedPagePacket[BufIndex], - &NullFunctionDataLength, - get_my_bssid(&(pmlmeinfo->network)), - _FALSE); - - FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE); - - RsvdPageLoc.LocNullData = PageNum; - - //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen)); -//------------------------------------------------------------------ - - U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen); - PageNum += U1bTmp; - - BufIndex = (PageNum*128) + TxDescOffset; - - //(4) probe response - ConstructProbeRsp( - Adapter, - &ReservedPagePacket[BufIndex], - &ProbeRspLength, - get_my_bssid(&(pmlmeinfo->network)), - _FALSE); - - FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE); - - RsvdPageLoc.LocProbeRsp = PageNum; - - //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen)); - -//------------------------------------------------------------------ - - U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen); - - PageNum += U1bTmp; - - TotalPacketLen = (PageNum*128); - - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - return; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(Adapter, pattrib); - pattrib->qsel = 0x10; - pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen; - _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); - - Adapter->HalFunc.mgnt_xmit(Adapter, pmgntframe); - - bDLOK = _TRUE; - - if(bDLOK) - { - DBG_871X("Set RSVD page location to Fw.\n"); - rtl8192c_FillH2CCmd(Adapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); - } - - rtw_mfree(ReservedPagePacket,1000); - -} - -void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus) -{ - JOINBSSRPT_PARM JoinBssRptParm; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - -_func_enter_; - - DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); - - if(mstatus == 1) - { - // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. - // Suggested by filen. Added by tynli. - rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); - // Do not set TSF again here or vWiFi beacon DMA INT will not work. - //correct_TSF(padapter, pmlmeext); - // Hw sequende enable by dedault. 2010.06.23. by tynli. - //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); - //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); - - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - BOOLEAN bRecover = _FALSE; - - //set REG_CR bit 8 - //U1bTmp = rtw_read8(padapter, REG_CR+1); - rtw_write8(padapter, REG_CR+1, 0x03); - - // Disable Hw protection for a time which revserd for Hw sending beacon. - // Fix download reserved page packet fail that access collision with the protection time. - // 2010.05.11. Added by tynli. - //SetBcnCtrlReg(padapter, 0, BIT3); - //SetBcnCtrlReg(padapter, BIT4, 0); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); - - // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. - if(pHalData->RegFwHwTxQCtrl&BIT6) - bRecover = _TRUE; - - // To tell Hw the packet is not a real beacon frame. - //U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); - pHalData->RegFwHwTxQCtrl &= (~BIT6); - SetFwRsvdPagePkt(padapter, 0); - - // 2010.05.11. Added by tynli. - //SetBcnCtrlReg(padapter, BIT3, 0); - //SetBcnCtrlReg(padapter, 0, BIT4); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); - - // To make sure that if there exists an adapter which would like to send beacon. - // If exists, the origianl value of 0x422[6] will be 1, we should check this to - // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause - // the beacon cannot be sent by HW. - // 2010.06.23. Added by tynli. - if(bRecover) - { - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); - pHalData->RegFwHwTxQCtrl |= BIT6; - } - - // Clear CR[8] or beacon packet will not be send to TxBuf anymore. - rtw_write8(padapter, REG_CR+1, 0x02); - } - } - - JoinBssRptParm.OpMode = mstatus; - - rtl8192c_FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); - -_func_exit_; -} - -#ifdef CONFIG_P2P -void rtl8192c_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow) -{ - struct P2P_PS_CTWPeriod_t p2p_ps_ctw; - - p2p_ps_ctw.CTWPeriod = ctwindow; - - rtl8192c_FillH2CCmd(padapter, P2P_PS_CTW_CMD_EID, 1, (u8 *)(&p2p_ps_ctw)); - -} - -void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); - struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; - u8 i; - u16 ctwindow; - u32 start_time, tsf_low; - -_func_enter_; - - switch(p2p_ps_state) - { - case P2P_PS_DISABLE: - DBG_8192C("P2P_PS_DISABLE \n"); - _rtw_memset(p2p_ps_offload, 0 ,1); - break; - case P2P_PS_ENABLE: - DBG_8192C("P2P_PS_ENABLE \n"); - // update CTWindow value. - if( pwdinfo->ctwindow > 0 ) - { - p2p_ps_offload->CTWindow_En = 1; - ctwindow = pwdinfo->ctwindow; - if(IS_HARDWARE_TYPE_8723(padapter)) - { - //rtw_write16(padapter, REG_ATIMWND, ctwindow); - } - else - { - rtl8192c_set_p2p_ctw_period_cmd(padapter, ctwindow); - } - } - - // hw only support 2 set of NoA - for( i=0 ; inoa_num ; i++) - { - // To control the register setting for which NOA - rtw_write8(padapter, 0x5CF, (i << 4)); - if(i == 0) - p2p_ps_offload->NoA0_En = 1; - else - p2p_ps_offload->NoA1_En = 1; - - // config P2P NoA Descriptor Register - rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]); - - rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]); - - //Get Current TSF value - tsf_low = rtw_read32(padapter, REG_TSFTR); - - start_time = pwdinfo->noa_start_time[i]; - if(pwdinfo->noa_count[i] != 1) - { - while( start_time <= (tsf_low+(50*1024) ) ) - { - start_time += pwdinfo->noa_interval[i]; - if(pwdinfo->noa_count[i] != 255) - pwdinfo->noa_count[i]--; - } - } - //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time); - rtw_write32(padapter, 0x5E8, start_time); - - rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]); - } - - if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) - { - // rst p2p circuit - rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); - - p2p_ps_offload->Offload_En = 1; - - if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - p2p_ps_offload->role= 1; - p2p_ps_offload->AllStaSleep = 0; - } - else - { - p2p_ps_offload->role= 0; - } - - p2p_ps_offload->discovery = 0; - } - break; - case P2P_PS_SCAN: - DBG_8192C("P2P_PS_SCAN \n"); - p2p_ps_offload->discovery = 1; - break; - case P2P_PS_SCAN_DONE: - DBG_8192C("P2P_PS_SCAN_DONE \n"); - p2p_ps_offload->discovery = 0; - pwdinfo->p2p_ps = P2P_PS_ENABLE; - break; - default: - break; - } - - rtl8192c_FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload); - -_func_exit_; - -} -#endif //CONFIG_P2P - -#ifdef CONFIG_IOL -#include -int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) -{ - IO_OFFLOAD_LOC IoOffloadLoc; - u32 start_time = rtw_get_current_time(); - u32 passing_time_ms; - u8 polling_ret; - int ret = _FAIL; - - if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) - goto exit; - - //adapter->HalFunc.mgnt_xmit(adapter, xmit_frame); - rtw_dump_xframe_sync(adapter, xmit_frame); - - IoOffloadLoc.LocCmd = 0; - if(_SUCCESS != rtl8192c_FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc)) - goto exit; - - //polling if the IO offloading is done - while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) { - #if 0 //C2H - if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR)) - break; - #else// 0x1c3 - if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3))) - break; - #endif - rtw_msleep_os(5); - } - #if 0 //debug - DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" - , polling_ret==0xff?"success":"error" - , polling_ret - , rtw_read32(adapter, 0x1c0) - , rtw_read32(adapter, 0x1c4) - , rtw_read32(adapter, 0x1cc) - , rtw_read32(adapter, 0x1e8) - , rtw_read32(adapter, 0x130) - , rtw_read32(adapter, 0x134) - ); - rtw_write32(adapter, 0x1c0, 0x0); - #endif - - if(polling_ret == 0xff) - ret =_SUCCESS; - else { - DBG_871X("IOL %s, polling_ret:0x%02x\n" - //", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" - , polling_ret==0xff?"success":"error" - , polling_ret - //, rtw_read32(adapter, 0x1c0) - //, rtw_read32(adapter, 0x1c4) - //, rtw_read32(adapter, 0x1cc) - //, rtw_read32(adapter, 0x1e8) - //, rtw_read32(adapter, 0x130) - //, rtw_read32(adapter, 0x134) - ); - #if 0 //debug - rtw_write16(adapter, 0x1c4, 0x0000); - rtw_msleep_os(10); - DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4)); - #endif - - } - - { - #if 0 //C2H - u32 c2h_evt; - int i; - c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL); - DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt); - rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0); - #else// 0x1c3 - DBG_871X("IOL %s complete in %ums\n", __FUNCTION__, passing_time_ms); - rtw_write8(adapter, 0x1c3, 0x0); - #endif - } - -exit: - return ret; - -} -#endif //CONFIG_IOL - - -#ifdef CONFIG_WOWLAN - -void rtl8192c_set_wowlan_cmd(_adapter* padapter) -{ - u8 res=_SUCCESS; - SETWOWLAN_PARM pwowlan_parm; - struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; - -_func_enter_; - - pwowlan_parm.mode =0; - pwowlan_parm.gpio_index=0; - pwowlan_parm.gpio_duration=0; - pwowlan_parm.second_mode =0; - pwowlan_parm.reserve=0; - - if(pwrpriv->wowlan_mode ==_TRUE){ - pwowlan_parm.mode |=FW_WOWLAN_FUN_EN; - //printk("\n %s 1.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - if(pwrpriv->wowlan_pattern ==_TRUE){ - pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; - //printk("\n %s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - } - if(pwrpriv->wowlan_magic ==_TRUE){ - pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT; - //printk("\n %s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - } - if(pwrpriv->wowlan_unicast ==_TRUE){ - pwowlan_parm.mode |=FW_WOWLAN_UNICAST; - //printk("\n %s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - } - //WOWLAN_GPIO_ACTIVE means GPIO high active - //pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; - pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP; - pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP; - - //GPIO3 - pwowlan_parm.gpio_index=3; - - //duration unit is 64us - pwowlan_parm.gpio_duration=0xff; - // - pwowlan_parm.second_mode|=FW_WOWLAN_GPIO_WAKEUP_EN; - //printk("\n %s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - { u8 *ptr=(u8 *)&pwowlan_parm; - printk("\n %s H2C_WO_WLAN=%x %02x:%02x:%02x:%02x:%02x \n",__FUNCTION__,H2C_WO_WLAN_CMD,ptr[0],ptr[1],ptr[2],ptr[3],ptr[4] ); - } - rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 4, (u8 *)&pwowlan_parm); - - rtl8192c_set_FwJoinBssReport_cmd( padapter, 1); - //keep alive period = 3 * 10 BCN interval - pwowlan_parm.mode =3; - pwowlan_parm.gpio_index=3; - rtl8192c_FillH2CCmd(padapter, KEEP_ALIVE_CONTROL_CMD, 2, (u8 *)&pwowlan_parm); - printk("%s after KEEP_ALIVE_CONTROL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); - - pwowlan_parm.mode =1; - pwowlan_parm.gpio_index=0; - pwowlan_parm.gpio_duration=0; - rtl8192c_FillH2CCmd(padapter, DISCONNECT_DECISION_CTRL_CMD, 3, (u8 *)&pwowlan_parm); - printk("%s after DISCONNECT_DECISION_CTRL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); - - //enable GPIO wakeup - pwowlan_parm.mode =1; - pwowlan_parm.gpio_index=0; - pwowlan_parm.gpio_duration=0; - rtl8192c_FillH2CCmd(padapter, REMOTE_WAKE_CTRL_CMD, 3, (u8 *)&pwowlan_parm); - } - else - rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 3, (u8 *)&pwowlan_parm); - - -_func_exit_; - - return ; - -} - -#endif //CONFIG_WOWLAN - - - - - - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#define _RTL8192C_CMD_C_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + + +#if 0 +static BOOLEAN +CheckWriteMSG( + IN PADAPTER Adapter, + IN u8 BoxNum +) +{ + u8 valHMETFR; + BOOLEAN Result = _FALSE; + + valHMETFR = rtw_read8(Adapter, REG_HMETFR); + + //DbgPrint("CheckWriteH2C(): Reg[0x%2x] = %x\n",REG_HMETFR, valHMETFR); + + if(((valHMETFR>>BoxNum)&BIT0) == 1) + Result = _TRUE; + + return Result; + +} + +static BOOLEAN CheckFwReadLastMSG( + IN PADAPTER Adapter, + IN u8 BoxNum +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 valHMETFR, valMCUTST_1; + BOOLEAN Result = _FALSE; + + valHMETFR = rtw_read8(Adapter, REG_HMETFR); + valMCUTST_1 = rtw_read8(Adapter, (REG_MCUTST_1+BoxNum)); + + //DbgPrint("REG[%x] = %x, REG[%x] = %x\n", + // REG_HMETFR, valHMETFR, REG_MCUTST_1+BoxNum, valMCUTST_1 ); + + // Do not seperate to 91C and 88C, we use the same setting. Suggested by SD4 Filen. 2009.12.03. + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + if(((valHMETFR>>BoxNum)&BIT0) == 0) + Result = _TRUE; + } + else + { + if((((valHMETFR>>BoxNum)&BIT0) == 0) && (valMCUTST_1 == 0)) + { + Result = _TRUE; + } + } + + return Result; +} +#endif + + +#define RTL92C_MAX_H2C_BOX_NUMS 4 +#define RTL92C_MAX_CMD_LEN 5 +#define MESSAGE_BOX_SIZE 4 +#define EX_MESSAGE_BOX_SIZE 2 + +static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 isvern, u8 msgbox_num) +{ + u8 read_down = _FALSE; + int retry_cnts = 100; + + u8 valid; + +// DBG_8192C(" _is_fw_read_cmd_down ,isnormal_chip(%x),reg_1cc(%x),msg_box(%d)...\n",isvern,rtw_read8(padapter,REG_HMETFR),msgbox_num); + + do{ + valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); + if(isvern){ + if(0 == valid ){ + read_down = _TRUE; + } + } + else{ + if((0 == valid) && (0 == rtw_read8(padapter, REG_MCUTST_1+msgbox_num))){ + read_down = _TRUE; + } + } + }while( (!read_down) && (retry_cnts--)); + + return read_down; + +} + + +/***************************************** +* H2C Msg format : +*| 31 - 8 |7 | 6 - 0 | +*| h2c_msg |Ext_bit |CMD_ID | +* +******************************************/ +int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer) +{ +#if 1 + u8 bcmd_down = _FALSE; + int retry_cnts = 100; + u8 h2c_box_num; + u32 msgbox_addr; + u32 msgbox_ex_addr; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 isnchip =IS_NORMAL_CHIP(pHalData->VersionID); + u32 h2c_cmd = 0; + u16 h2c_cmd_ex = 0; + int ret = _FAIL; + + _func_enter_; + + if(!pCmdBuffer){ + goto exit; + } + if(CmdLen > RTL92C_MAX_CMD_LEN){ + goto exit; + } + //pay attention to if race condition happened in H2C cmd setting. + do{ + h2c_box_num = pHalData->LastHMEBoxNum; + + if(!_is_fw_read_cmd_down(padapter, isnchip, h2c_box_num)){ + DBG_8192C(" fw read cmd failed...\n"); + goto exit; + } + + if(CmdLen<=3) + { + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); + } + else{ + _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE); + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE)); + *(u8*)(&h2c_cmd) |= BIT(7); + } + + *(u8*)(&h2c_cmd) |= ElementID; + + if(h2c_cmd & BIT(7)){ + msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE); + h2c_cmd_ex = cpu_to_le16( h2c_cmd_ex ); + rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex); + } + msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE); + h2c_cmd = cpu_to_le32( h2c_cmd ); + rtw_write32(padapter,msgbox_addr, h2c_cmd); + + if(!isnchip){//for Test chip + if(! (rtw_read8(padapter, REG_HMETFR) & BIT(h2c_box_num))){ + DBG_8192C("Chip test - check fw write failed, write again..\n"); + continue; + } + // Fill H2C protection register. + rtw_write8(padapter,REG_MCUTST_1+h2c_box_num, 0xFF); + } + bcmd_down = _TRUE; + + // DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" + // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); + + pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS ; + + }while((!bcmd_down) && (retry_cnts--)); +/* + if(bcmd_down) + DBG_8192C("H2C Cmd exe down. \n" ); + else + DBG_8192C("H2C Cmd exe failed. \n" ); +*/ + ret = _SUCCESS; + _func_exit_; + +#else + u8 BoxNum; + u16 BOXReg, BOXExtReg; + u8 BoxContent[4], BoxExtContent[2]; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 BufIndex=0; + u8 bWriteSucess = _FALSE; + u8 IsFwRead = _FALSE; + u8 WaitH2cLimmit = 100; + + u32 h2c_cmd = 0; + u16 h2c_cmd_ex = 0; + +_func_enter_; + + //DBG_8192C("FillH2CCmd : ElementID=%d \n",ElementID); + + while(!bWriteSucess) + { + // 2. Find the last BOX number which has been writen. + BoxNum = pHalData->LastHMEBoxNum; + switch(BoxNum) + { + case 0: + BOXReg = REG_HMEBOX_0; + BOXExtReg = REG_HMEBOX_EXT_0; + break; + case 1: + BOXReg = REG_HMEBOX_1; + BOXExtReg = REG_HMEBOX_EXT_1; + break; + case 2: + BOXReg = REG_HMEBOX_2; + BOXExtReg = REG_HMEBOX_EXT_2; + break; + case 3: + BOXReg = REG_HMEBOX_3; + BOXExtReg = REG_HMEBOX_EXT_3; + break; + default: + break; + } + + // 3. Check if the box content is empty. + IsFwRead = CheckFwReadLastMSG(padapter, BoxNum); + while(!IsFwRead) + { + //wait until Fw read + WaitH2cLimmit--; + if(WaitH2cLimmit == 0) + { + DBG_8192C("FillH2CCmd92C(): Wating too long for FW read clear HMEBox(%d)!!!\n", BoxNum); + break; + } + rtw_msleep_os(10); //us + IsFwRead = CheckFwReadLastMSG(padapter, BoxNum); + //U1btmp = PlatformEFIORead1Byte(Adapter, 0x1BF); + //RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C(): Wating for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n", BoxNum, U1btmp)); + } + + // If Fw has not read the last H2C cmd, break and give up this H2C. + if(!IsFwRead) + { + DBG_8192C("FillH2CCmd92C(): Write H2C register BOX[%d] fail!!!!! Fw do not read. \n", BoxNum); + break; + } + + // 4. Fill the H2C cmd into box + _rtw_memset(BoxContent, 0, sizeof(BoxContent)); + _rtw_memset(BoxExtContent, 0, sizeof(BoxExtContent)); + + BoxContent[0] = ElementID; // Fill element ID + + //DBG_8192C("FillH2CCmd92C():Write ElementID BOXReg(%4x) = %2x \n", BOXReg, ElementID); + + switch(CmdLen) + { + case 1: + { + BoxContent[0] &= ~(BIT7); + _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 1); + rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); + h2c_cmd = *((u32*)BoxContent); + break; + } + case 2: + { + BoxContent[0] &= ~(BIT7); + _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 2); + rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); + h2c_cmd = *((u32*)BoxContent); + break; + } + case 3: + { + BoxContent[0] &= ~(BIT7); + _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 3); + rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); + h2c_cmd = *((u32*)BoxContent); + break; + } + case 4: + { + BoxContent[0] |= (BIT7); + _rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2); + _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 2); + rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent)); + rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); + h2c_cmd = *((u32*)BoxContent); + h2c_cmd_ex = *((u32*)BoxExtContent); + break; + } + case 5: + { + BoxContent[0] |= (BIT7); + _rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2); + _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 3); + rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent)); + rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); + h2c_cmd = *((u32*)BoxContent); + h2c_cmd_ex = *((u32*)BoxExtContent); + break; + } + default: + break; + + } + + + DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" + ,pHalData->LastHMEBoxNum ,CmdLen,BOXReg,h2c_cmd,BOXExtReg,h2c_cmd_ex); + + //DBG_8192C("FillH2CCmd(): BoxExtContent=0x%x\n", *(u16*)BoxExtContent); + //DBG_8192C("FillH2CCmd(): BoxContent=0x%x\n", *(u32*)BoxContent); + + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + // 5. Normal chip does not need to check if the H2C cmd has be written successfully. + bWriteSucess = _TRUE; + } + else + { + // 5. Check if the H2C cmd has be written successfully. + bWriteSucess = CheckWriteMSG(padapter, BoxNum); + if(!bWriteSucess) //If not then write again. + continue; + + //6. Fill H2C protection register. + + rtw_write8(padapter, REG_MCUTST_1+BoxNum, 0xFF); + //RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C():Write Reg(%4x) = 0xFF \n", REG_MCUTST_1+BoxNum)); + } + + // Record the next BoxNum + pHalData->LastHMEBoxNum = BoxNum+1; + if(pHalData->LastHMEBoxNum == 4) // loop to 0 + pHalData->LastHMEBoxNum = 0; + + //DBG_8192C("FillH2CCmd92C():pHalData->LastHMEBoxNum = %d\n", pHalData->LastHMEBoxNum); + + } + +_func_exit_; + +#endif + +#ifdef CONFIG_CONCURRENT_MODE + //_exit_critical_mutex(padapter->ph2c_fwcmd_mutex, NULL); +#endif +exit: + return ret; + +} + +u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) +{ + u8 ElementID, CmdLen; + u8 *pCmdBuffer; + struct cmd_msg_parm *pcmdmsg; + + if(!pbuf) + return H2C_PARAMETERS_ERROR; + + pcmdmsg = (struct cmd_msg_parm*)pbuf; + ElementID = pcmdmsg->eid; + CmdLen = pcmdmsg->sz; + pCmdBuffer = pcmdmsg->buf; + + rtl8192c_FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer); + + return H2C_SUCCESS; +} + +#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) +u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) +{ + u8 res=_SUCCESS; + struct H2C_SS_RFOFF_PARAM param; + DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); + param.gpio_period = period;//Polling GPIO_11 period time + param.ROFOn = (_TRUE == bfwpoll)?1:0; + rtl8192c_FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); + return res; +} +#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED + +u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param) +{ + u8 res=_SUCCESS; + +_func_enter_; + + *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); + + rtl8192c_FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param); + +_func_exit_; + + return res; +} + +u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg) +{ + u8 buf[5]; + u8 res=_SUCCESS; + +_func_enter_; + + _rtw_memset(buf, 0, 5); + mask = cpu_to_le32( mask ); + _rtw_memcpy(buf, &mask, 4); + buf[4] = arg; + + rtl8192c_FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf); + +_func_exit_; + + return res; + +} + +u8 rtl8192c_set_ext_macid_period_cmd(_adapter*padapter, u8 period) +{ + u8 ext_macid_period=0; + u8 res=_SUCCESS; + +_func_enter_; + + ext_macid_period=period; + + rtl8192c_FillH2CCmd(padapter, EXT_MACID_PERIOD_EID, 1, &ext_macid_period); + +_func_exit_; + + return res; + +} + +u8 rtl8192c_set_raid64_cmd(_adapter*padapter, u32 mask, u8 arg) +{ + u8 buf[5]; + u8 res=_SUCCESS; + +_func_enter_; + + _rtw_memset(buf, 0, 5); + mask = cpu_to_le32( mask ); + _rtw_memcpy(buf, &mask, 4); + buf[4] = arg; + + rtl8192c_FillH2CCmd(padapter, MACID64_CONFIG_EID, 5, buf); + +_func_exit_; + + return res; + +} +//bitmap[0:27] = tx_rate_bitmap +//bitmap[28:31]= Rate Adaptive id +//arg[0:4] = macid +//arg[5] = Short GI +void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if(pHalData->fw_ractrl == _TRUE) + { + DBG_8192C("%s() pHalData->fw_ractrl == _TRUE\n",__FUNCTION__); +#ifdef SUPPORT_64_STA + if(mac_id >=FW_CTRL_MACID){ + rtl8192c_set_ext_macid_period_cmd(pAdapter,20); + rtl8192c_set_raid64_cmd(pAdapter, bitmap, arg); + DBG_8192C("%s() rtl8192c_set_raid64_cmd, bitmap=0x%x, arg =0x%x\n",__FUNCTION__,bitmap,arg); + } + else +#endif //SUPPORT_64_STA + { + rtl8192c_set_raid_cmd(pAdapter, bitmap, arg); + DBG_8192C("%s() rtl8192c_set_raid_cmd, bitmap=0x%x, arg =0x%x\n",__FUNCTION__,bitmap,arg); + } + + } + else + { + u8 macid, init_rate, shortGIrate=_FALSE; + + init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; + + macid = arg&0x1f; + + shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; + + if (shortGIrate==_TRUE) + init_rate |= BIT(6); + + rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); + } + +} + +void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode) +{ + SETPWRMODE_PARM H2CSetPwrMode; + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + +_func_enter_; + + DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps); + + H2CSetPwrMode.Mode = Mode; + + H2CSetPwrMode.SmartPS = pwrpriv->smart_ps; + + H2CSetPwrMode.BcnPassTime = 1;//pPSC->RegMaxLPSAwakeIntvl; + + rtl8192c_FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); + +_func_exit_; +} + +void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 rate_len, pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); + //pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_BEACON); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); + + //timestamp will be inserted by hardware + pframe += 8; + pktlen += 8; + + // beacon interval: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + // capability info: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + { + //DBG_871X("ie len=%d\n", cur_network->IELength); + pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); + _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); + + goto _ConstructBeacon; + } + + //below for ad-hoc mode + + // SSID + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); + + // supported rates... + rate_len = rtw_get_rateset_len(cur_network->SupportedRates); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); + + // DS parameter set + pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); + + if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) + { + u32 ATIMWindow; + // IBSS Parameter Set... + //ATIMWindow = cur->Configuration.ATIMWindow; + ATIMWindow = 0; + pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); + } + + + //todo: ERP IE + + + // EXTERNDED SUPPORTED RATE + if (rate_len > 8) + { + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); + } + + + //todo:HT for adhoc + +_ConstructBeacon: + + if ((pktlen + TXDESC_SIZE) > 512) + { + DBG_871X("beacon frame too large\n"); + return; + } + + *pLength = pktlen; + + //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); + +} + +void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + // Frame control. + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + SetPwrMgt(fctrl); + SetFrameSubType(pframe, WIFI_PSPOLL); + + // AID. + SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); + + // BSSID. + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + // TA. + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + + *pLength = 16; +} + +void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + if (bForcePowerSave) + { + SetPwrMgt(fctrl); + } + + switch(cur_network->network.InfrastructureMode) + { + case Ndis802_11Infrastructure: + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + break; + case Ndis802_11APMode: + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); + break; + case Ndis802_11IBSS: + default: + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + break; + } + + SetSeqNum(pwlanhdr, 0); + + SetFrameSubType(pframe, WIFI_DATA_NULL); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + + *pLength = pktlen; +} + +void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u8 *mac, *bssid; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + mac = myid(&(padapter->eeprompriv)); + bssid = cur_network->MacAddress; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + SetFrameSubType(fctrl, WIFI_PROBERSP); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + pframe += pktlen; + + if(cur_network->IELength>MAX_IE_SZ) + return; + + _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); + pframe += cur_network->IELength; + pktlen += cur_network->IELength; + + *pLength = pktlen; +} + +// +// Description: In normal chip, we should send some packet to Hw which will be used by Fw +// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then +// Fw can tell Hw to send these packet derectly. +// Added by tynli. 2009.10.15. +// +static VOID +FillFakeTxDescriptor92C( + IN PADAPTER Adapter, + IN u8* pDesc, + IN u32 BufferLen, + IN BOOLEAN IsPsPoll +) +{ + struct tx_desc *ptxdesc = (struct tx_desc *)pDesc; + + // Clear all status + _rtw_memset(pDesc, 0, 32); + + //offset 0 + ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; + + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); + } + else + { + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + } + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + +#ifdef CONFIG_USB_HCI + // USB interface drop packet if the checksum of descriptor isn't correct. + // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). + rtl8192cu_cal_txdesc_chksum(ptxdesc); +#endif + + //RT_PRINT_DATA(COMP_CMD, DBG_TRACE, "TxFillCmdDesc8192C(): H2C Tx Cmd Content ----->\n", pDesc, TX_DESC_SIZE); +} + +// To check if reserved page content is destroyed by beacon beacuse beacon is too large. +// 2010.06.23. Added by tynli. +VOID +CheckFwRsvdPageContent( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); + u32 MaxBcnPageNum; + + if(pHalData->FwRsvdPageStartOffset != 0) + { + /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); + RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), + ("CheckFwRsvdPageContent(): The reserved page content has been"\ + "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", + MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ + } +} + +// +// Description: Fill the reserved packets that FW will use to RSVD page. +// Now we just send 4 types packet to rsvd page. +// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. +// Input: +// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, +// so we need to set the packet length to total lengh. +// TRUE: At the second time, we should send the first packet (default:beacon) +// to Hw again and set the lengh in descriptor to the real beacon lengh. +// 2009.10.15 by tynli. +static void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u32 BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength; + u8 *ReservedPagePacket; + u8 PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0; + u16 BufIndex=0; + u32 TotalPacketLen; + RSVDPAGE_LOC RsvdPageLoc; + BOOLEAN bDLOK = _FALSE; + + DBG_871X("%s\n", __FUNCTION__); + + ReservedPagePacket = (u8*)rtw_malloc(1000); + if(ReservedPagePacket == NULL){ + DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__); + return; + } + + _rtw_memset(ReservedPagePacket, 0, 1000); + + TxDescLen = 32;//TX_DESC_SIZE; + +#ifdef CONFIG_USB_HCI + BufIndex = TXDESC_OFFSET; + TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor. +#else + BufIndex = 0; + TxDescOffset = 0; +#endif + + //(1) beacon + ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength); + + //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", &ReservedPagePacket[BufIndex], (BeaconLength+BufIndex)); + +//-------------------------------------------------------------------- + + // When we count the first page size, we need to reserve description size for the RSVD + // packet, it will be filled in front of the packet in TXPKTBUF. + U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen); + PageNum += U1bTmp; + // To reserved 2 pages for beacon buffer. 2010.06.24. + if(PageNum == 1) + PageNum+=1; + pHalData->FwRsvdPageStartOffset = PageNum; + + BufIndex = (PageNum*128) + TxDescOffset; + + //(2) ps-poll + ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength); + + FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE); + + //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); + + RsvdPageLoc.LocPsPoll = PageNum; + +//------------------------------------------------------------------ + + U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen); + PageNum += U1bTmp; + + BufIndex = (PageNum*128) + TxDescOffset; + + //(3) null data + ConstructNullFunctionData( + Adapter, + &ReservedPagePacket[BufIndex], + &NullFunctionDataLength, + get_my_bssid(&(pmlmeinfo->network)), + _FALSE); + + FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE); + + RsvdPageLoc.LocNullData = PageNum; + + //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen)); +//------------------------------------------------------------------ + + U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen); + PageNum += U1bTmp; + + BufIndex = (PageNum*128) + TxDescOffset; + + //(4) probe response + ConstructProbeRsp( + Adapter, + &ReservedPagePacket[BufIndex], + &ProbeRspLength, + get_my_bssid(&(pmlmeinfo->network)), + _FALSE); + + FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE); + + RsvdPageLoc.LocProbeRsp = PageNum; + + //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen)); + +//------------------------------------------------------------------ + + U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen); + + PageNum += U1bTmp; + + TotalPacketLen = (PageNum*128); + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(Adapter, pattrib); + pattrib->qsel = 0x10; + pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen; + _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); + + Adapter->HalFunc.mgnt_xmit(Adapter, pmgntframe); + + bDLOK = _TRUE; + + if(bDLOK) + { + DBG_871X("Set RSVD page location to Fw.\n"); + rtl8192c_FillH2CCmd(Adapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); + } + + rtw_mfree(ReservedPagePacket,1000); + +} + +void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus) +{ + JOINBSSRPT_PARM JoinBssRptParm; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +_func_enter_; + + DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); + + if(mstatus == 1) + { + // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. + // Suggested by filen. Added by tynli. + rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); + // Do not set TSF again here or vWiFi beacon DMA INT will not work. + //correct_TSF(padapter, pmlmeext); + // Hw sequende enable by dedault. 2010.06.23. by tynli. + //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); + //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); + + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + BOOLEAN bRecover = _FALSE; + + //set REG_CR bit 8 + //U1bTmp = rtw_read8(padapter, REG_CR+1); + rtw_write8(padapter, REG_CR+1, 0x03); + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + //SetBcnCtrlReg(padapter, 0, BIT3); + //SetBcnCtrlReg(padapter, BIT4, 0); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + if(pHalData->RegFwHwTxQCtrl&BIT6) + bRecover = _TRUE; + + // To tell Hw the packet is not a real beacon frame. + //U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); + pHalData->RegFwHwTxQCtrl &= (~BIT6); + SetFwRsvdPagePkt(padapter, 0); + + // 2010.05.11. Added by tynli. + //SetBcnCtrlReg(padapter, BIT3, 0); + //SetBcnCtrlReg(padapter, 0, BIT4); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bRecover) + { + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); + pHalData->RegFwHwTxQCtrl |= BIT6; + } + + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. + rtw_write8(padapter, REG_CR+1, 0x02); + } + } + + JoinBssRptParm.OpMode = mstatus; + + rtl8192c_FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); + +_func_exit_; +} + +#ifdef CONFIG_P2P +void rtl8192c_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow) +{ + struct P2P_PS_CTWPeriod_t p2p_ps_ctw; + + p2p_ps_ctw.CTWPeriod = ctwindow; + + rtl8192c_FillH2CCmd(padapter, P2P_PS_CTW_CMD_EID, 1, (u8 *)(&p2p_ps_ctw)); + +} + +void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); + struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; + u8 i; + u16 ctwindow; + u32 start_time, tsf_low; + +_func_enter_; + + switch(p2p_ps_state) + { + case P2P_PS_DISABLE: + DBG_8192C("P2P_PS_DISABLE \n"); + _rtw_memset(p2p_ps_offload, 0 ,1); + break; + case P2P_PS_ENABLE: + DBG_8192C("P2P_PS_ENABLE \n"); + // update CTWindow value. + if( pwdinfo->ctwindow > 0 ) + { + p2p_ps_offload->CTWindow_En = 1; + ctwindow = pwdinfo->ctwindow; + if(IS_HARDWARE_TYPE_8723(padapter)) + { + //rtw_write16(padapter, REG_ATIMWND, ctwindow); + } + else + { + rtl8192c_set_p2p_ctw_period_cmd(padapter, ctwindow); + } + } + + // hw only support 2 set of NoA + for( i=0 ; inoa_num ; i++) + { + // To control the register setting for which NOA + rtw_write8(padapter, 0x5CF, (i << 4)); + if(i == 0) + p2p_ps_offload->NoA0_En = 1; + else + p2p_ps_offload->NoA1_En = 1; + + // config P2P NoA Descriptor Register + rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]); + + rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]); + + //Get Current TSF value + tsf_low = rtw_read32(padapter, REG_TSFTR); + + start_time = pwdinfo->noa_start_time[i]; + if(pwdinfo->noa_count[i] != 1) + { + while( start_time <= (tsf_low+(50*1024) ) ) + { + start_time += pwdinfo->noa_interval[i]; + if(pwdinfo->noa_count[i] != 255) + pwdinfo->noa_count[i]--; + } + } + //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time); + rtw_write32(padapter, 0x5E8, start_time); + + rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]); + } + + if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) + { + // rst p2p circuit + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); + + p2p_ps_offload->Offload_En = 1; + + if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + p2p_ps_offload->role= 1; + p2p_ps_offload->AllStaSleep = 0; + } + else + { + p2p_ps_offload->role= 0; + } + + p2p_ps_offload->discovery = 0; + } + break; + case P2P_PS_SCAN: + DBG_8192C("P2P_PS_SCAN \n"); + p2p_ps_offload->discovery = 1; + break; + case P2P_PS_SCAN_DONE: + DBG_8192C("P2P_PS_SCAN_DONE \n"); + p2p_ps_offload->discovery = 0; + pwdinfo->p2p_ps = P2P_PS_ENABLE; + break; + default: + break; + } + + rtl8192c_FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload); + +_func_exit_; + +} +#endif //CONFIG_P2P + +#ifdef CONFIG_IOL +#include +int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) +{ + IO_OFFLOAD_LOC IoOffloadLoc; + u32 start_time = rtw_get_current_time(); + u32 passing_time_ms; + u8 polling_ret; + int ret = _FAIL; + + if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) + goto exit; + + //adapter->HalFunc.mgnt_xmit(adapter, xmit_frame); + rtw_dump_xframe_sync(adapter, xmit_frame); + + IoOffloadLoc.LocCmd = 0; + if(_SUCCESS != rtl8192c_FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc)) + goto exit; + + //polling if the IO offloading is done + while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) { + #if 0 //C2H + if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR)) + break; + #else// 0x1c3 + if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3))) + break; + #endif + rtw_msleep_os(5); + } + #if 0 //debug + DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" + , polling_ret==0xff?"success":"error" + , polling_ret + , rtw_read32(adapter, 0x1c0) + , rtw_read32(adapter, 0x1c4) + , rtw_read32(adapter, 0x1cc) + , rtw_read32(adapter, 0x1e8) + , rtw_read32(adapter, 0x130) + , rtw_read32(adapter, 0x134) + ); + rtw_write32(adapter, 0x1c0, 0x0); + #endif + + if(polling_ret == 0xff) + ret =_SUCCESS; + else { + DBG_871X("IOL %s, polling_ret:0x%02x\n" + //", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" + , polling_ret==0xff?"success":"error" + , polling_ret + //, rtw_read32(adapter, 0x1c0) + //, rtw_read32(adapter, 0x1c4) + //, rtw_read32(adapter, 0x1cc) + //, rtw_read32(adapter, 0x1e8) + //, rtw_read32(adapter, 0x130) + //, rtw_read32(adapter, 0x134) + ); + #if 0 //debug + rtw_write16(adapter, 0x1c4, 0x0000); + rtw_msleep_os(10); + DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4)); + #endif + + } + + { + #if 0 //C2H + u32 c2h_evt; + int i; + c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL); + DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt); + rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0); + #else// 0x1c3 + DBG_871X("IOL %s complete in %ums\n", __FUNCTION__, passing_time_ms); + rtw_write8(adapter, 0x1c3, 0x0); + #endif + } + +exit: + return ret; + +} +#endif //CONFIG_IOL + + +#ifdef CONFIG_WOWLAN + +void rtl8192c_set_wowlan_cmd(_adapter* padapter) +{ + u8 res=_SUCCESS; + SETWOWLAN_PARM pwowlan_parm; + struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; + +_func_enter_; + + pwowlan_parm.mode =0; + pwowlan_parm.gpio_index=0; + pwowlan_parm.gpio_duration=0; + pwowlan_parm.second_mode =0; + pwowlan_parm.reserve=0; + + if(pwrpriv->wowlan_mode ==_TRUE){ + pwowlan_parm.mode |=FW_WOWLAN_FUN_EN; + //printk("\n %s 1.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + if(pwrpriv->wowlan_pattern ==_TRUE){ + pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; + //printk("\n %s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + } + if(pwrpriv->wowlan_magic ==_TRUE){ + pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT; + //printk("\n %s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + } + if(pwrpriv->wowlan_unicast ==_TRUE){ + pwowlan_parm.mode |=FW_WOWLAN_UNICAST; + //printk("\n %s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + } + //WOWLAN_GPIO_ACTIVE means GPIO high active + //pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; + pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP; + pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP; + + //GPIO3 + pwowlan_parm.gpio_index=3; + + //duration unit is 64us + pwowlan_parm.gpio_duration=0xff; + // + pwowlan_parm.second_mode|=FW_WOWLAN_GPIO_WAKEUP_EN; + //printk("\n %s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + { u8 *ptr=(u8 *)&pwowlan_parm; + printk("\n %s H2C_WO_WLAN=%x %02x:%02x:%02x:%02x:%02x \n",__FUNCTION__,H2C_WO_WLAN_CMD,ptr[0],ptr[1],ptr[2],ptr[3],ptr[4] ); + } + rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 4, (u8 *)&pwowlan_parm); + + rtl8192c_set_FwJoinBssReport_cmd( padapter, 1); + //keep alive period = 3 * 10 BCN interval + pwowlan_parm.mode =3; + pwowlan_parm.gpio_index=3; + rtl8192c_FillH2CCmd(padapter, KEEP_ALIVE_CONTROL_CMD, 2, (u8 *)&pwowlan_parm); + printk("%s after KEEP_ALIVE_CONTROL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); + + pwowlan_parm.mode =1; + pwowlan_parm.gpio_index=0; + pwowlan_parm.gpio_duration=0; + rtl8192c_FillH2CCmd(padapter, DISCONNECT_DECISION_CTRL_CMD, 3, (u8 *)&pwowlan_parm); + printk("%s after DISCONNECT_DECISION_CTRL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); + + //enable GPIO wakeup + pwowlan_parm.mode =1; + pwowlan_parm.gpio_index=0; + pwowlan_parm.gpio_duration=0; + rtl8192c_FillH2CCmd(padapter, REMOTE_WAKE_CTRL_CMD, 3, (u8 *)&pwowlan_parm); + } + else + rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 3, (u8 *)&pwowlan_parm); + + +_func_exit_; + + return ; + +} + +#endif //CONFIG_WOWLAN + + + + + + diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c old mode 100755 new mode 100644 index 1adeae2e001f82..be1e800eb53f8e --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c @@ -1,4753 +1,4794 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * -******************************************************************************/ -//============================================================ -// Description: -// -// This file is for 92CE/92CU dynamic mechanism only -// -// -//============================================================ - -//============================================================ -// include files -//============================================================ -#include -#include -#include -#include - -#include - -//============================================================ -// Global var -//============================================================ -static u32 EDCAParam[maxAP][3] = -{ // UL DL - {0x5ea322, 0x00a630, 0x00a44f}, //atheros AP - {0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP - {0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP - {0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP - {0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP - //{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP - {0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP - {0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP - {0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP -// {0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP -}; - - -/*----------------------------------------------------------------------------- - * Function: dm_DIGInit() - * - * Overview: Set DIG scheme init value. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * - *---------------------------------------------------------------------------*/ -static void dm_DIGInit( - IN PADAPTER pAdapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - - pDigTable->Dig_Enable_Flag = _TRUE; - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; - - pDigTable->CurIGValue = 0x20; - pDigTable->PreIGValue = 0x0; - - pDigTable->CurSTAConnectState = pDigTable->PreSTAConnectState = DIG_STA_DISCONNECT; - pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; - - pDigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - - pDigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; - pDigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; - - - pDigTable->rx_gain_range_max = DM_DIG_MAX; - pDigTable->rx_gain_range_min = DM_DIG_MIN; - - pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; - pDigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; - - pDigTable->PreCCKPDState = CCK_PD_STAGE_MAX; - pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; - - pDigTable->ForbiddenIGI = DM_DIG_MIN; - pDigTable->LargeFAHit = 0; - pDigTable->Recover_cnt = 0; - pdmpriv->DIG_Dynamic_MIN = 0x25; //for FUNAI_TV -} - - -static u8 dm_initial_gain_MinPWDB( - IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - int Rssi_val_min = 0; - - if((pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) && - (pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ) - { - if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) - Rssi_val_min = (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)? - pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB; - else - Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; - } - else if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT || - pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) - Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; - else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) - Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - - //printk("%s CurMultiSTAConnectState(0x%02x) UndecoratedSmoothedPWDB(%d),EntryMinUndecoratedSmoothedPWDB(%d)\n" - //,__FUNCTION__,pDigTable->CurSTAConnectState, - //pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->EntryMinUndecoratedSmoothedPWDB); - - return (u8)Rssi_val_min; -} - - -static VOID -dm_FalseAlarmCounterStatistics( - IN PADAPTER Adapter - ) -{ - u32 ret_value; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); - - ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); - - ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); - ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); - ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); - - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail+ - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - - - //hold cck counter - PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT(14), 1); - - ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0); - FalseAlmCnt->Cnt_Cck_fail = ret_value; - - ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; - - FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); - Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all; - //reset false alarm counter registers - PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1); - PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0); - //reset cck counter - PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0); - //enable cck counter - PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2); - - //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %ld, Cnt_Rate_Illegal = %ld, Cnt_Crc8_fail = %ld, Cnt_Mcs_fail = %ld\n", - // FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) ); - //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", - // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); - //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", - // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); -} - - -static VOID -DM_Write_DIG( - IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%lx, PreIGValue = 0x%lx, BackoffVal = %d\n", - // DM_DigTable.CurIGValue, DM_DigTable.PreIGValue, DM_DigTable.BackoffVal)); - - if (pDigTable->Dig_Enable_Flag == _FALSE) - { - //RT_TRACE( COMP_DIG, DBG_LOUD, ("DIG is disabled\n")); - pDigTable->PreIGValue = 0x17; - return; - } - - if(pDigTable->PreIGValue != pDigTable->CurIGValue) - { - // Set initial gain. - //PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDigTable->CurIGValue); - //PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDigTable->CurIGValue); - //printk("%s DIG(0x%02x)\n",__FUNCTION__,pDigTable->CurIGValue); - PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDigTable->CurIGValue); - PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDigTable->CurIGValue); - pDigTable->PreIGValue = pDigTable->CurIGValue; - } -} - - -static VOID -dm_CtrlInitGainByFA( - IN PADAPTER pAdapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); - - u8 value_IGI = pDigTable->CurIGValue; - - if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - value_IGI --; - else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) - value_IGI += 0; - else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH2) - value_IGI ++; - else if(FalseAlmCnt->Cnt_all >= DM_DIG_FA_TH2) - value_IGI +=2; - - if(value_IGI > DM_DIG_FA_UPPER) - value_IGI = DM_DIG_FA_UPPER; - if(value_IGI < DM_DIG_FA_LOWER) - value_IGI = DM_DIG_FA_LOWER; - - if(FalseAlmCnt->Cnt_all > 10000) - value_IGI = DM_DIG_FA_UPPER; - - pDigTable->CurIGValue = value_IGI; - - DM_Write_DIG(pAdapter); - -} - -#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV -VOID dm_CtrlInitGainByRssi( IN PADAPTER pAdapter) -{ - - u32 isBT; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); - - //modify DIG upper bound - if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) - pDigTable->rx_gain_range_max = DM_DIG_MAX; - else - pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; - - //modify DIG lower bound - if((FalseAlmCnt->Cnt_all > 500)&&(pdmpriv->DIG_Dynamic_MIN < 0x25)) - pdmpriv->DIG_Dynamic_MIN++; - if((FalseAlmCnt->Cnt_all < 500)&&(pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) - pdmpriv->DIG_Dynamic_MIN--; - if((pDigTable->Rssi_val_min < 8) && (pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) - pdmpriv->DIG_Dynamic_MIN--; - - //modify DIG lower bound, deal with abnorally large false alarm - if(FalseAlmCnt->Cnt_all > 10000) - { - //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); - pDigTable->LargeFAHit++; - if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) - { - pDigTable->ForbiddenIGI = pDigTable->CurIGValue; - pDigTable->LargeFAHit = 1; - } - if(pDigTable->LargeFAHit >= 3) - { - if((pDigTable->ForbiddenIGI+1) >pDigTable->rx_gain_range_max) - pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; - else - pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); - pDigTable->Recover_cnt = 3600; //3600=2hr - } - } - else - { - //Recovery mechanism for IGI lower bound - if(pDigTable->Recover_cnt != 0){ - pDigTable->Recover_cnt --; - } - else - { - if(pDigTable->LargeFAHit == 0 ) - { - if((pDigTable->ForbiddenIGI -1) < pdmpriv->DIG_Dynamic_MIN) //DM_DIG_MIN) - { - pDigTable->ForbiddenIGI = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; - pDigTable->rx_gain_range_min = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; - } - else - { - pDigTable->ForbiddenIGI --; - pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); - } - } - else if(pDigTable->LargeFAHit == 3 ) - { - pDigTable->LargeFAHit = 0; - } - } - } - #ifdef CONFIG_USB_HCI - if(FalseAlmCnt->Cnt_all < 250) - { -#endif - //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); - - isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; - - if(!isBT){ - - if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) - { - if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) - pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; - else - pDigTable->BackoffVal -= 2; - } - else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) - { - if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) - pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; - else - pDigTable->BackoffVal +=2; - } - } - else - pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - - pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; - - //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); -#ifdef CONFIG_USB_HCI - } - else - { - //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); - //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); - - //Adjust initial gain by false alarm - if(FalseAlmCnt->Cnt_all > 1000) - pDigTable->CurIGValue = pDigTable ->PreIGValue+2; - else if (FalseAlmCnt->Cnt_all > 750) - pDigTable->CurIGValue = pDigTable->PreIGValue+1; - else if(FalseAlmCnt->Cnt_all < 500) - pDigTable->CurIGValue = pDigTable->PreIGValue-1; - } -#endif - - //Check initial gain by upper/lower bound - if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) - pDigTable->CurIGValue = pDigTable->rx_gain_range_max; - - if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) - pDigTable->CurIGValue = pDigTable->rx_gain_range_min; - - //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, - // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); - //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); - - DM_Write_DIG(pAdapter); - -} -#else -static VOID dm_CtrlInitGainByRssi(IN PADAPTER pAdapter) -{ - u32 isBT; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); - - //modify DIG upper bound - if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) - pDigTable->rx_gain_range_max = DM_DIG_MAX; - else - pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; - //printk("%s Rssi_val_min(0x%02x),rx_gain_range_max(0x%02x)\n",__FUNCTION__,pDigTable->Rssi_val_min,pDigTable->rx_gain_range_max); - - //modify DIG lower bound, deal with abnorally large false alarm - if(FalseAlmCnt->Cnt_all > 10000) - { - //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); - - pDigTable->LargeFAHit++; - if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) - { - pDigTable->ForbiddenIGI = pDigTable->CurIGValue; - pDigTable->LargeFAHit = 1; - } - - if(pDigTable->LargeFAHit >= 3) - { - if((pDigTable->ForbiddenIGI+1) > pDigTable->rx_gain_range_max) - pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; - else - pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); - pDigTable->Recover_cnt = 3600; //3600=2hr - } - } - else - { - //Recovery mechanism for IGI lower bound - if(pDigTable->Recover_cnt != 0) - pDigTable->Recover_cnt --; - else - { - if(pDigTable->LargeFAHit == 0 ) - { - if((pDigTable->ForbiddenIGI -1) < DM_DIG_MIN) - { - pDigTable->ForbiddenIGI = DM_DIG_MIN; - pDigTable->rx_gain_range_min = DM_DIG_MIN; - } - else - { - pDigTable->ForbiddenIGI --; - pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); - } - } - else if(pDigTable->LargeFAHit == 3 ) - { - pDigTable->LargeFAHit = 0; - } - } - } - - //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",pDigTable->ForbiddenIGI, pDigTable->LargeFAHit)); - //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",pDigTable->rx_gain_range_max, pDigTable->rx_gain_range_min)); - -#ifdef CONFIG_USB_HCI - if(FalseAlmCnt->Cnt_all < 250) - { -#endif - //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); - - isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; - - if(!isBT){ - - if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) - { - if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) - pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; - else - pDigTable->BackoffVal -= 2; - } - else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) - { - if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) - pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; - else - pDigTable->BackoffVal +=2; - } - } - else - pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - - pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; - - //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); -#ifdef CONFIG_USB_HCI - } - else - { - //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); - //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); - - //Adjust initial gain by false alarm - if(FalseAlmCnt->Cnt_all > 1000) - pDigTable->CurIGValue = pDigTable ->PreIGValue+2; - else if (FalseAlmCnt->Cnt_all > 750) - pDigTable->CurIGValue = pDigTable->PreIGValue+1; - else if(FalseAlmCnt->Cnt_all < 500) - pDigTable->CurIGValue = pDigTable->PreIGValue-1; - } -#endif - - //Check initial gain by upper/lower bound - if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) - pDigTable->CurIGValue = pDigTable->rx_gain_range_max; - - if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) - pDigTable->CurIGValue = pDigTable->rx_gain_range_min; - - //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, - // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); - //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); - - DM_Write_DIG(pAdapter); - -} -#endif - -static VOID -dm_initial_gain_Multi_STA( - IN PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - int rssi_strength = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - BOOLEAN bMulti_STA = _FALSE; - - //ADHOC and AP Mode - if(check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) - { - bMulti_STA = _TRUE; - } - - - if((bMulti_STA == _FALSE) - || (pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT)) - { - pdmpriv->binitialized = _FALSE; - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; - return; - } - else if(pdmpriv->binitialized == _FALSE) - { - pdmpriv->binitialized = _TRUE; - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; - pDigTable->CurIGValue = 0x20; - DM_Write_DIG(pAdapter); - } - - // Initial gain control by ap mode - if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) - { - if ( (rssi_strength < pDigTable->RssiLowThresh) && - (pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_1)) - { - // Set to dig value to 0x20 for Luke's opinion after disable dig - if(pDigTable->Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_2) - { - pDigTable->CurIGValue = 0x20; - DM_Write_DIG(pAdapter); - } - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_1; - } - else if (rssi_strength > pDigTable->RssiHighThresh) - { - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_2; - dm_CtrlInitGainByFA(pAdapter); - } - } - else if(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_0) - { - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; - pDigTable->CurIGValue = 0x20; - DM_Write_DIG(pAdapter); - } - - //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurMultiSTAConnectState = %x Dig_Ext_Port_Stage %x\n", - // DM_DigTable.CurMultiSTAConnectState, DM_DigTable.Dig_Ext_Port_Stage)); -} - - -static VOID -dm_initial_gain_STA( - IN PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - //RT_TRACE( COMP_DIG, DBG_LOUD, ("PreSTAConnectState = %x, CurSTAConnectState = %x\n", - // DM_DigTable.PreSTAConnectState, DM_DigTable.CurSTAConnectState)); - - - if(pDigTable->PreSTAConnectState == pDigTable->CurSTAConnectState|| - pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT || - pDigTable->CurSTAConnectState == DIG_STA_CONNECT) - { - // beforeconnect -> beforeconnect or connect -> connect - // (dis)connect -> beforeconnect - // disconnect -> connecct or beforeconnect -> connect - if(pDigTable->CurSTAConnectState != DIG_STA_DISCONNECT) - { - pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); - dm_CtrlInitGainByRssi(pAdapter); - } -#ifdef CONFIG_IOCTL_CFG80211 - else if((wdev_to_priv(pAdapter->rtw_wdev))->p2p_enabled == _TRUE) - { - pDigTable->CurIGValue = 0x30; - DM_Write_DIG(pAdapter); - } -#endif - } - else - { - // connect -> disconnect or beforeconnect -> disconnect - pDigTable->Rssi_val_min = 0; - pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; - pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDigTable->CurIGValue = 0x20; - pDigTable->PreIGValue = 0; - DM_Write_DIG(pAdapter); - } - -} - - -static void dm_CCK_PacketDetectionThresh( - IN PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT) - { - pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); - if(pDigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi) - { - if(pDigTable->Rssi_val_min <= 25) - pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; - else - pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; - } - else{ - if(pDigTable->Rssi_val_min <= 20) - pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; - else - pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; - } - } - else - pDigTable->CurCCKPDState=CCK_PD_STAGE_MAX; - - if(pDigTable->PreCCKPDState != pDigTable->CurCCKPDState) - { - if((pDigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)|| - (pDigTable->CurCCKPDState == CCK_PD_STAGE_MAX)) - { - PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83); - - //PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40); - //if(IS_92C_SERIAL(pHalData->VersionID)) - //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7); - } - else - { - PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd); - //PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47); - //if(IS_92C_SERIAL(pHalData->VersionID)) - //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3); - } - - pDigTable->PreCCKPDState = pDigTable->CurCCKPDState; - } - - //RT_TRACE( COMP_DIG, DBG_LOUD, ("CCKPDStage=%x\n",pDigTable->CurCCKPDState)); - //RT_TRACE( COMP_DIG, DBG_LOUD, ("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID))); - -} - - -static void -dm_CtrlInitGainByTwoPort( - IN PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) - return; - - // Decide the current status and if modify initial gain or not - if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) - { - pDigTable->CurSTAConnectState = DIG_STA_BEFORE_CONNECT; - } - else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - { - pDigTable->CurSTAConnectState = DIG_STA_CONNECT; - } - else - { - pDigTable->CurSTAConnectState = DIG_STA_DISCONNECT; - } - - - pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; - if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) - { - if((is_IBSS_empty(pAdapter)==_FAIL) && (pAdapter->stapriv.asoc_sta_count > 2)) - pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; - } - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) - { - if(pAdapter->stapriv.asoc_sta_count > 2) - pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; - } - - - dm_initial_gain_STA(pAdapter); - dm_initial_gain_Multi_STA(pAdapter); - dm_CCK_PacketDetectionThresh(pAdapter); - - pDigTable->PreSTAConnectState = pDigTable->CurSTAConnectState; - -} - - -static void dm_DIG( - IN PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - //RTPRINT(FDM, DM_Monitor, ("dm_DIG() ==>\n")); - - if(pdmpriv->bDMInitialGainEnable == _FALSE) - return; - - //if(pDigTable->Dig_Enable_Flag == _FALSE) - // return; - - if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG)) - return; - - //RTPRINT(FDM, DM_Monitor, ("dm_DIG() progress \n")); - - dm_CtrlInitGainByTwoPort(pAdapter); - - //RTPRINT(FDM, DM_Monitor, ("dm_DIG() <==\n")); -} - -static void dm_SavePowerIndex(IN PADAPTER Adapter) -{ - u8 index; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for(index = 0; index< 6; index++) - pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); -} - -static void dm_RestorePowerIndex(IN PADAPTER Adapter) -{ - u8 index; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for(index = 0; index< 6; index++) - rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); -} - -static void dm_WritePowerIndex( - IN PADAPTER Adapter, - IN u8 Value) -{ - u8 index; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for(index = 0; index< 6; index++) - rtw_write8(Adapter, Power_Index_REG[index], Value); -} - -static void dm_InitDynamicTxPower(IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType == BOARD_USB_High_PA) - { - dm_SavePowerIndex(Adapter); - pdmpriv->bDynamicTxPowerEnable = _TRUE; - } - else -#else - pdmpriv->bDynamicTxPowerEnable = _FALSE; -#endif - - pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -} - - -static void dm_DynamicTxPower(IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - int UndecoratedSmoothedPWDB; - - if(!pdmpriv->bDynamicTxPowerEnable) - return; - - // If dynamic high power is disabled. - if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - return; - } - - // STA not connected and AP not connected - if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port - { - //todo: AP Mode - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - - if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal - dm_RestorePowerIndex(Adapter); - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - dm_WritePowerIndex(Adapter, 0x14); - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - dm_WritePowerIndex(Adapter, 0x10); - } - pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; - -} - - -static VOID -DM_ChangeDynamicInitGainThresh( - IN PADAPTER pAdapter, - IN u32 DM_Type, - IN u32 DM_Value) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DIG_T *pDigTable = &pdmpriv->DM_DigTable; - - if (DM_Type == DIG_TYPE_THRESH_HIGH) - { - pDigTable->RssiHighThresh = DM_Value; - } - else if (DM_Type == DIG_TYPE_THRESH_LOW) - { - pDigTable->RssiLowThresh = DM_Value; - } - else if (DM_Type == DIG_TYPE_ENABLE) - { - pDigTable->Dig_Enable_Flag = _TRUE; - } - else if (DM_Type == DIG_TYPE_DISABLE) - { - pDigTable->Dig_Enable_Flag = _FALSE; - } - else if (DM_Type == DIG_TYPE_BACKOFF) - { - if(DM_Value > 30) - DM_Value = 30; - pDigTable->BackoffVal = (u8)DM_Value; - } - else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) - { - if(DM_Value == 0) - DM_Value = 0x1; - pDigTable->rx_gain_range_min = (u8)DM_Value; - } - else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) - { - if(DM_Value > 0x50) - DM_Value = 0x50; - pDigTable->rx_gain_range_max = (u8)DM_Value; - } -} /* DM_ChangeDynamicInitGainThresh */ - - -static VOID PWDB_Monitor( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - int i; - int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; - u8 sta_cnt=0; - u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi - - if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED) != _TRUE) - return; - - - if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) - { - _irqL irqL; - _list *plist, *phead; - struct sta_info *psta; - struct sta_priv *pstapriv = &Adapter->stapriv; - u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; - - _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); - - for(i=0; i< NUM_STA; i++) - { - phead = &(pstapriv->sta_hash[i]); - plist = get_next(phead); - - while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) - { - psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); - - plist = get_next(plist); - - if(_rtw_memcmp(psta ->hwaddr, bcast_addr, ETH_ALEN) || - _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) - continue; - - if(psta->state & WIFI_ASOC_STATE) - { - - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); - } - - } - - } - - _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); - - - - if(pHalData->fw_ractrl == _TRUE) - { - // Report every sta's RSSI to FW - for(i=0; i< sta_cnt; i++) - { - rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); - } - } - - } - - - - if(tmpEntryMaxPWDB != 0) // If associated entry is found - { - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - } - else - { - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; - } - - if(tmpEntryMinPWDB != 0xff) // If associated entry is found - { - pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - } - else - { - pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; - } - - - if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) - { - - if(pHalData->fw_ractrl == _TRUE) - { - u32 param = (u32)(pdmpriv->UndecoratedSmoothedPWDB<<16); - - param |= 0;//macid=0 for sta mode; - - rtl8192c_set_rssi_cmd(Adapter, (u8*)¶m); - } - } - -} - - -static void -DM_InitEdcaTurbo( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - pHalData->bCurrentTurboEDCA = _FALSE; - Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE; - -} - - -static void -dm_CheckEdcaTurbo( - IN PADAPTER Adapter - ) -{ - u32 trafficIndex; - u32 edca_param; - u64 cur_tx_bytes = 0; - u64 cur_rx_bytes = 0; - u8 bbtchange = _FALSE; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct recv_priv *precvpriv = &(Adapter->recvpriv); - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -#ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); -#endif - - - if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) - { - goto dm_CheckEdcaTurbo_EXIT; - } - - if (pmlmeinfo->assoc_AP_vendor >= maxAP) - { - goto dm_CheckEdcaTurbo_EXIT; - } - -#ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - { - bbtchange = _TRUE; - } - } -#endif - - // Check if the status needs to be changed. - if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) - { - cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; - cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - - //traffic, TX or RX - if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) - { - if (cur_tx_bytes > (cur_rx_bytes << 2)) - { // Uplink TP is present. - trafficIndex = UP_LINK; - } - else - { // Balance TP is present. - trafficIndex = DOWN_LINK; - } - } - else - { - if (cur_rx_bytes > (cur_tx_bytes << 2)) - { // Downlink TP is present. - trafficIndex = DOWN_LINK; - } - else - { // Balance TP is present. - trafficIndex = UP_LINK; - } - } - - if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA)) - { -#ifdef CONFIG_BT_COEXIST - if(_TRUE == bbtchange) - { - edca_param = pbtpriv->BT_EDCA[trafficIndex]; - } - else -#endif - { -#if 0 - //adjust EDCA parameter for BE queue - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; -#else - - if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) - { - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; - } - else - { - edca_param = EDCAParam[unknownAP][trafficIndex]; - } -#endif - } - -#ifdef CONFIG_PCI_HCI - if(IS_92C_SERIAL(pHalData->VersionID)) - { - edca_param = 0x60a42b; - } - else - { - edca_param = 0x6ea42b; - } -#endif - if(Adapter->registrypriv.intel_class_mode==1) - edca_param=0xa44f; - rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); - - pdmpriv->prv_traffic_idx = trafficIndex; - } - - pHalData->bCurrentTurboEDCA = _TRUE; - } - else - { - // - // Turn Off EDCA turbo here. - // Restore original EDCA according to the declaration of AP. - // - if(pHalData->bCurrentTurboEDCA) - { - rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); - pHalData->bCurrentTurboEDCA = _FALSE; - } - } - -dm_CheckEdcaTurbo_EXIT: - // Set variables for next time. - precvpriv->bIsAnyNonBEPkts = _FALSE; - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; - -} - -#define DPK_DELTA_MAPPING_NUM 13 -#define index_mapping_HP_NUM 15 -//091212 chiyokolin -static VOID -dm_TXPowerTrackingCallback_ThermalMeter_92C( - IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100, ThermalValue_HP_count = 0; - u32 ThermalValue_HP = 0; - s8 delta_DPK; - int ele_A, ele_D, TempCCk, X, value32; - int Y, ele_C; - s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0, delta_APK; - int i = 0, CCKSwingNeedUpdate = 0; - BOOLEAN is2T = IS_92C_SERIAL(pHalData->VersionID); -#if 0 -//#ifdef CONFIG_MP_INCLUDED - PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); - pu1Byte TxPwrLevel = pMptCtx->TxPwrLevel; -#endif - - u8 OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur - u32 DPK_delta_mapping[2][DPK_DELTA_MAPPING_NUM] = { - {0x1c, 0x1c, 0x1d, 0x1d, 0x1e, - 0x1f, 0x00, 0x00, 0x01, 0x01, - 0x02, 0x02, 0x03}, - {0x1c, 0x1d, 0x1e, 0x1e, 0x1e, - 0x1f, 0x00, 0x00, 0x01, 0x02, - 0x02, 0x03, 0x03}}; - - s8 index_mapping_HP[index_mapping_HP_NUM] = { - 0, 1, 3, 4, 6, - 7, 9, 10, 12, 13, - 15, 16, 18, 19, 21 - }; - - s8 index_HP; - - pdmpriv->TXPowerTrackingCallbackCnt++; //cosa add for debug - pdmpriv->bTXPowerTrackingInit = _TRUE; - - if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14) - pdmpriv->bCCKinCH14 = _TRUE; - else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14) - pdmpriv->bCCKinCH14 = _FALSE; - - //DBG_8192C("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); - - ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF90_PATH_A, RF_T_METER, 0x1f); // 0x24: RF Reg[4:0] - - //DBG_8192C("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue, pHalData->EEPROMThermalMeter); - - rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter)); - rtl8192c_PHY_DigitalPredistortion(Adapter); - - if(is2T) - rf = 2; - else - rf = 1; - - if(ThermalValue) - { -// if(!pHalData->ThermalValue) - { - //Query OFDM path A default setting - ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; - for(i=0; ibCCKinCH14) - { - if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE) - { - CCK_index_old =(u8)i; - //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); - break; - } - } - else - { - if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE) - { - CCK_index_old =(u8)i; - //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); - break; - } - } - } - - if(!pdmpriv->ThermalValue) - { - pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter; - pdmpriv->ThermalValue_LCK = ThermalValue; - pdmpriv->ThermalValue_IQK = ThermalValue; - pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter; - -#ifdef CONFIG_USB_HCI - for(i = 0; i < rf; i++) - pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i]; - pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old; -#else - for(i = 0; i < rf; i++) - pdmpriv->OFDM_index[i] = OFDM_index_old[i]; - pdmpriv->CCK_index = CCK_index_old; -#endif - } - -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType == BOARD_USB_High_PA) - { - pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue; - pdmpriv->ThermalValue_HP_index++; - if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM) - pdmpriv->ThermalValue_HP_index = 0; - - for(i = 0; i < HP_THERMAL_NUM; i++) - { - if(pdmpriv->ThermalValue_HP[i]) - { - ThermalValue_HP += pdmpriv->ThermalValue_HP[i]; - ThermalValue_HP_count++; - } - } - - if(ThermalValue_HP_count) - ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count); - } -#endif - } - - delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType == BOARD_USB_High_PA) - { - if(pdmpriv->bDoneTxpower) - delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); - else - delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); - } - else -#endif - { - delta_HP = 0; - } - delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue); - delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue); - delta_DPK = pdmpriv->ThermalValue_DPK - ThermalValue; - - //DBG_8192C("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK); - - if(delta_LCK > 1) - { - pdmpriv->ThermalValue_LCK = ThermalValue; - rtl8192c_PHY_LCCalibrate(Adapter); - } - - if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl) - { -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType == BOARD_USB_High_PA) - { - pdmpriv->bDoneTxpower = _TRUE; - delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); - - if(delta_HP > index_mapping_HP_NUM-1) - index_HP = index_mapping_HP[index_mapping_HP_NUM-1]; - else - index_HP = index_mapping_HP[delta_HP]; - - if(ThermalValue > pHalData->EEPROMThermalMeter) //set larger Tx power - { - for(i = 0; i < rf; i++) - OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP; - CCK_index = pdmpriv->CCK_index_HP -index_HP; - } - else - { - for(i = 0; i < rf; i++) - OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP; - CCK_index = pdmpriv->CCK_index_HP + index_HP; - } - - delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); - - } - else -#endif - { - if(ThermalValue > pdmpriv->ThermalValue) - { - for(i = 0; i < rf; i++) - pdmpriv->OFDM_index[i] -= delta; - - pdmpriv->CCK_index -= delta; - } - else - { - for(i = 0; i < rf; i++) - pdmpriv->OFDM_index[i] += delta; - - pdmpriv->CCK_index += delta; - } - } - - /* - if(is2T) - { - DBG_8192C("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", - pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index); - } - else - { - //DBG_8192C("temp OFDM_A_index=0x%x, CCK_index=0x%x\n",pdmpriv->OFDM_index[0], pdmpriv->CCK_index); - } - */ - - //no adjust -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType != BOARD_USB_High_PA) -#endif - { - if(ThermalValue > pHalData->EEPROMThermalMeter) - { - for(i = 0; i < rf; i++) - OFDM_index[i] = pdmpriv->OFDM_index[i]+1; - CCK_index = pdmpriv->CCK_index+1; - } - else - { - for(i = 0; i < rf; i++) - OFDM_index[i] = pdmpriv->OFDM_index[i]; - CCK_index = pdmpriv->CCK_index; - } -#if 0 -//#ifdef CONFIG_MP_INCLUDED - for(i = 0; i < rf; i++) - { - if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) - { - if(ThermalValue > pHalData->EEPROMThermalMeter) - { - if (delta < 5) - OFDM_index[i] -= 1; - else - OFDM_index[i] -= 2; - } - else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) - { - OFDM_index[i] += 1; - } - } - else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) - { - if (delta < 5) - OFDM_index[i] -= 1; - else - OFDM_index[i] -= 2; - } - else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) - { - OFDM_index[i] -= 1; - } - } - - { - if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) - { - if(ThermalValue > pHalData->EEPROMThermalMeter) - { - if (delta < 5) - CCK_index -= 1; - else - CCK_index -= 2; - } - else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) - { - CCK_index += 1; - } - } - else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) - { - if (delta < 5) - CCK_index -= 1; - else - CCK_index -= 2; - } - else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) - { - CCK_index -= 1; - } - } -#endif - } - - for(i = 0; i < rf; i++) - { - if(OFDM_index[i] > OFDM_TABLE_SIZE-1) - OFDM_index[i] = OFDM_TABLE_SIZE-1; - else if (OFDM_index[i] < OFDM_min_index) - OFDM_index[i] = OFDM_min_index; - } - - if(CCK_index > CCK_TABLE_SIZE-1) - CCK_index = CCK_TABLE_SIZE-1; - else if (CCK_index < 0) - CCK_index = 0; - - /* - if(is2T) - { - DBG_8192C("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], OFDM_index[1], CCK_index); - } - else - { - //DBG_8192C("new OFDM_A_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], CCK_index); - } - */ - - } - - if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) - { - //Adujst OFDM Ant_A according to IQK result - ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22; - X = pdmpriv->RegE94; - Y = pdmpriv->RegE9C; - - if(X != 0) - { - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - ele_A = ((X * ele_D)>>8)&0x000003FF; - - //new element C = element D x Y - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - ele_C = ((Y * ele_D)>>8)&0x000003FF; - - //wirte new elements A, C, D to regC80 and regC94, element B is always 0 - value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; - PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); - - value32 = (ele_C&0x000003C0)>>6; - PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); - - value32 = ((X * ele_D)>>7)&0x01; - PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32); - - value32 = ((Y * ele_D)>>7)&0x01; - PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32); - - } - else - { - PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[0]]); - PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); - PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00); - } - - //RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D)); - - //Adjust CCK according to IQK result - if(!pdmpriv->bCCKinCH14){ - rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][0]); - rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][1]); - rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][2]); - rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][3]); - rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][4]); - rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][5]); - rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][6]); - rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][7]); - } - else{ - rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[(u8)CCK_index][0]); - rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[(u8)CCK_index][1]); - rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[(u8)CCK_index][2]); - rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[(u8)CCK_index][3]); - rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[(u8)CCK_index][4]); - rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[(u8)CCK_index][5]); - rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[(u8)CCK_index][6]); - rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[(u8)CCK_index][7]); - } - - if(is2T) - { - ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22; - - //new element A = element D x X - X = pdmpriv->RegEB4; - Y = pdmpriv->RegEBC; - - if(X != 0){ - if ((X & 0x00000200) != 0) //consider minus - X = X | 0xFFFFFC00; - ele_A = ((X * ele_D)>>8)&0x000003FF; - - //new element C = element D x Y - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - ele_C = ((Y * ele_D)>>8)&0x00003FF; - - //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 - value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; - PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); - - value32 = (ele_C&0x000003C0)>>6; - PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); - - value32 = ((X * ele_D)>>7)&0x01; - PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32); - - value32 = ((Y * ele_D)>>7)&0x01; - PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32); - - } - else{ - PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); - PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); - PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00); - } - - //DBG_8192C("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D); - } - - /* - DBG_8192C("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \ - PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\ - PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \ - PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x24, bMaskDWord)); - */ - } - -#if MP_DRIVER == 1 - if(delta_IQK > 1) -#else - if(delta_IQK > 3) -#endif - { - pdmpriv->ThermalValue_IQK = ThermalValue; - rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); - } - - if(delta_DPK != 0) - { - delta_DPK = ThermalValue - pHalData->EEPROMThermalMeter; - - //if(pdmpriv->bDPPathAOK || pdmpriv->bDPPathBOK) - // DBG_8192C("TxPwrTracking delata_DPK = %d\n", delta_DPK); - - if(pdmpriv->bDPPathAOK) - PHY_SetBBReg(Adapter, 0xb68, 0x7c00, DPK_delta_mapping[0][((delta_DPK+13)/2)]); - if(pdmpriv->bDPPathBOK) - PHY_SetBBReg(Adapter, 0xb6c, 0x7c00, DPK_delta_mapping[1][((delta_DPK+13)/2)]); - pdmpriv->ThermalValue_DPK = ThermalValue; - } - - //update thermal meter value - if(pdmpriv->TxPowerTrackControl) - pdmpriv->ThermalValue = ThermalValue; - - } - - //DBG_8192C("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); - - pdmpriv->TXPowercount = 0; - -} - - -static VOID -dm_InitializeTXPowerTracking_ThermalMeter( - IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - //pMgntInfo->bTXPowerTracking = _TRUE; - pdmpriv->TXPowercount = 0; - pdmpriv->bTXPowerTrackingInit = _FALSE; - pdmpriv->ThermalValue = 0; - -#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default - pdmpriv->TxPowerTrackControl = _TRUE; -#endif - - MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); -} - - -static VOID -DM_InitializeTXPowerTracking( - IN PADAPTER Adapter) -{ - dm_InitializeTXPowerTracking_ThermalMeter(Adapter); -} - -// -// Description: -// - Dispatch TxPower Tracking direct call ONLY for 92s. -// - We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource -// leakage under some platform. -// -// Assumption: -// PASSIVE_LEVEL when this routine is called. -// -// Added by Roger, 2009.06.18. -// -static VOID -DM_TXPowerTracking92CDirectCall( - IN PADAPTER Adapter) -{ - dm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter); -} - -static VOID -dm_CheckTXPowerTracking_ThermalMeter( - IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - //u1Byte TxPowerCheckCnt = 5; //10 sec - - //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) - if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS)) - { - return; - } - - if(!pdmpriv->TM_Trigger) //at least delay 1 sec - { - //pHalData->TxPowerCheckCnt++; //cosa add for debug - PHY_SetRFReg(Adapter, RF90_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); - //DBG_8192C("Trigger 92C Thermal Meter!!\n"); - - pdmpriv->TM_Trigger = 1; - return; - - } - else - { - //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); - DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. - pdmpriv->TM_Trigger = 0; - } - -} - - -VOID -rtl8192c_dm_CheckTXPowerTracking( - IN PADAPTER Adapter) -{ - dm_CheckTXPowerTracking_ThermalMeter(Adapter); -} - -#ifdef CONFIG_BT_COEXIST -static BOOLEAN BT_BTStateChange(PADAPTER Adapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - struct registry_priv *registry_par = &Adapter->registrypriv; - - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - - u32 Polling, Ratio_Tx, Ratio_PRI; - u32 BT_Tx, BT_PRI; - u8 BT_State; - static u8 ServiceTypeCnt = 0; - u8 CurServiceType; - static u8 LastServiceType = BT_Idle; - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) - return _FALSE; - - BT_State = rtw_read8(Adapter, 0x4fd); -/* - temp = PlatformEFIORead4Byte(Adapter, 0x488); - BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); - BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); - - temp = PlatformEFIORead4Byte(Adapter, 0x48c); - Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + - ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); - -*/ - BT_Tx = rtw_read32(Adapter, 0x488); - - DBG_8192C("Ratio 0x488 =%x\n", BT_Tx); - BT_Tx =BT_Tx & 0x00ffffff; - //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); - - BT_PRI = rtw_read32(Adapter, 0x48c); - - DBG_8192C("Ratio 0x48c =%x\n", BT_PRI); - BT_PRI =BT_PRI & 0x00ffffff; - //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); - - - Polling = rtw_read32(Adapter, 0x490); - //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); - - - if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffff && BT_State==0xff) - return _FALSE; - - BT_State &= BIT0; - - if(BT_State != pbtpriv->BT_CUR_State) - { - pbtpriv->BT_CUR_State = BT_State; - - if(registry_par->bt_sco == 3) - { - ServiceTypeCnt = 0; - - pbtpriv->BT_Service = BT_Idle; - - DBG_8192C("BT_%s\n", BT_State?"ON":"OFF"); - - BT_State = BT_State | - ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |BIT2; - - rtw_write8(Adapter, 0x4fd, BT_State); - DBG_8192C("BT set 0x4fd to %x\n", BT_State); - } - - return _TRUE; - } - DBG_8192C("bRegBT_Sco = %d\n",registry_par->bt_sco); - - Ratio_Tx = BT_Tx*1000/Polling; - Ratio_PRI = BT_PRI*1000/Polling; - - pbtpriv->Ratio_Tx=Ratio_Tx; - pbtpriv->Ratio_PRI=Ratio_PRI; - - DBG_8192C("Ratio_Tx=%d\n", Ratio_Tx); - DBG_8192C("Ratio_PRI=%d\n", Ratio_PRI); - - - if(BT_State && registry_par->bt_sco==3) - { - DBG_8192C("bt_sco ==3 Follow Counter\n"); -// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) -// { -// ServiceTypeCnt = 0; -// return FALSE; -// } -// else - { - /* - Ratio_Tx = BT_Tx*1000/Polling; - Ratio_PRI = BT_PRI*1000/Polling; - - pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; - pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; - - RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); - RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); - - */ - if((Ratio_Tx < 30) && (Ratio_PRI < 30)) - CurServiceType = BT_Idle; - else if((Ratio_PRI > 110) && (Ratio_PRI < 250)) - CurServiceType = BT_SCO; - else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) - CurServiceType = BT_Busy; - else if((Ratio_Tx >=350) && (Ratio_Tx < 500)) - CurServiceType = BT_OtherBusy; - else if(Ratio_Tx >=500) - CurServiceType = BT_PAN; - else - CurServiceType=BT_OtherAction; - } - -/* if(pHalData->bt_coexist.bStopCount) - { - ServiceTypeCnt=0; - pHalData->bt_coexist.bStopCount=FALSE; - } -*/ -// if(CurServiceType == BT_OtherBusy) - { - ServiceTypeCnt=2; - LastServiceType=CurServiceType; - } -#if 0 - else if(CurServiceType == LastServiceType) - { - if(ServiceTypeCnt<3) - ServiceTypeCnt++; - } - else - { - ServiceTypeCnt = 0; - LastServiceType = CurServiceType; - } -#endif - - if(ServiceTypeCnt==2) - { - pbtpriv->BT_Service = LastServiceType; - BT_State = BT_State | - ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | - //((pbtpriv->BT_Service==BT_SCO)?0:BIT2); - ((pbtpriv->BT_Service!=BT_Idle)?0:BIT2); - - //if(pbtpriv->BT_Service==BT_Busy) - // BT_State&= ~(BIT2); - - if(pbtpriv->BT_Service==BT_SCO) - { - DBG_8192C("BT TYPE Set to ==> BT_SCO\n"); - } - else if(pbtpriv->BT_Service==BT_Idle) - { - DBG_8192C("BT TYPE Set to ==> BT_Idle\n"); - } - else if(pbtpriv->BT_Service==BT_OtherAction) - { - DBG_8192C("BT TYPE Set to ==> BT_OtherAction\n"); - } - else if(pbtpriv->BT_Service==BT_Busy) - { - DBG_8192C("BT TYPE Set to ==> BT_Busy\n"); - } - else if(pbtpriv->BT_Service==BT_PAN) - { - DBG_8192C("BT TYPE Set to ==> BT_PAN\n"); - } - else - { - DBG_8192C("BT TYPE Set to ==> BT_OtherBusy\n"); - } - - //Add interrupt migration when bt is not in idel state (no traffic). - //suggestion by Victor. - if(pbtpriv->BT_Service!=BT_Idle)//EDCA_VI_PARAM modify - { - - rtw_write16(Adapter, 0x504, 0x0ccc); - rtw_write8(Adapter, 0x506, 0x54); - rtw_write8(Adapter, 0x507, 0x54); - - } - else - { - rtw_write8(Adapter, 0x506, 0x00); - rtw_write8(Adapter, 0x507, 0x00); - } - - rtw_write8(Adapter, 0x4fd, BT_State); - DBG_8192C("BT_SCO set 0x4fd to %x\n", BT_State); - return _TRUE; - } - } - - return _FALSE; - -} - -static BOOLEAN -BT_WifiConnectChange( - IN PADAPTER Adapter - ) -{ - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); -// PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - static BOOLEAN bMediaConnect = _FALSE; - - //if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) - if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) - { - bMediaConnect = _FALSE; - } - else - { - if(!bMediaConnect) - { - bMediaConnect = _TRUE; - return _TRUE; - } - bMediaConnect = _TRUE; - } - - return _FALSE; -} - -#define BT_RSSI_STATE_NORMAL_POWER BIT0 -#define BT_RSSI_STATE_AMDPU_OFF BIT1 -#define BT_RSSI_STATE_SPECIAL_LOW BIT2 -#define BT_RSSI_STATE_BG_EDCA_LOW BIT3 - -static s32 GET_UNDECORATED_AVERAGE_RSSI(PADAPTER Adapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - s32 average_rssi; - - if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) - { - average_rssi = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - } - else - { - average_rssi = pdmpriv->UndecoratedSmoothedPWDB; - } - return average_rssi; -} - -static u8 BT_RssiStateChange( - IN PADAPTER Adapter - ) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - s32 UndecoratedSmoothedPWDB; - u8 CurrBtRssiState = 0x00; - - - - - //if(pMgntInfo->bMediaConnect) // Default port - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - { - UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(Adapter); - } - else // associated entry pwdb - { - if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0) - UndecoratedSmoothedPWDB = 100; // No any RSSI information. Assume to be MAX. - else - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - } - - // Check RSSI to determine HighPower/NormalPower state for BT coexistence. - if(UndecoratedSmoothedPWDB >= 67) - CurrBtRssiState &= (~BT_RSSI_STATE_NORMAL_POWER); - else if(UndecoratedSmoothedPWDB < 62) - CurrBtRssiState |= BT_RSSI_STATE_NORMAL_POWER; - - // Check RSSI to determine AMPDU setting for BT coexistence. - if(UndecoratedSmoothedPWDB >= 40) - CurrBtRssiState &= (~BT_RSSI_STATE_AMDPU_OFF); - else if(UndecoratedSmoothedPWDB <= 32) - CurrBtRssiState |= BT_RSSI_STATE_AMDPU_OFF; - - // Marked RSSI state. It will be used to determine BT coexistence setting later. - if(UndecoratedSmoothedPWDB < 35) - CurrBtRssiState |= BT_RSSI_STATE_SPECIAL_LOW; - else - CurrBtRssiState &= (~BT_RSSI_STATE_SPECIAL_LOW); - - // Check BT state related to BT_Idle in B/G mode. - if(UndecoratedSmoothedPWDB < 15) - CurrBtRssiState |= BT_RSSI_STATE_BG_EDCA_LOW; - else - CurrBtRssiState &= (~BT_RSSI_STATE_BG_EDCA_LOW); - - if(CurrBtRssiState != pbtpriv->BtRssiState) - { - pbtpriv->BtRssiState = CurrBtRssiState; - return _TRUE; - } - else - { - return _FALSE; - } -} - -static void dm_BTCoexist(PADAPTER Adapter ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct mlme_ext_info *pmlmeinfo = &Adapter->mlmeextpriv.mlmext_info; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - //PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); - - //PRX_TS_RECORD pRxTs = NULL; - u8 BT_gpio_mux; - - BOOLEAN bWifiConnectChange, bBtStateChange,bRssiStateChange; - - if(pbtpriv->bCOBT == _FALSE) return; - - if(!( pdmpriv->DMFlag & DYNAMIC_FUNC_BT)) return; - - if( (pbtpriv->BT_Coexist) &&(pbtpriv->BT_CoexistType == BT_CSR_BC4) && (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) ) - { - bWifiConnectChange = BT_WifiConnectChange(Adapter); - bBtStateChange = BT_BTStateChange(Adapter); - bRssiStateChange = BT_RssiStateChange(Adapter); - - DBG_8192C("bWifiConnectChange %d, bBtStateChange %d,bRssiStateChange %d\n", - bWifiConnectChange,bBtStateChange,bRssiStateChange); - - // add by hpfan for debug message - BT_gpio_mux = rtw_read8(Adapter, REG_GPIO_MUXCFG); - DBG_8192C("BTCoexit Reg_0x40 (%2x)\n", BT_gpio_mux); - - if( bWifiConnectChange ||bBtStateChange ||bRssiStateChange ) - { - if(pbtpriv->BT_CUR_State) - { - - // Do not allow receiving A-MPDU aggregation. - if(pbtpriv->BT_Ampdu)// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. - { - - if(pmlmeinfo->assoc_AP_vendor == ciscoAP) - { - if(pbtpriv->BT_Service!=BT_Idle) - { - if(pmlmeinfo->bAcceptAddbaReq) - { - DBG_8192C("BT_Disallow AMPDU \n"); - pmlmeinfo->bAcceptAddbaReq = _FALSE; - send_delba(Adapter,0, get_my_bssid(&(pmlmeinfo->network))); - } - } - else - { - if(!pmlmeinfo->bAcceptAddbaReq) - { - DBG_8192C("BT_Allow AMPDU RSSI >=40\n"); - pmlmeinfo->bAcceptAddbaReq = _TRUE; - } - } - } - else - { - if(!pmlmeinfo->bAcceptAddbaReq) - { - DBG_8192C("BT_Allow AMPDU BT Idle\n"); - pmlmeinfo->bAcceptAddbaReq = _TRUE; - } - } - } - -#if 0 - else if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) - { - if(pHalData->bt_coexist.BtRssiState & BT_RSSI_STATE_AMDPU_OFF) - { - if(pMgntInfo->bBT_Ampdu && pHTInfo->bAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); - pHTInfo->bAcceptAddbaReq = FALSE; - if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) - TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); - } - } - else - { - if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); - pHTInfo->bAcceptAddbaReq = TRUE; - } - } - } - else - { - if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); - pHTInfo->bAcceptAddbaReq = TRUE; - } - } -#endif - - if(pbtpriv->BT_Ant_isolation) - { - DBG_8192C("BT_IsolationLow\n"); - -// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. -#if 0 - RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); - if(pMgntInfo->bUseRAMask) - { - // 20100407 Joseph: Fix rate adaptive modification for BT coexist. - // This fix is not complete yet. It shall also consider VWifi and Adhoc case, - // which connect with multiple STAs. - Adapter->HalFunc.UpdateHalRAMaskHandler( - Adapter, - FALSE, - 0, - NULL, - NULL, - pMgntInfo->RateAdaptive.RATRState, - RAMask_Normal); - } - else - { - Adapter->HalFunc.UpdateHalRATRTableHandler( - Adapter, - &pMgntInfo->dot11OperationalRateSet, - pMgntInfo->dot11HTOperationalRateSet,NULL); - } -#endif - - // 20100415 Joseph: Modify BT coexist mechanism suggested by Yaying. - // Now we only enable HW BT coexist when BT in "Busy" state. - if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) - { - if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && - pbtpriv->BT_Service==BT_OtherAction) - { - DBG_8192C("BT_Turn ON Coexist\n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); - } - else - { - if((pbtpriv->BT_Service==BT_Busy) && - (pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER)) - { - DBG_8192C("BT_Turn ON Coexist\n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); - } - else if((pbtpriv->BT_Service==BT_OtherAction) && - (pbtpriv->BtRssiState & BT_RSSI_STATE_SPECIAL_LOW)) - { - DBG_8192C("BT_Turn ON Coexist\n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); - } - else if(pbtpriv->BT_Service==BT_PAN) - { - DBG_8192C("BT_Turn ON Coexist\n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); - } - else - { - DBG_8192C("BT_Turn OFF Coexist\n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); - } - } - } - else - { - DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist\n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); - } - - if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) - { - if(pbtpriv->BT_Service==BT_PAN) - { - DBG_8192C("BT_Turn ON Coexist(Reg0x44 = 0x10100)\n"); - rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x10100); - } - else - { - DBG_8192C("BT_Turn OFF Coexist(Reg0x44 = 0x0)\n"); - rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); - } - } - else - { - DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist(Reg0x44 = 0x0)\n"); - rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); - } - - // 20100430 Joseph: Integrate the BT coexistence EDCA tuning here. - if(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER) - { - if(pbtpriv->BT_Service==BT_OtherBusy) - { - //pbtpriv->BtEdcaUL = 0x5ea72b; - //pbtpriv->BtEdcaDL = 0x5ea72b; - pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72b; - pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72b; - - DBG_8192C("BT in BT_OtherBusy state Tx (%d) >350 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx ,REG_EDCA_BE_PARAM, 0x5ea72b); - } - else if(pbtpriv->BT_Service==BT_Busy) - { - //pbtpriv->BtEdcaUL = 0x5eb82f; - //pbtpriv->BtEdcaDL = 0x5eb82f; - - pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82f; - pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82f; - - DBG_8192C("BT in BT_Busy state parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82f); - } - else if(pbtpriv->BT_Service==BT_SCO) - { - if(pbtpriv->Ratio_Tx>160) - { - //pbtpriv->BtEdcaUL = 0x5ea72f; - //pbtpriv->BtEdcaDL = 0x5ea72f; - pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72f; - pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72f; - DBG_8192C("BT in BT_SCO state Tx (%d) >160 parameter(0x%x) = 0x%x\n",pbtpriv->Ratio_Tx, REG_EDCA_BE_PARAM, 0x5ea72f); - } - else - { - //pbtpriv->BtEdcaUL = 0x5ea32b; - //pbtpriv->BtEdcaDL = 0x5ea42b; - - pbtpriv->BT_EDCA[UP_LINK] = 0x5ea32b; - pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea42b; - - DBG_8192C("BT in BT_SCO state Tx (%d) <160 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx,REG_EDCA_BE_PARAM, 0x5ea32f); - } - } - else - { - // BT coexistence mechanism does not control EDCA parameter. - //pbtpriv->BtEdcaUL = 0; - //pbtpriv->BtEdcaDL = 0; - - pbtpriv->BT_EDCA[UP_LINK] = 0; - pbtpriv->BT_EDCA[DOWN_LINK] = 0; - DBG_8192C("BT in State %d and parameter(0x%x) use original setting.\n",pbtpriv->BT_Service, REG_EDCA_BE_PARAM); - } - - if((pbtpriv->BT_Service!=BT_Idle) && - (pmlmeext->cur_wireless_mode == WIRELESS_MODE_G) && - (pbtpriv->BtRssiState & BT_RSSI_STATE_BG_EDCA_LOW)) - { - //pbtpriv->BtEdcaUL = 0x5eb82b; - //pbtpriv->BtEdcaDL = 0x5eb82b; - - pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82b; - pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82b; - - DBG_8192C("BT set parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82b); - } - } - else - { - // BT coexistence mechanism does not control EDCA parameter. - //pbtpriv->BtEdcaUL = 0; - //pbtpriv->BtEdcaDL = 0; - - pbtpriv->BT_EDCA[UP_LINK] = 0; - pbtpriv->BT_EDCA[DOWN_LINK] = 0; - } - - // 20100415 Joseph: Set RF register 0x1E and 0x1F for BT coexist suggested by Yaying. - if(pbtpriv->BT_Service!=BT_Idle) - { - DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf); - PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, 0xf); - //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf)); - //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, 0xf); - } - else - { - DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n",pbtpriv->BtRfRegOrigin1E); - PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); - //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); - //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); - } - } - else - { - DBG_8192C("BT_IsolationHigh\n"); - // Do nothing. - } - } - else - { - - if(pbtpriv->BT_Ampdu && !pmlmeinfo->bAcceptAddbaReq) - { - DBG_8192C("BT_Allow AMPDU bt is off\n"); - pmlmeinfo->bAcceptAddbaReq = _TRUE; - } - - DBG_8192C("BT_Turn OFF Coexist bt is off \n"); - rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); - - DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", pbtpriv->BtRfRegOrigin1E); - PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); - //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); - //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); - - // BT coexistence mechanism does not control EDCA parameter since BT is disabled. - //pbtpriv->BtEdcaUL = 0; - //pbtpriv->BtEdcaDL = 0; - pbtpriv->BT_EDCA[UP_LINK] = 0; - pbtpriv->BT_EDCA[DOWN_LINK] = 0; - - -// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. -#if 0 - RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); - if(pMgntInfo->bUseRAMask) - { - // 20100407 Joseph: Fix rate adaptive modification for BT coexist. - // This fix is not complete yet. It shall also consider VWifi and Adhoc case, - // which connect with multiple STAs. - Adapter->HalFunc.UpdateHalRAMaskHandler( - Adapter, - FALSE, - 0, - NULL, - NULL, - pMgntInfo->RateAdaptive.RATRState, - RAMask_Normal); - } - else - { - Adapter->HalFunc.UpdateHalRATRTableHandler( - Adapter, - &pMgntInfo->dot11OperationalRateSet, - pMgntInfo->dot11HTOperationalRateSet,NULL); - } -#endif - } - } - } -} - -static void dm_InitBtCoexistDM( PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - - if( !pbtpriv->BT_Coexist ) return; - - pbtpriv->BtRfRegOrigin1E = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1e, 0xf0); - pbtpriv->BtRfRegOrigin1F = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1f, 0xf0); -} - -void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - - pbtpriv->bCOBT = bStart; - send_delba(padapter,0, get_my_bssid(&(pmlmeinfo->network))); - send_delba(padapter,1, get_my_bssid(&(pmlmeinfo->network))); - -} - -void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir) -{ - struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; - DBG_8192C("issue_delete_ba : %s...\n",(dir==0)?"RX_DIR":"TX_DIR"); - send_delba(padapter,dir, get_my_bssid(&(pmlmeinfo->network))); -} - -#endif - -#if 0//def CONFIG_PCI_HCI - -BOOLEAN -BT_BTStateChange( - IN PADAPTER Adapter - ) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - u4Byte temp, Polling, Ratio_Tx, Ratio_PRI; - u4Byte BT_Tx, BT_PRI; - u1Byte BT_State; - static u1Byte ServiceTypeCnt = 0; - u1Byte CurServiceType; - static u1Byte LastServiceType = BT_Idle; - - if(!pMgntInfo->bMediaConnect) - return FALSE; - - BT_State = PlatformEFIORead1Byte(Adapter, 0x4fd); -/* - temp = PlatformEFIORead4Byte(Adapter, 0x488); - BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); - BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); - - temp = PlatformEFIORead4Byte(Adapter, 0x48c); - Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + - ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); - -*/ - BT_Tx = PlatformEFIORead4Byte(Adapter, 0x488); - - RTPRINT(FBT, BT_TRACE, ("Ratio 0x488 =%x\n", BT_Tx)); - BT_Tx =BT_Tx & 0x00ffffff; - //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); - - BT_PRI = PlatformEFIORead4Byte(Adapter, 0x48c); - - RTPRINT(FBT, BT_TRACE, ("Ratio Ratio 0x48c =%x\n", BT_PRI)); - BT_PRI =BT_PRI & 0x00ffffff; - //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); - - - Polling = PlatformEFIORead4Byte(Adapter, 0x490); - //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); - - - if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffffff && BT_State==0xff) - return FALSE; - - BT_State &= BIT0; - - if(BT_State != pHalData->bt_coexist.BT_CUR_State) - { - pHalData->bt_coexist.BT_CUR_State = BT_State; - - if(pMgntInfo->bRegBT_Sco == 3) - { - ServiceTypeCnt = 0; - - pHalData->bt_coexist.BT_Service = BT_Idle; - - RTPRINT(FBT, BT_TRACE, ("BT_%s\n", BT_State?"ON":"OFF")); - - BT_State = BT_State | - ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |BIT2; - - PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); - RTPRINT(FBT, BT_TRACE, ("BT set 0x4fd to %x\n", BT_State)); - } - - return TRUE; - } - RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco %d\n", pMgntInfo->bRegBT_Sco)); - - Ratio_Tx = BT_Tx*1000/Polling; - Ratio_PRI = BT_PRI*1000/Polling; - - pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; - pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; - - RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); - RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); - - - if(BT_State && pMgntInfo->bRegBT_Sco==3) - { - RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco ==3 Follow Counter\n")); -// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) -// { -// ServiceTypeCnt = 0; -// return FALSE; -// } -// else - { - /* - Ratio_Tx = BT_Tx*1000/Polling; - Ratio_PRI = BT_PRI*1000/Polling; - - pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; - pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; - - RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); - RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); - - */ - if((Ratio_Tx <= 50) && (Ratio_PRI <= 50)) - CurServiceType = BT_Idle; - else if((Ratio_PRI > 150) && (Ratio_PRI < 200)) - CurServiceType = BT_SCO; - else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) - CurServiceType = BT_Busy; - else if(Ratio_Tx >= 350) - CurServiceType = BT_OtherBusy; - else - CurServiceType=BT_OtherAction; - - } -/* if(pHalData->bt_coexist.bStopCount) - { - ServiceTypeCnt=0; - pHalData->bt_coexist.bStopCount=FALSE; - } -*/ - if(CurServiceType == BT_OtherBusy) - { - ServiceTypeCnt=2; - LastServiceType=CurServiceType; - } - else if(CurServiceType == LastServiceType) - { - if(ServiceTypeCnt<3) - ServiceTypeCnt++; - } - else - { - ServiceTypeCnt = 0; - LastServiceType = CurServiceType; - } - - if(ServiceTypeCnt==2) - { - pHalData->bt_coexist.BT_Service = LastServiceType; - BT_State = BT_State | - ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) | - ((pHalData->bt_coexist.BT_Service==BT_SCO)?0:BIT2); - - if(pHalData->bt_coexist.BT_Service==BT_Busy) - BT_State&= ~(BIT2); - - if(pHalData->bt_coexist.BT_Service==BT_SCO) - { - RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_SCO\n")); - } - else if(pHalData->bt_coexist.BT_Service==BT_Idle) - { - RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Idle\n")); - } - else if(pHalData->bt_coexist.BT_Service==BT_OtherAction) - { - RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherAction\n")); - } - else if(pHalData->bt_coexist.BT_Service==BT_Busy) - { - RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Busy\n")); - } - else - { - RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherBusy\n")); - } - - //Add interrupt migration when bt is not in idel state (no traffic). - //suggestion by Victor. - if(pHalData->bt_coexist.BT_Service!=BT_Idle) - { - - PlatformEFIOWrite2Byte(Adapter, 0x504, 0x0ccc); - PlatformEFIOWrite1Byte(Adapter, 0x506, 0x54); - PlatformEFIOWrite1Byte(Adapter, 0x507, 0x54); - - } - else - { - PlatformEFIOWrite1Byte(Adapter, 0x506, 0x00); - PlatformEFIOWrite1Byte(Adapter, 0x507, 0x00); - } - - PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); - RTPRINT(FBT, BT_TRACE, ("BT_SCO set 0x4fd to %x\n", BT_State)); - return TRUE; - } - } - - return FALSE; - -} - -BOOLEAN -BT_WifiConnectChange( - IN PADAPTER Adapter - ) -{ - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - static BOOLEAN bMediaConnect = FALSE; - - if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) - { - bMediaConnect = FALSE; - } - else - { - if(!bMediaConnect) - { - bMediaConnect = TRUE; - return TRUE; - } - bMediaConnect = TRUE; - } - - return FALSE; -} - -BOOLEAN -BT_RSSIChangeWithAMPDU( - IN PADAPTER Adapter - ) -{ - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if(!Adapter->pNdisCommon->bRegBT_Ampdu || !Adapter->pNdisCommon->bRegAcceptAddbaReq) - return FALSE; - - RTPRINT(FBT, BT_TRACE, ("RSSI is %d\n",pHalData->UndecoratedSmoothedPWDB)); - - if((pHalData->UndecoratedSmoothedPWDB<=32) && pMgntInfo->pHTInfo->bAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32 Need change\n")); - return TRUE; - - } - else if((pHalData->UndecoratedSmoothedPWDB>=40) && !pMgntInfo->pHTInfo->bAcceptAddbaReq ) - { - RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40, Need change\n")); - return TRUE; - } - else - return FALSE; - -} - - -VOID -dm_BTCoexist( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - static u1Byte LastTxPowerLvl = 0xff; - PRX_TS_RECORD pRxTs = NULL; - - BOOLEAN bWifiConnectChange, bBtStateChange,bRSSIChangeWithAMPDU; - - if( (pHalData->bt_coexist.BluetoothCoexist) && - (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) && - (!ACTING_AS_AP(Adapter)) ) - { - bWifiConnectChange = BT_WifiConnectChange(Adapter); - bBtStateChange = BT_BTStateChange(Adapter); - bRSSIChangeWithAMPDU = BT_RSSIChangeWithAMPDU(Adapter); - RTPRINT(FBT, BT_TRACE, ("bWifiConnectChange %d, bBtStateChange %d,LastTxPowerLvl %x, DynamicTxHighPowerLvl %x\n", - bWifiConnectChange,bBtStateChange,LastTxPowerLvl,pHalData->DynamicTxHighPowerLvl)); - if( bWifiConnectChange ||bBtStateChange || - (LastTxPowerLvl != pHalData->DynamicTxHighPowerLvl) ||bRSSIChangeWithAMPDU) - { - LastTxPowerLvl = pHalData->DynamicTxHighPowerLvl; - - if(pHalData->bt_coexist.BT_CUR_State) - { - // Do not allow receiving A-MPDU aggregation. - if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) - { - if(pHalData->UndecoratedSmoothedPWDB<=32) - { - if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); - pMgntInfo->pHTInfo->bAcceptAddbaReq = FALSE; - if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) - TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); - } - } - else if(pHalData->UndecoratedSmoothedPWDB>=40) - { - if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); - pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; - } - } - } - else - { - if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); - pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; - } - } - - if(pHalData->bt_coexist.BT_Ant_isolation) - { - RTPRINT(FBT, BT_TRACE, ("BT_IsolationLow\n")); - RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); - Adapter->HalFunc.UpdateHalRATRTableHandler( - Adapter, - &pMgntInfo->dot11OperationalRateSet, - pMgntInfo->dot11HTOperationalRateSet,NULL); - - if(pHalData->bt_coexist.BT_Service==BT_SCO) - { - - RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist with SCO \n")); - PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); - } - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) - { - RTPRINT(FBT, BT_TRACE, ("BT_Turn ON Coexist\n")); - PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0xb4); - } - else - { - RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist\n")); - PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); - } - } - else - { - RTPRINT(FBT, BT_TRACE, ("BT_IsolationHigh\n")); - // Do nothing. - } - } - else - { - if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) - { - RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU bt is off\n")); - pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; - } - - RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n")); - PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); - - RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); - Adapter->HalFunc.UpdateHalRATRTableHandler( - Adapter, - &pMgntInfo->dot11OperationalRateSet, - pMgntInfo->dot11HTOperationalRateSet,NULL); - } - } - } -} -#endif - - -/*----------------------------------------------------------------------------- - * Function: dm_CheckRfCtrlGPIO() - * - * Overview: Copy 8187B template for 9xseries. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 01/10/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -static VOID -dm_CheckRfCtrlGPIO( - IN PADAPTER Adapter - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) - #ifdef CONFIG_USB_HCI - // 2010/08/12 MH Add for CU selective suspend. - PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(Adapter); - #else - PRT_SDIO_DEVICE pDevice = GET_RT_SDIO_DEVICE(Adapter); - #endif -#endif - - if(!Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) - return; - - RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); - -#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) - // Walk around for DTM test, we will not enable HW - radio on/off because r/w - // page 1 register before Lextra bus is enabled cause system fails when resuming - // from S4. 20080218, Emily - if(Adapter->bInHctTest) - return; - -//#if ((HAL_CODE_BASE == RTL8192_S) ) - //Adapter->HalFunc.GPIOChangeRFHandler(Adapter, GPIORF_POLLING); -//#else - // 2010/07/27 MH Only Minicard and support selective suspend, we can not turn off all MAC power to - // stop 8051. For dongle and minicard, we both support selective suspend mode. - //if(pDevice->RegUsbSS && Adapter->HalFunc.GetInterfaceSelectionHandler(Adapter) == INTF_SEL2_MINICARD) - - // - // 2010/08/12 MH We support severl power consumption combination as below. - // - // Power consumption combination - // SS Enable: (LPS disable + IPS + SW/HW radio off) - // 1. Dongle + PDN (support HW radio off) - // 2. Dongle + Normal (No HW radio off) - // 3. MiniCard + PDN (support HW radio off) - // 4. MiniCard + Normal (support HW radio off) - // - // SS Disable: (LPS + IPS + SW/HW radio off) - // 1. Dongle + PDN (support HW radio off) - // 2. Dongle + Normal (No HW radio off) - // 3. MiniCard + PDN (support HW radio off) - // 4. MiniCard + Normal (support HW radio off) - // - // For Power down module detection. We need to read power register no matter - // dongle or minicard, we will add the item is the detection method. - // - // - //vivi add du case - if ((IS_HARDWARE_TYPE_8192CU(Adapter)||IS_HARDWARE_TYPE_8192DU(Adapter)) - && pDevice->RegUsbSS) - { - RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Enabled\n")); - if (SUPPORT_HW_RADIO_DETECT(Adapter)) - { // Support HW radio detection - RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); - GpioDetectTimerStart(Adapter); - } - else - { // Dongle does not support HW radio detection.?? In the fufure?? - RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); - } - } - else if (IS_HARDWARE_TYPE_8192CU(Adapter) || - IS_HARDWARE_TYPE_8723U(Adapter)|| - IS_HARDWARE_TYPE_8192DU(Adapter) || - IS_HARDWARE_TYPE_8723S(Adapter)) - { // Not support Selective suspend - RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Disable\n")); - if (SUPPORT_HW_RADIO_DETECT(Adapter)) - { - RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); - PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); - } - else - { - RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); - } - } - else - { // CE only support noemal HW radio detection now. Support timers GPIO detection in SE/CU. - PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); - } -//#endif -#else if defined CONFIG_PCI_HCI - if(Adapter->bInHctTest) - return; - - // CE only support noemal HW radio detection now. We support timers GPIO detection in SE. - PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); -#endif -#endif -} /* dm_CheckRfCtrlGPIO */ - -static VOID -dm_InitRateAdaptiveMask( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive; - - pRA->RATRState = DM_RATR_STA_INIT; - pRA->PreRATRState = DM_RATR_STA_INIT; - - if (pdmpriv->DM_Type == DM_Type_ByDriver) - pdmpriv->bUseRAMask = _TRUE; - else - pdmpriv->bUseRAMask = _FALSE; -} - -/*----------------------------------------------------------------------------- - * Function: dm_RefreshRateAdaptiveMask() - * - * Overview: Update rate table mask according to rssi - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 05/27/2009 hpfan Create Version 0. - * - *---------------------------------------------------------------------------*/ -static VOID -dm_RefreshRateAdaptiveMask( IN PADAPTER pAdapter) -{ -#if 0 - PADAPTER pTargetAdapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMGNT_INFO pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo); - PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; - u4Byte LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0; - - if(pAdapter->bDriverStopped) - { - RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n")); - return; - } - - if(!pMgntInfo->bUseRAMask) - { - RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); - return; - } - - // if default port is connected, update RA table for default port (infrastructure mode only) - if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) - { - - // decide rastate according to rssi - switch (pRA->PreRATRState) - { - case DM_RATR_STA_HIGH: - HighRSSIThreshForRA = 50; - LowRSSIThreshForRA = 20; - break; - - case DM_RATR_STA_MIDDLE: - HighRSSIThreshForRA = 55; - LowRSSIThreshForRA = 20; - break; - - case DM_RATR_STA_LOW: - HighRSSIThreshForRA = 50; - LowRSSIThreshForRA = 25; - break; - - default: - HighRSSIThreshForRA = 50; - LowRSSIThreshForRA = 20; - break; - } - - if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) - pRA->RATRState = DM_RATR_STA_HIGH; - else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) - pRA->RATRState = DM_RATR_STA_MIDDLE; - else - pRA->RATRState = DM_RATR_STA_LOW; - - if(pRA->PreRATRState != pRA->RATRState) - { - RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); - RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pHalData->UndecoratedSmoothedPWDB)); - RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState)); - RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pAdapter, - FALSE, - 0, - NULL, - NULL, - pRA->RATRState); - pRA->PreRATRState = pRA->RATRState; - } - } - - // - // The following part configure AP/VWifi/IBSS rate adaptive mask. - // - if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter)) - { - pTargetAdapter = pAdapter; - } - else - { - pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE); - if(!ACTING_AS_AP(pTargetAdapter)) - pTargetAdapter = NULL; - } - - // if extension port (softap) is started, updaet RA table for more than one clients associate - if(pTargetAdapter != NULL) - { - int i; - PRT_WLAN_STA pEntry; - PRATE_ADAPTIVE pEntryRA; - - for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++) - { - if( pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated) - { - pEntry = pTargetAdapter->MgntInfo.AsocEntry+i; - pEntryRA = &pEntry->RateAdaptive; - - switch (pEntryRA->PreRATRState) - { - case DM_RATR_STA_HIGH: - { - HighRSSIThreshForRA = 50; - LowRSSIThreshForRA = 20; - } - break; - - case DM_RATR_STA_MIDDLE: - { - HighRSSIThreshForRA = 55; - LowRSSIThreshForRA = 20; - } - break; - - case DM_RATR_STA_LOW: - { - HighRSSIThreshForRA = 50; - LowRSSIThreshForRA = 25; - } - break; - - default: - { - HighRSSIThreshForRA = 50; - LowRSSIThreshForRA = 20; - } - } - - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) - pEntryRA->RATRState = DM_RATR_STA_HIGH; - else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) - pEntryRA->RATRState = DM_RATR_STA_MIDDLE; - else - pEntryRA->RATRState = DM_RATR_STA_LOW; - - if(pEntryRA->PreRATRState != pEntryRA->RATRState) - { - RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr); - RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB)); - RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState)); - RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pTargetAdapter, - FALSE, - pEntry->AID+1, - pEntry->MacAddr, - pEntry, - pEntryRA->RATRState); - pEntryRA->PreRATRState = pEntryRA->RATRState; - } - - } - } - } -#endif -} - -static VOID -dm_CheckProtection( - IN PADAPTER Adapter - ) -{ -#if 0 - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u1Byte CurRate, RateThreshold; - - if(pMgntInfo->pHTInfo->bCurBW40MHz) - RateThreshold = MGN_MCS1; - else - RateThreshold = MGN_MCS3; - - if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) - { - pMgntInfo->bDmDisableProtect = TRUE; - DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); - } - else - { - pMgntInfo->bDmDisableProtect = FALSE; - DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); - } -#endif -} - -static VOID -dm_CheckStatistics( - IN PADAPTER Adapter - ) -{ -#if 0 - if(!Adapter->MgntInfo.bMediaConnect) - return; - - //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. - Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); - - // Calculate current Tx Rate(Successful transmited!!) - - // Calculate current Rx Rate(Successful received!!) - - //for tx tx retry count - Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); -#endif -} - -static void dm_CheckPbcGPIO(_adapter *padapter) -{ - u8 tmp1byte; - u8 bPbcPressed = _FALSE; - - if(!padapter->registrypriv.hw_wps_pbc) - return; - -#ifdef CONFIG_USB_HCI - tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); - tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); - rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode - - tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); - rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level - - tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); - tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); - rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode - - tmp1byte =rtw_read8(padapter, GPIO_IN); - - if (tmp1byte == 0xff) - return ; - - if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) - { - bPbcPressed = _TRUE; - } -#else - tmp1byte = rtw_read8(padapter, GPIO_IN); - //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); - - if (tmp1byte == 0xff || padapter->init_adpt_in_progress) - return ; - - if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) - { - bPbcPressed = _TRUE; - } -#endif - - if( _TRUE == bPbcPressed) - { - // Here we only set bPbcPressed to true - // After trigger PBC, the variable will be set to false - DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); - -#ifdef RTK_DMP_PLATFORM -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) - kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); -#else - kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); -#endif -#else - - if ( padapter->pid[0] == 0 ) - { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. - return; - } - -#ifdef PLATFORM_LINUX - rtw_signal_process(padapter->pid[0], SIGUSR1); -#endif -#endif - } -} - -#ifdef CONFIG_PCI_HCI -// -// Description: -// Perform interrupt migration dynamically to reduce CPU utilization. -// -// Assumption: -// 1. Do not enable migration under WIFI test. -// -// Created by Roger, 2010.03.05. -// -VOID -dm_InterruptMigration( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - BOOLEAN bCurrentIntMt, bCurrentACIntDisable; - BOOLEAN IntMtToSet = _FALSE; - BOOLEAN ACIntToSet = _FALSE; - - - // Retrieve current interrupt migration and Tx four ACs IMR settings first. - bCurrentIntMt = pHalData->bInterruptMigration; - bCurrentACIntDisable = pHalData->bDisableTxInt; - - // - // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics - // when interrupt migration is set before. 2010.03.05. - // - if(!Adapter->registrypriv.wifi_spec && - (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && - pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) - { - IntMtToSet = _TRUE; - - // To check whether we should disable Tx interrupt or not. - if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) - ACIntToSet = _TRUE; - } - - //Update current settings. - if( bCurrentIntMt != IntMtToSet ){ - DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); - if(IntMtToSet) - { - // - // Set interrrupt migration timer and corresponging Tx/Rx counter. - // timer 25ns*0xfa0=100us for 0xf packets. - // 2010.03.05. - // - rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx - pHalData->bInterruptMigration = IntMtToSet; - } - else - { - // Reset all interrupt migration settings. - rtw_write32(Adapter, REG_INT_MIG, 0); - pHalData->bInterruptMigration = IntMtToSet; - } - } - - /*if( bCurrentACIntDisable != ACIntToSet ){ - DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); - if(ACIntToSet) // Disable four ACs interrupts. - { - // - // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. - // When extremely highly Rx OK occurs, we will disable Tx interrupts. - // 2010.03.05. - // - UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); - pHalData->bDisableTxInt = ACIntToSet; - } - else// Enable four ACs interrupts. - { - UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); - pHalData->bDisableTxInt = ACIntToSet; - } - }*/ - -} - -#endif - -// -// Initialize GPIO setting registers -// -static void -dm_InitGPIOSetting( - IN PADAPTER Adapter - ) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - - u8 tmp1byte; - - tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); - tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); - -#ifdef CONFIG_BT_COEXIST - // UMB-B cut bug. We need to support the modification. - if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && - pHalData->bt_coexist.BT_Coexist) - { - tmp1byte |= (BIT5); - } -#endif - rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); - -} - -static void update_EDCA_param(_adapter *padapter) -{ - u32 trafficIndex; - u32 edca_param; - u64 cur_tx_bytes = 0; - u64 cur_rx_bytes = 0; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct recv_priv *precvpriv = &(padapter->recvpriv); - struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - -#ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - u8 bbtchange = _FALSE; -#endif - - - //DBG_871X("%s\n", __FUNCTION__); - - //associated AP - if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) - { - return; - } - - if (pmlmeinfo->assoc_AP_vendor >= maxAP) - { - return; - } - - cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; - cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - - //traffic, TX or RX - if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) - { - if (cur_tx_bytes > (cur_rx_bytes << 2)) - { // Uplink TP is present. - trafficIndex = UP_LINK; - } - else - { // Balance TP is present. - trafficIndex = DOWN_LINK; - } - } - else - { - if (cur_rx_bytes > (cur_tx_bytes << 2)) - { // Downlink TP is present. - trafficIndex = DOWN_LINK; - } - else - { // Balance TP is present. - trafficIndex = UP_LINK; - } - } - -#ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - { - bbtchange = _TRUE; - } - } -#endif - - if (pdmpriv->prv_traffic_idx != trafficIndex) - { -#if 0 -#ifdef CONFIG_BT_COEXIST - if(_TRUE == bbtchange) - rtw_write32(padapter, REG_EDCA_BE_PARAM, pbtpriv->BT_EDCA[trafficIndex]); - else -#endif - //adjust EDCA parameter for BE queue - //fire_write_MAC_cmd(padapter, EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); - rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); - -#else - if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) - { - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; - } - else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) && - ((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG))) - { - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; - } - else - { - edca_param = EDCAParam[unknownAP][trafficIndex]; - } - -#ifdef CONFIG_BT_COEXIST - if(_TRUE == bbtchange) - edca_param = pbtpriv->BT_EDCA[trafficIndex]; -#endif - - rtw_write32(padapter, REG_EDCA_BE_PARAM, edca_param); -#endif - pdmpriv->prv_traffic_idx = trafficIndex; - } - -//exit_update_EDCA_param: - - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; - - return; -} - -static void dm_InitDynamicBBPowerSaving( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PS_T *pPSTable = &pdmpriv->DM_PSTable; - - pPSTable->PreCCAState = CCA_MAX; - pPSTable->CurCCAState = CCA_MAX; - pPSTable->PreRFState = RF_MAX; - pPSTable->CurRFState = RF_MAX; - pPSTable->Rssi_val_min = 0; -} - -static void dm_1R_CCA( - IN PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PS_T *pPSTable = &pdmpriv->DM_PSTable; - - if(pPSTable->Rssi_val_min != 0) - { - if(pPSTable->PreCCAState == CCA_2R) - { - if(pPSTable->Rssi_val_min >= 35) - pPSTable->CurCCAState = CCA_1R; - else - pPSTable->CurCCAState = CCA_2R; - } - else{ - if(pPSTable->Rssi_val_min <= 30) - pPSTable->CurCCAState = CCA_2R; - else - pPSTable->CurCCAState = CCA_1R; - } - } - else - pPSTable->CurCCAState=CCA_MAX; - - if(pPSTable->PreCCAState != pPSTable->CurCCAState) - { - if(pPSTable->CurCCAState == CCA_1R) - { - if(pHalData->rf_type == RF_2T2R) - { - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x13); - PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); - } - else - { - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x23); - PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 - } - } - else - { - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33); - PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); - } - pPSTable->PreCCAState = pPSTable->CurCCAState; - } - //DBG_8192C("dm_1R_CCA(): CCAStage=%x\n", pPSTable->CurCCAState); -} - -void -rtl8192c_dm_RF_Saving( - IN PADAPTER pAdapter, - IN u8 bForceInNormal - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PS_T *pPSTable = &pdmpriv->DM_PSTable; - - if(pAdapter->registrypriv.intel_class_mode==1) - return; - if(pdmpriv->initialize == 0){ - pdmpriv->rf_saving_Reg874 = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord)&0x1CC000)>>14; - pdmpriv->rf_saving_RegC70 = (PHY_QueryBBReg(pAdapter, rOFDM0_AGCParameter1, bMaskDWord)&BIT3)>>3; - pdmpriv->rf_saving_Reg85C = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_SwitchControl, bMaskDWord)&0xFF000000)>>24; - pdmpriv->rf_saving_RegA74 = (PHY_QueryBBReg(pAdapter, 0xa74, bMaskDWord)&0xF000)>>12; - //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); - pdmpriv->initialize = 1; - } - - if(!bForceInNormal) - { - if(pPSTable->Rssi_val_min != 0) - { - - if(pPSTable->PreRFState == RF_Normal) - { - #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV - if(pPSTable->Rssi_val_min >= 50) - #else - if(pPSTable->Rssi_val_min >= 30) - #endif - pPSTable->CurRFState = RF_Save; - else - pPSTable->CurRFState = RF_Normal; - } - else{ - #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV - if(pPSTable->Rssi_val_min <= 45) - #else - if(pPSTable->Rssi_val_min <= 25) - #endif - pPSTable->CurRFState = RF_Normal; - else - pPSTable->CurRFState = RF_Save; - } - } - else - pPSTable->CurRFState=RF_MAX; - } - else - { - pPSTable->CurRFState = RF_Normal; - } - - if(pPSTable->PreRFState != pPSTable->CurRFState) - { - if(pPSTable->CurRFState == RF_Save) - { - PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 - PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, 0); //RegC70[3]=1'b0 - PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 - PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0xC000, 0x2); //Reg874[15:14]=2'b10 - PHY_SetBBReg(pAdapter, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 - PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 - PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 - DBG_8192C("%s(): RF_Save\n", __FUNCTION__); - } - else - { - PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1CC000, pdmpriv->rf_saving_Reg874); - PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, pdmpriv->rf_saving_RegC70); - PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, pdmpriv->rf_saving_Reg85C); - PHY_SetBBReg(pAdapter, 0xa74, 0xF000, pdmpriv->rf_saving_RegA74); - PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); - DBG_8192C("%s(): RF_Normal\n", __FUNCTION__); - } - pPSTable->PreRFState = pPSTable->CurRFState; - } -} - -static void -dm_DynamicBBPowerSaving( -IN PADAPTER pAdapter - ) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PS_T *pPSTable = &pdmpriv->DM_PSTable; - - //1 1.Determine the minimum RSSI - if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - pPSTable->Rssi_val_min = 0; - //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); - } - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port - { - //if(ACTING_AS_AP(pAdapter) || pMgntInfo->mIbss) - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) //todo: AP Mode - { - pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); - } - else - { - pPSTable->Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; - //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); - } - } - else // associated entry pwdb - { - pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); - } - - //1 2.Power Saving for 92C - if(IS_92C_SERIAL(pHalData->VersionID)) - { - //dm_1R_CCA(pAdapter); - } - - // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. - // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns to 600ns. - //1 3.Power Saving for 88C - else - { - rtl8192c_dm_RF_Saving(pAdapter, _FALSE); - } -} - - -#ifdef CONFIG_ANTENNA_DIVERSITY -// Add new function to reset the state of antenna diversity before link. -// -void SwAntDivResetBeforeLink8192C(IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; - - pDM_SWAT_Table->SWAS_NoLink_State = 0; -} - -// Compare RSSI for deciding antenna -void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) ) - { - //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), - // src->Rssi,query_rx_pwr_percentage(src->Rssi)); - //select optimum_antenna for before linked =>For antenna diversity - if(dst->Rssi >= src->Rssi )//keep org parameter - { - src->Rssi = dst->Rssi; - src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; - } - } -} - -// Add new function to reset the state of antenna diversity before link. -u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - - // Condition that does not need to use antenna diversity. - if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) - { - //DBG_8192C("SwAntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); - return _FALSE; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - { - pDM_SWAT_Table->SWAS_NoLink_State = 0; - return _FALSE; - } - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. -/* - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - - - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, - pHalData->eRFPowerState)); - - pDM_SWAT_Table->SWAS_NoLink_State = 0; - - return FALSE; - } -*/ - - if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ - //switch channel - pDM_SWAT_Table->SWAS_NoLink_State = 1; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); - rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); - //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); - return _TRUE; - } - else - { - pDM_SWAT_Table->SWAS_NoLink_State = 0; - return _FALSE; - } - - - -} -#endif -#ifdef CONFIG_SW_ANTENNA_DIVERSITY -// -// 20100514 Luke/Joseph: -// Add new function to reset antenna diversity state after link. -// -void -SwAntDivRestAfterLink8192C( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; - - if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) - return; - - //DBG_8192C("======> SwAntDivRestAfterLink <========== \n"); - pHalData->RSSI_cnt_A= 0; - pHalData->RSSI_cnt_B= 0; - pHalData->RSSI_test = _FALSE; - - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; - pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; - - pdmpriv->lastTxOkCnt=0; - pdmpriv->lastRxOkCnt=0; - - pdmpriv->TXByteCnt_A=0; - pdmpriv->TXByteCnt_B=0; - pdmpriv->RXByteCnt_A=0; - pdmpriv->RXByteCnt_B=0; - pdmpriv->DoubleComfirm=0; - pdmpriv->TrafficLoad = TRAFFIC_LOW; - -} - - -// -// 20100514 Luke/Joseph: -// Add new function for antenna diversity after link. -// This is the main function of antenna diversity after link. -// This function is called in HalDmWatchDog() and dm_SW_AntennaSwitchCallback(). -// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -// After 500ms, dm_SW_AntennaSwitchCallback() calls this function to compare the signal just -// listened on the air with the RSSI of original antenna. -// It chooses the antenna with better RSSI. -// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -// penalty to get next try. -// -static VOID -dm_SW_AntennaSwitch( - PADAPTER Adapter, - u8 Step -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; - s32 curRSSI=100, RSSI_A, RSSI_B; - u64 curTxOkCnt, curRxOkCnt; - u64 CurByteCnt = 0, PreByteCnt = 0; - u8 nextAntenna = 0; - u8 Score_A=0, Score_B=0; - u8 i; - - // Condition that does not need to use antenna diversity. - if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) - { - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No AntDiv Mechanism.\n")); - return; - } - // If dynamic ant_div is disabled. - if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_ANT_DIV) ) - { - return; - } - - if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED) ==_FALSE) - return; -#if 0 //to do - // Radio off: Status reset to default and return. - if(pHalData->eRFPowerState==eRfOff) - { - SwAntDivRestAfterLink(Adapter); - return; - } -#endif - //DBG_8192C("\n............................ %s.........................\n",__FUNCTION__); - // Handling step mismatch condition. - // Peak step is not finished at last time. Recover the variable and check again. - if( Step != pDM_SWAT_Table->try_flag ) - { - SwAntDivRestAfterLink8192C(Adapter); - } - - - if(pDM_SWAT_Table->try_flag == 0xff) - { -#if 0 - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - { - // Target: Infrastructure mode AP. - pHalData->RSSI_target = NULL; - RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is DEF AP!\n")); - } - else - { - u8 index = 0; - PRT_WLAN_STA pEntry = NULL; - PADAPTER pTargetAdapter = NULL; - - if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) - { - // Target: AP/IBSS peer. - pTargetAdapter = Adapter; - } - else if(ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE))) - { - // Target: VWIFI peer. - pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - } - } - - if(pEntry == NULL) - { - SwAntDivRestAfterLink(Adapter); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No Link.\n")); - return; - } - else - { - pHalData->RSSI_target = pEntry; - RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is PEER STA\n")); - } - } - - -#endif - - pHalData->RSSI_cnt_A= 0; - pHalData->RSSI_cnt_B= 0; - pDM_SWAT_Table->try_flag = 0; - // DBG_8192C("dm_SW_AntennaSwitch(): Set try_flag to 0 prepare for peak!\n"); - return; - } - else - { - curTxOkCnt = Adapter->xmitpriv.tx_bytes - pdmpriv->lastTxOkCnt; - curRxOkCnt = Adapter->recvpriv.rx_bytes - pdmpriv->lastRxOkCnt; - - pdmpriv->lastTxOkCnt = Adapter->xmitpriv.tx_bytes ; - pdmpriv->lastRxOkCnt = Adapter->recvpriv.rx_bytes ; - - if(pDM_SWAT_Table->try_flag == 1) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - pdmpriv->TXByteCnt_A += curTxOkCnt; - pdmpriv->RXByteCnt_A += curRxOkCnt; - //DBG_8192C("##### TXByteCnt_A(%lld) , RXByteCnt_A(%lld) ####\n",pdmpriv->TXByteCnt_A,pdmpriv->RXByteCnt_A); - } - else - { - pdmpriv->TXByteCnt_B += curTxOkCnt; - pdmpriv->RXByteCnt_B += curRxOkCnt; - //DBG_8192C("##### TXByteCnt_B(%lld) , RXByteCnt_B(%lld) ####\n",pdmpriv->TXByteCnt_B,pdmpriv->RXByteCnt_B); - } - - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->RSSI_Trying--; - //DBG_8192C("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying); - - if(pDM_SWAT_Table->RSSI_Trying == 0) - { - CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A) : (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B); - PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B) : (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A); - - //DBG_8192C("CurByteCnt = %lld\n", CurByteCnt); - //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); - - if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) - { - PreByteCnt = PreByteCnt*9; //normalize:Cur=90ms:Pre=10ms - } - else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) - { - //CurByteCnt = CurByteCnt/2; - CurByteCnt = CurByteCnt>>1;//normalize:100ms:50ms - } - - - //DBG_8192C("After DIV=>CurByteCnt = %lld\n", CurByteCnt); - //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); - - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; - //DBG_8192C("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI); - //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", - //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); - //DBG_8192C("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - //RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); - } - - } - else - { - - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; - //DBG_8192C("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI); - //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", - //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); - - //DBG_8192C("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - // RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); - } - - //1 Trying State - if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) - { - - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - //DBG_8192C("SWAS: TestMode = TP_MODE\n"); - //DBG_8192C("TRY:CurByteCnt = %lld\n", CurByteCnt); - //DBG_8192C("TRY:PreByteCnt = %lld\n",PreByteCnt); - if(CurByteCnt < PreByteCnt) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - else - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - } - else - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - else - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - } - for (i= 0; i<8; i++) - { - if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) - Score_A++; - else - Score_B++; - } - //DBG_8192C("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap); - //DBG_8192C("Score_A=%d, Score_B=%d\n", Score_A, Score_B); - - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B; - } - else - { - nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A; - } - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", - //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); - - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - //DBG_8192C("SWAS: Switch back to another antenna\n"); - } - else - { - //DBG_8192C("SWAS: current anntena is good\n"); - } - } - - if(pDM_SWAT_Table->TestMode == RSSI_MODE) - { - //DBG_8192C("SWAS: TestMode = RSSI_MODE\n"); - pDM_SWAT_Table->SelectAntennaMap=0xAA; - if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna - { - //DBG_8192C("SWAS: Switch back to another antenna\n"); - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - } - else // current anntena is good - { - nextAntenna = pDM_SWAT_Table->CurAntenna; - //DBG_8192C("SWAS: current anntena is good\n"); - } - } - pDM_SWAT_Table->try_flag = 0; - pHalData->RSSI_test = _FALSE; - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - pdmpriv->TXByteCnt_A = 0; - pdmpriv->TXByteCnt_B = 0; - pdmpriv->RXByteCnt_A = 0; - pdmpriv->RXByteCnt_B = 0; - - } - - //1 Normal State - else if(pDM_SWAT_Table->try_flag == 0) - { - if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) - { - if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) - pdmpriv->TrafficLoad = TRAFFIC_HIGH; - else - pdmpriv->TrafficLoad = TRAFFIC_LOW; - } - else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) - { - if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) - pdmpriv->TrafficLoad = TRAFFIC_HIGH; - else - pdmpriv->TrafficLoad = TRAFFIC_LOW; - } - if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - //DBG_8192C("Normal:TrafficLoad = %lld\n", curTxOkCnt+curRxOkCnt); - - //Prepare To Try Antenna - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->try_flag = 1; - pHalData->RSSI_test = _TRUE; - if((curRxOkCnt+curTxOkCnt) > 1000) - { - pDM_SWAT_Table->RSSI_Trying = 4; - pDM_SWAT_Table->TestMode = TP_MODE; - } - else - { - pDM_SWAT_Table->RSSI_Trying = 2; - pDM_SWAT_Table->TestMode = RSSI_MODE; - - } - //DBG_8192C("SWAS: Normal State -> Begin Trying! TestMode=%s\n",(pDM_SWAT_Table->TestMode == TP_MODE)?"TP":"RSSI"); - - - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - } - } - - //1 4.Change TRX antenna - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - //DBG_8192C("@@@@@@@@ SWAS: Change TX Antenna!\n "); - rtw_antenna_select_cmd(Adapter, nextAntenna, 1); - } - - //1 5.Reset Statistics - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = nextAntenna; - pDM_SWAT_Table->PreRSSI = curRSSI; - - - //1 6.Set next timer - - if(pDM_SWAT_Table->RSSI_Trying == 0) - return; - - if(pDM_SWAT_Table->RSSI_Trying%2 == 0) - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) - { - _set_timer(&pdmpriv->SwAntennaSwitchTimer,10 ); //ms - //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n"); - } - else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) - { - _set_timer(&pdmpriv->SwAntennaSwitchTimer, 50 ); //ms - //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n"); - } - } - else - { - _set_timer(&pdmpriv->SwAntennaSwitchTimer, 500 ); //ms - //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); - } - } - else - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) - _set_timer(&pdmpriv->SwAntennaSwitchTimer,90 ); //ms - else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) - _set_timer(&pdmpriv->SwAntennaSwitchTimer,100 ); //ms - } - else - { - _set_timer(&pdmpriv->SwAntennaSwitchTimer,500 ); //ms - //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); - } - } - -// RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: -----The End-----\n ")); - -} - -// -// 20100514 Luke/Joseph: -// Callback function for 500ms antenna test trying. -// -static void dm_SW_AntennaSwitchCallback(void *FunctionContext) -{ - _adapter *padapter = (_adapter *)FunctionContext; - - if(padapter->net_closed == _TRUE) - return; - // Only - dm_SW_AntennaSwitch(padapter, SWAW_STEP_DETERMINE); -} - - -// -// 20100722 -// This function is used to gather the RSSI information for antenna testing. -// It selects the RSSI of the peer STA that we want to know. -// -void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; - - if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) - return; - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - pHalData->RSSI_sum_A += RxPWDBAll; - pHalData->RSSI_cnt_A++; - } - else - { - pHalData->RSSI_sum_B+= RxPWDBAll; - pHalData->RSSI_cnt_B++; - - } - //DBG_8192C("%s Ant_(%s),RSSI_sum(%d),RSSI_cnt(%d)\n",__FUNCTION__,(2==pHalData->CurAntenna)?"A":"B",pHalData->RSSI_sum,pHalData->RSSI_cnt); - } - -} - - - -static VOID -dm_SW_AntennaSwitchInit( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; - - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - - pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; - pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->PreRSSI = 0; - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - - // Move the timer initialization to InitializeVariables function. - //PlatformInitializeTimer(Adapter, &pMgntInfo->SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)dm_SW_AntennaSwitchCallback, NULL, "SwAntennaSwitchTimer"); -} - -#endif - -//#define RSSI_CCK 0 -//#define RSSI_OFDM 1 -static void dm_RSSIMonitorInit( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - pdmpriv->OFDM_Pkt_Cnt = 0; - pdmpriv->RSSI_Select = RSSI_DEFAULT; -} - -static void dm_RSSIMonitorCheck( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) - return; - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE |WIFI_ADHOC_STATE) == _TRUE ) - { - if(Adapter->stapriv.asoc_sta_count < 2) - return; - } - - if(pdmpriv->OFDM_Pkt_Cnt == 0) - pdmpriv->RSSI_Select = RSSI_CCK; - else - pdmpriv->RSSI_Select = RSSI_OFDM; - - pdmpriv->OFDM_Pkt_Cnt = 0; - //DBG_8192C("RSSI_Select=%s OFDM_Pkt_Cnt(%d)\n", - //(pdmpriv->RSSI_Select == RSSI_OFDM)?"RSSI_OFDM":"RSSI_CCK", - //pdmpriv->OFDM_Pkt_Cnt); -} - -//============================================================ -// functions -//============================================================ -void rtl8192c_init_dm_priv(IN PADAPTER Adapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); - -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - _init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , dm_SW_AntennaSwitchCallback, Adapter); -#endif -} - -void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - _cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); -#endif -} -#ifdef CONFIG_HW_ANTENNA_DIVERSITY -void dm_InitHybridAntDiv(IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) - return; - - //Set OFDM HW RX Antenna Diversity - PHY_SetBBReg(Adapter,0xc50, BIT7, 1); //Enable Hardware antenna switch - PHY_SetBBReg(Adapter,0x870, BIT9|BIT8, 0); //Enable hardware control of "ANT_SEL" & "ANT_SELB" - PHY_SetBBReg(Adapter,0xCA4, BIT11, 0); //Switch to another antenna by checking pwdb threshold - PHY_SetBBReg(Adapter,0xCA4, 0x7FF, 0x080); //Pwdb threshold=8dB - PHY_SetBBReg(Adapter,0xC54, BIT23, 1); //Decide final antenna by comparing 2 antennas' pwdb - PHY_SetBBReg(Adapter,0x874, BIT23, 0); //No update ANTSEL during GNT_BT=1 - PHY_SetBBReg(Adapter,0x80C, BIT21, 1); //TX atenna selection from tx_info - //Set CCK HW RX Antenna Diversity - PHY_SetBBReg(Adapter,0xA00, BIT15, 1);//Enable antenna diversity - PHY_SetBBReg(Adapter,0xA0C, BIT4, 0); //Antenna diversity decision period = 32 sample - PHY_SetBBReg(Adapter,0xA0C, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 - PHY_SetBBReg(Adapter,0xA10, BIT13, 1); //polarity ana_A=1 and ana_B=0 - PHY_SetBBReg(Adapter,0xA14, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) - - pHalData->CCK_Ant1_Cnt = 0; - pHalData->CCK_Ant2_Cnt = 0; - pHalData->OFDM_Ant1_Cnt = 0; - pHalData->OFDM_Ant2_Cnt = 0; -} - - -#define RxDefaultAnt1 0x65a9 -#define RxDefaultAnt2 0x569a - -void dm_SelectRXDefault(IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) - return; - - //DbgPrint(" Ant1_Cnt=%d, Ant2_Cnt=%d\n", pHalData->Ant1_Cnt, pHalData->Ant2_Cnt); - //DBG_8192C(" CCK_Ant1_Cnt = %d, CCK_Ant2_Cnt = %d\n", pHalData->CCK_Ant1_Cnt, pHalData->CCK_Ant2_Cnt); - //DBG_8192C(" OFDM_Ant1_Cnt = %d, OFDM_Ant2_Cnt = %d\n", pHalData->OFDM_Ant1_Cnt, pHalData->OFDM_Ant2_Cnt); - if((pHalData->OFDM_Ant1_Cnt == 0) && (pHalData->OFDM_Ant2_Cnt == 0)) - { - if((pHalData->CCK_Ant1_Cnt + pHalData->CCK_Ant2_Cnt) >=10 ) - { - if(pHalData->CCK_Ant1_Cnt > (5*pHalData->CCK_Ant2_Cnt)) - { - DBG_8192C(" RX Default = Ant1\n"); - PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); - } - else if(pHalData->CCK_Ant2_Cnt > (5*pHalData->CCK_Ant1_Cnt)) - { - DBG_8192C(" RX Default = Ant2\n"); - PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); - } - else if(pHalData->CCK_Ant1_Cnt > pHalData->CCK_Ant2_Cnt) - { - DBG_8192C(" RX Default = Ant2\n"); - PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); - } - else - { - DBG_8192C(" RX Default = Ant1\n"); - PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); - } - pHalData->CCK_Ant1_Cnt = 0; - pHalData->CCK_Ant2_Cnt = 0; - pHalData->OFDM_Ant1_Cnt = 0; - pHalData->OFDM_Ant2_Cnt = 0; - } - } - else - { - if(pHalData->OFDM_Ant1_Cnt > pHalData->OFDM_Ant2_Cnt) - { - DBG_8192C(" RX Default = Ant1\n"); - PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); - } - else - { - DBG_8192C(" RX Default = Ant2\n"); - PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); - } - pHalData->CCK_Ant1_Cnt = 0; - pHalData->CCK_Ant2_Cnt = 0; - pHalData->OFDM_Ant1_Cnt = 0; - pHalData->OFDM_Ant2_Cnt = 0; - } - - -} - -#endif - -void -rtl8192c_InitHalDm( - IN PADAPTER Adapter - ) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u8 i; - -#ifdef CONFIG_USB_HCI - dm_InitGPIOSetting(Adapter); -#endif - - pdmpriv->DM_Type = DM_Type_ByDriver; - pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; - pdmpriv->UndecoratedSmoothedPWDB = (-1); - pdmpriv->UndecoratedSmoothedCCK = (-1); - - - //.1 DIG INIT - pdmpriv->bDMInitialGainEnable = _TRUE; - pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG; - dm_DIGInit(Adapter); - - //.2 DynamicTxPower INIT - pdmpriv->DMFlag |= DYNAMIC_FUNC_HP; - dm_InitDynamicTxPower(Adapter); - - //.3 - DM_InitEdcaTurbo(Adapter); - - //.4 RateAdaptive INIT - dm_InitRateAdaptiveMask(Adapter); - - //.5 Tx Power Tracking Init. - pdmpriv->DMFlag |= DYNAMIC_FUNC_SS; - DM_InitializeTXPowerTracking(Adapter); - -#ifdef CONFIG_BT_COEXIST - pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; - dm_InitBtCoexistDM(Adapter); -#endif - - dm_InitDynamicBBPowerSaving(Adapter); - -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; - dm_SW_AntennaSwitchInit(Adapter); -#endif - -#ifdef CONFIG_HW_ANTENNA_DIVERSITY - pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; - dm_InitHybridAntDiv(Adapter); -#endif - - dm_RSSIMonitorInit(Adapter); - - pdmpriv->DMFlag_tmp = pdmpriv->DMFlag; - - // Save REG_INIDATA_RATE_SEL value for TXDESC. - for(i = 0 ; i<32 ; i++) - { - pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f; - } -} -VOID -rtl8192c_HalDmPollingC2HEvt( - IN PADAPTER padapter - ) -{ - u8 trigger=0,evt_id=0,evt_len=0,idx=0,tmp8=0,evt_seq=0; - u8 evt_buf[15]; - - trigger=rtw_read8(padapter,REG_C2HEVT_CLEAR); - while (trigger ==0xFF) - { - tmp8=rtw_read8(padapter,REG_C2HEVT_MSG_NORMAL); - evt_id=tmp8&0xf; - evt_len=(tmp8&0xf0)>>4; - evt_seq=rtw_read8(padapter,REG_C2HEVT_MSG_NORMAL+1); - DBG_8192C(" %s evt_id =0x%x evt_len=0x%x evt_seq=0x%x\n",__FUNCTION__,evt_id,evt_len,evt_seq); - for(idx=0;idxstapriv; - struct sta_info *psta=NULL; - DBG_8192C(" %s mac_id=%d\n",__FUNCTION__,mac_id); - for(idx=0;idxsta_aid[mac_id-2+idx]; - if(psta !=NULL){ - psta->init_rate=evt_buf[idx]; - DBG_8192C(" %s mac_id=%d psta->init_rate=0x%x\n",__FUNCTION__,mac_id,psta->init_rate); - } - } - - } - default: - DBG_8192C(" %s evt_id =0x%x evt_len=0x%x\n",__FUNCTION__,evt_id,evt_len); - } - rtw_write8(padapter, REG_C2HEVT_CLEAR,0x0); - rtw_mdelay_os(1); - trigger=rtw_read8(padapter,REG_C2HEVT_CLEAR); - } - //DBG_8192C(" %s End\n",__FUNCTION__); -} -VOID -rtl8192c_HalDmWatchDog( - IN PADAPTER Adapter - ) -{ - BOOLEAN bFwCurrentInPSMode = _FALSE; - BOOLEAN bFwPSAwake = _TRUE; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - -#ifdef CONFIG_LPS - bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode; - Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); -#endif - -#ifdef CONFIG_P2P - // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. - // modifed by thomas. 2011.06.11. - if(Adapter->wdinfo.p2p_ps_enable) - bFwPSAwake = _FALSE; -#endif //CONFIG_P2P - - // Stop dynamic mechanism when: - // 1. RF is OFF. (No need to do DM.) - // 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.) - // 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM. - // Sometimes DM execution time is longer than 100ms such that the assertion - // in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by - // wating to long for RFChangeInProgress.) - // 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.) - // Noted by tynli. 2010.06.01. - //if(rfState == eRfOn) - if( (Adapter->hw_init_completed == _TRUE) - && ((!bFwCurrentInPSMode) && bFwPSAwake)) - { - // - // Calculate Tx/Rx statistics. - // - dm_CheckStatistics(Adapter); - - // - // For PWDB monitor and record some value for later use. - // - PWDB_Monitor(Adapter); - - // - // Dynamic Initial Gain mechanism. - // - - dm_RSSIMonitorCheck(Adapter); - - dm_FalseAlarmCounterStatistics(Adapter); - dm_DIG(Adapter); - - // - //Dynamic BB Power Saving Mechanism - // - dm_DynamicBBPowerSaving(Adapter); - - // - // Dynamic Tx Power mechanism. - // - dm_DynamicTxPower(Adapter); - - // - // Tx Power Tracking. - // - rtl8192c_dm_CheckTXPowerTracking(Adapter); - - // - // Rate Adaptive by Rx Signal Strength mechanism. - // - dm_RefreshRateAdaptiveMask(Adapter); - -#ifdef CONFIG_BT_COEXIST - //BT-Coexist - dm_BTCoexist(Adapter); -#endif - - // EDCA turbo - //update the EDCA paramter according to the Tx/RX mode - //update_EDCA_param(Adapter); - dm_CheckEdcaTurbo(Adapter); - - // - // Dynamically switch RTS/CTS protection. - // - //dm_CheckProtection(Adapter); - -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - // - // Software Antenna diversity - // - dm_SW_AntennaSwitch(Adapter, SWAW_STEP_PEAK); -#endif - -#ifdef CONFIG_HW_ANTENNA_DIVERSITY - //Hybrid Antenna Diversity - dm_SelectRXDefault(Adapter); -#endif - -#ifdef CONFIG_PCI_HCI - // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. - // Tx Migration settings. - //dm_InterruptMigration(Adapter); - - //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) - // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); -#endif - -#ifdef SUPPORT_64_STA - rtl8192c_HalDmPollingC2HEvt(Adapter); -#endif //SUPPORT_64_STA - // Read REG_INIDATA_RATE_SEL value for TXDESC. - if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) - { - pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f; - } - else - { - u8 i; - for(i=1 ;( i < (Adapter->stapriv.asoc_sta_count + 1))&&(i INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; - } - } - } - - // Check GPIO to determine current RF on/off and Pbc status. - // Check Hardware Radio ON/OFF or not - //if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) - //{ - //RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); - // dm_CheckRfCtrlGPIO(Adapter); - //} - -#ifdef CONFIG_PCI_HCI - if(pHalData->bGpioHwWpsPbc) -#endif - { - dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11 - } - -} - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +******************************************************************************/ +//============================================================ +// Description: +// +// This file is for 92CE/92CU dynamic mechanism only +// +// +//============================================================ + +//============================================================ +// include files +//============================================================ +#include +#include +#include +#include + +#include + +//============================================================ +// Global var +//============================================================ +static u32 EDCAParam[maxAP][3] = +{ // UL DL + {0x5ea322, 0x00a630, 0x00a44f}, //atheros AP + {0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP + {0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP + {0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP + {0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP + //{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP + {0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP + {0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP + {0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP +// {0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP +}; + + +/*----------------------------------------------------------------------------- + * Function: dm_DIGInit() + * + * Overview: Set DIG scheme init value. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * + *---------------------------------------------------------------------------*/ +static void dm_DIGInit( + IN PADAPTER pAdapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + + pDigTable->Dig_Enable_Flag = _TRUE; + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; + + pDigTable->CurIGValue = 0x20; + pDigTable->PreIGValue = 0x0; + + pDigTable->CurSTAConnectState = pDigTable->PreSTAConnectState = DIG_STA_DISCONNECT; + pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; + + pDigTable->RssiLowThresh = DM_DIG_THRESH_LOW; + pDigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; + + pDigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; + pDigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; + + + pDigTable->rx_gain_range_max = DM_DIG_MAX; + pDigTable->rx_gain_range_min = DM_DIG_MIN; + + pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; + pDigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; + pDigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; + + pDigTable->PreCCKPDState = CCK_PD_STAGE_MAX; + pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; + + pDigTable->ForbiddenIGI = DM_DIG_MIN; + pDigTable->LargeFAHit = 0; + pDigTable->Recover_cnt = 0; + pdmpriv->DIG_Dynamic_MIN = 0x25; //for FUNAI_TV +} + + +static u8 dm_initial_gain_MinPWDB( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + int Rssi_val_min = 0; + + if((pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) && + (pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ) + { + if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) + Rssi_val_min = (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)? + pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB; + else + Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; + } + else if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT || + pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) + Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; + else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) + Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + + //printk("%s CurMultiSTAConnectState(0x%02x) UndecoratedSmoothedPWDB(%d),EntryMinUndecoratedSmoothedPWDB(%d)\n" + //,__FUNCTION__,pDigTable->CurSTAConnectState, + //pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->EntryMinUndecoratedSmoothedPWDB); + + return (u8)Rssi_val_min; +} + + +static VOID +dm_FalseAlarmCounterStatistics( + IN PADAPTER Adapter + ) +{ + u32 ret_value; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); + + ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord); + FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); + + ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord); + FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); + FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); + ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord); + FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); + ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord); + FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); + FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); + + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail+ + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; + + + //hold cck counter + PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT(14), 1); + + ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0); + FalseAlmCnt->Cnt_Cck_fail = ret_value; + + ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3); + FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; + + FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Parity_Fail + + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Cck_fail); + Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all; + //reset false alarm counter registers + PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1); + PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0); + //reset cck counter + PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0); + //enable cck counter + PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2); + + //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %ld, Cnt_Rate_Illegal = %ld, Cnt_Crc8_fail = %ld, Cnt_Mcs_fail = %ld\n", + // FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) ); + //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", + // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); + //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", + // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); +} + + +static VOID +DM_Write_DIG( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%lx, PreIGValue = 0x%lx, BackoffVal = %d\n", + // DM_DigTable.CurIGValue, DM_DigTable.PreIGValue, DM_DigTable.BackoffVal)); + + if (pDigTable->Dig_Enable_Flag == _FALSE) + { + //RT_TRACE( COMP_DIG, DBG_LOUD, ("DIG is disabled\n")); + pDigTable->PreIGValue = 0x17; + return; + } + + if(pDigTable->PreIGValue != pDigTable->CurIGValue) + { + // Set initial gain. + //PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDigTable->CurIGValue); + //PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDigTable->CurIGValue); + //printk("%s DIG(0x%02x)\n",__FUNCTION__,pDigTable->CurIGValue); + PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDigTable->CurIGValue); + PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDigTable->CurIGValue); + pDigTable->PreIGValue = pDigTable->CurIGValue; + } +} + + +static VOID +dm_CtrlInitGainByFA( + IN PADAPTER pAdapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); + + u8 value_IGI = pDigTable->CurIGValue; + + if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + value_IGI --; + else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) + value_IGI += 0; + else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH2) + value_IGI ++; + else if(FalseAlmCnt->Cnt_all >= DM_DIG_FA_TH2) + value_IGI +=2; + + if(value_IGI > DM_DIG_FA_UPPER) + value_IGI = DM_DIG_FA_UPPER; + if(value_IGI < DM_DIG_FA_LOWER) + value_IGI = DM_DIG_FA_LOWER; + + if(FalseAlmCnt->Cnt_all > 10000) + value_IGI = DM_DIG_FA_UPPER; + + pDigTable->CurIGValue = value_IGI; + + DM_Write_DIG(pAdapter); + +} + +#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV +VOID dm_CtrlInitGainByRssi( IN PADAPTER pAdapter) +{ + + u32 isBT; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); + + //modify DIG upper bound + if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) + pDigTable->rx_gain_range_max = DM_DIG_MAX; + else + pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; + + //modify DIG lower bound + if((FalseAlmCnt->Cnt_all > 500)&&(pdmpriv->DIG_Dynamic_MIN < 0x25)) + pdmpriv->DIG_Dynamic_MIN++; + if((FalseAlmCnt->Cnt_all < 500)&&(pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) + pdmpriv->DIG_Dynamic_MIN--; + if((pDigTable->Rssi_val_min < 8) && (pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) + pdmpriv->DIG_Dynamic_MIN--; + + //modify DIG lower bound, deal with abnorally large false alarm + if(FalseAlmCnt->Cnt_all > 10000) + { + //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); + pDigTable->LargeFAHit++; + if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) + { + pDigTable->ForbiddenIGI = pDigTable->CurIGValue; + pDigTable->LargeFAHit = 1; + } + if(pDigTable->LargeFAHit >= 3) + { + if((pDigTable->ForbiddenIGI+1) >pDigTable->rx_gain_range_max) + pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; + else + pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); + pDigTable->Recover_cnt = 3600; //3600=2hr + } + } + else + { + //Recovery mechanism for IGI lower bound + if(pDigTable->Recover_cnt != 0){ + pDigTable->Recover_cnt --; + } + else + { + if(pDigTable->LargeFAHit == 0 ) + { + if((pDigTable->ForbiddenIGI -1) < pdmpriv->DIG_Dynamic_MIN) //DM_DIG_MIN) + { + pDigTable->ForbiddenIGI = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; + pDigTable->rx_gain_range_min = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; + } + else + { + pDigTable->ForbiddenIGI --; + pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); + } + } + else if(pDigTable->LargeFAHit == 3 ) + { + pDigTable->LargeFAHit = 0; + } + } + } + #ifdef CONFIG_USB_HCI + if(FalseAlmCnt->Cnt_all < 250) + { +#endif + //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); + + isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; + + if(!isBT){ + + if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) + { + if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) + pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; + else + pDigTable->BackoffVal -= 2; + } + else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) + { + if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) + pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; + else + pDigTable->BackoffVal +=2; + } + } + else + pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; + + pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; + + //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); +#ifdef CONFIG_USB_HCI + } + else + { + //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); + //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); + + //Adjust initial gain by false alarm + if(FalseAlmCnt->Cnt_all > 1000) + pDigTable->CurIGValue = pDigTable ->PreIGValue+2; + else if (FalseAlmCnt->Cnt_all > 750) + pDigTable->CurIGValue = pDigTable->PreIGValue+1; + else if(FalseAlmCnt->Cnt_all < 500) + pDigTable->CurIGValue = pDigTable->PreIGValue-1; + } +#endif + + //Check initial gain by upper/lower bound + if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) + pDigTable->CurIGValue = pDigTable->rx_gain_range_max; + + if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) + pDigTable->CurIGValue = pDigTable->rx_gain_range_min; + + //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, + // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); + //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); + + DM_Write_DIG(pAdapter); + +} +#else +static VOID dm_CtrlInitGainByRssi(IN PADAPTER pAdapter) +{ + u32 isBT; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); + + //modify DIG upper bound + if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) + pDigTable->rx_gain_range_max = DM_DIG_MAX; + else + pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; + //printk("%s Rssi_val_min(0x%02x),rx_gain_range_max(0x%02x)\n",__FUNCTION__,pDigTable->Rssi_val_min,pDigTable->rx_gain_range_max); + + //modify DIG lower bound, deal with abnorally large false alarm + if(FalseAlmCnt->Cnt_all > 10000) + { + //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); + + pDigTable->LargeFAHit++; + if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) + { + pDigTable->ForbiddenIGI = pDigTable->CurIGValue; + pDigTable->LargeFAHit = 1; + } + + if(pDigTable->LargeFAHit >= 3) + { + if((pDigTable->ForbiddenIGI+1) > pDigTable->rx_gain_range_max) + pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; + else + pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); + pDigTable->Recover_cnt = 3600; //3600=2hr + } + } + else + { + //Recovery mechanism for IGI lower bound + if(pDigTable->Recover_cnt != 0) + pDigTable->Recover_cnt --; + else + { + if(pDigTable->LargeFAHit == 0 ) + { + if((pDigTable->ForbiddenIGI -1) < DM_DIG_MIN) + { + pDigTable->ForbiddenIGI = DM_DIG_MIN; + pDigTable->rx_gain_range_min = DM_DIG_MIN; + } + else + { + pDigTable->ForbiddenIGI --; + pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); + } + } + else if(pDigTable->LargeFAHit == 3 ) + { + pDigTable->LargeFAHit = 0; + } + } + } + + //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",pDigTable->ForbiddenIGI, pDigTable->LargeFAHit)); + //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",pDigTable->rx_gain_range_max, pDigTable->rx_gain_range_min)); + +#ifdef CONFIG_USB_HCI + if(FalseAlmCnt->Cnt_all < 250) + { +#endif + //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); + + isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; + + if(!isBT){ + + if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) + { + if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) + pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; + else + pDigTable->BackoffVal -= 2; + } + else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) + { + if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) + pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; + else + pDigTable->BackoffVal +=2; + } + } + else + pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; + + pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; + + //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); +#ifdef CONFIG_USB_HCI + } + else + { + //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); + //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); + + //Adjust initial gain by false alarm + if(FalseAlmCnt->Cnt_all > 1000) + pDigTable->CurIGValue = pDigTable ->PreIGValue+2; + else if (FalseAlmCnt->Cnt_all > 750) + pDigTable->CurIGValue = pDigTable->PreIGValue+1; + else if(FalseAlmCnt->Cnt_all < 500) + pDigTable->CurIGValue = pDigTable->PreIGValue-1; + } +#endif + + //Check initial gain by upper/lower bound + if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) + pDigTable->CurIGValue = pDigTable->rx_gain_range_max; + + if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) + pDigTable->CurIGValue = pDigTable->rx_gain_range_min; + + //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, + // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); + //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); + + DM_Write_DIG(pAdapter); + +} +#endif + +static VOID +dm_initial_gain_Multi_STA( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + int rssi_strength = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + BOOLEAN bMulti_STA = _FALSE; + + //ADHOC and AP Mode + if(check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + bMulti_STA = _TRUE; + } + + + if((bMulti_STA == _FALSE) + || (pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT)) + { + pdmpriv->binitialized = _FALSE; + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; + return; + } + else if(pdmpriv->binitialized == _FALSE) + { + pdmpriv->binitialized = _TRUE; + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; + pDigTable->CurIGValue = 0x20; + DM_Write_DIG(pAdapter); + } + + // Initial gain control by ap mode + if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) + { + if ( (rssi_strength < pDigTable->RssiLowThresh) && + (pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_1)) + { + // Set to dig value to 0x20 for Luke's opinion after disable dig + if(pDigTable->Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_2) + { + pDigTable->CurIGValue = 0x20; + DM_Write_DIG(pAdapter); + } + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_1; + } + else if (rssi_strength > pDigTable->RssiHighThresh) + { + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_2; + dm_CtrlInitGainByFA(pAdapter); + } + } + else if(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_0) + { + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; + pDigTable->CurIGValue = 0x20; + DM_Write_DIG(pAdapter); + } + + //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurMultiSTAConnectState = %x Dig_Ext_Port_Stage %x\n", + // DM_DigTable.CurMultiSTAConnectState, DM_DigTable.Dig_Ext_Port_Stage)); +} + +static VOID +dm_initial_gain_STA_beforelinked( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &(pdmpriv->FalseAlmCnt); + + //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); + //2012.03.30 LukeLee: enable DIG before link but with very high thresholds + if(pFalseAlmCnt->Cnt_all > 10000) + pDigTable->CurIGValue = pDigTable->CurIGValue + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; + else if (pFalseAlmCnt->Cnt_all > 8000) + pDigTable->CurIGValue = pDigTable->CurIGValue + 1;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < 500) + pDigTable->CurIGValue = pDigTable->CurIGValue - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + + //Check initial gain by upper/lower bound + if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) + pDigTable->CurIGValue = pDigTable->rx_gain_range_max; + + if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) + pDigTable->CurIGValue = pDigTable->rx_gain_range_min; + + printk("%s ==> FalseAlmCnt->Cnt_all:%d CurIGValue:0x%02x \n",__FUNCTION__,pFalseAlmCnt->Cnt_all ,pDigTable->CurIGValue); +} + +static VOID +dm_initial_gain_STA( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + //RT_TRACE( COMP_DIG, DBG_LOUD, ("PreSTAConnectState = %x, CurSTAConnectState = %x\n", + // DM_DigTable.PreSTAConnectState, DM_DigTable.CurSTAConnectState)); + + + if(pDigTable->PreSTAConnectState == pDigTable->CurSTAConnectState|| + pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT || + pDigTable->CurSTAConnectState == DIG_STA_CONNECT) + { + // beforeconnect -> beforeconnect or connect -> connect + // (dis)connect -> beforeconnect + // disconnect -> connecct or beforeconnect -> connect + if(pDigTable->CurSTAConnectState != DIG_STA_DISCONNECT) + { + pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); + dm_CtrlInitGainByRssi(pAdapter); + } +#ifdef CONFIG_IOCTL_CFG80211 + else if((wdev_to_priv(pAdapter->rtw_wdev))->p2p_enabled == _TRUE) + { + pDigTable->CurIGValue = 0x30; + DM_Write_DIG(pAdapter); + } +#endif + else{ // pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT + #ifdef CONFIG_BEFORE_LINKED_DIG + //printk("%s==> ##1 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue ); + dm_initial_gain_STA_beforelinked(pAdapter); + DM_Write_DIG(pAdapter); + #endif + } + } + else + { + // connect -> disconnect or beforeconnect -> disconnect + pDigTable->Rssi_val_min = 0; + pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; + pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; + pDigTable->CurIGValue = 0x20; + pDigTable->PreIGValue = 0; + + #ifdef CONFIG_BEFORE_LINKED_DIG + //printk("%s==> ##2 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue ); + dm_initial_gain_STA_beforelinked(pAdapter); + #endif + + DM_Write_DIG(pAdapter); + } + +} + + +static void dm_CCK_PacketDetectionThresh( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT) + { + pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); + if(pDigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi) + { + if(pDigTable->Rssi_val_min <= 25) + pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; + else + pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; + } + else{ + if(pDigTable->Rssi_val_min <= 20) + pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; + else + pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; + } + } + else + pDigTable->CurCCKPDState=CCK_PD_STAGE_MAX; + + if(pDigTable->PreCCKPDState != pDigTable->CurCCKPDState) + { + if((pDigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)|| + (pDigTable->CurCCKPDState == CCK_PD_STAGE_MAX)) + { + PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83); + + //PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40); + //if(IS_92C_SERIAL(pHalData->VersionID)) + //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7); + } + else + { + PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd); + //PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47); + //if(IS_92C_SERIAL(pHalData->VersionID)) + //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3); + } + + pDigTable->PreCCKPDState = pDigTable->CurCCKPDState; + } + + //RT_TRACE( COMP_DIG, DBG_LOUD, ("CCKPDStage=%x\n",pDigTable->CurCCKPDState)); + //RT_TRACE( COMP_DIG, DBG_LOUD, ("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID))); + +} + + +static void +dm_CtrlInitGainByTwoPort( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) + return; + + // Decide the current status and if modify initial gain or not + if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) + { + pDigTable->CurSTAConnectState = DIG_STA_BEFORE_CONNECT; + } + else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) + { + pDigTable->CurSTAConnectState = DIG_STA_CONNECT; + } + else + { + pDigTable->CurSTAConnectState = DIG_STA_DISCONNECT; + } + + + pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; + if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + if((is_IBSS_empty(pAdapter)==_FAIL) && (pAdapter->stapriv.asoc_sta_count > 2)) + pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; + } + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) + { + if(pAdapter->stapriv.asoc_sta_count > 2) + pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; + } + + + dm_initial_gain_STA(pAdapter); + dm_initial_gain_Multi_STA(pAdapter); + dm_CCK_PacketDetectionThresh(pAdapter); + + pDigTable->PreSTAConnectState = pDigTable->CurSTAConnectState; + +} + + +static void dm_DIG( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + //RTPRINT(FDM, DM_Monitor, ("dm_DIG() ==>\n")); + + if(pdmpriv->bDMInitialGainEnable == _FALSE) + return; + + //if(pDigTable->Dig_Enable_Flag == _FALSE) + // return; + + if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG)) + return; + + //RTPRINT(FDM, DM_Monitor, ("dm_DIG() progress \n")); + + dm_CtrlInitGainByTwoPort(pAdapter); + + //RTPRINT(FDM, DM_Monitor, ("dm_DIG() <==\n")); +} + +static void dm_SavePowerIndex(IN PADAPTER Adapter) +{ + u8 index; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + + for(index = 0; index< 6; index++) + pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); +} + +static void dm_RestorePowerIndex(IN PADAPTER Adapter) +{ + u8 index; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + + for(index = 0; index< 6; index++) + rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); +} + +static void dm_WritePowerIndex( + IN PADAPTER Adapter, + IN u8 Value) +{ + u8 index; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + + for(index = 0; index< 6; index++) + rtw_write8(Adapter, Power_Index_REG[index], Value); +} + +static void dm_InitDynamicTxPower(IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType == BOARD_USB_High_PA) + { + dm_SavePowerIndex(Adapter); + pdmpriv->bDynamicTxPowerEnable = _TRUE; + } + else +#else + pdmpriv->bDynamicTxPowerEnable = _FALSE; +#endif + + pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; +} + + +static void dm_DynamicTxPower(IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + int UndecoratedSmoothedPWDB; + + if(!pdmpriv->bDynamicTxPowerEnable) + return; + + // If dynamic high power is disabled. + if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + return; + } + + // STA not connected and AP not connected + if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port + { + //todo: AP Mode + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + + if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal + dm_RestorePowerIndex(Adapter); + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + dm_WritePowerIndex(Adapter, 0x14); + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + dm_WritePowerIndex(Adapter, 0x10); + } + pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; + +} + + +static VOID +DM_ChangeDynamicInitGainThresh( + IN PADAPTER pAdapter, + IN u32 DM_Type, + IN u32 DM_Value) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DIG_T *pDigTable = &pdmpriv->DM_DigTable; + + if (DM_Type == DIG_TYPE_THRESH_HIGH) + { + pDigTable->RssiHighThresh = DM_Value; + } + else if (DM_Type == DIG_TYPE_THRESH_LOW) + { + pDigTable->RssiLowThresh = DM_Value; + } + else if (DM_Type == DIG_TYPE_ENABLE) + { + pDigTable->Dig_Enable_Flag = _TRUE; + } + else if (DM_Type == DIG_TYPE_DISABLE) + { + pDigTable->Dig_Enable_Flag = _FALSE; + } + else if (DM_Type == DIG_TYPE_BACKOFF) + { + if(DM_Value > 30) + DM_Value = 30; + pDigTable->BackoffVal = (u8)DM_Value; + } + else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) + { + if(DM_Value == 0) + DM_Value = 0x1; + pDigTable->rx_gain_range_min = (u8)DM_Value; + } + else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) + { + if(DM_Value > 0x50) + DM_Value = 0x50; + pDigTable->rx_gain_range_max = (u8)DM_Value; + } +} /* DM_ChangeDynamicInitGainThresh */ + + +static VOID PWDB_Monitor( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + int i; + int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; + u8 sta_cnt=0; + u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi + + if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED) != _TRUE) + return; + + + if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + _irqL irqL; + _list *plist, *phead; + struct sta_info *psta; + struct sta_priv *pstapriv = &Adapter->stapriv; + u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; + + _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + + for(i=0; i< NUM_STA; i++) + { + phead = &(pstapriv->sta_hash[i]); + plist = get_next(phead); + + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); + + plist = get_next(plist); + + if(_rtw_memcmp(psta ->hwaddr, bcast_addr, ETH_ALEN) || + _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) + continue; + + if(psta->state & WIFI_ASOC_STATE) + { + + if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); + } + + } + + } + + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + + + + if(pHalData->fw_ractrl == _TRUE) + { + // Report every sta's RSSI to FW + for(i=0; i< sta_cnt; i++) + { + rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); + } + } + + } + + + + if(tmpEntryMaxPWDB != 0) // If associated entry is found + { + pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; + } + else + { + pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; + } + + if(tmpEntryMinPWDB != 0xff) // If associated entry is found + { + pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + } + else + { + pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; + } + + + if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) + { + + if(pHalData->fw_ractrl == _TRUE) + { + u32 param = (u32)(pdmpriv->UndecoratedSmoothedPWDB<<16); + + param |= 0;//macid=0 for sta mode; + + rtl8192c_set_rssi_cmd(Adapter, (u8*)¶m); + } + } + +} + + +static void +DM_InitEdcaTurbo( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + pHalData->bCurrentTurboEDCA = _FALSE; + Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE; + +} + + +static void +dm_CheckEdcaTurbo( + IN PADAPTER Adapter + ) +{ + u32 trafficIndex; + u32 edca_param; + u64 cur_tx_bytes = 0; + u64 cur_rx_bytes = 0; + u8 bbtchange = _FALSE; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); + struct recv_priv *precvpriv = &(Adapter->recvpriv); + struct registry_priv *pregpriv = &Adapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); +#endif + + + if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) + { + goto dm_CheckEdcaTurbo_EXIT; + } + + if (pmlmeinfo->assoc_AP_vendor >= maxAP) + { + goto dm_CheckEdcaTurbo_EXIT; + } + +#ifdef CONFIG_BT_COEXIST + if(pbtpriv->BT_Coexist) + { + if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) + { + bbtchange = _TRUE; + } + } +#endif + + // Check if the status needs to be changed. + if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) + { + cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; + cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; + + //traffic, TX or RX + if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) + { + if (cur_tx_bytes > (cur_rx_bytes << 2)) + { // Uplink TP is present. + trafficIndex = UP_LINK; + } + else + { // Balance TP is present. + trafficIndex = DOWN_LINK; + } + } + else + { + if (cur_rx_bytes > (cur_tx_bytes << 2)) + { // Downlink TP is present. + trafficIndex = DOWN_LINK; + } + else + { // Balance TP is present. + trafficIndex = UP_LINK; + } + } + + if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA)) + { +#ifdef CONFIG_BT_COEXIST + if(_TRUE == bbtchange) + { + edca_param = pbtpriv->BT_EDCA[trafficIndex]; + } + else +#endif + { +#if 0 + //adjust EDCA parameter for BE queue + edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; +#else + + if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) + { + edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; + } + else + { + edca_param = EDCAParam[unknownAP][trafficIndex]; + } +#endif + } + +#ifdef CONFIG_PCI_HCI + if(IS_92C_SERIAL(pHalData->VersionID)) + { + edca_param = 0x60a42b; + } + else + { + edca_param = 0x6ea42b; + } +#endif + if(Adapter->registrypriv.intel_class_mode==1) + edca_param=0xa44f; + rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); + + pdmpriv->prv_traffic_idx = trafficIndex; + } + + pHalData->bCurrentTurboEDCA = _TRUE; + } + else + { + // + // Turn Off EDCA turbo here. + // Restore original EDCA according to the declaration of AP. + // + if(pHalData->bCurrentTurboEDCA) + { + rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); + pHalData->bCurrentTurboEDCA = _FALSE; + } + } + +dm_CheckEdcaTurbo_EXIT: + // Set variables for next time. + precvpriv->bIsAnyNonBEPkts = _FALSE; + pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; + precvpriv->last_rx_bytes = precvpriv->rx_bytes; + +} + +#define DPK_DELTA_MAPPING_NUM 13 +#define index_mapping_HP_NUM 15 +//091212 chiyokolin +static VOID +dm_TXPowerTrackingCallback_ThermalMeter_92C( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100, ThermalValue_HP_count = 0; + u32 ThermalValue_HP = 0; + s8 delta_DPK; + int ele_A, ele_D, TempCCk, X, value32; + int Y, ele_C; + s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0, delta_APK; + int i = 0, CCKSwingNeedUpdate = 0; + BOOLEAN is2T = IS_92C_SERIAL(pHalData->VersionID); +#if 0 +//#ifdef CONFIG_MP_INCLUDED + PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); + pu1Byte TxPwrLevel = pMptCtx->TxPwrLevel; +#endif + + u8 OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur + u32 DPK_delta_mapping[2][DPK_DELTA_MAPPING_NUM] = { + {0x1c, 0x1c, 0x1d, 0x1d, 0x1e, + 0x1f, 0x00, 0x00, 0x01, 0x01, + 0x02, 0x02, 0x03}, + {0x1c, 0x1d, 0x1e, 0x1e, 0x1e, + 0x1f, 0x00, 0x00, 0x01, 0x02, + 0x02, 0x03, 0x03}}; + + s8 index_mapping_HP[index_mapping_HP_NUM] = { + 0, 1, 3, 4, 6, + 7, 9, 10, 12, 13, + 15, 16, 18, 19, 21 + }; + + s8 index_HP; + + pdmpriv->TXPowerTrackingCallbackCnt++; //cosa add for debug + pdmpriv->bTXPowerTrackingInit = _TRUE; + + if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14) + pdmpriv->bCCKinCH14 = _TRUE; + else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14) + pdmpriv->bCCKinCH14 = _FALSE; + + //DBG_8192C("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); + + ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF90_PATH_A, RF_T_METER, 0x1f); // 0x24: RF Reg[4:0] + + //DBG_8192C("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue, pHalData->EEPROMThermalMeter); + + rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter)); + rtl8192c_PHY_DigitalPredistortion(Adapter); + + if(is2T) + rf = 2; + else + rf = 1; + + if(ThermalValue) + { +// if(!pHalData->ThermalValue) + { + //Query OFDM path A default setting + ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; + for(i=0; ibCCKinCH14) + { + if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE) + { + CCK_index_old =(u8)i; + //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); + break; + } + } + else + { + if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE) + { + CCK_index_old =(u8)i; + //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); + break; + } + } + } + + if(!pdmpriv->ThermalValue) + { + pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter; + pdmpriv->ThermalValue_LCK = ThermalValue; + pdmpriv->ThermalValue_IQK = ThermalValue; + pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter; + +#ifdef CONFIG_USB_HCI + for(i = 0; i < rf; i++) + pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i]; + pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old; +#else + for(i = 0; i < rf; i++) + pdmpriv->OFDM_index[i] = OFDM_index_old[i]; + pdmpriv->CCK_index = CCK_index_old; +#endif + } + +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType == BOARD_USB_High_PA) + { + pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue; + pdmpriv->ThermalValue_HP_index++; + if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM) + pdmpriv->ThermalValue_HP_index = 0; + + for(i = 0; i < HP_THERMAL_NUM; i++) + { + if(pdmpriv->ThermalValue_HP[i]) + { + ThermalValue_HP += pdmpriv->ThermalValue_HP[i]; + ThermalValue_HP_count++; + } + } + + if(ThermalValue_HP_count) + ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count); + } +#endif + } + + delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType == BOARD_USB_High_PA) + { + if(pdmpriv->bDoneTxpower) + delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); + else + delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); + } + else +#endif + { + delta_HP = 0; + } + delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue); + delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue); + delta_DPK = pdmpriv->ThermalValue_DPK - ThermalValue; + + //DBG_8192C("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK); + + if(delta_LCK > 1) + { + pdmpriv->ThermalValue_LCK = ThermalValue; + rtl8192c_PHY_LCCalibrate(Adapter); + } + + if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl) + { +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType == BOARD_USB_High_PA) + { + pdmpriv->bDoneTxpower = _TRUE; + delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); + + if(delta_HP > index_mapping_HP_NUM-1) + index_HP = index_mapping_HP[index_mapping_HP_NUM-1]; + else + index_HP = index_mapping_HP[delta_HP]; + + if(ThermalValue > pHalData->EEPROMThermalMeter) //set larger Tx power + { + for(i = 0; i < rf; i++) + OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP; + CCK_index = pdmpriv->CCK_index_HP -index_HP; + } + else + { + for(i = 0; i < rf; i++) + OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP; + CCK_index = pdmpriv->CCK_index_HP + index_HP; + } + + delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); + + } + else +#endif + { + if(ThermalValue > pdmpriv->ThermalValue) + { + for(i = 0; i < rf; i++) + pdmpriv->OFDM_index[i] -= delta; + + pdmpriv->CCK_index -= delta; + } + else + { + for(i = 0; i < rf; i++) + pdmpriv->OFDM_index[i] += delta; + + pdmpriv->CCK_index += delta; + } + } + + /* + if(is2T) + { + DBG_8192C("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", + pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index); + } + else + { + //DBG_8192C("temp OFDM_A_index=0x%x, CCK_index=0x%x\n",pdmpriv->OFDM_index[0], pdmpriv->CCK_index); + } + */ + + //no adjust +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType != BOARD_USB_High_PA) +#endif + { + if(ThermalValue > pHalData->EEPROMThermalMeter) + { + for(i = 0; i < rf; i++) + OFDM_index[i] = pdmpriv->OFDM_index[i]+1; + CCK_index = pdmpriv->CCK_index+1; + } + else + { + for(i = 0; i < rf; i++) + OFDM_index[i] = pdmpriv->OFDM_index[i]; + CCK_index = pdmpriv->CCK_index; + } +#if 0 +//#ifdef CONFIG_MP_INCLUDED + for(i = 0; i < rf; i++) + { + if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) + { + if(ThermalValue > pHalData->EEPROMThermalMeter) + { + if (delta < 5) + OFDM_index[i] -= 1; + else + OFDM_index[i] -= 2; + } + else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) + { + OFDM_index[i] += 1; + } + } + else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) + { + if (delta < 5) + OFDM_index[i] -= 1; + else + OFDM_index[i] -= 2; + } + else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) + { + OFDM_index[i] -= 1; + } + } + + { + if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) + { + if(ThermalValue > pHalData->EEPROMThermalMeter) + { + if (delta < 5) + CCK_index -= 1; + else + CCK_index -= 2; + } + else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) + { + CCK_index += 1; + } + } + else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) + { + if (delta < 5) + CCK_index -= 1; + else + CCK_index -= 2; + } + else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) + { + CCK_index -= 1; + } + } +#endif + } + + for(i = 0; i < rf; i++) + { + if(OFDM_index[i] > OFDM_TABLE_SIZE-1) + OFDM_index[i] = OFDM_TABLE_SIZE-1; + else if (OFDM_index[i] < OFDM_min_index) + OFDM_index[i] = OFDM_min_index; + } + + if(CCK_index > CCK_TABLE_SIZE-1) + CCK_index = CCK_TABLE_SIZE-1; + else if (CCK_index < 0) + CCK_index = 0; + + /* + if(is2T) + { + DBG_8192C("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], OFDM_index[1], CCK_index); + } + else + { + //DBG_8192C("new OFDM_A_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], CCK_index); + } + */ + + } + + if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) + { + //Adujst OFDM Ant_A according to IQK result + ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22; + X = pdmpriv->RegE94; + Y = pdmpriv->RegE9C; + + if(X != 0) + { + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + ele_A = ((X * ele_D)>>8)&0x000003FF; + + //new element C = element D x Y + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + ele_C = ((Y * ele_D)>>8)&0x000003FF; + + //wirte new elements A, C, D to regC80 and regC94, element B is always 0 + value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; + PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); + + value32 = (ele_C&0x000003C0)>>6; + PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); + + value32 = ((X * ele_D)>>7)&0x01; + PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32); + + value32 = ((Y * ele_D)>>7)&0x01; + PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32); + + } + else + { + PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[0]]); + PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); + PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00); + } + + //RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D)); + + //Adjust CCK according to IQK result + if(!pdmpriv->bCCKinCH14){ + rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][0]); + rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][1]); + rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][2]); + rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][3]); + rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][4]); + rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][5]); + rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][6]); + rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][7]); + } + else{ + rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[(u8)CCK_index][0]); + rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[(u8)CCK_index][1]); + rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[(u8)CCK_index][2]); + rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[(u8)CCK_index][3]); + rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[(u8)CCK_index][4]); + rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[(u8)CCK_index][5]); + rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[(u8)CCK_index][6]); + rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[(u8)CCK_index][7]); + } + + if(is2T) + { + ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22; + + //new element A = element D x X + X = pdmpriv->RegEB4; + Y = pdmpriv->RegEBC; + + if(X != 0){ + if ((X & 0x00000200) != 0) //consider minus + X = X | 0xFFFFFC00; + ele_A = ((X * ele_D)>>8)&0x000003FF; + + //new element C = element D x Y + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + ele_C = ((Y * ele_D)>>8)&0x00003FF; + + //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 + value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; + PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); + + value32 = (ele_C&0x000003C0)>>6; + PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); + + value32 = ((X * ele_D)>>7)&0x01; + PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32); + + value32 = ((Y * ele_D)>>7)&0x01; + PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32); + + } + else{ + PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); + PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); + PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00); + } + + //DBG_8192C("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D); + } + + /* + DBG_8192C("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \ + PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\ + PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \ + PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x24, bMaskDWord)); + */ + } + +#if MP_DRIVER == 1 + if(delta_IQK > 1) +#else + if(delta_IQK > 3) +#endif + { + pdmpriv->ThermalValue_IQK = ThermalValue; + rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); + } + + if(delta_DPK != 0) + { + delta_DPK = ThermalValue - pHalData->EEPROMThermalMeter; + + //if(pdmpriv->bDPPathAOK || pdmpriv->bDPPathBOK) + // DBG_8192C("TxPwrTracking delata_DPK = %d\n", delta_DPK); + + if(pdmpriv->bDPPathAOK) + PHY_SetBBReg(Adapter, 0xb68, 0x7c00, DPK_delta_mapping[0][((delta_DPK+13)/2)]); + if(pdmpriv->bDPPathBOK) + PHY_SetBBReg(Adapter, 0xb6c, 0x7c00, DPK_delta_mapping[1][((delta_DPK+13)/2)]); + pdmpriv->ThermalValue_DPK = ThermalValue; + } + + //update thermal meter value + if(pdmpriv->TxPowerTrackControl) + pdmpriv->ThermalValue = ThermalValue; + + } + + //DBG_8192C("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); + + pdmpriv->TXPowercount = 0; + +} + + +static VOID +dm_InitializeTXPowerTracking_ThermalMeter( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + //pMgntInfo->bTXPowerTracking = _TRUE; + pdmpriv->TXPowercount = 0; + pdmpriv->bTXPowerTrackingInit = _FALSE; + pdmpriv->ThermalValue = 0; + +#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default + pdmpriv->TxPowerTrackControl = _TRUE; +#endif + + MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); +} + + +static VOID +DM_InitializeTXPowerTracking( + IN PADAPTER Adapter) +{ + dm_InitializeTXPowerTracking_ThermalMeter(Adapter); +} + +// +// Description: +// - Dispatch TxPower Tracking direct call ONLY for 92s. +// - We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource +// leakage under some platform. +// +// Assumption: +// PASSIVE_LEVEL when this routine is called. +// +// Added by Roger, 2009.06.18. +// +static VOID +DM_TXPowerTracking92CDirectCall( + IN PADAPTER Adapter) +{ + dm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter); +} + +static VOID +dm_CheckTXPowerTracking_ThermalMeter( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + //u1Byte TxPowerCheckCnt = 5; //10 sec + + //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) + if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS)) + { + return; + } + + if(!pdmpriv->TM_Trigger) //at least delay 1 sec + { + //pHalData->TxPowerCheckCnt++; //cosa add for debug + PHY_SetRFReg(Adapter, RF90_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); + //DBG_8192C("Trigger 92C Thermal Meter!!\n"); + + pdmpriv->TM_Trigger = 1; + return; + + } + else + { + //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); + DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. + pdmpriv->TM_Trigger = 0; + } + +} + + +VOID +rtl8192c_dm_CheckTXPowerTracking( + IN PADAPTER Adapter) +{ + dm_CheckTXPowerTracking_ThermalMeter(Adapter); +} + +#ifdef CONFIG_BT_COEXIST +static BOOLEAN BT_BTStateChange(PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + struct registry_priv *registry_par = &Adapter->registrypriv; + + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + u32 Polling, Ratio_Tx, Ratio_PRI; + u32 BT_Tx, BT_PRI; + u8 BT_State; + static u8 ServiceTypeCnt = 0; + u8 CurServiceType; + static u8 LastServiceType = BT_Idle; + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) + return _FALSE; + + BT_State = rtw_read8(Adapter, 0x4fd); +/* + temp = PlatformEFIORead4Byte(Adapter, 0x488); + BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); + BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); + + temp = PlatformEFIORead4Byte(Adapter, 0x48c); + Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + + ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); + +*/ + BT_Tx = rtw_read32(Adapter, 0x488); + + DBG_8192C("Ratio 0x488 =%x\n", BT_Tx); + BT_Tx =BT_Tx & 0x00ffffff; + //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); + + BT_PRI = rtw_read32(Adapter, 0x48c); + + DBG_8192C("Ratio 0x48c =%x\n", BT_PRI); + BT_PRI =BT_PRI & 0x00ffffff; + //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); + + + Polling = rtw_read32(Adapter, 0x490); + //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); + + + if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffff && BT_State==0xff) + return _FALSE; + + BT_State &= BIT0; + + if(BT_State != pbtpriv->BT_CUR_State) + { + pbtpriv->BT_CUR_State = BT_State; + + if(registry_par->bt_sco == 3) + { + ServiceTypeCnt = 0; + + pbtpriv->BT_Service = BT_Idle; + + DBG_8192C("BT_%s\n", BT_State?"ON":"OFF"); + + BT_State = BT_State | + ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |BIT2; + + rtw_write8(Adapter, 0x4fd, BT_State); + DBG_8192C("BT set 0x4fd to %x\n", BT_State); + } + + return _TRUE; + } + DBG_8192C("bRegBT_Sco = %d\n",registry_par->bt_sco); + + Ratio_Tx = BT_Tx*1000/Polling; + Ratio_PRI = BT_PRI*1000/Polling; + + pbtpriv->Ratio_Tx=Ratio_Tx; + pbtpriv->Ratio_PRI=Ratio_PRI; + + DBG_8192C("Ratio_Tx=%d\n", Ratio_Tx); + DBG_8192C("Ratio_PRI=%d\n", Ratio_PRI); + + + if(BT_State && registry_par->bt_sco==3) + { + DBG_8192C("bt_sco ==3 Follow Counter\n"); +// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) +// { +// ServiceTypeCnt = 0; +// return FALSE; +// } +// else + { + /* + Ratio_Tx = BT_Tx*1000/Polling; + Ratio_PRI = BT_PRI*1000/Polling; + + pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; + pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; + + RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); + RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); + + */ + if((Ratio_Tx < 30) && (Ratio_PRI < 30)) + CurServiceType = BT_Idle; + else if((Ratio_PRI > 110) && (Ratio_PRI < 250)) + CurServiceType = BT_SCO; + else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) + CurServiceType = BT_Busy; + else if((Ratio_Tx >=350) && (Ratio_Tx < 500)) + CurServiceType = BT_OtherBusy; + else if(Ratio_Tx >=500) + CurServiceType = BT_PAN; + else + CurServiceType=BT_OtherAction; + } + +/* if(pHalData->bt_coexist.bStopCount) + { + ServiceTypeCnt=0; + pHalData->bt_coexist.bStopCount=FALSE; + } +*/ +// if(CurServiceType == BT_OtherBusy) + { + ServiceTypeCnt=2; + LastServiceType=CurServiceType; + } +#if 0 + else if(CurServiceType == LastServiceType) + { + if(ServiceTypeCnt<3) + ServiceTypeCnt++; + } + else + { + ServiceTypeCnt = 0; + LastServiceType = CurServiceType; + } +#endif + + if(ServiceTypeCnt==2) + { + pbtpriv->BT_Service = LastServiceType; + BT_State = BT_State | + ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | + //((pbtpriv->BT_Service==BT_SCO)?0:BIT2); + ((pbtpriv->BT_Service!=BT_Idle)?0:BIT2); + + //if(pbtpriv->BT_Service==BT_Busy) + // BT_State&= ~(BIT2); + + if(pbtpriv->BT_Service==BT_SCO) + { + DBG_8192C("BT TYPE Set to ==> BT_SCO\n"); + } + else if(pbtpriv->BT_Service==BT_Idle) + { + DBG_8192C("BT TYPE Set to ==> BT_Idle\n"); + } + else if(pbtpriv->BT_Service==BT_OtherAction) + { + DBG_8192C("BT TYPE Set to ==> BT_OtherAction\n"); + } + else if(pbtpriv->BT_Service==BT_Busy) + { + DBG_8192C("BT TYPE Set to ==> BT_Busy\n"); + } + else if(pbtpriv->BT_Service==BT_PAN) + { + DBG_8192C("BT TYPE Set to ==> BT_PAN\n"); + } + else + { + DBG_8192C("BT TYPE Set to ==> BT_OtherBusy\n"); + } + + //Add interrupt migration when bt is not in idel state (no traffic). + //suggestion by Victor. + if(pbtpriv->BT_Service!=BT_Idle)//EDCA_VI_PARAM modify + { + + rtw_write16(Adapter, 0x504, 0x0ccc); + rtw_write8(Adapter, 0x506, 0x54); + rtw_write8(Adapter, 0x507, 0x54); + + } + else + { + rtw_write8(Adapter, 0x506, 0x00); + rtw_write8(Adapter, 0x507, 0x00); + } + + rtw_write8(Adapter, 0x4fd, BT_State); + DBG_8192C("BT_SCO set 0x4fd to %x\n", BT_State); + return _TRUE; + } + } + + return _FALSE; + +} + +static BOOLEAN +BT_WifiConnectChange( + IN PADAPTER Adapter + ) +{ + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); +// PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + static BOOLEAN bMediaConnect = _FALSE; + + //if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) + if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) + { + bMediaConnect = _FALSE; + } + else + { + if(!bMediaConnect) + { + bMediaConnect = _TRUE; + return _TRUE; + } + bMediaConnect = _TRUE; + } + + return _FALSE; +} + +#define BT_RSSI_STATE_NORMAL_POWER BIT0 +#define BT_RSSI_STATE_AMDPU_OFF BIT1 +#define BT_RSSI_STATE_SPECIAL_LOW BIT2 +#define BT_RSSI_STATE_BG_EDCA_LOW BIT3 + +static s32 GET_UNDECORATED_AVERAGE_RSSI(PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + s32 average_rssi; + + if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) + { + average_rssi = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + } + else + { + average_rssi = pdmpriv->UndecoratedSmoothedPWDB; + } + return average_rssi; +} + +static u8 BT_RssiStateChange( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + s32 UndecoratedSmoothedPWDB; + u8 CurrBtRssiState = 0x00; + + + + + //if(pMgntInfo->bMediaConnect) // Default port + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) + { + UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(Adapter); + } + else // associated entry pwdb + { + if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0) + UndecoratedSmoothedPWDB = 100; // No any RSSI information. Assume to be MAX. + else + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + } + + // Check RSSI to determine HighPower/NormalPower state for BT coexistence. + if(UndecoratedSmoothedPWDB >= 67) + CurrBtRssiState &= (~BT_RSSI_STATE_NORMAL_POWER); + else if(UndecoratedSmoothedPWDB < 62) + CurrBtRssiState |= BT_RSSI_STATE_NORMAL_POWER; + + // Check RSSI to determine AMPDU setting for BT coexistence. + if(UndecoratedSmoothedPWDB >= 40) + CurrBtRssiState &= (~BT_RSSI_STATE_AMDPU_OFF); + else if(UndecoratedSmoothedPWDB <= 32) + CurrBtRssiState |= BT_RSSI_STATE_AMDPU_OFF; + + // Marked RSSI state. It will be used to determine BT coexistence setting later. + if(UndecoratedSmoothedPWDB < 35) + CurrBtRssiState |= BT_RSSI_STATE_SPECIAL_LOW; + else + CurrBtRssiState &= (~BT_RSSI_STATE_SPECIAL_LOW); + + // Check BT state related to BT_Idle in B/G mode. + if(UndecoratedSmoothedPWDB < 15) + CurrBtRssiState |= BT_RSSI_STATE_BG_EDCA_LOW; + else + CurrBtRssiState &= (~BT_RSSI_STATE_BG_EDCA_LOW); + + if(CurrBtRssiState != pbtpriv->BtRssiState) + { + pbtpriv->BtRssiState = CurrBtRssiState; + return _TRUE; + } + else + { + return _FALSE; + } +} + +static void dm_BTCoexist(PADAPTER Adapter ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct mlme_ext_info *pmlmeinfo = &Adapter->mlmeextpriv.mlmext_info; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + //PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); + + //PRX_TS_RECORD pRxTs = NULL; + u8 BT_gpio_mux; + + BOOLEAN bWifiConnectChange, bBtStateChange,bRssiStateChange; + + if(pbtpriv->bCOBT == _FALSE) return; + + if(!( pdmpriv->DMFlag & DYNAMIC_FUNC_BT)) return; + + if( (pbtpriv->BT_Coexist) &&(pbtpriv->BT_CoexistType == BT_CSR_BC4) && (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) ) + { + bWifiConnectChange = BT_WifiConnectChange(Adapter); + bBtStateChange = BT_BTStateChange(Adapter); + bRssiStateChange = BT_RssiStateChange(Adapter); + + DBG_8192C("bWifiConnectChange %d, bBtStateChange %d,bRssiStateChange %d\n", + bWifiConnectChange,bBtStateChange,bRssiStateChange); + + // add by hpfan for debug message + BT_gpio_mux = rtw_read8(Adapter, REG_GPIO_MUXCFG); + DBG_8192C("BTCoexit Reg_0x40 (%2x)\n", BT_gpio_mux); + + if( bWifiConnectChange ||bBtStateChange ||bRssiStateChange ) + { + if(pbtpriv->BT_CUR_State) + { + + // Do not allow receiving A-MPDU aggregation. + if(pbtpriv->BT_Ampdu)// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. + { + + if(pmlmeinfo->assoc_AP_vendor == ciscoAP) + { + if(pbtpriv->BT_Service!=BT_Idle) + { + if(pmlmeinfo->bAcceptAddbaReq) + { + DBG_8192C("BT_Disallow AMPDU \n"); + pmlmeinfo->bAcceptAddbaReq = _FALSE; + send_delba(Adapter,0, get_my_bssid(&(pmlmeinfo->network))); + } + } + else + { + if(!pmlmeinfo->bAcceptAddbaReq) + { + DBG_8192C("BT_Allow AMPDU RSSI >=40\n"); + pmlmeinfo->bAcceptAddbaReq = _TRUE; + } + } + } + else + { + if(!pmlmeinfo->bAcceptAddbaReq) + { + DBG_8192C("BT_Allow AMPDU BT Idle\n"); + pmlmeinfo->bAcceptAddbaReq = _TRUE; + } + } + } + +#if 0 + else if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) + { + if(pHalData->bt_coexist.BtRssiState & BT_RSSI_STATE_AMDPU_OFF) + { + if(pMgntInfo->bBT_Ampdu && pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); + pHTInfo->bAcceptAddbaReq = FALSE; + if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) + TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); + } + } + else + { + if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); + pHTInfo->bAcceptAddbaReq = TRUE; + } + } + } + else + { + if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); + pHTInfo->bAcceptAddbaReq = TRUE; + } + } +#endif + + if(pbtpriv->BT_Ant_isolation) + { + DBG_8192C("BT_IsolationLow\n"); + +// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. +#if 0 + RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); + if(pMgntInfo->bUseRAMask) + { + // 20100407 Joseph: Fix rate adaptive modification for BT coexist. + // This fix is not complete yet. It shall also consider VWifi and Adhoc case, + // which connect with multiple STAs. + Adapter->HalFunc.UpdateHalRAMaskHandler( + Adapter, + FALSE, + 0, + NULL, + NULL, + pMgntInfo->RateAdaptive.RATRState, + RAMask_Normal); + } + else + { + Adapter->HalFunc.UpdateHalRATRTableHandler( + Adapter, + &pMgntInfo->dot11OperationalRateSet, + pMgntInfo->dot11HTOperationalRateSet,NULL); + } +#endif + + // 20100415 Joseph: Modify BT coexist mechanism suggested by Yaying. + // Now we only enable HW BT coexist when BT in "Busy" state. + if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) + { + if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && + pbtpriv->BT_Service==BT_OtherAction) + { + DBG_8192C("BT_Turn ON Coexist\n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); + } + else + { + if((pbtpriv->BT_Service==BT_Busy) && + (pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER)) + { + DBG_8192C("BT_Turn ON Coexist\n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); + } + else if((pbtpriv->BT_Service==BT_OtherAction) && + (pbtpriv->BtRssiState & BT_RSSI_STATE_SPECIAL_LOW)) + { + DBG_8192C("BT_Turn ON Coexist\n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); + } + else if(pbtpriv->BT_Service==BT_PAN) + { + DBG_8192C("BT_Turn ON Coexist\n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); + } + else + { + DBG_8192C("BT_Turn OFF Coexist\n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); + } + } + } + else + { + DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist\n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); + } + + if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) + { + if(pbtpriv->BT_Service==BT_PAN) + { + DBG_8192C("BT_Turn ON Coexist(Reg0x44 = 0x10100)\n"); + rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x10100); + } + else + { + DBG_8192C("BT_Turn OFF Coexist(Reg0x44 = 0x0)\n"); + rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); + } + } + else + { + DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist(Reg0x44 = 0x0)\n"); + rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); + } + + // 20100430 Joseph: Integrate the BT coexistence EDCA tuning here. + if(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER) + { + if(pbtpriv->BT_Service==BT_OtherBusy) + { + //pbtpriv->BtEdcaUL = 0x5ea72b; + //pbtpriv->BtEdcaDL = 0x5ea72b; + pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72b; + pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72b; + + DBG_8192C("BT in BT_OtherBusy state Tx (%d) >350 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx ,REG_EDCA_BE_PARAM, 0x5ea72b); + } + else if(pbtpriv->BT_Service==BT_Busy) + { + //pbtpriv->BtEdcaUL = 0x5eb82f; + //pbtpriv->BtEdcaDL = 0x5eb82f; + + pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82f; + pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82f; + + DBG_8192C("BT in BT_Busy state parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82f); + } + else if(pbtpriv->BT_Service==BT_SCO) + { + if(pbtpriv->Ratio_Tx>160) + { + //pbtpriv->BtEdcaUL = 0x5ea72f; + //pbtpriv->BtEdcaDL = 0x5ea72f; + pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72f; + pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72f; + DBG_8192C("BT in BT_SCO state Tx (%d) >160 parameter(0x%x) = 0x%x\n",pbtpriv->Ratio_Tx, REG_EDCA_BE_PARAM, 0x5ea72f); + } + else + { + //pbtpriv->BtEdcaUL = 0x5ea32b; + //pbtpriv->BtEdcaDL = 0x5ea42b; + + pbtpriv->BT_EDCA[UP_LINK] = 0x5ea32b; + pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea42b; + + DBG_8192C("BT in BT_SCO state Tx (%d) <160 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx,REG_EDCA_BE_PARAM, 0x5ea32f); + } + } + else + { + // BT coexistence mechanism does not control EDCA parameter. + //pbtpriv->BtEdcaUL = 0; + //pbtpriv->BtEdcaDL = 0; + + pbtpriv->BT_EDCA[UP_LINK] = 0; + pbtpriv->BT_EDCA[DOWN_LINK] = 0; + DBG_8192C("BT in State %d and parameter(0x%x) use original setting.\n",pbtpriv->BT_Service, REG_EDCA_BE_PARAM); + } + + if((pbtpriv->BT_Service!=BT_Idle) && + (pmlmeext->cur_wireless_mode == WIRELESS_MODE_G) && + (pbtpriv->BtRssiState & BT_RSSI_STATE_BG_EDCA_LOW)) + { + //pbtpriv->BtEdcaUL = 0x5eb82b; + //pbtpriv->BtEdcaDL = 0x5eb82b; + + pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82b; + pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82b; + + DBG_8192C("BT set parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82b); + } + } + else + { + // BT coexistence mechanism does not control EDCA parameter. + //pbtpriv->BtEdcaUL = 0; + //pbtpriv->BtEdcaDL = 0; + + pbtpriv->BT_EDCA[UP_LINK] = 0; + pbtpriv->BT_EDCA[DOWN_LINK] = 0; + } + + // 20100415 Joseph: Set RF register 0x1E and 0x1F for BT coexist suggested by Yaying. + if(pbtpriv->BT_Service!=BT_Idle) + { + DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf); + PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, 0xf); + //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf)); + //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, 0xf); + } + else + { + DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n",pbtpriv->BtRfRegOrigin1E); + PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); + //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); + //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); + } + } + else + { + DBG_8192C("BT_IsolationHigh\n"); + // Do nothing. + } + } + else + { + + if(pbtpriv->BT_Ampdu && !pmlmeinfo->bAcceptAddbaReq) + { + DBG_8192C("BT_Allow AMPDU bt is off\n"); + pmlmeinfo->bAcceptAddbaReq = _TRUE; + } + + DBG_8192C("BT_Turn OFF Coexist bt is off \n"); + rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); + + DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", pbtpriv->BtRfRegOrigin1E); + PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); + //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); + //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); + + // BT coexistence mechanism does not control EDCA parameter since BT is disabled. + //pbtpriv->BtEdcaUL = 0; + //pbtpriv->BtEdcaDL = 0; + pbtpriv->BT_EDCA[UP_LINK] = 0; + pbtpriv->BT_EDCA[DOWN_LINK] = 0; + + +// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. +#if 0 + RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); + if(pMgntInfo->bUseRAMask) + { + // 20100407 Joseph: Fix rate adaptive modification for BT coexist. + // This fix is not complete yet. It shall also consider VWifi and Adhoc case, + // which connect with multiple STAs. + Adapter->HalFunc.UpdateHalRAMaskHandler( + Adapter, + FALSE, + 0, + NULL, + NULL, + pMgntInfo->RateAdaptive.RATRState, + RAMask_Normal); + } + else + { + Adapter->HalFunc.UpdateHalRATRTableHandler( + Adapter, + &pMgntInfo->dot11OperationalRateSet, + pMgntInfo->dot11HTOperationalRateSet,NULL); + } +#endif + } + } + } +} + +static void dm_InitBtCoexistDM( PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + + if( !pbtpriv->BT_Coexist ) return; + + pbtpriv->BtRfRegOrigin1E = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1e, 0xf0); + pbtpriv->BtRfRegOrigin1F = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1f, 0xf0); +} + +void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + + pbtpriv->bCOBT = bStart; + send_delba(padapter,0, get_my_bssid(&(pmlmeinfo->network))); + send_delba(padapter,1, get_my_bssid(&(pmlmeinfo->network))); + +} + +void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir) +{ + struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; + DBG_8192C("issue_delete_ba : %s...\n",(dir==0)?"RX_DIR":"TX_DIR"); + send_delba(padapter,dir, get_my_bssid(&(pmlmeinfo->network))); +} + +#endif + +#if 0//def CONFIG_PCI_HCI + +BOOLEAN +BT_BTStateChange( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + + u4Byte temp, Polling, Ratio_Tx, Ratio_PRI; + u4Byte BT_Tx, BT_PRI; + u1Byte BT_State; + static u1Byte ServiceTypeCnt = 0; + u1Byte CurServiceType; + static u1Byte LastServiceType = BT_Idle; + + if(!pMgntInfo->bMediaConnect) + return FALSE; + + BT_State = PlatformEFIORead1Byte(Adapter, 0x4fd); +/* + temp = PlatformEFIORead4Byte(Adapter, 0x488); + BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); + BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); + + temp = PlatformEFIORead4Byte(Adapter, 0x48c); + Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + + ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); + +*/ + BT_Tx = PlatformEFIORead4Byte(Adapter, 0x488); + + RTPRINT(FBT, BT_TRACE, ("Ratio 0x488 =%x\n", BT_Tx)); + BT_Tx =BT_Tx & 0x00ffffff; + //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); + + BT_PRI = PlatformEFIORead4Byte(Adapter, 0x48c); + + RTPRINT(FBT, BT_TRACE, ("Ratio Ratio 0x48c =%x\n", BT_PRI)); + BT_PRI =BT_PRI & 0x00ffffff; + //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); + + + Polling = PlatformEFIORead4Byte(Adapter, 0x490); + //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); + + + if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffffff && BT_State==0xff) + return FALSE; + + BT_State &= BIT0; + + if(BT_State != pHalData->bt_coexist.BT_CUR_State) + { + pHalData->bt_coexist.BT_CUR_State = BT_State; + + if(pMgntInfo->bRegBT_Sco == 3) + { + ServiceTypeCnt = 0; + + pHalData->bt_coexist.BT_Service = BT_Idle; + + RTPRINT(FBT, BT_TRACE, ("BT_%s\n", BT_State?"ON":"OFF")); + + BT_State = BT_State | + ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |BIT2; + + PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); + RTPRINT(FBT, BT_TRACE, ("BT set 0x4fd to %x\n", BT_State)); + } + + return TRUE; + } + RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco %d\n", pMgntInfo->bRegBT_Sco)); + + Ratio_Tx = BT_Tx*1000/Polling; + Ratio_PRI = BT_PRI*1000/Polling; + + pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; + pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; + + RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); + RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); + + + if(BT_State && pMgntInfo->bRegBT_Sco==3) + { + RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco ==3 Follow Counter\n")); +// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) +// { +// ServiceTypeCnt = 0; +// return FALSE; +// } +// else + { + /* + Ratio_Tx = BT_Tx*1000/Polling; + Ratio_PRI = BT_PRI*1000/Polling; + + pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; + pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; + + RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); + RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); + + */ + if((Ratio_Tx <= 50) && (Ratio_PRI <= 50)) + CurServiceType = BT_Idle; + else if((Ratio_PRI > 150) && (Ratio_PRI < 200)) + CurServiceType = BT_SCO; + else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) + CurServiceType = BT_Busy; + else if(Ratio_Tx >= 350) + CurServiceType = BT_OtherBusy; + else + CurServiceType=BT_OtherAction; + + } +/* if(pHalData->bt_coexist.bStopCount) + { + ServiceTypeCnt=0; + pHalData->bt_coexist.bStopCount=FALSE; + } +*/ + if(CurServiceType == BT_OtherBusy) + { + ServiceTypeCnt=2; + LastServiceType=CurServiceType; + } + else if(CurServiceType == LastServiceType) + { + if(ServiceTypeCnt<3) + ServiceTypeCnt++; + } + else + { + ServiceTypeCnt = 0; + LastServiceType = CurServiceType; + } + + if(ServiceTypeCnt==2) + { + pHalData->bt_coexist.BT_Service = LastServiceType; + BT_State = BT_State | + ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) | + ((pHalData->bt_coexist.BT_Service==BT_SCO)?0:BIT2); + + if(pHalData->bt_coexist.BT_Service==BT_Busy) + BT_State&= ~(BIT2); + + if(pHalData->bt_coexist.BT_Service==BT_SCO) + { + RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_SCO\n")); + } + else if(pHalData->bt_coexist.BT_Service==BT_Idle) + { + RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Idle\n")); + } + else if(pHalData->bt_coexist.BT_Service==BT_OtherAction) + { + RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherAction\n")); + } + else if(pHalData->bt_coexist.BT_Service==BT_Busy) + { + RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Busy\n")); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherBusy\n")); + } + + //Add interrupt migration when bt is not in idel state (no traffic). + //suggestion by Victor. + if(pHalData->bt_coexist.BT_Service!=BT_Idle) + { + + PlatformEFIOWrite2Byte(Adapter, 0x504, 0x0ccc); + PlatformEFIOWrite1Byte(Adapter, 0x506, 0x54); + PlatformEFIOWrite1Byte(Adapter, 0x507, 0x54); + + } + else + { + PlatformEFIOWrite1Byte(Adapter, 0x506, 0x00); + PlatformEFIOWrite1Byte(Adapter, 0x507, 0x00); + } + + PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); + RTPRINT(FBT, BT_TRACE, ("BT_SCO set 0x4fd to %x\n", BT_State)); + return TRUE; + } + } + + return FALSE; + +} + +BOOLEAN +BT_WifiConnectChange( + IN PADAPTER Adapter + ) +{ + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + static BOOLEAN bMediaConnect = FALSE; + + if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) + { + bMediaConnect = FALSE; + } + else + { + if(!bMediaConnect) + { + bMediaConnect = TRUE; + return TRUE; + } + bMediaConnect = TRUE; + } + + return FALSE; +} + +BOOLEAN +BT_RSSIChangeWithAMPDU( + IN PADAPTER Adapter + ) +{ + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(!Adapter->pNdisCommon->bRegBT_Ampdu || !Adapter->pNdisCommon->bRegAcceptAddbaReq) + return FALSE; + + RTPRINT(FBT, BT_TRACE, ("RSSI is %d\n",pHalData->UndecoratedSmoothedPWDB)); + + if((pHalData->UndecoratedSmoothedPWDB<=32) && pMgntInfo->pHTInfo->bAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32 Need change\n")); + return TRUE; + + } + else if((pHalData->UndecoratedSmoothedPWDB>=40) && !pMgntInfo->pHTInfo->bAcceptAddbaReq ) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40, Need change\n")); + return TRUE; + } + else + return FALSE; + +} + + +VOID +dm_BTCoexist( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + static u1Byte LastTxPowerLvl = 0xff; + PRX_TS_RECORD pRxTs = NULL; + + BOOLEAN bWifiConnectChange, bBtStateChange,bRSSIChangeWithAMPDU; + + if( (pHalData->bt_coexist.BluetoothCoexist) && + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) && + (!ACTING_AS_AP(Adapter)) ) + { + bWifiConnectChange = BT_WifiConnectChange(Adapter); + bBtStateChange = BT_BTStateChange(Adapter); + bRSSIChangeWithAMPDU = BT_RSSIChangeWithAMPDU(Adapter); + RTPRINT(FBT, BT_TRACE, ("bWifiConnectChange %d, bBtStateChange %d,LastTxPowerLvl %x, DynamicTxHighPowerLvl %x\n", + bWifiConnectChange,bBtStateChange,LastTxPowerLvl,pHalData->DynamicTxHighPowerLvl)); + if( bWifiConnectChange ||bBtStateChange || + (LastTxPowerLvl != pHalData->DynamicTxHighPowerLvl) ||bRSSIChangeWithAMPDU) + { + LastTxPowerLvl = pHalData->DynamicTxHighPowerLvl; + + if(pHalData->bt_coexist.BT_CUR_State) + { + // Do not allow receiving A-MPDU aggregation. + if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) + { + if(pHalData->UndecoratedSmoothedPWDB<=32) + { + if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); + pMgntInfo->pHTInfo->bAcceptAddbaReq = FALSE; + if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) + TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); + } + } + else if(pHalData->UndecoratedSmoothedPWDB>=40) + { + if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); + pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; + } + } + } + else + { + if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); + pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; + } + } + + if(pHalData->bt_coexist.BT_Ant_isolation) + { + RTPRINT(FBT, BT_TRACE, ("BT_IsolationLow\n")); + RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); + Adapter->HalFunc.UpdateHalRATRTableHandler( + Adapter, + &pMgntInfo->dot11OperationalRateSet, + pMgntInfo->dot11HTOperationalRateSet,NULL); + + if(pHalData->bt_coexist.BT_Service==BT_SCO) + { + + RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist with SCO \n")); + PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); + } + else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) + { + RTPRINT(FBT, BT_TRACE, ("BT_Turn ON Coexist\n")); + PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0xb4); + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist\n")); + PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); + } + } + else + { + RTPRINT(FBT, BT_TRACE, ("BT_IsolationHigh\n")); + // Do nothing. + } + } + else + { + if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) + { + RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU bt is off\n")); + pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; + } + + RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n")); + PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); + + RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); + Adapter->HalFunc.UpdateHalRATRTableHandler( + Adapter, + &pMgntInfo->dot11OperationalRateSet, + pMgntInfo->dot11HTOperationalRateSet,NULL); + } + } + } +} +#endif + + +/*----------------------------------------------------------------------------- + * Function: dm_CheckRfCtrlGPIO() + * + * Overview: Copy 8187B template for 9xseries. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/10/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +static VOID +dm_CheckRfCtrlGPIO( + IN PADAPTER Adapter + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) + #ifdef CONFIG_USB_HCI + // 2010/08/12 MH Add for CU selective suspend. + PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(Adapter); + #else + PRT_SDIO_DEVICE pDevice = GET_RT_SDIO_DEVICE(Adapter); + #endif +#endif + + if(!Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) + return; + + RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); + +#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) + // Walk around for DTM test, we will not enable HW - radio on/off because r/w + // page 1 register before Lextra bus is enabled cause system fails when resuming + // from S4. 20080218, Emily + if(Adapter->bInHctTest) + return; + +//#if ((HAL_CODE_BASE == RTL8192_S) ) + //Adapter->HalFunc.GPIOChangeRFHandler(Adapter, GPIORF_POLLING); +//#else + // 2010/07/27 MH Only Minicard and support selective suspend, we can not turn off all MAC power to + // stop 8051. For dongle and minicard, we both support selective suspend mode. + //if(pDevice->RegUsbSS && Adapter->HalFunc.GetInterfaceSelectionHandler(Adapter) == INTF_SEL2_MINICARD) + + // + // 2010/08/12 MH We support severl power consumption combination as below. + // + // Power consumption combination + // SS Enable: (LPS disable + IPS + SW/HW radio off) + // 1. Dongle + PDN (support HW radio off) + // 2. Dongle + Normal (No HW radio off) + // 3. MiniCard + PDN (support HW radio off) + // 4. MiniCard + Normal (support HW radio off) + // + // SS Disable: (LPS + IPS + SW/HW radio off) + // 1. Dongle + PDN (support HW radio off) + // 2. Dongle + Normal (No HW radio off) + // 3. MiniCard + PDN (support HW radio off) + // 4. MiniCard + Normal (support HW radio off) + // + // For Power down module detection. We need to read power register no matter + // dongle or minicard, we will add the item is the detection method. + // + // + //vivi add du case + if ((IS_HARDWARE_TYPE_8192CU(Adapter)||IS_HARDWARE_TYPE_8192DU(Adapter)) + && pDevice->RegUsbSS) + { + RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Enabled\n")); + if (SUPPORT_HW_RADIO_DETECT(Adapter)) + { // Support HW radio detection + RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); + GpioDetectTimerStart(Adapter); + } + else + { // Dongle does not support HW radio detection.?? In the fufure?? + RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); + } + } + else if (IS_HARDWARE_TYPE_8192CU(Adapter) || + IS_HARDWARE_TYPE_8723U(Adapter)|| + IS_HARDWARE_TYPE_8192DU(Adapter) || + IS_HARDWARE_TYPE_8723S(Adapter)) + { // Not support Selective suspend + RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Disable\n")); + if (SUPPORT_HW_RADIO_DETECT(Adapter)) + { + RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); + PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); + } + else + { + RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); + } + } + else + { // CE only support noemal HW radio detection now. Support timers GPIO detection in SE/CU. + PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); + } +//#endif +#else if defined CONFIG_PCI_HCI + if(Adapter->bInHctTest) + return; + + // CE only support noemal HW radio detection now. We support timers GPIO detection in SE. + PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); +#endif +#endif +} /* dm_CheckRfCtrlGPIO */ + +static VOID +dm_InitRateAdaptiveMask( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive; + + pRA->RATRState = DM_RATR_STA_INIT; + pRA->PreRATRState = DM_RATR_STA_INIT; + + if (pdmpriv->DM_Type == DM_Type_ByDriver) + pdmpriv->bUseRAMask = _TRUE; + else + pdmpriv->bUseRAMask = _FALSE; +} + +/*----------------------------------------------------------------------------- + * Function: dm_RefreshRateAdaptiveMask() + * + * Overview: Update rate table mask according to rssi + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 05/27/2009 hpfan Create Version 0. + * + *---------------------------------------------------------------------------*/ +static VOID +dm_RefreshRateAdaptiveMask( IN PADAPTER pAdapter) +{ +#if 0 + PADAPTER pTargetAdapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMGNT_INFO pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo); + PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; + u4Byte LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0; + + if(pAdapter->bDriverStopped) + { + RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n")); + return; + } + + if(!pMgntInfo->bUseRAMask) + { + RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); + return; + } + + // if default port is connected, update RA table for default port (infrastructure mode only) + if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) + { + + // decide rastate according to rssi + switch (pRA->PreRATRState) + { + case DM_RATR_STA_HIGH: + HighRSSIThreshForRA = 50; + LowRSSIThreshForRA = 20; + break; + + case DM_RATR_STA_MIDDLE: + HighRSSIThreshForRA = 55; + LowRSSIThreshForRA = 20; + break; + + case DM_RATR_STA_LOW: + HighRSSIThreshForRA = 50; + LowRSSIThreshForRA = 25; + break; + + default: + HighRSSIThreshForRA = 50; + LowRSSIThreshForRA = 20; + break; + } + + if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) + pRA->RATRState = DM_RATR_STA_HIGH; + else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) + pRA->RATRState = DM_RATR_STA_MIDDLE; + else + pRA->RATRState = DM_RATR_STA_LOW; + + if(pRA->PreRATRState != pRA->RATRState) + { + RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); + RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pHalData->UndecoratedSmoothedPWDB)); + RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState)); + RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState)); + pAdapter->HalFunc.UpdateHalRAMaskHandler( + pAdapter, + FALSE, + 0, + NULL, + NULL, + pRA->RATRState); + pRA->PreRATRState = pRA->RATRState; + } + } + + // + // The following part configure AP/VWifi/IBSS rate adaptive mask. + // + if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter)) + { + pTargetAdapter = pAdapter; + } + else + { + pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE); + if(!ACTING_AS_AP(pTargetAdapter)) + pTargetAdapter = NULL; + } + + // if extension port (softap) is started, updaet RA table for more than one clients associate + if(pTargetAdapter != NULL) + { + int i; + PRT_WLAN_STA pEntry; + PRATE_ADAPTIVE pEntryRA; + + for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++) + { + if( pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated) + { + pEntry = pTargetAdapter->MgntInfo.AsocEntry+i; + pEntryRA = &pEntry->RateAdaptive; + + switch (pEntryRA->PreRATRState) + { + case DM_RATR_STA_HIGH: + { + HighRSSIThreshForRA = 50; + LowRSSIThreshForRA = 20; + } + break; + + case DM_RATR_STA_MIDDLE: + { + HighRSSIThreshForRA = 55; + LowRSSIThreshForRA = 20; + } + break; + + case DM_RATR_STA_LOW: + { + HighRSSIThreshForRA = 50; + LowRSSIThreshForRA = 25; + } + break; + + default: + { + HighRSSIThreshForRA = 50; + LowRSSIThreshForRA = 20; + } + } + + if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) + pEntryRA->RATRState = DM_RATR_STA_HIGH; + else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) + pEntryRA->RATRState = DM_RATR_STA_MIDDLE; + else + pEntryRA->RATRState = DM_RATR_STA_LOW; + + if(pEntryRA->PreRATRState != pEntryRA->RATRState) + { + RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr); + RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB)); + RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState)); + RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState)); + pAdapter->HalFunc.UpdateHalRAMaskHandler( + pTargetAdapter, + FALSE, + pEntry->AID+1, + pEntry->MacAddr, + pEntry, + pEntryRA->RATRState); + pEntryRA->PreRATRState = pEntryRA->RATRState; + } + + } + } + } +#endif +} + +static VOID +dm_CheckProtection( + IN PADAPTER Adapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u1Byte CurRate, RateThreshold; + + if(pMgntInfo->pHTInfo->bCurBW40MHz) + RateThreshold = MGN_MCS1; + else + RateThreshold = MGN_MCS3; + + if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) + { + pMgntInfo->bDmDisableProtect = TRUE; + DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } + else + { + pMgntInfo->bDmDisableProtect = FALSE; + DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } +#endif +} + +static VOID +dm_CheckStatistics( + IN PADAPTER Adapter + ) +{ +#if 0 + if(!Adapter->MgntInfo.bMediaConnect) + return; + + //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. + Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); + + // Calculate current Tx Rate(Successful transmited!!) + + // Calculate current Rx Rate(Successful received!!) + + //for tx tx retry count + Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); +#endif +} + +static void dm_CheckPbcGPIO(_adapter *padapter) +{ + u8 tmp1byte; + u8 bPbcPressed = _FALSE; + + if(!padapter->registrypriv.hw_wps_pbc) + return; + +#ifdef CONFIG_USB_HCI + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode + + tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level + + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode + + tmp1byte =rtw_read8(padapter, GPIO_IN); + + if (tmp1byte == 0xff) + return ; + + if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) + { + bPbcPressed = _TRUE; + } +#else + tmp1byte = rtw_read8(padapter, GPIO_IN); + //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); + + if (tmp1byte == 0xff || padapter->init_adpt_in_progress) + return ; + + if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) + { + bPbcPressed = _TRUE; + } +#endif + + if( _TRUE == bPbcPressed) + { + // Here we only set bPbcPressed to true + // After trigger PBC, the variable will be set to false + DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); + +#ifdef RTK_DMP_PLATFORM +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) + kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); +#else + kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); +#endif +#else + + if ( padapter->pid[0] == 0 ) + { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. + return; + } + +#ifdef PLATFORM_LINUX + rtw_signal_process(padapter->pid[0], SIGUSR1); +#endif +#endif + } +} + +#ifdef CONFIG_PCI_HCI +// +// Description: +// Perform interrupt migration dynamically to reduce CPU utilization. +// +// Assumption: +// 1. Do not enable migration under WIFI test. +// +// Created by Roger, 2010.03.05. +// +VOID +dm_InterruptMigration( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bCurrentIntMt, bCurrentACIntDisable; + BOOLEAN IntMtToSet = _FALSE; + BOOLEAN ACIntToSet = _FALSE; + + + // Retrieve current interrupt migration and Tx four ACs IMR settings first. + bCurrentIntMt = pHalData->bInterruptMigration; + bCurrentACIntDisable = pHalData->bDisableTxInt; + + // + // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics + // when interrupt migration is set before. 2010.03.05. + // + if(!Adapter->registrypriv.wifi_spec && + (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && + pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) + { + IntMtToSet = _TRUE; + + // To check whether we should disable Tx interrupt or not. + if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) + ACIntToSet = _TRUE; + } + + //Update current settings. + if( bCurrentIntMt != IntMtToSet ){ + DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); + if(IntMtToSet) + { + // + // Set interrrupt migration timer and corresponging Tx/Rx counter. + // timer 25ns*0xfa0=100us for 0xf packets. + // 2010.03.05. + // + rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx + pHalData->bInterruptMigration = IntMtToSet; + } + else + { + // Reset all interrupt migration settings. + rtw_write32(Adapter, REG_INT_MIG, 0); + pHalData->bInterruptMigration = IntMtToSet; + } + } + + /*if( bCurrentACIntDisable != ACIntToSet ){ + DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); + if(ACIntToSet) // Disable four ACs interrupts. + { + // + // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. + // When extremely highly Rx OK occurs, we will disable Tx interrupts. + // 2010.03.05. + // + UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); + pHalData->bDisableTxInt = ACIntToSet; + } + else// Enable four ACs interrupts. + { + UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); + pHalData->bDisableTxInt = ACIntToSet; + } + }*/ + +} + +#endif + +// +// Initialize GPIO setting registers +// +static void +dm_InitGPIOSetting( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + u8 tmp1byte; + + tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); + tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); + +#ifdef CONFIG_BT_COEXIST + // UMB-B cut bug. We need to support the modification. + if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && + pHalData->bt_coexist.BT_Coexist) + { + tmp1byte |= (BIT5); + } +#endif + rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); + +} + +static void update_EDCA_param(_adapter *padapter) +{ + u32 trafficIndex; + u32 edca_param; + u64 cur_tx_bytes = 0; + u64 cur_rx_bytes = 0; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct recv_priv *precvpriv = &(padapter->recvpriv); + struct registry_priv *pregpriv = &padapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + u8 bbtchange = _FALSE; +#endif + + + //DBG_871X("%s\n", __FUNCTION__); + + //associated AP + if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) + { + return; + } + + if (pmlmeinfo->assoc_AP_vendor >= maxAP) + { + return; + } + + cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; + cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; + + //traffic, TX or RX + if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) + { + if (cur_tx_bytes > (cur_rx_bytes << 2)) + { // Uplink TP is present. + trafficIndex = UP_LINK; + } + else + { // Balance TP is present. + trafficIndex = DOWN_LINK; + } + } + else + { + if (cur_rx_bytes > (cur_tx_bytes << 2)) + { // Downlink TP is present. + trafficIndex = DOWN_LINK; + } + else + { // Balance TP is present. + trafficIndex = UP_LINK; + } + } + +#ifdef CONFIG_BT_COEXIST + if(pbtpriv->BT_Coexist) + { + if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) + { + bbtchange = _TRUE; + } + } +#endif + + if (pdmpriv->prv_traffic_idx != trafficIndex) + { +#if 0 +#ifdef CONFIG_BT_COEXIST + if(_TRUE == bbtchange) + rtw_write32(padapter, REG_EDCA_BE_PARAM, pbtpriv->BT_EDCA[trafficIndex]); + else +#endif + //adjust EDCA parameter for BE queue + //fire_write_MAC_cmd(padapter, EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); + rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); + +#else + if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) + { + edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; + } + else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) && + ((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG))) + { + edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; + } + else + { + edca_param = EDCAParam[unknownAP][trafficIndex]; + } + +#ifdef CONFIG_BT_COEXIST + if(_TRUE == bbtchange) + edca_param = pbtpriv->BT_EDCA[trafficIndex]; +#endif + + rtw_write32(padapter, REG_EDCA_BE_PARAM, edca_param); +#endif + pdmpriv->prv_traffic_idx = trafficIndex; + } + +//exit_update_EDCA_param: + + pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; + precvpriv->last_rx_bytes = precvpriv->rx_bytes; + + return; +} + +static void dm_InitDynamicBBPowerSaving( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PS_T *pPSTable = &pdmpriv->DM_PSTable; + + pPSTable->PreCCAState = CCA_MAX; + pPSTable->CurCCAState = CCA_MAX; + pPSTable->PreRFState = RF_MAX; + pPSTable->CurRFState = RF_MAX; + pPSTable->Rssi_val_min = 0; +} + +static void dm_1R_CCA( + IN PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PS_T *pPSTable = &pdmpriv->DM_PSTable; + + if(pPSTable->Rssi_val_min != 0) + { + if(pPSTable->PreCCAState == CCA_2R) + { + if(pPSTable->Rssi_val_min >= 35) + pPSTable->CurCCAState = CCA_1R; + else + pPSTable->CurCCAState = CCA_2R; + } + else{ + if(pPSTable->Rssi_val_min <= 30) + pPSTable->CurCCAState = CCA_2R; + else + pPSTable->CurCCAState = CCA_1R; + } + } + else + pPSTable->CurCCAState=CCA_MAX; + + if(pPSTable->PreCCAState != pPSTable->CurCCAState) + { + if(pPSTable->CurCCAState == CCA_1R) + { + if(pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x13); + PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); + } + else + { + PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x23); + PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 + } + } + else + { + PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33); + PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); + } + pPSTable->PreCCAState = pPSTable->CurCCAState; + } + //DBG_8192C("dm_1R_CCA(): CCAStage=%x\n", pPSTable->CurCCAState); +} + +void +rtl8192c_dm_RF_Saving( + IN PADAPTER pAdapter, + IN u8 bForceInNormal + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PS_T *pPSTable = &pdmpriv->DM_PSTable; + + if(pAdapter->registrypriv.intel_class_mode==1) + return; + if(pdmpriv->initialize == 0){ + pdmpriv->rf_saving_Reg874 = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord)&0x1CC000)>>14; + pdmpriv->rf_saving_RegC70 = (PHY_QueryBBReg(pAdapter, rOFDM0_AGCParameter1, bMaskDWord)&BIT3)>>3; + pdmpriv->rf_saving_Reg85C = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_SwitchControl, bMaskDWord)&0xFF000000)>>24; + pdmpriv->rf_saving_RegA74 = (PHY_QueryBBReg(pAdapter, 0xa74, bMaskDWord)&0xF000)>>12; + //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); + pdmpriv->initialize = 1; + } + + if(!bForceInNormal) + { + if(pPSTable->Rssi_val_min != 0) + { + + if(pPSTable->PreRFState == RF_Normal) + { + #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + if(pPSTable->Rssi_val_min >= 50) + #else + if(pPSTable->Rssi_val_min >= 30) + #endif + pPSTable->CurRFState = RF_Save; + else + pPSTable->CurRFState = RF_Normal; + } + else{ + #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + if(pPSTable->Rssi_val_min <= 45) + #else + if(pPSTable->Rssi_val_min <= 25) + #endif + pPSTable->CurRFState = RF_Normal; + else + pPSTable->CurRFState = RF_Save; + } + } + else + pPSTable->CurRFState=RF_MAX; + } + else + { + pPSTable->CurRFState = RF_Normal; + } + + if(pPSTable->PreRFState != pPSTable->CurRFState) + { + if(pPSTable->CurRFState == RF_Save) + { + PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 + PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, 0); //RegC70[3]=1'b0 + PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 + PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0xC000, 0x2); //Reg874[15:14]=2'b10 + PHY_SetBBReg(pAdapter, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 + PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 + PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 + DBG_8192C("%s(): RF_Save\n", __FUNCTION__); + } + else + { + PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1CC000, pdmpriv->rf_saving_Reg874); + PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, pdmpriv->rf_saving_RegC70); + PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, pdmpriv->rf_saving_Reg85C); + PHY_SetBBReg(pAdapter, 0xa74, 0xF000, pdmpriv->rf_saving_RegA74); + PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); + DBG_8192C("%s(): RF_Normal\n", __FUNCTION__); + } + pPSTable->PreRFState = pPSTable->CurRFState; + } +} + +static void +dm_DynamicBBPowerSaving( +IN PADAPTER pAdapter + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PS_T *pPSTable = &pdmpriv->DM_PSTable; + + //1 1.Determine the minimum RSSI + if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + pPSTable->Rssi_val_min = 0; + //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); + } + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port + { + //if(ACTING_AS_AP(pAdapter) || pMgntInfo->mIbss) + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) //todo: AP Mode + { + pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); + } + else + { + pPSTable->Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; + //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); + } + } + else // associated entry pwdb + { + pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); + } + + //1 2.Power Saving for 92C + if(IS_92C_SERIAL(pHalData->VersionID)) + { + //dm_1R_CCA(pAdapter); + } + + // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. + // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns to 600ns. + //1 3.Power Saving for 88C + else + { + rtl8192c_dm_RF_Saving(pAdapter, _FALSE); + } +} + + +#ifdef CONFIG_ANTENNA_DIVERSITY +// Add new function to reset the state of antenna diversity before link. +// +void SwAntDivResetBeforeLink8192C(IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; + + pDM_SWAT_Table->SWAS_NoLink_State = 0; +} + +// Compare RSSI for deciding antenna +void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) ) + { + //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), + // src->Rssi,query_rx_pwr_percentage(src->Rssi)); + //select optimum_antenna for before linked =>For antenna diversity + if(dst->Rssi >= src->Rssi )//keep org parameter + { + src->Rssi = dst->Rssi; + src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; + } + } +} + +// Add new function to reset the state of antenna diversity before link. +u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + // Condition that does not need to use antenna diversity. + if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) + { + //DBG_8192C("SwAntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); + return _FALSE; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) + { + pDM_SWAT_Table->SWAS_NoLink_State = 0; + return _FALSE; + } + // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. +/* + if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) + { + + + RT_TRACE(COMP_SWAS, DBG_LOUD, + ("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", + pMgntInfo->RFChangeInProgress, + pHalData->eRFPowerState)); + + pDM_SWAT_Table->SWAS_NoLink_State = 0; + + return FALSE; + } +*/ + + if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ + //switch channel + pDM_SWAT_Table->SWAS_NoLink_State = 1; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); + rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); + //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); + return _TRUE; + } + else + { + pDM_SWAT_Table->SWAS_NoLink_State = 0; + return _FALSE; + } + + + +} +#endif +#ifdef CONFIG_SW_ANTENNA_DIVERSITY +// +// 20100514 Luke/Joseph: +// Add new function to reset antenna diversity state after link. +// +void +SwAntDivRestAfterLink8192C( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; + + if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) + return; + + //DBG_8192C("======> SwAntDivRestAfterLink <========== \n"); + pHalData->RSSI_cnt_A= 0; + pHalData->RSSI_cnt_B= 0; + pHalData->RSSI_test = _FALSE; + + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->RSSI_Trying = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; + pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; + + pdmpriv->lastTxOkCnt=0; + pdmpriv->lastRxOkCnt=0; + + pdmpriv->TXByteCnt_A=0; + pdmpriv->TXByteCnt_B=0; + pdmpriv->RXByteCnt_A=0; + pdmpriv->RXByteCnt_B=0; + pdmpriv->DoubleComfirm=0; + pdmpriv->TrafficLoad = TRAFFIC_LOW; + +} + + +// +// 20100514 Luke/Joseph: +// Add new function for antenna diversity after link. +// This is the main function of antenna diversity after link. +// This function is called in HalDmWatchDog() and dm_SW_AntennaSwitchCallback(). +// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. +// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. +// After 500ms, dm_SW_AntennaSwitchCallback() calls this function to compare the signal just +// listened on the air with the RSSI of original antenna. +// It chooses the antenna with better RSSI. +// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting +// penalty to get next try. +// +static VOID +dm_SW_AntennaSwitch( + PADAPTER Adapter, + u8 Step +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; + s32 curRSSI=100, RSSI_A, RSSI_B; + u64 curTxOkCnt, curRxOkCnt; + u64 CurByteCnt = 0, PreByteCnt = 0; + u8 nextAntenna = 0; + u8 Score_A=0, Score_B=0; + u8 i; + + // Condition that does not need to use antenna diversity. + if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) + { + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No AntDiv Mechanism.\n")); + return; + } + // If dynamic ant_div is disabled. + if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_ANT_DIV) ) + { + return; + } + + if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED) ==_FALSE) + return; +#if 0 //to do + // Radio off: Status reset to default and return. + if(pHalData->eRFPowerState==eRfOff) + { + SwAntDivRestAfterLink(Adapter); + return; + } +#endif + //DBG_8192C("\n............................ %s.........................\n",__FUNCTION__); + // Handling step mismatch condition. + // Peak step is not finished at last time. Recover the variable and check again. + if( Step != pDM_SWAT_Table->try_flag ) + { + SwAntDivRestAfterLink8192C(Adapter); + } + + + if(pDM_SWAT_Table->try_flag == 0xff) + { +#if 0 + // Select RSSI checking target + if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) + { + // Target: Infrastructure mode AP. + pHalData->RSSI_target = NULL; + RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is DEF AP!\n")); + } + else + { + u8 index = 0; + PRT_WLAN_STA pEntry = NULL; + PADAPTER pTargetAdapter = NULL; + + if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) + { + // Target: AP/IBSS peer. + pTargetAdapter = Adapter; + } + else if(ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE))) + { + // Target: VWIFI peer. + pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE); + } + + if(pTargetAdapter != NULL) + { + for(index=0; indexbAssociated) + break; + } + } + } + + if(pEntry == NULL) + { + SwAntDivRestAfterLink(Adapter); + RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No Link.\n")); + return; + } + else + { + pHalData->RSSI_target = pEntry; + RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is PEER STA\n")); + } + } + + +#endif + + pHalData->RSSI_cnt_A= 0; + pHalData->RSSI_cnt_B= 0; + pDM_SWAT_Table->try_flag = 0; + // DBG_8192C("dm_SW_AntennaSwitch(): Set try_flag to 0 prepare for peak!\n"); + return; + } + else + { + curTxOkCnt = Adapter->xmitpriv.tx_bytes - pdmpriv->lastTxOkCnt; + curRxOkCnt = Adapter->recvpriv.rx_bytes - pdmpriv->lastRxOkCnt; + + pdmpriv->lastTxOkCnt = Adapter->xmitpriv.tx_bytes ; + pdmpriv->lastRxOkCnt = Adapter->recvpriv.rx_bytes ; + + if(pDM_SWAT_Table->try_flag == 1) + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + pdmpriv->TXByteCnt_A += curTxOkCnt; + pdmpriv->RXByteCnt_A += curRxOkCnt; + //DBG_8192C("##### TXByteCnt_A(%lld) , RXByteCnt_A(%lld) ####\n",pdmpriv->TXByteCnt_A,pdmpriv->RXByteCnt_A); + } + else + { + pdmpriv->TXByteCnt_B += curTxOkCnt; + pdmpriv->RXByteCnt_B += curRxOkCnt; + //DBG_8192C("##### TXByteCnt_B(%lld) , RXByteCnt_B(%lld) ####\n",pdmpriv->TXByteCnt_B,pdmpriv->RXByteCnt_B); + } + + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + pDM_SWAT_Table->RSSI_Trying--; + //DBG_8192C("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying); + + if(pDM_SWAT_Table->RSSI_Trying == 0) + { + CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A) : (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B); + PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B) : (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A); + + //DBG_8192C("CurByteCnt = %lld\n", CurByteCnt); + //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); + + if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) + { + PreByteCnt = PreByteCnt*9; //normalize:Cur=90ms:Pre=10ms + } + else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) + { + //CurByteCnt = CurByteCnt/2; + CurByteCnt = CurByteCnt>>1;//normalize:100ms:50ms + } + + + //DBG_8192C("After DIV=>CurByteCnt = %lld\n", CurByteCnt); + //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); + + if(pHalData->RSSI_cnt_A > 0) + RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; + else + RSSI_A = 0; + if(pHalData->RSSI_cnt_B > 0) + RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; + else + RSSI_B = 0; + + curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; + //DBG_8192C("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI); + //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", + //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); + //DBG_8192C("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + //RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); + } + + } + else + { + + if(pHalData->RSSI_cnt_A > 0) + RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; + else + RSSI_A = 0; + if(pHalData->RSSI_cnt_B > 0) + RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; + //DBG_8192C("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI); + //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", + //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); + + //DBG_8192C("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + // RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); + } + + //1 Trying State + if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) + { + + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + //DBG_8192C("SWAS: TestMode = TP_MODE\n"); + //DBG_8192C("TRY:CurByteCnt = %lld\n", CurByteCnt); + //DBG_8192C("TRY:PreByteCnt = %lld\n",PreByteCnt); + if(CurByteCnt < PreByteCnt) + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + else + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + } + else + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + else + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + } + for (i= 0; i<8; i++) + { + if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) + Score_A++; + else + Score_B++; + } + //DBG_8192C("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap); + //DBG_8192C("Score_A=%d, Score_B=%d\n", Score_A, Score_B); + + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B; + } + else + { + nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A; + } + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", + //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); + + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + //DBG_8192C("SWAS: Switch back to another antenna\n"); + } + else + { + //DBG_8192C("SWAS: current anntena is good\n"); + } + } + + if(pDM_SWAT_Table->TestMode == RSSI_MODE) + { + //DBG_8192C("SWAS: TestMode = RSSI_MODE\n"); + pDM_SWAT_Table->SelectAntennaMap=0xAA; + if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna + { + //DBG_8192C("SWAS: Switch back to another antenna\n"); + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + } + else // current anntena is good + { + nextAntenna = pDM_SWAT_Table->CurAntenna; + //DBG_8192C("SWAS: current anntena is good\n"); + } + } + pDM_SWAT_Table->try_flag = 0; + pHalData->RSSI_test = _FALSE; + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_B = 0; + pdmpriv->TXByteCnt_A = 0; + pdmpriv->TXByteCnt_B = 0; + pdmpriv->RXByteCnt_A = 0; + pdmpriv->RXByteCnt_B = 0; + + } + + //1 Normal State + else if(pDM_SWAT_Table->try_flag == 0) + { + if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) + { + if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) + pdmpriv->TrafficLoad = TRAFFIC_HIGH; + else + pdmpriv->TrafficLoad = TRAFFIC_LOW; + } + else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) + { + if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) + pdmpriv->TrafficLoad = TRAFFIC_HIGH; + else + pdmpriv->TrafficLoad = TRAFFIC_LOW; + } + if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + //DBG_8192C("Normal:TrafficLoad = %lld\n", curTxOkCnt+curRxOkCnt); + + //Prepare To Try Antenna + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + pDM_SWAT_Table->try_flag = 1; + pHalData->RSSI_test = _TRUE; + if((curRxOkCnt+curTxOkCnt) > 1000) + { + pDM_SWAT_Table->RSSI_Trying = 4; + pDM_SWAT_Table->TestMode = TP_MODE; + } + else + { + pDM_SWAT_Table->RSSI_Trying = 2; + pDM_SWAT_Table->TestMode = RSSI_MODE; + + } + //DBG_8192C("SWAS: Normal State -> Begin Trying! TestMode=%s\n",(pDM_SWAT_Table->TestMode == TP_MODE)?"TP":"RSSI"); + + + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_B = 0; + } + } + + //1 4.Change TRX antenna + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + //DBG_8192C("@@@@@@@@ SWAS: Change TX Antenna!\n "); + rtw_antenna_select_cmd(Adapter, nextAntenna, 1); + } + + //1 5.Reset Statistics + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = nextAntenna; + pDM_SWAT_Table->PreRSSI = curRSSI; + + + //1 6.Set next timer + + if(pDM_SWAT_Table->RSSI_Trying == 0) + return; + + if(pDM_SWAT_Table->RSSI_Trying%2 == 0) + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) + { + _set_timer(&pdmpriv->SwAntennaSwitchTimer,10 ); //ms + //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n"); + } + else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) + { + _set_timer(&pdmpriv->SwAntennaSwitchTimer, 50 ); //ms + //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n"); + } + } + else + { + _set_timer(&pdmpriv->SwAntennaSwitchTimer, 500 ); //ms + //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); + } + } + else + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) + _set_timer(&pdmpriv->SwAntennaSwitchTimer,90 ); //ms + else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) + _set_timer(&pdmpriv->SwAntennaSwitchTimer,100 ); //ms + } + else + { + _set_timer(&pdmpriv->SwAntennaSwitchTimer,500 ); //ms + //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); + } + } + +// RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: -----The End-----\n ")); + +} + +// +// 20100514 Luke/Joseph: +// Callback function for 500ms antenna test trying. +// +static void dm_SW_AntennaSwitchCallback(void *FunctionContext) +{ + _adapter *padapter = (_adapter *)FunctionContext; + + if(padapter->net_closed == _TRUE) + return; + // Only + dm_SW_AntennaSwitch(padapter, SWAW_STEP_DETERMINE); +} + + +// +// 20100722 +// This function is used to gather the RSSI information for antenna testing. +// It selects the RSSI of the peer STA that we want to know. +// +void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; + + if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) + return; + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + pHalData->RSSI_sum_A += RxPWDBAll; + pHalData->RSSI_cnt_A++; + } + else + { + pHalData->RSSI_sum_B+= RxPWDBAll; + pHalData->RSSI_cnt_B++; + + } + //DBG_8192C("%s Ant_(%s),RSSI_sum(%d),RSSI_cnt(%d)\n",__FUNCTION__,(2==pHalData->CurAntenna)?"A":"B",pHalData->RSSI_sum,pHalData->RSSI_cnt); + } + +} + + + +static VOID +dm_SW_AntennaSwitchInit( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; + + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_cnt_B = 0; + + pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; + pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->PreRSSI = 0; + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + + // Move the timer initialization to InitializeVariables function. + //PlatformInitializeTimer(Adapter, &pMgntInfo->SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)dm_SW_AntennaSwitchCallback, NULL, "SwAntennaSwitchTimer"); +} + +#endif + +//#define RSSI_CCK 0 +//#define RSSI_OFDM 1 +static void dm_RSSIMonitorInit( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + pdmpriv->OFDM_Pkt_Cnt = 0; + pdmpriv->RSSI_Select = RSSI_DEFAULT; +} + +static void dm_RSSIMonitorCheck( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) + return; + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE |WIFI_ADHOC_STATE) == _TRUE ) + { + if(Adapter->stapriv.asoc_sta_count < 2) + return; + } + + if(pdmpriv->OFDM_Pkt_Cnt == 0) + pdmpriv->RSSI_Select = RSSI_CCK; + else + pdmpriv->RSSI_Select = RSSI_OFDM; + + pdmpriv->OFDM_Pkt_Cnt = 0; + //DBG_8192C("RSSI_Select=%s OFDM_Pkt_Cnt(%d)\n", + //(pdmpriv->RSSI_Select == RSSI_OFDM)?"RSSI_OFDM":"RSSI_CCK", + //pdmpriv->OFDM_Pkt_Cnt); +} + +//============================================================ +// functions +//============================================================ +void rtl8192c_init_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + _init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , dm_SW_AntennaSwitchCallback, Adapter); +#endif +} + +void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + _cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); +#endif +} +#ifdef CONFIG_HW_ANTENNA_DIVERSITY +void dm_InitHybridAntDiv(IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) + return; + + //Set OFDM HW RX Antenna Diversity + PHY_SetBBReg(Adapter,0xc50, BIT7, 1); //Enable Hardware antenna switch + PHY_SetBBReg(Adapter,0x870, BIT9|BIT8, 0); //Enable hardware control of "ANT_SEL" & "ANT_SELB" + PHY_SetBBReg(Adapter,0xCA4, BIT11, 0); //Switch to another antenna by checking pwdb threshold + PHY_SetBBReg(Adapter,0xCA4, 0x7FF, 0x080); //Pwdb threshold=8dB + PHY_SetBBReg(Adapter,0xC54, BIT23, 1); //Decide final antenna by comparing 2 antennas' pwdb + PHY_SetBBReg(Adapter,0x874, BIT23, 0); //No update ANTSEL during GNT_BT=1 + PHY_SetBBReg(Adapter,0x80C, BIT21, 1); //TX atenna selection from tx_info + //Set CCK HW RX Antenna Diversity + PHY_SetBBReg(Adapter,0xA00, BIT15, 1);//Enable antenna diversity + PHY_SetBBReg(Adapter,0xA0C, BIT4, 0); //Antenna diversity decision period = 32 sample + PHY_SetBBReg(Adapter,0xA0C, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 + PHY_SetBBReg(Adapter,0xA10, BIT13, 1); //polarity ana_A=1 and ana_B=0 + PHY_SetBBReg(Adapter,0xA14, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) + + pHalData->CCK_Ant1_Cnt = 0; + pHalData->CCK_Ant2_Cnt = 0; + pHalData->OFDM_Ant1_Cnt = 0; + pHalData->OFDM_Ant2_Cnt = 0; +} + + +#define RxDefaultAnt1 0x65a9 +#define RxDefaultAnt2 0x569a + +void dm_SelectRXDefault(IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) + return; + + //DbgPrint(" Ant1_Cnt=%d, Ant2_Cnt=%d\n", pHalData->Ant1_Cnt, pHalData->Ant2_Cnt); + //DBG_8192C(" CCK_Ant1_Cnt = %d, CCK_Ant2_Cnt = %d\n", pHalData->CCK_Ant1_Cnt, pHalData->CCK_Ant2_Cnt); + //DBG_8192C(" OFDM_Ant1_Cnt = %d, OFDM_Ant2_Cnt = %d\n", pHalData->OFDM_Ant1_Cnt, pHalData->OFDM_Ant2_Cnt); + if((pHalData->OFDM_Ant1_Cnt == 0) && (pHalData->OFDM_Ant2_Cnt == 0)) + { + if((pHalData->CCK_Ant1_Cnt + pHalData->CCK_Ant2_Cnt) >=10 ) + { + if(pHalData->CCK_Ant1_Cnt > (5*pHalData->CCK_Ant2_Cnt)) + { + DBG_8192C(" RX Default = Ant1\n"); + PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); + } + else if(pHalData->CCK_Ant2_Cnt > (5*pHalData->CCK_Ant1_Cnt)) + { + DBG_8192C(" RX Default = Ant2\n"); + PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); + } + else if(pHalData->CCK_Ant1_Cnt > pHalData->CCK_Ant2_Cnt) + { + DBG_8192C(" RX Default = Ant2\n"); + PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); + } + else + { + DBG_8192C(" RX Default = Ant1\n"); + PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); + } + pHalData->CCK_Ant1_Cnt = 0; + pHalData->CCK_Ant2_Cnt = 0; + pHalData->OFDM_Ant1_Cnt = 0; + pHalData->OFDM_Ant2_Cnt = 0; + } + } + else + { + if(pHalData->OFDM_Ant1_Cnt > pHalData->OFDM_Ant2_Cnt) + { + DBG_8192C(" RX Default = Ant1\n"); + PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); + } + else + { + DBG_8192C(" RX Default = Ant2\n"); + PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); + } + pHalData->CCK_Ant1_Cnt = 0; + pHalData->CCK_Ant2_Cnt = 0; + pHalData->OFDM_Ant1_Cnt = 0; + pHalData->OFDM_Ant2_Cnt = 0; + } + + +} + +#endif + +void +rtl8192c_InitHalDm( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 i; + +#ifdef CONFIG_USB_HCI + dm_InitGPIOSetting(Adapter); +#endif + + pdmpriv->DM_Type = DM_Type_ByDriver; + pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; + pdmpriv->UndecoratedSmoothedPWDB = (-1); + pdmpriv->UndecoratedSmoothedCCK = (-1); + + + //.1 DIG INIT + pdmpriv->bDMInitialGainEnable = _TRUE; + pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG; + dm_DIGInit(Adapter); + + //.2 DynamicTxPower INIT + pdmpriv->DMFlag |= DYNAMIC_FUNC_HP; + dm_InitDynamicTxPower(Adapter); + + //.3 + DM_InitEdcaTurbo(Adapter); + + //.4 RateAdaptive INIT + dm_InitRateAdaptiveMask(Adapter); + + //.5 Tx Power Tracking Init. + pdmpriv->DMFlag |= DYNAMIC_FUNC_SS; + DM_InitializeTXPowerTracking(Adapter); + +#ifdef CONFIG_BT_COEXIST + pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; + dm_InitBtCoexistDM(Adapter); +#endif + + dm_InitDynamicBBPowerSaving(Adapter); + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; + dm_SW_AntennaSwitchInit(Adapter); +#endif + +#ifdef CONFIG_HW_ANTENNA_DIVERSITY + pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; + dm_InitHybridAntDiv(Adapter); +#endif + + dm_RSSIMonitorInit(Adapter); + + pdmpriv->DMFlag_tmp = pdmpriv->DMFlag; + + // Save REG_INIDATA_RATE_SEL value for TXDESC. + for(i = 0 ; i<32 ; i++) + { + pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f; + } +} +VOID +rtl8192c_HalDmPollingC2HEvt( + IN PADAPTER padapter + ) +{ + u8 trigger=0,evt_id=0,evt_len=0,idx=0,tmp8=0,evt_seq=0; + u8 evt_buf[15]; + + trigger=rtw_read8(padapter,REG_C2HEVT_CLEAR); + while (trigger ==0xFF) + { + tmp8=rtw_read8(padapter,REG_C2HEVT_MSG_NORMAL); + evt_id=tmp8&0xf; + evt_len=(tmp8&0xf0)>>4; + evt_seq=rtw_read8(padapter,REG_C2HEVT_MSG_NORMAL+1); + DBG_8192C(" %s evt_id =0x%x evt_len=0x%x evt_seq=0x%x\n",__FUNCTION__,evt_id,evt_len,evt_seq); + for(idx=0;idxstapriv; + struct sta_info *psta=NULL; + DBG_8192C(" %s mac_id=%d\n",__FUNCTION__,mac_id); + for(idx=0;idxsta_aid[mac_id-2+idx]; + if(psta !=NULL){ + psta->init_rate=evt_buf[idx]; + DBG_8192C(" %s mac_id=%d psta->init_rate=0x%x\n",__FUNCTION__,mac_id,psta->init_rate); + } + } + + } + default: + DBG_8192C(" %s evt_id =0x%x evt_len=0x%x\n",__FUNCTION__,evt_id,evt_len); + } + rtw_write8(padapter, REG_C2HEVT_CLEAR,0x0); + rtw_mdelay_os(1); + trigger=rtw_read8(padapter,REG_C2HEVT_CLEAR); + } + //DBG_8192C(" %s End\n",__FUNCTION__); +} +VOID +rtl8192c_HalDmWatchDog( + IN PADAPTER Adapter + ) +{ + BOOLEAN bFwCurrentInPSMode = _FALSE; + BOOLEAN bFwPSAwake = _TRUE; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + +#ifdef CONFIG_LPS + bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode; + Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); +#endif + +#ifdef CONFIG_P2P + // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. + // modifed by thomas. 2011.06.11. + if(Adapter->wdinfo.p2p_ps_enable) + bFwPSAwake = _FALSE; +#endif //CONFIG_P2P + + // Stop dynamic mechanism when: + // 1. RF is OFF. (No need to do DM.) + // 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.) + // 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM. + // Sometimes DM execution time is longer than 100ms such that the assertion + // in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by + // wating to long for RFChangeInProgress.) + // 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.) + // Noted by tynli. 2010.06.01. + //if(rfState == eRfOn) + if( (Adapter->hw_init_completed == _TRUE) + && ((!bFwCurrentInPSMode) && bFwPSAwake)) + { + // + // Calculate Tx/Rx statistics. + // + dm_CheckStatistics(Adapter); + + // + // For PWDB monitor and record some value for later use. + // + PWDB_Monitor(Adapter); + + // + // Dynamic Initial Gain mechanism. + // + + dm_RSSIMonitorCheck(Adapter); + + dm_FalseAlarmCounterStatistics(Adapter); + dm_DIG(Adapter); + + // + //Dynamic BB Power Saving Mechanism + // + dm_DynamicBBPowerSaving(Adapter); + + // + // Dynamic Tx Power mechanism. + // + dm_DynamicTxPower(Adapter); + + // + // Tx Power Tracking. + // + rtl8192c_dm_CheckTXPowerTracking(Adapter); + + // + // Rate Adaptive by Rx Signal Strength mechanism. + // + dm_RefreshRateAdaptiveMask(Adapter); + +#ifdef CONFIG_BT_COEXIST + //BT-Coexist + dm_BTCoexist(Adapter); +#endif + + // EDCA turbo + //update the EDCA paramter according to the Tx/RX mode + //update_EDCA_param(Adapter); + dm_CheckEdcaTurbo(Adapter); + + // + // Dynamically switch RTS/CTS protection. + // + //dm_CheckProtection(Adapter); + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + // + // Software Antenna diversity + // + dm_SW_AntennaSwitch(Adapter, SWAW_STEP_PEAK); +#endif + +#ifdef CONFIG_HW_ANTENNA_DIVERSITY + //Hybrid Antenna Diversity + dm_SelectRXDefault(Adapter); +#endif + +#ifdef CONFIG_PCI_HCI + // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. + // Tx Migration settings. + //dm_InterruptMigration(Adapter); + + //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) + // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); +#endif + +#ifdef SUPPORT_64_STA + rtl8192c_HalDmPollingC2HEvt(Adapter); +#endif //SUPPORT_64_STA + // Read REG_INIDATA_RATE_SEL value for TXDESC. + if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) + { + pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f; + } + else + { + u8 i; + for(i=1 ;( i < (Adapter->stapriv.asoc_sta_count + 1))&&(i INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; + } + } + } + + // Check GPIO to determine current RF on/off and Pbc status. + // Check Hardware Radio ON/OFF or not + //if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) + //{ + //RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); + // dm_CheckRfCtrlGPIO(Adapter); + //} + +#ifdef CONFIG_PCI_HCI + if(pHalData->bGpioHwWpsPbc) +#endif + { + dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11 + } + +} + diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c old mode 100755 new mode 100644 index 28a8cc36051efe..a3021a9b9f8166 --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c @@ -1,1230 +1,1230 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8192C_MP_C_ -#ifdef CONFIG_MP_INCLUDED - -#include -#include - -#ifdef CONFIG_RTL8192C -#include -#endif - - - -s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - - if (!netif_running(padapter->pnetdev)) { - RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); - return _FAIL; - } - - if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { - RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); - return _FAIL; - } - - if (enable) - pdmpriv->TxPowerTrackControl = _TRUE; - else - pdmpriv->TxPowerTrackControl = _FALSE; - - return _SUCCESS; -} - -void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - - *enable = pdmpriv->TxPowerTrackControl; -} - -static void Hal_disable_dm(PADAPTER padapter) -{ - u8 v8; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - - //3 1. disable firmware dynamic mechanism - // disable Power Training, Rate Adaptive - v8 = rtw_read8(padapter, REG_BCN_CTRL); - v8 &= ~EN_BCN_FUNCTION; - rtw_write8(padapter, REG_BCN_CTRL, v8); - - //3 2. disable driver dynamic mechanism - // disable Dynamic Initial Gain - // disable High Power - // disable Power Tracking - Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); - - // enable APK, LCK and IQK but disable power tracking - pdmpriv->TxPowerTrackControl = _FALSE; - Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE); -} - -/*----------------------------------------------------------------------------- - * Function: mpt_SwitchRfSetting - * - * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. - * - * Input: IN PADAPTER pAdapter - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. - * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. - * - *---------------------------------------------------------------------------*/ -void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct mp_priv *pmp = &pAdapter->mppriv; - u8 ChannelToSw = pmp->channel, eRFPath = RF90_PATH_A; - u8 ulRateIdx = pmp->rateidx; - u8 ulbandwidth = pmp->bandwidth; - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); - BOOLEAN bInteralPA = _FALSE; - u32 value = 0; - -#ifdef CONFIG_USB_HCI - if (IS_92C_SERIAL(pHalData->VersionID)) - { - //92CE-VAU (92cu mCard) - if( BOARD_MINICARD == pHalData->BoardType) - { - if (ulRateIdx < MPT_RATE_6M) // CCK rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); - } - else //OFDM~MCS rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); - } - } - else //92CU dongle - { - if (ulRateIdx < MPT_RATE_6M) // CCK rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); - } - else if (ChannelToSw & BIT0) // OFDM rate, odd number channel - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); - } - else if (ChannelToSw == 4) // OFDM rate, even number channel - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); - write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe0004); - write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); - rtw_msleep_os(1); - write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); - } - else if(ChannelToSw == 10) // OFDM rate, even number channel - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28000); - write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000A); - write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); - rtw_msleep_os(1); - write_rfreg(pAdapter, 0, RF_SYN_G7, 0x7B333); - } - else if(ChannelToSw == 12) // OFDM rate, even number channel - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); - write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000C); - write_rfreg(pAdapter, 0, RF_SYN_G7, 0x50B); - rtw_msleep_os(1); - write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); - } - else - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); - } - } - } - else //88cu - { - - //mcard interface - - if( BOARD_MINICARD == pHalData->BoardType) - { - if (ulRateIdx < MPT_RATE_6M) // CCK rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); - } - else //OFDM~MCS rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); - } - - if(ChannelToSw == 6 || ChannelToSw == 8) - { - write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); - write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); - write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); - } - else - { - write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x20); - write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x20); - write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); - } - } - else - { - if (ulRateIdx < MPT_RATE_6M) // CCK rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); - } - else if (ChannelToSw & BIT0) // OFDM rate, odd number channel - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); - } - else - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); - } - } - } - -#else //PCI_INTERFACE - - if (ulRateIdx < MPT_RATE_6M) // CCK rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); - } - else //OFDM~MCS rate - { - write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); - } - //88CE - if(!IS_92C_SERIAL(pHalData->VersionID)) - { - if(ChannelToSw == 6 || ChannelToSw == 8) - { - write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); - write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); - write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); - } - else - { - write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pMptCtx->backup0xc50); - write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pMptCtx->backup0xc58); - write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); - } - } - -#endif //CONFIG_USB_HCI - - -} -/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ - -/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ -void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) -{ - u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; - u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; - u8 i; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - - // get current cck swing value and check 0xa22 & 0xa23 later to match the table. - CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); - - if (!bInCH14) - { - // Readback the current bb cck swing value and compare with the table to - // get the current swing index - for (i = 0; i < CCK_TABLE_SIZE; i++) - { - if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && - (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) - { - CCKSwingIndex = i; -// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", -// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); - break; - } - } - - //Write 0xa22 0xa23 - TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ; - - - //Write 0xa24 ~ 0xa27 - TempVal2 = 0; - TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+ - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); - - //Write 0xa28 0xa29 - TempVal3 = 0; - TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + - (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ; - } - else - { - for (i = 0; i < CCK_TABLE_SIZE; i++) - { - if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && - (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) - { - CCKSwingIndex = i; -// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", -// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); - break; - } - } - - //Write 0xa22 0xa23 - TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + - (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ; - - //Write 0xa24 ~ 0xa27 - TempVal2 = 0; - TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + - (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + - (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+ - (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); - - //Write 0xa28 0xa29 - TempVal3 = 0; - TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + - (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ; - } - - write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); - write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); - write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); -} - -void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) -{ - s32 TempCCk; - u8 CCK_index, CCK_index_old; - u8 Action = 0; //0: no action, 1: even->odd, 2:odd->even - u8 TimeOut = 100; - s32 i = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; - - - if (!IS_92C_SERIAL(pHalData->VersionID) || !IS_NORMAL_CHIP(pHalData->VersionID)) - return; -#if 0 - while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE) - { - PlatformSleepUs(100); - TimeOut--; - if(TimeOut <= 0) - { - RTPRINT(FINIT, INIT_TxPower, - ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" )); - break; - } - } -#endif - if (beven && !pMptCtx->bMptIndexEven) //odd->even - { - Action = 2; - pMptCtx->bMptIndexEven = _TRUE; - } - else if (!beven && pMptCtx->bMptIndexEven) //even->odd - { - Action = 1; - pMptCtx->bMptIndexEven = _FALSE; - } - - if (Action != 0) - { - //Query CCK default setting From 0xa24 - TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; - for (i = 0; i < CCK_TABLE_SIZE; i++) - { - if (pHalData->dmpriv.bCCKinCH14) - { - if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE) - { - CCK_index_old = (u8) i; -// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", -// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); - break; - } - } - else - { - if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE) - { - CCK_index_old = (u8) i; -// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", -// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); - break; - } - } - } - - if (Action == 1) - CCK_index = CCK_index_old - 1; - else - CCK_index = CCK_index_old + 1; - -// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n", -// CCK_index)); - - //Adjust CCK according to gain index - if (!pHalData->dmpriv.bCCKinCH14) { - rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); - rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); - rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); - rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); - rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); - rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); - rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); - rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); - } else { - rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); - rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); - rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); - rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); - rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); - rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); - rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); - rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); - } - } -#if 0 - RTPRINT(FINIT, INIT_TxPower, - ("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20))); - - PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE); -#endif -} -/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ - -/* - * SetChannel - * Description - * Use H2C command to change channel, - * not only modify rf register, but also other setting need to be done. - */ -void Hal_SetChannel(PADAPTER pAdapter) -{ -#if 0 - struct mp_priv *pmp = &pAdapter->mppriv; - -// SelectChannel(pAdapter, pmp->channel); - set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth); -#else - u8 eRFPath; - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct mp_priv *pmp = &pAdapter->mppriv; - u8 channel = pmp->channel; - u8 bandwidth = pmp->bandwidth; - u8 rate = pmp->rateidx; - - - // set RF channel register - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) - { - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - _write_rfreg(pAdapter, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel); - else - _write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel); - } - Hal_mpt_SwitchRfSetting(pAdapter); - - SelectChannel(pAdapter, channel); - - if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) { - pHalData->dmpriv.bCCKinCH14 = _TRUE; - Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); - } - else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) { - pHalData->dmpriv.bCCKinCH14 = _FALSE; - Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); - } -#if 0 -//#ifdef CONFIG_USB_HCI - // Georgia add 2009-11-17, suggested by Edlu , for 8188CU ,46 PIN - if (!IS_92C_SERIAL(pHalData->VersionID) && !IS_NORMAL_CHIP(pHalData->VersionID)) { - mpt_AdjustRFRegByRateByChan92CU(pAdapter, rate, pHalData->CurrentChannel, bandwidth); - } -#endif - -#endif -} - -/* - * Notice - * Switch bandwitdth may change center frequency(channel) - */ -void Hal_SetBandwidth(PADAPTER pAdapter) -{ - struct mp_priv *pmp = &pAdapter->mppriv; - - - SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); - Hal_mpt_SwitchRfSetting(pAdapter); -} - -void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) -{ - u32 tmpval = 0; - - - // rf-A cck tx power - write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); - tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; - write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); - - // rf-B cck tx power - write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); - tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; - write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); - - RT_TRACE(_module_mp_, _drv_notice_, - ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", - TxPower[RF_PATH_A], TxPower[RF_PATH_B])); -} - -void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) -{ - u32 TxAGC = 0; - u8 tmpval = 0; - PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - - // HT Tx-rf(A) - tmpval = TxPower[RF_PATH_A]; - TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; - - write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); - - if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) - { - if (tmpval > pMptCtx->APK_bound[RF_PATH_A]) - write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][0]); - else - write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][1]); - } - - // HT Tx-rf(B) - tmpval = TxPower[RF_PATH_B]; - TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; - - write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); - write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); - - if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) - { - if (tmpval > pMptCtx->APK_bound[RF_PATH_B]) - write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][0]); - else - write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][1]); - } - - RT_TRACE(_module_mp_, _drv_notice_, - ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n", - TxPower[RF_PATH_A], TxPower[RF_PATH_B])); -} - -void Hal_SetAntennaPathPower(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u8 TxPowerLevel[MAX_RF_PATH_NUMS]; - u8 rfPath; - - TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; - TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; - - switch (pAdapter->mppriv.antenna_tx) - { - case ANTENNA_A: - default: - rfPath = RF_PATH_A; - break; - case ANTENNA_B: - rfPath = RF_PATH_B; - break; - case ANTENNA_C: - rfPath = RF_PATH_C; - break; - } - - switch (pHalData->rf_chip) - { - case RF_8225: - case RF_8256: - case RF_6052: - Hal_SetCCKTxPower(pAdapter, TxPowerLevel); - if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate - Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); - Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); - break; - - default: - break; - } -} - -void Hal_SetTxPower(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u8 TxPower = pAdapter->mppriv.txpoweridx; - u8 TxPowerLevel[MAX_RF_PATH_NUMS]; - u8 rf, rfPath; - - for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) { - TxPowerLevel[rf] = TxPower; - } - - switch (pAdapter->mppriv.antenna_tx) - { - case ANTENNA_A: - default: - rfPath = RF_PATH_A; - break; - case ANTENNA_B: - rfPath = RF_PATH_B; - break; - case ANTENNA_C: - rfPath = RF_PATH_C; - break; - } - - switch (pHalData->rf_chip) - { - // 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! - // We should call normal driver API later!! - case RF_8225: - case RF_8256: - case RF_6052: - Hal_SetCCKTxPower(pAdapter, TxPowerLevel); - if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate - Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); - Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); - break; - - default: - break; - } - -// SetCCKTxPower(pAdapter, TxPower); -// SetOFDMTxPower(pAdapter, TxPower); -} - -void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) -{ - u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; - - TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); - TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); - TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); - - tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); - write_bbreg(pAdapter, rFPGA0_TxGainStage, - (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); -} - -void Hal_SetDataRate(PADAPTER pAdapter) -{ - Hal_mpt_SwitchRfSetting(pAdapter); -} - -#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) -/*------------------------------Define structure----------------------------*/ -typedef struct _R_ANTENNA_SELECT_OFDM { - u32 r_tx_antenna:4; - u32 r_ant_l:4; - u32 r_ant_non_ht:4; - u32 r_ant_ht1:4; - u32 r_ant_ht2:4; - u32 r_ant_ht_s1:4; - u32 r_ant_non_ht_s1:4; - u32 OFDM_TXSC:2; - u32 Reserved:2; -}R_ANTENNA_SELECT_OFDM; - -typedef struct _R_ANTENNA_SELECT_CCK { - u8 r_cckrx_enable_2:2; - u8 r_cckrx_enable:2; - u8 r_ccktx_enable:4; -}R_ANTENNA_SELECT_CCK; -#endif - -void Hal_SetAntenna(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ - R_ANTENNA_SELECT_CCK *p_cck_txrx; - - u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; - u8 chgTx = 0, chgRx = 0; - u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; - - - p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; - p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; - - p_ofdm_tx->r_ant_ht1 = 0x1; - p_ofdm_tx->r_ant_ht2 = 0x2; // Second TX RF path is A - p_ofdm_tx->r_ant_non_ht = 0x3; // 0x1+0x2=0x3 - - switch (pAdapter->mppriv.antenna_tx) - { - case ANTENNA_A: - p_ofdm_tx->r_tx_antenna = 0x1; - r_ofdm_tx_en_val = 0x1; - p_ofdm_tx->r_ant_l = 0x1; - p_ofdm_tx->r_ant_ht_s1 = 0x1; - p_ofdm_tx->r_ant_non_ht_s1 = 0x1; - p_cck_txrx->r_ccktx_enable = 0x8; - chgTx = 1; - - // From SD3 Willis suggestion !!! Set RF A=TX and B as standby -// if (IS_HARDWARE_TYPE_8192S(pAdapter)) - { - write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); - write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); - r_ofdm_tx_en_val = 0x3; - - // Power save - //cosa r_ant_select_ofdm_val = 0x11111111; - - // We need to close RFB by SW control - if (pHalData->rf_type == RF_2T2R) - { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); - } - } - break; - - case ANTENNA_B: - p_ofdm_tx->r_tx_antenna = 0x2; - r_ofdm_tx_en_val = 0x2; - p_ofdm_tx->r_ant_l = 0x2; - p_ofdm_tx->r_ant_ht_s1 = 0x2; - p_ofdm_tx->r_ant_non_ht_s1 = 0x2; - p_cck_txrx->r_ccktx_enable = 0x4; - chgTx = 1; - - // From SD3 Willis suggestion !!! Set RF A as standby - //if (IS_HARDWARE_TYPE_8192S(pAdapter)) - { - PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); - PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); -// r_ofdm_tx_en_val = 0x3; - - // Power save - //cosa r_ant_select_ofdm_val = 0x22222222; - - // 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. - // 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control - if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) - { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); -// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); - } - } - break; - - case ANTENNA_AB: // For 8192S - p_ofdm_tx->r_tx_antenna = 0x3; - r_ofdm_tx_en_val = 0x3; - p_ofdm_tx->r_ant_l = 0x3; - p_ofdm_tx->r_ant_ht_s1 = 0x3; - p_ofdm_tx->r_ant_non_ht_s1 = 0x3; - p_cck_txrx->r_ccktx_enable = 0xC; - chgTx = 1; - - // From SD3 Willis suggestion !!! Set RF B as standby - //if (IS_HARDWARE_TYPE_8192S(pAdapter)) - { - PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); - PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); - - // Disable Power save - //cosa r_ant_select_ofdm_val = 0x3321333; -#if 0 - // 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table. - if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07. - { - mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF90_PATH_A); - } -#endif - // 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control - if (pHalData->rf_type == RF_2T2R) - { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); -// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); - } - } - break; - - default: - break; - } - - // - // r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D - // r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D - // r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D - // - switch (pAdapter->mppriv.antenna_rx) - { - case ANTENNA_A: - r_rx_antenna_ofdm = 0x1; // A - p_cck_txrx->r_cckrx_enable = 0x0; // default: A - p_cck_txrx->r_cckrx_enable_2 = 0x0; // option: A - chgRx = 1; - break; - - case ANTENNA_B: - r_rx_antenna_ofdm = 0x2; // B - p_cck_txrx->r_cckrx_enable = 0x1; // default: B - p_cck_txrx->r_cckrx_enable_2 = 0x1; // option: B - chgRx = 1; - break; - - case ANTENNA_AB: - r_rx_antenna_ofdm = 0x3; // AB - p_cck_txrx->r_cckrx_enable = 0x0; // default:A - p_cck_txrx->r_cckrx_enable_2 = 0x1; // option:B - chgRx = 1; - break; - - default: - break; - } - - if (chgTx && chgRx) - { - switch(pHalData->rf_chip) - { - case RF_8225: - case RF_8256: - case RF_6052: - //r_ant_sel_cck_val = r_ant_select_cck_val; - PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); //OFDM Tx - PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); //OFDM Tx - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx - PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx - PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val); //CCK TxRx - - break; - - default: - break; - } - } - - RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); -} - -s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - - if (!netif_running(pAdapter->pnetdev)) { - RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); - return _FAIL; - } - - if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { - RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); - return _FAIL; - } - - target_ther &= 0xff; - if (target_ther < 0x07) - target_ther = 0x07; - else if (target_ther > 0x1d) - target_ther = 0x1d; - - pHalData->EEPROMThermalMeter = target_ther; - - return _SUCCESS; -} - -void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) -{ - - write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60); // 0x24: RF Reg[6:5] - -// RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); -} - -u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) -{ - u32 ThermalValue = 0; - - ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F); // 0x24: RF Reg[4:0] -// RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue)); - return (u8)ThermalValue; -} - -void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value) -{ -#if 0 - fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); - rtw_msleep_os(1000); - fw_cmd_data(pAdapter, value, 1); - *value &= 0xFF; -#else - - Hal_TriggerRFThermalMeter(pAdapter); - rtw_msleep_os(1000); - *value = Hal_ReadRFThermalMeter(pAdapter); -#endif -} - -void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; - if (bStart)// Start Single Carrier. - { - RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n")); - // 1. if OFDM block on? - if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on - - { - // 2. set CCK test mode off, set to CCK normal mode - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); - // 3. turn on scramble setting - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); - } - // 4. Turn On Single Carrier Tx and turn off the other test modes. - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); -#ifdef CONFIG_RTL8192C - // 5. Disable TX power saving at STF & LLTF - write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1); -#endif - } - else// Stop Single Carrier. - { - RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n")); - - // Turn off all test modes. - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); -#ifdef CONFIG_RTL8192C - // Cancel disable TX power saving at STF&LLTF - write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0); -#endif - //Delay 10 ms //delay_ms(10); - rtw_msleep_os(10); - - //BB Reset - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - } -} - - -void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); - - u8 rfPath; - - switch (pAdapter->mppriv.antenna_tx) - { - case ANTENNA_A: - default: - rfPath = RF_PATH_A; - break; - case ANTENNA_B: - rfPath = RF_PATH_B; - break; - case ANTENNA_C: - rfPath = RF_PATH_C; - break; - } - - pAdapter->mppriv.MptCtx.bSingleTone = bStart; - if (bStart)// Start Single Tone. - { - RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n")); - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); - - if (is92C) - { - _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01); - rtw_usleep_os(100); - if (rfPath == RF_PATH_A) - write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on. - else if (rfPath == RF_PATH_B) - write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on. - } else { - write_rfreg(pAdapter, rfPath, 0x21, 0xd4000); - rtw_usleep_os(100); - } - - write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on. - rtw_usleep_os(100); - } - else// Stop Single Tone. - { - RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n")); - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); - - if (is92C) { - _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00); - rtw_usleep_os(100); - write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on. - write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on. - rtw_usleep_os(100); - } else { - write_rfreg(pAdapter, rfPath, 0x21, 0x54000); - rtw_usleep_os(100); - - write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on. - rtw_usleep_os(100); - } - } - -} - - -void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) -{ - pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; - if (bStart) // Start Carrier Suppression. - { - RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n")); - //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) - if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) - { - // 1. if CCK block on? - if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on - - //Turn Off All Test Mode - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); //turn off scramble setting - - //Set CCK Tx Test Rate - //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate); - write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); //Set FTxRate to 1Mbps - } - } - else// Stop Carrier Suppression. - { - RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); - //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) - if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) { - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting - - //BB Reset - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - } - } - //DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n"); -} - -void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) -{ - u32 cckrate; - - if (bStart) - { - RT_TRACE(_module_mp_, _drv_alert_, - ("SetCCKContinuousTx: test start\n")); - - // 1. if CCK block on? - if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on - - //Turn Off All Test Mode - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - //Set CCK Tx Test Rate - #if 0 - switch(pAdapter->mppriv.rateidx) - { - case 2: - cckrate = 0; - break; - case 4: - cckrate = 1; - break; - case 11: - cckrate = 2; - break; - case 22: - cckrate = 3; - break; - default: - cckrate = 0; - break; - } - #else - cckrate = pAdapter->mppriv.rateidx; - #endif - write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting - -#ifdef CONFIG_RTL8192C - // Patch for CCK 11M waveform - if (cckrate == MPT_RATE_1M) - write_bbreg(pAdapter, 0xA71, BIT(6), bDisable); - else - write_bbreg(pAdapter, 0xA71, BIT(6), bEnable); -#endif - - } - else { - RT_TRACE(_module_mp_, _drv_info_, - ("SetCCKContinuousTx: test stop\n")); - - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting - - //BB Reset - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - } - - pAdapter->mppriv.MptCtx.bCckContTx = bStart; - pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; -}/* mpt_StartCckContTx */ - -void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - if (bStart) { - RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n")); - // 1. if OFDM block on? - if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) - write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on - { - - // 2. set CCK test mode off, set to CCK normal mode - write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); - - // 3. turn on scramble setting - write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); - } - // 4. Turn On Continue Tx and turn off the other test modes. - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - } else { - RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n")); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); - write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); - //Delay 10 ms - rtw_msleep_os(10); - //BB Reset - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); - write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); - } - - pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; - pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; -}/* mpt_StartOfdmContTx */ - -void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart) -{ -#if 0 - // ADC turn off [bit24-21] adc port0 ~ port1 - if (bStart) { - write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF); - rtw_usleep_os(100); - } -#endif - RT_TRACE(_module_mp_, _drv_info_, - ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); - - pAdapter->mppriv.MptCtx.bStartContTx = bStart; - if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) - { - Hal_SetCCKContinuousTx(pAdapter, bStart); - } - else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && - (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) - { - Hal_SetOFDMContinuousTx(pAdapter, bStart); - } -#if 0 - // ADC turn on [bit24-21] adc port0 ~ port1 - if (!bStart) { - write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000); - } -#endif -} - -#endif // CONFIG_MP_INCLUDE +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8192C_MP_C_ +#ifdef CONFIG_MP_INCLUDED + +#include +#include + +#ifdef CONFIG_RTL8192C +#include +#endif + + + +s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + + if (!netif_running(padapter->pnetdev)) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); + return _FAIL; + } + + if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); + return _FAIL; + } + + if (enable) + pdmpriv->TxPowerTrackControl = _TRUE; + else + pdmpriv->TxPowerTrackControl = _FALSE; + + return _SUCCESS; +} + +void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + + *enable = pdmpriv->TxPowerTrackControl; +} + +static void Hal_disable_dm(PADAPTER padapter) +{ + u8 v8; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + + //3 1. disable firmware dynamic mechanism + // disable Power Training, Rate Adaptive + v8 = rtw_read8(padapter, REG_BCN_CTRL); + v8 &= ~EN_BCN_FUNCTION; + rtw_write8(padapter, REG_BCN_CTRL, v8); + + //3 2. disable driver dynamic mechanism + // disable Dynamic Initial Gain + // disable High Power + // disable Power Tracking + Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); + + // enable APK, LCK and IQK but disable power tracking + pdmpriv->TxPowerTrackControl = _FALSE; + Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE); +} + +/*----------------------------------------------------------------------------- + * Function: mpt_SwitchRfSetting + * + * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. + * + * Input: IN PADAPTER pAdapter + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. + * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. + * + *---------------------------------------------------------------------------*/ +void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct mp_priv *pmp = &pAdapter->mppriv; + u8 ChannelToSw = pmp->channel, eRFPath = RF90_PATH_A; + u8 ulRateIdx = pmp->rateidx; + u8 ulbandwidth = pmp->bandwidth; + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); + BOOLEAN bInteralPA = _FALSE; + u32 value = 0; + +#ifdef CONFIG_USB_HCI + if (IS_92C_SERIAL(pHalData->VersionID)) + { + //92CE-VAU (92cu mCard) + if( BOARD_MINICARD == pHalData->BoardType) + { + if (ulRateIdx < MPT_RATE_6M) // CCK rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); + } + else //OFDM~MCS rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); + } + } + else //92CU dongle + { + if (ulRateIdx < MPT_RATE_6M) // CCK rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); + } + else if (ChannelToSw & BIT0) // OFDM rate, odd number channel + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); + } + else if (ChannelToSw == 4) // OFDM rate, even number channel + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); + write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe0004); + write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); + rtw_msleep_os(1); + write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); + } + else if(ChannelToSw == 10) // OFDM rate, even number channel + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28000); + write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000A); + write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); + rtw_msleep_os(1); + write_rfreg(pAdapter, 0, RF_SYN_G7, 0x7B333); + } + else if(ChannelToSw == 12) // OFDM rate, even number channel + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); + write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000C); + write_rfreg(pAdapter, 0, RF_SYN_G7, 0x50B); + rtw_msleep_os(1); + write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); + } + else + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); + } + } + } + else //88cu + { + + //mcard interface + + if( BOARD_MINICARD == pHalData->BoardType) + { + if (ulRateIdx < MPT_RATE_6M) // CCK rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); + } + else //OFDM~MCS rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); + } + + if(ChannelToSw == 6 || ChannelToSw == 8) + { + write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); + write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); + write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); + } + else + { + write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x20); + write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x20); + write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); + } + } + else + { + if (ulRateIdx < MPT_RATE_6M) // CCK rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); + } + else if (ChannelToSw & BIT0) // OFDM rate, odd number channel + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); + } + else + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); + } + } + } + +#else //PCI_INTERFACE + + if (ulRateIdx < MPT_RATE_6M) // CCK rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); + } + else //OFDM~MCS rate + { + write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); + } + //88CE + if(!IS_92C_SERIAL(pHalData->VersionID)) + { + if(ChannelToSw == 6 || ChannelToSw == 8) + { + write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); + write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); + write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); + } + else + { + write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pMptCtx->backup0xc50); + write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pMptCtx->backup0xc58); + write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); + } + } + +#endif //CONFIG_USB_HCI + + +} +/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ + +/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ +void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) +{ + u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; + u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; + u8 i; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + // get current cck swing value and check 0xa22 & 0xa23 later to match the table. + CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); + + if (!bInCH14) + { + // Readback the current bb cck swing value and compare with the table to + // get the current swing index + for (i = 0; i < CCK_TABLE_SIZE; i++) + { + if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && + (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) + { + CCKSwingIndex = i; +// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", +// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); + break; + } + } + + //Write 0xa22 0xa23 + TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ; + + + //Write 0xa24 ~ 0xa27 + TempVal2 = 0; + TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+ + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); + + //Write 0xa28 0xa29 + TempVal3 = 0; + TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + + (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ; + } + else + { + for (i = 0; i < CCK_TABLE_SIZE; i++) + { + if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && + (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) + { + CCKSwingIndex = i; +// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", +// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); + break; + } + } + + //Write 0xa22 0xa23 + TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + + (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ; + + //Write 0xa24 ~ 0xa27 + TempVal2 = 0; + TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + + (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + + (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+ + (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); + + //Write 0xa28 0xa29 + TempVal3 = 0; + TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + + (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ; + } + + write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); + write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); + write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); +} + +void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) +{ + s32 TempCCk; + u8 CCK_index, CCK_index_old; + u8 Action = 0; //0: no action, 1: even->odd, 2:odd->even + u8 TimeOut = 100; + s32 i = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; + + + if (!IS_92C_SERIAL(pHalData->VersionID) || !IS_NORMAL_CHIP(pHalData->VersionID)) + return; +#if 0 + while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE) + { + PlatformSleepUs(100); + TimeOut--; + if(TimeOut <= 0) + { + RTPRINT(FINIT, INIT_TxPower, + ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" )); + break; + } + } +#endif + if (beven && !pMptCtx->bMptIndexEven) //odd->even + { + Action = 2; + pMptCtx->bMptIndexEven = _TRUE; + } + else if (!beven && pMptCtx->bMptIndexEven) //even->odd + { + Action = 1; + pMptCtx->bMptIndexEven = _FALSE; + } + + if (Action != 0) + { + //Query CCK default setting From 0xa24 + TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; + for (i = 0; i < CCK_TABLE_SIZE; i++) + { + if (pHalData->dmpriv.bCCKinCH14) + { + if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE) + { + CCK_index_old = (u8) i; +// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", +// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); + break; + } + } + else + { + if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE) + { + CCK_index_old = (u8) i; +// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", +// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); + break; + } + } + } + + if (Action == 1) + CCK_index = CCK_index_old - 1; + else + CCK_index = CCK_index_old + 1; + +// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n", +// CCK_index)); + + //Adjust CCK according to gain index + if (!pHalData->dmpriv.bCCKinCH14) { + rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); + rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); + rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); + rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); + rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); + rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); + rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); + rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); + } else { + rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); + rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); + rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); + rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); + rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); + rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); + rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); + rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); + } + } +#if 0 + RTPRINT(FINIT, INIT_TxPower, + ("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20))); + + PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE); +#endif +} +/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ + +/* + * SetChannel + * Description + * Use H2C command to change channel, + * not only modify rf register, but also other setting need to be done. + */ +void Hal_SetChannel(PADAPTER pAdapter) +{ +#if 0 + struct mp_priv *pmp = &pAdapter->mppriv; + +// SelectChannel(pAdapter, pmp->channel); + set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth); +#else + u8 eRFPath; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct mp_priv *pmp = &pAdapter->mppriv; + u8 channel = pmp->channel; + u8 bandwidth = pmp->bandwidth; + u8 rate = pmp->rateidx; + + + // set RF channel register + for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) + { + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + _write_rfreg(pAdapter, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel); + else + _write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel); + } + Hal_mpt_SwitchRfSetting(pAdapter); + + SelectChannel(pAdapter, channel); + + if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) { + pHalData->dmpriv.bCCKinCH14 = _TRUE; + Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); + } + else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) { + pHalData->dmpriv.bCCKinCH14 = _FALSE; + Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); + } +#if 0 +//#ifdef CONFIG_USB_HCI + // Georgia add 2009-11-17, suggested by Edlu , for 8188CU ,46 PIN + if (!IS_92C_SERIAL(pHalData->VersionID) && !IS_NORMAL_CHIP(pHalData->VersionID)) { + mpt_AdjustRFRegByRateByChan92CU(pAdapter, rate, pHalData->CurrentChannel, bandwidth); + } +#endif + +#endif +} + +/* + * Notice + * Switch bandwitdth may change center frequency(channel) + */ +void Hal_SetBandwidth(PADAPTER pAdapter) +{ + struct mp_priv *pmp = &pAdapter->mppriv; + + + SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); + Hal_mpt_SwitchRfSetting(pAdapter); +} + +void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) +{ + u32 tmpval = 0; + + + // rf-A cck tx power + write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); + tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; + write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + + // rf-B cck tx power + write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); + tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; + write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + + RT_TRACE(_module_mp_, _drv_notice_, + ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", + TxPower[RF_PATH_A], TxPower[RF_PATH_B])); +} + +void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) +{ + u32 TxAGC = 0; + u8 tmpval = 0; + PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + + // HT Tx-rf(A) + tmpval = TxPower[RF_PATH_A]; + TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; + + write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); + + if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) + { + if (tmpval > pMptCtx->APK_bound[RF_PATH_A]) + write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][0]); + else + write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][1]); + } + + // HT Tx-rf(B) + tmpval = TxPower[RF_PATH_B]; + TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; + + write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); + write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); + + if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) + { + if (tmpval > pMptCtx->APK_bound[RF_PATH_B]) + write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][0]); + else + write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][1]); + } + + RT_TRACE(_module_mp_, _drv_notice_, + ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n", + TxPower[RF_PATH_A], TxPower[RF_PATH_B])); +} + +void Hal_SetAntennaPathPower(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 TxPowerLevel[MAX_RF_PATH_NUMS]; + u8 rfPath; + + TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; + TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + default: + rfPath = RF_PATH_A; + break; + case ANTENNA_B: + rfPath = RF_PATH_B; + break; + case ANTENNA_C: + rfPath = RF_PATH_C; + break; + } + + switch (pHalData->rf_chip) + { + case RF_8225: + case RF_8256: + case RF_6052: + Hal_SetCCKTxPower(pAdapter, TxPowerLevel); + if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate + Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); + Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); + break; + + default: + break; + } +} + +void Hal_SetTxPower(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 TxPower = pAdapter->mppriv.txpoweridx; + u8 TxPowerLevel[MAX_RF_PATH_NUMS]; + u8 rf, rfPath; + + for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) { + TxPowerLevel[rf] = TxPower; + } + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + default: + rfPath = RF_PATH_A; + break; + case ANTENNA_B: + rfPath = RF_PATH_B; + break; + case ANTENNA_C: + rfPath = RF_PATH_C; + break; + } + + switch (pHalData->rf_chip) + { + // 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! + // We should call normal driver API later!! + case RF_8225: + case RF_8256: + case RF_6052: + Hal_SetCCKTxPower(pAdapter, TxPowerLevel); + if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate + Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); + Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); + break; + + default: + break; + } + +// SetCCKTxPower(pAdapter, TxPower); +// SetOFDMTxPower(pAdapter, TxPower); +} + +void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) +{ + u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; + + TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); + TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); + TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); + + tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); + write_bbreg(pAdapter, rFPGA0_TxGainStage, + (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); +} + +void Hal_SetDataRate(PADAPTER pAdapter) +{ + Hal_mpt_SwitchRfSetting(pAdapter); +} + +#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) +/*------------------------------Define structure----------------------------*/ +typedef struct _R_ANTENNA_SELECT_OFDM { + u32 r_tx_antenna:4; + u32 r_ant_l:4; + u32 r_ant_non_ht:4; + u32 r_ant_ht1:4; + u32 r_ant_ht2:4; + u32 r_ant_ht_s1:4; + u32 r_ant_non_ht_s1:4; + u32 OFDM_TXSC:2; + u32 Reserved:2; +}R_ANTENNA_SELECT_OFDM; + +typedef struct _R_ANTENNA_SELECT_CCK { + u8 r_cckrx_enable_2:2; + u8 r_cckrx_enable:2; + u8 r_ccktx_enable:4; +}R_ANTENNA_SELECT_CCK; +#endif + +void Hal_SetAntenna(PADAPTER pAdapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ + R_ANTENNA_SELECT_CCK *p_cck_txrx; + + u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; + u8 chgTx = 0, chgRx = 0; + u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; + + + p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; + p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; + + p_ofdm_tx->r_ant_ht1 = 0x1; + p_ofdm_tx->r_ant_ht2 = 0x2; // Second TX RF path is A + p_ofdm_tx->r_ant_non_ht = 0x3; // 0x1+0x2=0x3 + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + p_ofdm_tx->r_tx_antenna = 0x1; + r_ofdm_tx_en_val = 0x1; + p_ofdm_tx->r_ant_l = 0x1; + p_ofdm_tx->r_ant_ht_s1 = 0x1; + p_ofdm_tx->r_ant_non_ht_s1 = 0x1; + p_cck_txrx->r_ccktx_enable = 0x8; + chgTx = 1; + + // From SD3 Willis suggestion !!! Set RF A=TX and B as standby +// if (IS_HARDWARE_TYPE_8192S(pAdapter)) + { + write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); + write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); + r_ofdm_tx_en_val = 0x3; + + // Power save + //cosa r_ant_select_ofdm_val = 0x11111111; + + // We need to close RFB by SW control + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); + } + } + break; + + case ANTENNA_B: + p_ofdm_tx->r_tx_antenna = 0x2; + r_ofdm_tx_en_val = 0x2; + p_ofdm_tx->r_ant_l = 0x2; + p_ofdm_tx->r_ant_ht_s1 = 0x2; + p_ofdm_tx->r_ant_non_ht_s1 = 0x2; + p_cck_txrx->r_ccktx_enable = 0x4; + chgTx = 1; + + // From SD3 Willis suggestion !!! Set RF A as standby + //if (IS_HARDWARE_TYPE_8192S(pAdapter)) + { + PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); +// r_ofdm_tx_en_val = 0x3; + + // Power save + //cosa r_ant_select_ofdm_val = 0x22222222; + + // 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. + // 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control + if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); +// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); + } + } + break; + + case ANTENNA_AB: // For 8192S + p_ofdm_tx->r_tx_antenna = 0x3; + r_ofdm_tx_en_val = 0x3; + p_ofdm_tx->r_ant_l = 0x3; + p_ofdm_tx->r_ant_ht_s1 = 0x3; + p_ofdm_tx->r_ant_non_ht_s1 = 0x3; + p_cck_txrx->r_ccktx_enable = 0xC; + chgTx = 1; + + // From SD3 Willis suggestion !!! Set RF B as standby + //if (IS_HARDWARE_TYPE_8192S(pAdapter)) + { + PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); + PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); + + // Disable Power save + //cosa r_ant_select_ofdm_val = 0x3321333; +#if 0 + // 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table. + if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07. + { + mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF90_PATH_A); + } +#endif + // 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control + if (pHalData->rf_type == RF_2T2R) + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); +// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); + } + } + break; + + default: + break; + } + + // + // r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D + // r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D + // r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D + // + switch (pAdapter->mppriv.antenna_rx) + { + case ANTENNA_A: + r_rx_antenna_ofdm = 0x1; // A + p_cck_txrx->r_cckrx_enable = 0x0; // default: A + p_cck_txrx->r_cckrx_enable_2 = 0x0; // option: A + chgRx = 1; + break; + + case ANTENNA_B: + r_rx_antenna_ofdm = 0x2; // B + p_cck_txrx->r_cckrx_enable = 0x1; // default: B + p_cck_txrx->r_cckrx_enable_2 = 0x1; // option: B + chgRx = 1; + break; + + case ANTENNA_AB: + r_rx_antenna_ofdm = 0x3; // AB + p_cck_txrx->r_cckrx_enable = 0x0; // default:A + p_cck_txrx->r_cckrx_enable_2 = 0x1; // option:B + chgRx = 1; + break; + + default: + break; + } + + if (chgTx && chgRx) + { + switch(pHalData->rf_chip) + { + case RF_8225: + case RF_8256: + case RF_6052: + //r_ant_sel_cck_val = r_ant_select_cck_val; + PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); //OFDM Tx + PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); //OFDM Tx + PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx + PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx + PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val); //CCK TxRx + + break; + + default: + break; + } + } + + RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); +} + +s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + + if (!netif_running(pAdapter->pnetdev)) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); + return _FAIL; + } + + if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { + RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); + return _FAIL; + } + + target_ther &= 0xff; + if (target_ther < 0x07) + target_ther = 0x07; + else if (target_ther > 0x1d) + target_ther = 0x1d; + + pHalData->EEPROMThermalMeter = target_ther; + + return _SUCCESS; +} + +void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) +{ + + write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60); // 0x24: RF Reg[6:5] + +// RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); +} + +u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) +{ + u32 ThermalValue = 0; + + ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F); // 0x24: RF Reg[4:0] +// RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue)); + return (u8)ThermalValue; +} + +void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value) +{ +#if 0 + fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); + rtw_msleep_os(1000); + fw_cmd_data(pAdapter, value, 1); + *value &= 0xFF; +#else + + Hal_TriggerRFThermalMeter(pAdapter); + rtw_msleep_os(1000); + *value = Hal_ReadRFThermalMeter(pAdapter); +#endif +} + +void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; + if (bStart)// Start Single Carrier. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n")); + // 1. if OFDM block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on + + { + // 2. set CCK test mode off, set to CCK normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); + // 3. turn on scramble setting + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); + } + // 4. Turn On Single Carrier Tx and turn off the other test modes. + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); +#ifdef CONFIG_RTL8192C + // 5. Disable TX power saving at STF & LLTF + write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1); +#endif + } + else// Stop Single Carrier. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n")); + + // Turn off all test modes. + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); +#ifdef CONFIG_RTL8192C + // Cancel disable TX power saving at STF&LLTF + write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0); +#endif + //Delay 10 ms //delay_ms(10); + rtw_msleep_os(10); + + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + } +} + + +void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + u8 rfPath; + + switch (pAdapter->mppriv.antenna_tx) + { + case ANTENNA_A: + default: + rfPath = RF_PATH_A; + break; + case ANTENNA_B: + rfPath = RF_PATH_B; + break; + case ANTENNA_C: + rfPath = RF_PATH_C; + break; + } + + pAdapter->mppriv.MptCtx.bSingleTone = bStart; + if (bStart)// Start Single Tone. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n")); + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); + + if (is92C) + { + _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01); + rtw_usleep_os(100); + if (rfPath == RF_PATH_A) + write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on. + else if (rfPath == RF_PATH_B) + write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on. + } else { + write_rfreg(pAdapter, rfPath, 0x21, 0xd4000); + rtw_usleep_os(100); + } + + write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on. + rtw_usleep_os(100); + } + else// Stop Single Tone. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n")); + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); + + if (is92C) { + _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00); + rtw_usleep_os(100); + write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on. + write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on. + rtw_usleep_os(100); + } else { + write_rfreg(pAdapter, rfPath, 0x21, 0x54000); + rtw_usleep_os(100); + + write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on. + rtw_usleep_os(100); + } + } + +} + + +void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) +{ + pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; + if (bStart) // Start Carrier Suppression. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n")); + //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) + if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) + { + // 1. if CCK block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on + + //Turn Off All Test Mode + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); //turn off scramble setting + + //Set CCK Tx Test Rate + //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate); + write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); //Set FTxRate to 1Mbps + } + } + else// Stop Carrier Suppression. + { + RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); + //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) + if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) { + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting + + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + } + } + //DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n"); +} + +void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) +{ + u32 cckrate; + + if (bStart) + { + RT_TRACE(_module_mp_, _drv_alert_, + ("SetCCKContinuousTx: test start\n")); + + // 1. if CCK block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on + + //Turn Off All Test Mode + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + //Set CCK Tx Test Rate + #if 0 + switch(pAdapter->mppriv.rateidx) + { + case 2: + cckrate = 0; + break; + case 4: + cckrate = 1; + break; + case 11: + cckrate = 2; + break; + case 22: + cckrate = 3; + break; + default: + cckrate = 0; + break; + } + #else + cckrate = pAdapter->mppriv.rateidx; + #endif + write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting + +#ifdef CONFIG_RTL8192C + // Patch for CCK 11M waveform + if (cckrate == MPT_RATE_1M) + write_bbreg(pAdapter, 0xA71, BIT(6), bDisable); + else + write_bbreg(pAdapter, 0xA71, BIT(6), bEnable); +#endif + + } + else { + RT_TRACE(_module_mp_, _drv_info_, + ("SetCCKContinuousTx: test stop\n")); + + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting + + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + } + + pAdapter->mppriv.MptCtx.bCckContTx = bStart; + pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; +}/* mpt_StartCckContTx */ + +void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (bStart) { + RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n")); + // 1. if OFDM block on? + if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) + write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on + { + + // 2. set CCK test mode off, set to CCK normal mode + write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); + + // 3. turn on scramble setting + write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); + } + // 4. Turn On Continue Tx and turn off the other test modes. + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + } else { + RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n")); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); + write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); + //Delay 10 ms + rtw_msleep_os(10); + //BB Reset + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); + write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); + } + + pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; + pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; +}/* mpt_StartOfdmContTx */ + +void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart) +{ +#if 0 + // ADC turn off [bit24-21] adc port0 ~ port1 + if (bStart) { + write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF); + rtw_usleep_os(100); + } +#endif + RT_TRACE(_module_mp_, _drv_info_, + ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); + + pAdapter->mppriv.MptCtx.bStartContTx = bStart; + if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) + { + Hal_SetCCKContinuousTx(pAdapter, bStart); + } + else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && + (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) + { + Hal_SetOFDMContinuousTx(pAdapter, bStart); + } +#if 0 + // ADC turn on [bit24-21] adc port0 ~ port1 + if (!bStart) { + write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000); + } +#endif +} + +#endif // CONFIG_MP_INCLUDE diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c old mode 100755 new mode 100644 index d8394dfaf6a32d..e527028d8d16f7 --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c @@ -1,5583 +1,5583 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -/****************************************************************************** - - Module: rtl8192c_phycfg.c - - Note: Merge 92SE/SU PHY config as below - 1. BB register R/W API - 2. RF register R/W API - 3. Initial BB/RF/MAC config by reading BB/MAC/RF txt. - 3. Power setting API - 4. Channel switch API - 5. Initial gain switch API. - 6. Other BB/MAC/RF API. - - Function: PHY: Extern function, phy: local function - - Export: PHY_FunctionName - - Abbrev: NONE - - History: - Data Who Remark - 08/08/2008 MHC 1. Port from 9x series phycfg.c - 2. Reorganize code arch and ad description. - 3. Collect similar function. - 4. Seperate extern/local API. - 08/12/2008 MHC We must merge or move USB PHY relative function later. - 10/07/2008 MHC Add IQ calibration for PHY.(Only 1T2R mode now!!!) - 11/06/2008 MHC Add TX Power index PG file to config in 0xExx register - area to map with EEPROM/EFUSE tx pwr index. - -******************************************************************************/ -#define _HAL_8192C_PHYCFG_C_ - -#include -#include -#include -#include - -#ifdef CONFIG_IOL -#include -#endif - -#include - - -/*---------------------------Define Local Constant---------------------------*/ -/* Channel switch:The size of command tables for switch channel*/ -#define MAX_PRECMD_CNT 16 -#define MAX_RFDEPENDCMD_CNT 16 -#define MAX_POSTCMD_CNT 16 - -#define MAX_DOZE_WAITING_TIMES_9x 64 - -/*---------------------------Define Local Constant---------------------------*/ - - -/*------------------------Define global variable-----------------------------*/ - -/*------------------------Define local variable------------------------------*/ - - -/*--------------------Define export function prototype-----------------------*/ -// Please refer to header file -/*--------------------Define export function prototype-----------------------*/ - -/*----------------------------Function Body----------------------------------*/ -// -// 1. BB register R/W API -// - -/** -* Function: phy_CalculateBitShift -* -* OverView: Get shifted position of the BitMask -* -* Input: -* u4Byte BitMask, -* -* Output: none -* Return: u4Byte Return the shift bit bit position of the mask -*/ -static u32 -phy_CalculateBitShift( - u32 BitMask - ) -{ - u32 i; - - for(i=0; i<=31; i++) - { - if ( ((BitMask>>i) & 0x1 ) == 1) - break; - } - - return (i); -} - - -/** -* Function: PHY_QueryBBReg -* -* OverView: Read "sepcific bits" from BB register -* -* Input: -* PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be readback -* u4Byte BitMask //The target bit position in the target address -* //to be readback -* Output: None -* Return: u4Byte Data //The readback register value -* Note: This function is equal to "GetRegSetting" in PHY programming guide -*/ -u32 -rtl8192c_PHY_QueryBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask - ) -{ - u32 ReturnValue = 0, OriginalValue, BitShift; - u16 BBWaitCounter = 0; - -#if (DISABLE_BB_RF == 1) - return 0; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); - - OriginalValue = rtw_read32(Adapter, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - ReturnValue = (OriginalValue & BitMask) >> BitShift; - - //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); - - return (ReturnValue); - -} - - -/** -* Function: PHY_SetBBReg -* -* OverView: Write "Specific bits" to BB register (page 8~) -* -* Input: -* PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address -* //to be modified -* u4Byte Data //The new register value in the target bit position -* //of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRegSetting" in PHY programming guide -*/ - -VOID -rtl8192c_PHY_SetBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //u16 BBWaitCounter = 0; - u32 OriginalValue, BitShift; - -#if (DISABLE_BB_RF == 1) - return; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); - - if(BitMask!= bMaskDWord){//if not "double word" write - OriginalValue = rtw_read32(Adapter, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - Data = ((OriginalValue & (~BitMask)) | (Data << BitShift)); - } - - rtw_write32(Adapter, RegAddr, Data); - - //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); - -} - - -// -// 2. RF register R/W API -// - -/*----------------------------------------------------------------------------- - * Function: phy_FwRFSerialRead() - * - * Overview: We support firmware to execute RF-R/W. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 01/21/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -static u32 -phy_FwRFSerialRead( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset ) -{ - u32 retValue = 0; - //RT_ASSERT(FALSE,("deprecate!\n")); - return (retValue); - -} /* phy_FwRFSerialRead */ - - -/*----------------------------------------------------------------------------- - * Function: phy_FwRFSerialWrite() - * - * Overview: We support firmware to execute RF-R/W. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 01/21/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -static VOID -phy_FwRFSerialWrite( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u32 Data ) -{ - //RT_ASSERT(FALSE,("deprecate!\n")); -} - - -/** -* Function: phy_RFSerialRead -* -* OverView: Read regster from RF chips -* -* Input: -* PADAPTER Adapter, -* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read -* -* Output: None -* Return: u4Byte reback value -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() -*/ -static u32 -phy_RFSerialRead( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset - ) -{ - u32 retValue = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; - u32 NewOffset; - u32 tmplong,tmplong2; - u8 RfPiEnable=0; -#if 0 - if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs - return retValue; - if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs - return retValue; -#endif - // - // Make sure RF register offset is correct - // - Offset &= 0x3f; - - // - // Switch page for 8256 RF IC - // - NewOffset = Offset; - - // 2009/06/17 MH We can not execute IO for power save or other accident mode. - //if(RT_CANNOT_IO(Adapter)) - //{ - // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); - // return 0xFFFFFFFF; - //} - - // For 92S LSSI Read RFLSSIRead - // For RF A/B write 0x824/82c(does not work in the future) - // We must use 0x824 for RF A and B to execute read trigger - tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); - if(eRFPath == RF90_PATH_A) - tmplong2 = tmplong; - else - tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); - - tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF - - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); - rtw_udelay_os(10);// PlatformStallExecution(10); - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); - rtw_udelay_os(100);//PlatformStallExecution(100); - - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); - rtw_udelay_os(10);//PlatformStallExecution(10); - - if(eRFPath == RF90_PATH_A) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); - else if(eRFPath == RF90_PATH_B) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); - - if(RfPiEnable) - { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); - //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); - } - else - { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); - //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); - } - //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); - - return retValue; - -} - - - -/** -* Function: phy_RFSerialWrite -* -* OverView: Write data to RF register (page 8~) -* -* Input: -* PADAPTER Adapter, -* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read -* u4Byte Data //The new register Data in the target bit position -* //of the target to be read -* -* Output: None -* Return: None -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() - * - * Note: For RF8256 only - * The total count of RTL8256(Zebra4) register is around 36 bit it only employs - * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) - * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration - * programming guide" for more details. - * Thus, we define a sub-finction for RTL8526 register address conversion - * =========================================================== - * Register Mode RegCTL[1] RegCTL[0] Note - * (Reg00[12]) (Reg00[10]) - * =========================================================== - * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) - * ------------------------------------------------------------------ - * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) - * ------------------------------------------------------------------ - * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) - * ------------------------------------------------------------------ - * - * 2008/09/02 MH Add 92S RF definition - * - * - * -*/ -static VOID -phy_RFSerialWrite( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u32 Data - ) -{ - u32 DataAndAddr = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; - u32 NewOffset; - -#if 0 - // We should check valid regs for RF_6052 case. - if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs - return; - if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs - return; -#endif - - // 2009/06/17 MH We can not execute IO for power save or other accident mode. - //if(RT_CANNOT_IO(Adapter)) - //{ - // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); - // return; - //} - - Offset &= 0x3f; - - // - // Shadow Update - // - //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); - - // - // Switch page for 8256 RF IC - // - NewOffset = Offset; - - // - // Put write addr in [5:0] and write data in [31:16] - // - //DataAndAddr = (Data<<16) | (NewOffset&0x3f); - DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF - - // - // Write Operation - // - PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); - //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); - -} - - -/** -* Function: PHY_QueryRFReg -* -* OverView: Query "Specific bits" to RF register (page 8~) -* -* Input: -* PADAPTER Adapter, -* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be read -* u4Byte BitMask //The target bit position in the target address -* //to be read -* -* Output: None -* Return: u4Byte Readback value -* Note: This function is equal to "GetRFRegSetting" in PHY programming guide -*/ -u32 -rtl8192c_PHY_QueryRFReg( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask - ) -{ - u32 Original_Value, Readback_Value, BitShift; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //u8 RFWaitCounter = 0; - //_irqL irqL; - -#if (DISABLE_BB_RF == 1) - return 0; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); - -#ifdef CONFIG_USB_HCI - //PlatformAcquireMutex(&pHalData->mxRFOperate); -#else - //_enter_critical(&pHalData->rf_lock, &irqL); -#endif - - - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); - - BitShift = phy_CalculateBitShift(BitMask); - Readback_Value = (Original_Value & BitMask) >> BitShift; - -#ifdef CONFIG_USB_HCI - //PlatformReleaseMutex(&pHalData->mxRFOperate); -#else - //_exit_critical(&pHalData->rf_lock, &irqL); -#endif - - - //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", - // RegAddr, eRFPath, Original_Value)); - - return (Readback_Value); -} - -/** -* Function: PHY_SetRFReg -* -* OverView: Write "Specific bits" to RF register (page 8~) -* -* Input: -* PADAPTER Adapter, -* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address -* //to be modified -* u4Byte Data //The new register Data in the target bit position -* //of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRFRegSetting" in PHY programming guide -*/ -VOID -rtl8192c_PHY_SetRFReg( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data - ) -{ - - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //u1Byte RFWaitCounter = 0; - u32 Original_Value, BitShift; - //_irqL irqL; - -#if (DISABLE_BB_RF == 1) - return; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", - // RegAddr, BitMask, Data, eRFPath)); - //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", - // RegAddr, BitMask, Data, eRFPath)); - - -#ifdef CONFIG_USB_HCI - //PlatformAcquireMutex(&pHalData->mxRFOperate); -#else - //_enter_critical(&pHalData->rf_lock, &irqL); -#endif - - - // RF data is 12 bits only - if (BitMask != bRFRegOffsetMask) - { - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); - } - - phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); - - - -#ifdef CONFIG_USB_HCI - //PlatformReleaseMutex(&pHalData->mxRFOperate); -#else - //_exit_critical(&pHalData->rf_lock, &irqL); -#endif - - //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", - // RegAddr, BitMask, Data, eRFPath)); - -} - - -// -// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. -// - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigMACWithParaFile() - * - * Overview: This function read BB parameters from general file format, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: The format of MACPHY_REG.txt is different from PHY and RF. - * [Register][Mask][Value] - *---------------------------------------------------------------------------*/ -static int -phy_ConfigMACWithParaFile( - IN PADAPTER Adapter, - IN u8* pFileName -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - return rtStatus; -} - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigMACWithHeaderFile() - * - * Overview: This function read BB parameters from Header file we gen, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: The format of MACPHY_REG.txt is different from PHY and RF. - * [Register][Mask][Value] - *---------------------------------------------------------------------------*/ -static int -phy_ConfigMACWithHeaderFile( - IN PADAPTER Adapter -) -{ - u32 i = 0; - u32 ArrayLength = 0; - u32* ptrArray; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //2008.11.06 Modified by tynli. - //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); - ArrayLength = MAC_2T_ArrayLength; - ptrArray = Rtl819XMAC_Array; - -#ifdef CONFIG_IOL_MAC - if(rtw_IOL_applied(Adapter)) - { - struct xmit_frame *xmit_frame; - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) - return _FAIL; - - for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column - rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); - } - - return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); - } - else -#endif - { - for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column - rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); - } - } - - return _SUCCESS; - -} - - -/*----------------------------------------------------------------------------- - * Function: PHY_MACConfig8192C - * - * Overview: Condig MAC by header file or parameter file. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 08/12/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -int -PHY_MACConfig8192C( - IN PADAPTER Adapter - ) -{ - int rtStatus = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s8 *pszMACRegFile; - s8 sz88CMACRegFile[] = RTL8188C_PHY_MACREG; - s8 sz92CMACRegFile[] = RTL8192C_PHY_MACREG; - BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); - BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); - - if(isNormal) - { - if(is92C) - pszMACRegFile = sz92CMACRegFile; - else - pszMACRegFile = sz88CMACRegFile; - } - else - { - //pszMACRegFile = TestMacRegFile; - } - - // - // Config MAC - // -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus = phy_ConfigMACWithHeaderFile(Adapter); -#else - - // Not make sure EEPROM, add later - //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); - rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); -#endif - -#ifdef CONFIG_PCI_HCI - //this switching setting cause some 8192cu hw have redownload fw fail issue - //improve 2-stream TX EVM by Jenyu - if(isNormal && is92C) - rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71); -#endif - - - // 2010.07.13 AMPDU aggregation number 9 - //rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); - rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18. -#ifdef CONFIG_USB_HCI - if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType)) - rtw_write8(Adapter, 0x40,0x04); -#endif - - return rtStatus; - -} - - -/** -* Function: phy_InitBBRFRegisterDefinition -* -* OverView: Initialize Register definition offset for Radio Path A/B/C/D -* -* Input: -* PADAPTER Adapter, -* -* Output: None -* Return: None -* Note: The initialization value is constant and it should never be changes -*/ -static VOID -phy_InitBBRFRegisterDefinition( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - // RF Interface Sowrtware Control - pHalData->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 - pHalData->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) - pHalData->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 - pHalData->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) - - // RF Interface Readback Value - pHalData->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 - pHalData->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) - pHalData->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 - pHalData->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) - - // RF Interface Output (and Enable) - pHalData->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 - pHalData->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 - - // RF Interface (Output and) Enable - pHalData->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) - pHalData->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) - - //Addr of LSSI. Wirte RF register by driver - pHalData->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter - pHalData->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; - - // RF parameter - pHalData->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select - pHalData->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; - pHalData->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; - pHalData->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; - - // Tx AGC Gain Stage (same for all path. Should we remove this?) - pHalData->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - pHalData->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - pHalData->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - pHalData->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - - // Tranceiver A~D HSSI Parameter-1 - pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 - pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 - - // Tranceiver A~D HSSI Parameter-2 - pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 - pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 - - // RF switch Control - pHalData->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control - pHalData->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; - pHalData->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; - pHalData->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; - - // AGC control 1 - pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; - pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; - pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; - pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; - - // AGC control 2 - pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; - pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; - pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; - pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; - - // RX AFE control 1 - pHalData->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; - pHalData->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; - pHalData->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; - pHalData->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; - - // RX AFE control 1 - pHalData->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; - pHalData->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; - pHalData->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; - pHalData->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; - - // Tx AFE control 1 - pHalData->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; - pHalData->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; - pHalData->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; - pHalData->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; - - // Tx AFE control 2 - pHalData->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; - pHalData->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; - pHalData->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; - pHalData->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; - - // Tranceiver LSSI Readback SI mode - pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; - pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; - pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; - pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; - - // Tranceiver LSSI Readback PI mode - pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; - pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; - //pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; - //pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; - -} - - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithParaFile() - * - * Overview: This function read BB parameters from general file format, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * 2008/11/06 MH For 92S we do not support silent reset now. Disable - * parameter file compare!!!!!!?? - * - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithParaFile( - IN PADAPTER Adapter, - IN u8* pFileName -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - return rtStatus; -} - - - -//**************************************** -// The following is for High Power PA -//**************************************** -VOID -phy_ConfigBBExternalPA( - IN PADAPTER Adapter -) -{ -#ifdef CONFIG_USB_HCI - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 i=0; - u32 temp=0; - - if(!pHalData->ExternalPA) - { - return; - } - - // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the - // same code as SU. It is already updated in PHY_REG_1T_HP.txt. -#if 0 - PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); - temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); - temp |= (BIT26|BIT21|BIT10|BIT5); - PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); - PHY_SetBBReg(Adapter, 0x870, BIT10, 0); - PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); - PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); -#endif - -#endif -} - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithHeaderFile() - * - * Overview: This function read BB parameters from general file format, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * u1Byte ConfigType 0 => PHY_CONFIG - * 1 =>AGC_TAB - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithHeaderFile( - IN PADAPTER Adapter, - IN u8 ConfigType -) -{ - int i; - u32* Rtl819XPHY_REGArray_Table; - u32* Rtl819XAGCTAB_Array_Table; - u16 PHY_REGArrayLen, AGCTAB_ArrayLen; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - int ret = _SUCCESS; - - // - // 2009.11.24. Modified by tynli. - // - if(IS_92C_SERIAL(pHalData->VersionID)) - { - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - AGCTAB_ArrayLen = AGCTAB_2TArrayLength; - Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_2TArray; - PHY_REGArrayLen = PHY_REG_2TArrayLength; - Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2TArray; -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType == BOARD_MINICARD ) - { - PHY_REGArrayLen = PHY_REG_2T_mCardArrayLength; - Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2T_mCardArray; - } -#endif - } - else - { - DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n"); - ret = _FAIL; - goto exit; - } - } - else - { - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - AGCTAB_ArrayLen = AGCTAB_1TArrayLength; - Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1TArray; - PHY_REGArrayLen = PHY_REG_1TArrayLength; - Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1TArray; -#ifdef CONFIG_USB_HCI - if(pHalData->BoardType == BOARD_MINICARD ) - { - PHY_REGArrayLen = PHY_REG_1T_mCardArrayLength; - Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_mCardArray; - } - else if(pHalData->BoardType == BOARD_USB_High_PA) - { - AGCTAB_ArrayLen = AGCTAB_1T_HPArrayLength; - Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1T_HPArray; - PHY_REGArrayLen = PHY_REG_1T_HPArrayLength; - Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_HPArray; - } -#endif - } - else - { - DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n"); - ret = _FAIL; - goto exit; - } - } - - if(ConfigType == BaseBand_Config_PHY_REG) - { - #ifdef CONFIG_IOL_BB_PHY_REG - if(rtw_IOL_applied(Adapter)) - { - struct xmit_frame *xmit_frame; - u32 tmp_value; - - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { - ret = _FAIL; - goto exit; - } - - for(i=0;iMCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0])); - } - if(RegAddr == rTxAGC_A_Rate54_24) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1])); - } - if(RegAddr == rTxAGC_A_CCK1_Mcs32) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6])); - } - if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7])); - } - if(RegAddr == rTxAGC_A_Mcs03_Mcs00) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2])); - } - if(RegAddr == rTxAGC_A_Mcs07_Mcs04) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3])); - } - if(RegAddr == rTxAGC_A_Mcs11_Mcs08) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4])); - } - if(RegAddr == rTxAGC_A_Mcs15_Mcs12) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5])); - } - if(RegAddr == rTxAGC_B_Rate18_06) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8])); - } - if(RegAddr == rTxAGC_B_Rate54_24) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9])); - } - if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14])); - } - if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15])); - } - if(RegAddr == rTxAGC_B_Mcs03_Mcs00) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10])); - } - if(RegAddr == rTxAGC_B_Mcs07_Mcs04) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11])); - } - if(RegAddr == rTxAGC_B_Mcs11_Mcs08) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12])); - } - if(RegAddr == rTxAGC_B_Mcs15_Mcs12) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; - //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13])); - pHalData->pwrGroupCnt++; - } -} -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithPgParaFile - * - * Overview: - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/06/2008 MHC Create Version 0. - * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithPgParaFile( - IN PADAPTER Adapter, - IN u8* pFileName) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - - return rtStatus; - -} /* phy_ConfigBBWithPgParaFile */ - - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithPgHeaderFile - * - * Overview: Config PHY_REG_PG array - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! - * 11/10/2008 tynli Modify to mew files. - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithPgHeaderFile( - IN PADAPTER Adapter, - IN u8 ConfigType) -{ - int i; - u32* Rtl819XPHY_REGArray_Table_PG; - u16 PHY_REGArrayPGLen; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - // Default: pHalData->RF_Type = RF_2T2R. - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - PHY_REGArrayPGLen = PHY_REG_Array_PGLength; - Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG; - -#ifdef CONFIG_USB_HCI -// 2010/10/19 Chiyoko According to Alex/Willson opinion, VAU/dongle can share the same PHY_REG_PG.txt -/* - if(pHalData->BoardType == BOARD_MINICARD ) - { - PHY_REGArrayPGLen = PHY_REG_Array_PG_mCardLength; - Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_mCard; - } - else */if(pHalData->BoardType ==BOARD_USB_High_PA ) - { - PHY_REGArrayPGLen = PHY_REG_Array_PG_HPLength; - Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_HP; - } -#endif - } - else - { - DBG_8192C(" ===> phy_ConfigBBWithPgHeaderFile(): do not support test chip\n"); - return _FAIL; - } - - if(ConfigType == BaseBand_Config_PHY_REG) - { - for(i=0;iBufOfLines), - MAX_LINES_HWCONFIG_TXT, - MAX_BYTES_LINE_HWCONFIG_TXT, - &nLinesRead - ); - if(rtStatus == RT_STATUS_SUCCESS) - { - PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT); - pHalData->nLinesRead6 = nLinesRead; - } - else - { - // Temporarily skip PHY_REG_MP.txt if file does not exist. - pHalData->nLinesRead6 = 0; - RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n")); - return RT_STATUS_SUCCESS; - } - } - else - { - PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); - nLinesRead = pHalData->nLinesRead6; - rtStatus = RT_STATUS_SUCCESS; - } - - - if(rtStatus == RT_STATUS_SUCCESS) - { - RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName)); - - for(ithLine = 0; ithLine < nLinesRead; ithLine++) - { - szLine = pHalData->BufOfLines[ithLine]; - - if(!IsCommentString(szLine)) - { - // Get 1st hex value as register offset. - if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) - { - if(u4bRegOffset == 0xff) - { // Ending. - break; - } - else if (u4bRegOffset == 0xfe) - delay_ms(50); - else if (u4bRegOffset == 0xfd) - delay_ms(5); - else if (u4bRegOffset == 0xfc) - delay_ms(1); - else if (u4bRegOffset == 0xfb) - PlatformStallExecution(50); - else if (u4bRegOffset == 0xfa) - PlatformStallExecution(5); - else if (u4bRegOffset == 0xf9) - PlatformStallExecution(1); - - // Get 2nd hex value as register value. - szLine += u4bMove; - if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) - { - RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue)); - PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); - - // Add 1us delay between BB/RF register setting. - PlatformStallExecution(1); - } - } - } - } - } - else - { - RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName)); - } -#endif - - return rtStatus; -} - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithMpHeaderFile - * - * Overview: Config PHY_REG_MP array - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 02/04/2010 chiyokolin Modify to new files. - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithMpHeaderFile( - IN PADAPTER Adapter, - IN u1Byte ConfigType) -{ - int i; - u32* Rtl8192CPHY_REGArray_Table_MP; - u16 PHY_REGArrayMPLen; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - PHY_REGArrayMPLen = PHY_REG_Array_MPLength; - Rtl8192CPHY_REGArray_Table_MP = Rtl819XPHY_REG_Array_MP; - - if(ConfigType == BaseBand_Config_PHY_REG) - { - for(i=0;iphy_BB8192S_Config_ParaFile\n")); - - if(IS_92C_SERIAL(pHalData->VersionID)){ - pszBBRegFile=(u8*)&sz92CBBRegFile ; - pszAGCTableFile =(u8*)&sz92CAGCTableFile; - } - else{ - pszBBRegFile=(u8*)&sz88CBBRegFile ; - pszAGCTableFile =(u8*)&sz88CAGCTableFile; - } - - // - // 1. Read PHY_REG.TXT BB INIT!! - // We will seperate as 88C / 92C according to chip version - // -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG); -#else - // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different - // type of parameter files to phy_reg.txt at first. - rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); -#endif - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); - goto phy_BB8190_Config_ParaFile_Fail; - } - -#if MP_DRIVER == 1 - // - // 1.1 Read PHY_REG_MP.TXT BB INIT!! - // We will seperate as 88C / 92C according to chip version - // -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG); -#else - // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different - // type of parameter files to phy_reg.txt at first. - rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile); -#endif - - if(rtStatus != _SUCCESS){ -// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!")); - goto phy_BB8190_Config_ParaFile_Fail; - } -#endif // #if (MP_DRIVER == 1) - - // - // 20100318 Joseph: Config 2T2R to 1T2R if necessary. - // - if(pHalData->rf_type == RF_1T2R) - { - phy_BB8192C_Config_1T(Adapter); - DBG_8192C("phy_BB8192C_Config_ParaFile():Config to 1T!!\n"); - } - - // - // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt - // - if (pEEPROM->bautoload_fail_flag == _FALSE) - { - pHalData->pwrGroupCnt = 0; - -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG); -#else - rtStatus = phy_ConfigBBWithPgParaFile(Adapter, (u8*)&szBBRegPgFile); -#endif - } - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); - goto phy_BB8190_Config_ParaFile_Fail; - } - - // - // 3. BB AGC table Initialization - // -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB); -#else - //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); - rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); -#endif - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); - goto phy_BB8190_Config_ParaFile_Fail; - } - - // Check if the CCK HighPower is turned ON. - // This is used to calculate PWDB. - pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200)); - -phy_BB8190_Config_ParaFile_Fail: - - return rtStatus; -} - - -int -PHY_BBConfig8192C( - IN PADAPTER Adapter - ) -{ - int rtStatus = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 RegVal; - u8 TmpU1B=0; - u8 value8; - - phy_InitBBRFRegisterDefinition(Adapter); - - if(IS_HARDWARE_TYPE_8723(Adapter)) - { - // Suggested by Scott. tynli_test. 2010.12.30. - //1. 0x28[1] = 1 - TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL); - rtw_udelay_os(2); - rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1)); - rtw_udelay_os(2); - - //2. 0x29[7:0] = 0xFF - rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff); - rtw_udelay_os(2); - - //3. 0x02[1:0] = 2b'11 - TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); - rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB)); - - //4. 0x25[6] = 0 - TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1); - rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6))); - - //5. 0x24[20] = 0 //Advised by SD3 Alex Wang. 2011.02.09. - TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2); - rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4))); - - //6. 0x1f[7:0] = 0x07 - rtw_write8(Adapter, REG_RF_CTRL, 0x07); - } - else - { - // Enable BB and RF - RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); - rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); - - // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. - rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); - rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); - - rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); - -#ifdef CONFIG_USB_HCI - rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); -#else - rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); -#endif - - // 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. - if(!IS_NORMAL_CHIP(pHalData->VersionID)) - { -#ifdef CONFIG_USB_HCI - rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1f); -#else - rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1b); -#endif - } - else - { -#ifdef CONFIG_USB_HCI - //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. - rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); - rtw_write8(Adapter, 0x15, 0xe9); -#endif - } - - rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); - -#ifdef CONFIG_PCI_HCI - // Force use left antenna by default for 88C. - // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) - if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) - { - RegVal = rtw_read32(Adapter, REG_LEDCFG0); - rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); - } -#endif - } - - // - // Config BB and AGC - // - rtStatus = phy_BB8192C_Config_ParaFile(Adapter); -#if 0 - switch(Adapter->MgntInfo.bRegHwParaFile) - { - case 0: - phy_BB8190_Config_HardCode(Adapter); - break; - - case 1: - rtStatus = phy_BB8192C_Config_ParaFile(Adapter); - break; - - case 2: - // Partial Modify. - phy_BB8190_Config_HardCode(Adapter); - phy_BB8192C_Config_ParaFile(Adapter); - break; - - default: - phy_BB8190_Config_HardCode(Adapter); - break; - } -#endif -#ifdef CONFIG_USB_HCI - if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) - &&(pHalData->BoardType == BOARD_USB_High_PA)) - rtw_write8(Adapter, 0xc72, 0x50); -#endif - - // For fix 8723 WL_TRSW bug. Suggested by Scott. 2011.01.24. - if(IS_HARDWARE_TYPE_8723(Adapter)) - { - if(!IS_NORMAL_CHIP(pHalData->VersionID)) - { - // 1. 0x40[2] = 1 - value8 = rtw_read8(Adapter, REG_GPIO_MUXCFG); - rtw_write8(Adapter, REG_GPIO_MUXCFG, (value8|BIT2)); - - // 2. 0x804[14] = 0 // BB disable TRSW control, enable SW control - PHY_SetBBReg(Adapter, rFPGA0_TxInfo, BIT14, 0x0); - - // 3. 0x870[6:5] = 2'b11 - PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, (BIT5|BIT6), 0x3); - - // 4. 0x860[6:5] = 2'b00 // BB SW control TRSW pin output level - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, (BIT5|BIT6), 0x0); - } - } -#if 0 - // Check BB/RF confiuration setting. - // We only need to configure RF which is turned on. - PathMap = (u1Byte)(PHY_QueryBBReg(Adapter, rFPGA0_TxInfo, 0xf) | - PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf)); - pHalData->RF_PathMap = PathMap; - for(index = 0; index<4; index++) - { - if((PathMap>>index)&0x1) - rf_num++; - } - - if((GET_RF_TYPE(Adapter) ==RF_1T1R && rf_num!=1) || - (GET_RF_TYPE(Adapter)==RF_1T2R && rf_num!=2) || - (GET_RF_TYPE(Adapter)==RF_2T2R && rf_num!=2) || - (GET_RF_TYPE(Adapter)==RF_2T2R_GREEN && rf_num!=2) || - (GET_RF_TYPE(Adapter)==RF_2T4R && rf_num!=4)) - { - RT_TRACE( - COMP_INIT, - DBG_LOUD, - ("PHY_BBConfig8192C: RF_Type(%x) does not match RF_Num(%x)!!\n", pHalData->RF_Type, rf_num)); - } -#endif - - return rtStatus; -} - - -int -PHY_RFConfig8192C( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - // - // RF config - // - rtStatus = PHY_RF6052_Config8192C(Adapter); -#if 0 - switch(pHalData->rf_chip) - { - case RF_6052: - rtStatus = PHY_RF6052_Config(Adapter); - break; - case RF_8225: - rtStatus = PHY_RF8225_Config(Adapter); - break; - case RF_8256: - rtStatus = PHY_RF8256_Config(Adapter); - break; - case RF_8258: - break; - case RF_PSEUDO_11N: - rtStatus = PHY_RF8225_Config(Adapter); - break; - default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch - break; - } -#endif - return rtStatus; -} - - -/*----------------------------------------------------------------------------- - * Function: PHY_ConfigRFWithParaFile() - * - * Overview: This function read RF parameters from general file format, and do RF 3-wire - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * RF90_RADIO_PATH_E eRFPath - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: Delay may be required for RF configuration - *---------------------------------------------------------------------------*/ -int -rtl8192c_PHY_ConfigRFWithParaFile( - IN PADAPTER Adapter, - IN u8* pFileName, - RF90_RADIO_PATH_E eRFPath -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - - return rtStatus; - -} - -//**************************************** -// The following is for High Power PA -//**************************************** -#define HighPowerRadioAArrayLen 22 -//This is for High power PA -u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { -0x013,0x00029ea4, -0x013,0x00025e74, -0x013,0x00020ea4, -0x013,0x0001ced0, -0x013,0x00019f40, -0x013,0x00014e70, -0x013,0x000106a0, -0x013,0x0000c670, -0x013,0x000082a0, -0x013,0x00004270, -0x013,0x00000240, -}; - -int -PHY_ConfigRFExternalPA( - IN PADAPTER Adapter, - RF90_RADIO_PATH_E eRFPath -) -{ - int rtStatus = _SUCCESS; -#ifdef CONFIG_USB_HCI - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 i=0; - - if(!pHalData->ExternalPA) - { - return rtStatus; - } - - // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the - // same code as SU. It is already updated in radio_a_1T_HP.txt. -#if 0 - //add for SU High Power PA - for(i = 0;iVersionID)) - { - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - RadioA_ArrayLen = RadioA_2TArrayLength; - Rtl819XRadioA_Array_Table = Rtl819XRadioA_2TArray; - RadioB_ArrayLen = RadioB_2TArrayLength; - Rtl819XRadioB_Array_Table = Rtl819XRadioB_2TArray; - } - else - { - rtStatus = _FAIL; - goto exit; - } - } - else - { - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - RadioA_ArrayLen = RadioA_1TArrayLength; - Rtl819XRadioA_Array_Table = Rtl819XRadioA_1TArray; - RadioB_ArrayLen = RadioB_1TArrayLength; - Rtl819XRadioB_Array_Table = Rtl819XRadioB_1TArray; -#ifdef CONFIG_USB_HCI - if( BOARD_MINICARD == pHalData->BoardType ) - { - RadioA_ArrayLen = RadioA_1T_mCardArrayLength; - Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_mCardArray; - RadioB_ArrayLen = RadioB_1T_mCardArrayLength; - Rtl819XRadioB_Array_Table = Rtl819XRadioB_1T_mCardArray; - } - else if( BOARD_USB_High_PA == pHalData->BoardType ) - { - RadioA_ArrayLen = RadioA_1T_HPArrayLength; - Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_HPArray; - } -#endif - } - else - { - rtStatus = _FAIL; - goto exit; - } - } - - switch(eRFPath){ - case RF90_PATH_A: - #ifdef CONFIG_IOL_RF_RF90_PATH_A - if(rtw_IOL_applied(Adapter)) - { - struct xmit_frame *xmit_frame; - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { - rtStatus = _FAIL; - goto exit; - } - - for(i = 0;iPHYRegDef[eRFPath]; - u32 NewOffset = 0; - u32 DataAndAddr = 0; - - NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; - DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF - rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); - } - } - rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); - } - else - #endif - { - for(i = 0;iPHYRegDef[eRFPath]; - u32 NewOffset = 0; - u32 DataAndAddr = 0; - - NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; - DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF - rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); - } - } - rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); - } - else - #endif - { - for(i = 0;i actually we call PlatformStallExecution()) to do NdisStallExecution() - // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK - // to run at Dispatch level to achive it. - //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); - WriteData[i] &= 0xfff; - PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); - // TODO: we should not delay for such a long time. Ask SD3 - rtw_mdelay_os(10); - ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); - rtw_mdelay_os(10); - //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); - break; - - default: - rtStatus = _FAIL; - break; - } - - - // - // Check whether readback data is correct - // - if(ulRegRead != WriteData[i]) - { - //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); - rtStatus = _FAIL; - break; - } - } - - return rtStatus; -} - - -VOID -rtl8192c_PHY_GetHWRegOriginalValue( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - // read rx initial gain - pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); - //RT_TRACE(COMP_INIT, DBG_LOUD, - //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", - //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], - //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); - - // read framesync - pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); - pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); - //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", - // rOFDM0_RxDetector3, pHalData->framesync)); -} - - -// -// Description: -// Map dBm into Tx power index according to -// current HW model, for example, RF and PA, and -// current wireless mode. -// By Bruce, 2008-01-29. -// -static u8 -phy_DbmToTxPwrIdx( - IN PADAPTER Adapter, - IN WIRELESS_MODE WirelessMode, - IN int PowerInDbm - ) -{ - u8 TxPwrIdx = 0; - int Offset = 0; - - - // - // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to - // 3dbm, and OFDM HT equals to 0dbm repectively. - // Note: - // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. - // By Bruce, 2008-01-29. - // - switch(WirelessMode) - { - case WIRELESS_MODE_B: - Offset = -7; - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - Offset = -8; - break; - default: - Offset = -8; - break; - } - - if((PowerInDbm - Offset) > 0) - { - TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); - } - else - { - TxPwrIdx = 0; - } - - // Tx Power Index is too large. - if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) - TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; - - return TxPwrIdx; -} - -// -// Description: -// Map Tx power index into dBm according to -// current HW model, for example, RF and PA, and -// current wireless mode. -// By Bruce, 2008-01-29. -// -int -phy_TxPwrIdxToDbm( - IN PADAPTER Adapter, - IN WIRELESS_MODE WirelessMode, - IN u8 TxPwrIdx - ) -{ - int Offset = 0; - int PwrOutDbm = 0; - - // - // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. - // Note: - // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. - // By Bruce, 2008-01-29. - // - switch(WirelessMode) - { - case WIRELESS_MODE_B: - Offset = -7; - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - Offset = -8; - default: - Offset = -8; - break; - } - - PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. - - return PwrOutDbm; -} - - -/*----------------------------------------------------------------------------- - * Function: GetTxPowerLevel8190() - * - * Overview: This function is export to "common" moudule - * - * Input: PADAPTER Adapter - * psByte Power Level - * - * Output: NONE - * - * Return: NONE - * - *---------------------------------------------------------------------------*/ -VOID -PHY_GetTxPowerLevel8192C( - IN PADAPTER Adapter, - OUT u32* powerlevel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 TxPwrLevel = 0; - int TxPwrDbm; - - // - // Because the Tx power indexes are different, we report the maximum of them to - // meet the CCX TPC request. By Bruce, 2008-01-31. - // - - // CCK - TxPwrLevel = pHalData->CurrentCckTxPwrIdx; - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); - - // Legacy OFDM - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; - - // Compare with Legacy OFDM Tx power. - if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); - - // HT OFDM - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; - - // Compare with HT OFDM Tx power. - if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); - - *powerlevel = TxPwrDbm; -} - - -static void getTxPowerIndex( - IN PADAPTER Adapter, - IN u8 channel, - IN OUT u8* cckPowerLevel, - IN OUT u8* ofdmPowerLevel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 index = (channel -1); - // 1. CCK - cckPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelCck[RF90_PATH_A][index]; //RF-A - cckPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelCck[RF90_PATH_B][index]; //RF-B - - // 2. OFDM for 1S or 2S - if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) - { - // Read HT 40 OFDM TX power - ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_A][index]; - ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_B][index]; - } - else if (GET_RF_TYPE(Adapter) == RF_2T2R) - { - // Read HT 40 OFDM TX power - ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_A][index]; - ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_B][index]; - } - //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); -} - -static void ccxPowerIndexCheck( - IN PADAPTER Adapter, - IN u8 channel, - IN OUT u8* cckPowerLevel, - IN OUT u8* ofdmPowerLevel - ) -{ -#if 0 - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); - - // - // CCX 2 S31, AP control of client transmit power: - // 1. We shall not exceed Cell Power Limit as possible as we can. - // 2. Tolerance is +/- 5dB. - // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. - // - // TODO: - // 1. 802.11h power contraint - // - // 071011, by rcnjko. - // - if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && - pMgntInfo->mAssoc && - pCcxInfo->bUpdateCcxPwr && - pCcxInfo->bWithCcxCellPwr && - channel == pMgntInfo->dot11CurrentChannelNumber) - { - u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); - u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); - u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); - - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", - pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", - channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); - - // CCK - if(cckPowerLevel[0] > CckCellPwrIdx) - cckPowerLevel[0] = CckCellPwrIdx; - // Legacy OFDM, HT OFDM - if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) - { - if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) - { - ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; - } - else - { - ofdmPowerLevel[0] = 0; - } - } - - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", - cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); - } - - pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; - pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; - - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", - cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); -#endif -} -/*----------------------------------------------------------------------------- - * Function: SetTxPowerLevel8190() - * - * Overview: This function is export to "HalCommon" moudule - * We must consider RF path later!!!!!!! - * - * Input: PADAPTER Adapter - * u1Byte channel - * - * Output: NONE - * - * Return: NONE - * 2008/11/04 MHC We remove EEPROM_93C56. - * We need to move CCX relative code to independet file. - * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. - * - *---------------------------------------------------------------------------*/ -VOID -PHY_SetTxPowerLevel8192C( - IN PADAPTER Adapter, - IN u8 channel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 cckPowerLevel[2], ofdmPowerLevel[2]; // [0]:RF-A, [1]:RF-B - -#if(MP_DRIVER == 1) - return; -#endif - - if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE) - return; - - getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); - //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", - // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); - - ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); - - rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); - rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); - -#if 0 - switch(pHalData->rf_chip) - { - case RF_8225: - PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); - PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); - break; - - case RF_8256: - PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); - PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); - break; - - case RF_6052: - PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); - PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); - break; - - case RF_8258: - break; - } -#endif - -} - - -// -// Description: -// Update transmit power level of all channel supported. -// -// TODO: -// A mode. -// By Bruce, 2008-02-04. -// -BOOLEAN -PHY_UpdateTxPowerDbm8192C( - IN PADAPTER Adapter, - IN int powerInDbm - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 idx; - u8 rf_path; - - // TODO: A mode Tx power. - u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); - u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); - - if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) - OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; - else - OfdmTxPwrIdx = 0; - - //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); - - for(idx = 0; idx < 14; idx++) - { - for (rf_path = 0; rf_path < 2; rf_path++) - { - pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; - pHalData->TxPwrLevelHT40_1S[rf_path][idx] = - pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; - } - } - - //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo - - return _TRUE; -} - - -/* - Description: - When beacon interval is changed, the values of the - hw registers should be modified. - By tynli, 2008.10.24. - -*/ - - -void -rtl8192c_PHY_SetBeaconHwReg( - IN PADAPTER Adapter, - IN u16 BeaconInterval - ) -{ - -} - - -VOID -PHY_ScanOperationBackup8192C( - IN PADAPTER Adapter, - IN u8 Operation - ) -{ -#if 0 - IO_TYPE IoType; - - if(!Adapter->bDriverStopped) - { - switch(Operation) - { - case SCAN_OPT_BACKUP: - IoType = IO_CMD_PAUSE_DM_BY_SCAN; - Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); - - break; - - case SCAN_OPT_RESTORE: - IoType = IO_CMD_RESUME_DM_BY_SCAN; - Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); - break; - - default: - RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); - break; - } - } -#endif -} - -/*----------------------------------------------------------------------------- - * Function: PHY_SetBWModeCallback8192C() - * - * Overview: Timer callback function for SetSetBWMode - * - * Input: PRT_TIMER pTimer - * - * Output: NONE - * - * Return: NONE - * - * Note: (1) We do not take j mode into consideration now - * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run - * concurrently? - *---------------------------------------------------------------------------*/ -static VOID -_PHY_SetBWMode92C( - IN PADAPTER Adapter -) -{ -// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 regBwOpMode; - u8 regRRSR_RSC; - - //return; - - // Added it for 20/40 mhz switch time evaluation by guangan 070531 - //u4Byte NowL, NowH; - //u8Byte BeginTime, EndTime; - - /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ - pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ - - if(pHalData->rf_chip == RF_PSEUDO_11N) - { - //pHalData->SetBWModeInProgress= _FALSE; - return; - } - - // There is no 40MHz mode in RF_8225. - if(pHalData->rf_chip==RF_8225) - return; - - if(Adapter->bDriverStopped) - return; - - // Added it for 20/40 mhz switch time evaluation by guangan 070531 - //NowL = PlatformEFIORead4Byte(Adapter, TSFR); - //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); - //BeginTime = ((u8Byte)NowH << 32) + NowL; - - //3// - //3//<1>Set MAC register - //3// - //Adapter->HalFunc.SetBWModeHandler(); - - regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); - regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); - //regBwOpMode = Adapter->HalFunc.GetHwRegHandler(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); - - switch(pHalData->CurrentChannelBW) - { - case HT_CHANNEL_WIDTH_20: - regBwOpMode |= BW_OPMODE_20MHZ; - // 2007/02/07 Mark by Emily becasue we have not verify whether this register works - rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); - break; - - case HT_CHANNEL_WIDTH_40: - regBwOpMode &= ~BW_OPMODE_20MHZ; - // 2007/02/07 Mark by Emily becasue we have not verify whether this register works - rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); - - regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); - rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); - break; - - default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): - unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ - break; - } - - //3// - //3//<2>Set PHY related register - //3// - switch(pHalData->CurrentChannelBW) - { - /* 20 MHz channel*/ - case HT_CHANNEL_WIDTH_20: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); - PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); - - break; - - - /* 40 MHz channel*/ - case HT_CHANNEL_WIDTH_40: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); - - // Set Control channel to upper or lower. These settings are required only for 40MHz - PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); - PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); - PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); - - PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); - - break; - - - - default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ - ,pHalData->CurrentChannelBW));*/ - break; - - } - //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 - - // Added it for 20/40 mhz switch time evaluation by guangan 070531 - //NowL = PlatformEFIORead4Byte(Adapter, TSFR); - //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); - //EndTime = ((u8Byte)NowH << 32) + NowL; - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); - - //3<3>Set RF related register - switch(pHalData->rf_chip) - { - case RF_8225: - //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); - break; - - case RF_8256: - // Please implement this function in Hal8190PciPhy8256.c - //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); - break; - - case RF_8258: - // Please implement this function in Hal8190PciPhy8258.c - // PHY_SetRF8258Bandwidth(); - break; - - case RF_PSEUDO_11N: - // Do Nothing - break; - - case RF_6052: - rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); - break; - - default: - //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); - break; - } - - //pHalData->SetBWModeInProgress= FALSE; - - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); -} - - - /*----------------------------------------------------------------------------- - * Function: SetBWMode8190Pci() - * - * Overview: This function is export to "HalCommon" moudule - * - * Input: PADAPTER Adapter - * HT_CHANNEL_WIDTH Bandwidth //20M or 40M - * - * Output: NONE - * - * Return: NONE - * - * Note: We do not take j mode into consideration now - *---------------------------------------------------------------------------*/ -VOID -PHY_SetBWMode8192C( - IN PADAPTER Adapter, - IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M - IN unsigned char Offset // Upper, Lower, or Don't care -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; - // Modified it for 20/40 mhz switch by guangan 070531 - //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; - - //return; - - //if(pHalData->SwChnlInProgress) -// if(pMgntInfo->bScanInProgress) -// { -// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", -// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); -// return; -// } - -// if(pHalData->SetBWModeInProgress) -// { -// // Modified it for 20/40 mhz switch by guangan 070531 -// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", -// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); -// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); -// //return; -// } - - //if(pHalData->SetBWModeInProgress) - // return; - - //pHalData->SetBWModeInProgress= TRUE; - - pHalData->CurrentChannelBW = Bandwidth; - -#if 0 - if(Offset==HT_EXTCHNL_OFFSET_LOWER) - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; - else if(Offset==HT_EXTCHNL_OFFSET_UPPER) - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; - else - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -#else - pHalData->nCur40MhzPrimeSC = Offset; -#endif - - if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) - { -#ifdef USE_WORKITEM - //PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem)); -#else - #if 0 - //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); - #else - _PHY_SetBWMode92C(Adapter); - #endif -#endif - } - else - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); - //pHalData->SetBWModeInProgress= FALSE; - pHalData->CurrentChannelBW = tmpBW; - } - -} - - -static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) -{ - u8 eRFPath; - u32 param1, param2; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //s1. pre common command - CmdID_SetTxPowerLevel - PHY_SetTxPowerLevel8192C(Adapter, channel); - - //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel - param1 = RF_CHNLBW; - param2 = channel; - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - { - pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); - } - - - //s3. post common command - CmdID_End, None - -} - -VOID -PHY_SwChnl8192C( // Call after initialization - IN PADAPTER Adapter, - IN u8 channel - ) -{ - //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 tmpchannel = pHalData->CurrentChannel; - BOOLEAN bResult = _TRUE; - - if(pHalData->rf_chip == RF_PSEUDO_11N) - { - //pHalData->SwChnlInProgress=FALSE; - return; //return immediately if it is peudo-phy - } - - //if(pHalData->SwChnlInProgress) - // return; - - //if(pHalData->SetBWModeInProgress) - // return; - - //-------------------------------------------- - switch(pHalData->CurrentWirelessMode) - { - case WIRELESS_MODE_A: - case WIRELESS_MODE_N_5G: - //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); - break; - - case WIRELESS_MODE_B: - //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); - break; - - default: - //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); - break; - } - //-------------------------------------------- - - //pHalData->SwChnlInProgress = TRUE; - if(channel == 0) - channel = 1; - - pHalData->CurrentChannel=channel; - - //pHalData->SwChnlStage=0; - //pHalData->SwChnlStep=0; - - if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) - { -#ifdef USE_WORKITEM - //bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem)); -#else - #if 0 - //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); - #else - _PHY_SwChnl8192C(Adapter, channel); - #endif -#endif - if(bResult) - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); - } - else - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); - //if(IS_HARDWARE_TYPE_8192SU(Adapter)) - //{ - // pHalData->SwChnlInProgress = FALSE; - pHalData->CurrentChannel = tmpchannel; - //} - } - - } - else - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); - //if(IS_HARDWARE_TYPE_8192SU(Adapter)) - //{ - // pHalData->SwChnlInProgress = FALSE; - pHalData->CurrentChannel = tmpchannel; - //} - } -} - - -static BOOLEAN -phy_SwChnlStepByStep( - IN PADAPTER Adapter, - IN u8 channel, - IN u8 *stage, - IN u8 *step, - OUT u32 *delay - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PCHANNEL_ACCESS_SETTING pChnlAccessSetting; - SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; - u4Byte PreCommonCmdCnt; - SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; - u4Byte PostCommonCmdCnt; - SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; - u4Byte RfDependCmdCnt; - SwChnlCmd *CurrentCmd; - u1Byte eRFPath; - u4Byte RfTXPowerCtrl; - BOOLEAN bAdjRfTXPowerCtrl = _FALSE; - - - RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); -#if(MP_DRIVER != 1) - RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); -#endif - RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); - - pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; - RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); - - //for(eRFPath = RF90_PATH_A; eRFPath NumTotalRFPath; eRFPath++) - //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - //{ - // <1> Fill up pre common command. - PreCommonCmdCnt = 0; - phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, - CmdID_SetTxPowerLevel, 0, 0, 0); - phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, - CmdID_End, 0, 0, 0); - - // <2> Fill up post common command. - PostCommonCmdCnt = 0; - - phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, - CmdID_End, 0, 0, 0); - - // <3> Fill up RF dependent command. - RfDependCmdCnt = 0; - switch( pHalData->RFChipID ) - { - case RF_8225: - RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); - // 2008/09/04 MH Change channel. - if(channel==14) channel++; - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - break; - - case RF_8256: - // TEST!! This is not the table for 8256!! - RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, rRfChannel, channel, 10); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - break; - - case RF_6052: - RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - - break; - - case RF_8258: - break; - - // For FPGA two MAC verification - case RF_PSEUDO_11N: - return TRUE; - default: - RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); - return FALSE; - break; - } - - - do{ - switch(*stage) - { - case 0: - CurrentCmd=&PreCommonCmd[*step]; - break; - case 1: - CurrentCmd=&RfDependCmd[*step]; - break; - case 2: - CurrentCmd=&PostCommonCmd[*step]; - break; - } - - if(CurrentCmd->CmdID==CmdID_End) - { - if((*stage)==2) - { - return TRUE; - } - else - { - (*stage)++; - (*step)=0; - continue; - } - } - - switch(CurrentCmd->CmdID) - { - case CmdID_SetTxPowerLevel: - PHY_SetTxPowerLevel8192C(Adapter,channel); - break; - case CmdID_WritePortUlong: - PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); - break; - case CmdID_WritePortUshort: - PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); - break; - case CmdID_WritePortUchar: - PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); - break; - case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - { -#if 1 - pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); -#else - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); -#endif - } - break; - } - - break; - }while(TRUE); - //cosa }/*for(Number of RF paths)*/ - - (*delay)=CurrentCmd->msDelay; - (*step)++; - return FALSE; -#endif - return _TRUE; -} - - -static BOOLEAN -phy_SetSwChnlCmdArray( - SwChnlCmd* CmdTable, - u32 CmdTableIdx, - u32 CmdTableSz, - SwChnlCmdID CmdID, - u32 Para1, - u32 Para2, - u32 msDelay - ) -{ - SwChnlCmd* pCmd; - - if(CmdTable == NULL) - { - //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); - return _FALSE; - } - if(CmdTableIdx >= CmdTableSz) - { - //RT_ASSERT(FALSE, - // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", - // CmdTableIdx, CmdTableSz)); - return _FALSE; - } - - pCmd = CmdTable + CmdTableIdx; - pCmd->CmdID = CmdID; - pCmd->Para1 = Para1; - pCmd->Para2 = Para2; - pCmd->msDelay = msDelay; - - return _TRUE; -} - - -static void -phy_FinishSwChnlNow( // We should not call this function directly - IN PADAPTER Adapter, - IN u8 channel - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 delay; - - while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) - { - if(delay>0) - rtw_mdelay_os(delay); - } -#endif -} - - - -// -// Description: -// Switch channel synchronously. Called by SwChnlByDelayHandler. -// -// Implemented by Bruce, 2008-02-14. -// The following procedure is operted according to SwChanlCallback8190Pci(). -// However, this procedure is performed synchronously which should be running under -// passive level. -// -VOID -PHY_SwChnlPhy8192C( // Only called during initialize - IN PADAPTER Adapter, - IN u8 channel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); - - // Cannot IO. - //if(RT_CANNOT_IO(Adapter)) - // return; - - // Channel Switching is in progress. - //if(pHalData->SwChnlInProgress) - // return; - - //return immediately if it is peudo-phy - if(pHalData->rf_chip == RF_PSEUDO_11N) - { - //pHalData->SwChnlInProgress=FALSE; - return; - } - - //pHalData->SwChnlInProgress = TRUE; - if( channel == 0) - channel = 1; - - pHalData->CurrentChannel=channel; - - //pHalData->SwChnlStage = 0; - //pHalData->SwChnlStep = 0; - - phy_FinishSwChnlNow(Adapter,channel); - - //pHalData->SwChnlInProgress = FALSE; -} - - -// -// Description: -// Configure H/W functionality to enable/disable Monitor mode. -// Note, because we possibly need to configure BB and RF in this function, -// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. -// -VOID -PHY_SetMonitorMode8192C( - IN PADAPTER pAdapter, - IN BOOLEAN bEnableMonitorMode - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; - - //2 Note: we may need to stop antenna diversity. - if(bEnableMonitorMode) - { - bFilterOutNonAssociatedBSSID = FALSE; - RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); - - pHalData->bInMonitorMode = TRUE; - pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); - pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); - } - else - { - bFilterOutNonAssociatedBSSID = TRUE; - RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); - - pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); - pHalData->bInMonitorMode = FALSE; - pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); - } -#endif -} - - -/*----------------------------------------------------------------------------- - * Function: PHYCheckIsLegalRfPath8190Pci() - * - * Overview: Check different RF type to execute legal judgement. If RF Path is illegal - * We will return false. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/15/2007 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -BOOLEAN -PHY_CheckIsLegalRfPath8192C( - IN PADAPTER pAdapter, - IN u32 eRFPath) -{ -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN rtValue = _TRUE; - - // NOt check RF Path now.! -#if 0 - if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A) - { - rtValue = FALSE; - } - if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A) - { - - } -#endif - return rtValue; - -} /* PHY_CheckIsLegalRfPath8192C */ - -//------------------------------------------------------------------------- -// -// IQK -// -//------------------------------------------------------------------------- -#define MAX_TOLERANCE 5 -#define IQK_DELAY_TIME 1 //ms - -static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -_PHY_PathA_IQK( - IN PADAPTER pAdapter, - IN BOOLEAN configPathB - ) -{ - u32 regEAC, regE94, regE9C, regEA4; - u8 result = 0x00; - - //RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); - - //path-A IQK setting - //RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); - PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x10008c1f); - PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x10008c1f); - PHY_SetBBReg(pAdapter, 0xe38, bMaskDWord, 0x82140102); - - PHY_SetBBReg(pAdapter, 0xe3c, bMaskDWord, configPathB ? 0x28160202 : 0x28160502); - -#if 1 - //path-B IQK setting - if(configPathB) - { - PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102); - PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202); - } -#endif - //LO calibration setting - //RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); - PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1); - - //One shot, path A LOK & IQK - //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); - PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf9000000); - PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf8000000); - - // delay x ms - //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); - rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); - - // Check failed - regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); - regE94 = PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); - regE9C= PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); - regEA4= PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); - - if(!(regEAC & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42) ) - result |= 0x01; - else //if Tx not OK, ignore Rx - return result; - - if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK - (((regEA4 & 0x03FF0000)>>16) != 0x132) && - (((regEAC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - DBG_8192C("Path A Rx IQK fail!!\n"); - - return result; - - -} - -static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -_PHY_PathB_IQK( - IN PADAPTER pAdapter - ) -{ - u32 regEAC, regEB4, regEBC, regEC4, regECC; - u8 result = 0x00; - //RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); -#if 0 - //path-B IQK setting - RTPRINT(FINIT, INIT_IQK, ("Path-B IQK setting!\n")); - PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102); - PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202); - - //LO calibration setting - RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); - PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1); -#endif - //One shot, path B LOK & IQK - //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); - PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000002); - PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000000); - - // delay x ms - //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); - rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); - - // Check failed - regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); - regEB4 = PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); - regEBC= PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); - regEC4= PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); - regECC= PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); - - if(!(regEAC & BIT31) && - (((regEB4 & 0x03FF0000)>>16) != 0x142) && - (((regEBC & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - else - return result; - - if(!(regEAC & BIT30) && - (((regEC4 & 0x03FF0000)>>16) != 0x132) && - (((regECC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - DBG_8192C("Path B Rx IQK fail!!\n"); - - - return result; - -} - -static VOID -_PHY_PathAFillIQKMatrix( - IN PADAPTER pAdapter, - IN BOOLEAN bIQKOK, - IN int result[][8], - IN u8 final_candidate, - IN BOOLEAN bTxOnly - ) -{ - u32 Oldval_0, X, TX0_A, reg; - int Y, TX0_C; - - DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); - - if(final_candidate == 0xFF) - return; - else if(bIQKOK) - { - Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][0]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX0_A = (X * Oldval_0) >> 8; - //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); - - Y = result[final_candidate][1]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - TX0_C = (Y * Oldval_0) >> 8; - //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C)); - PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); - - if(bTxOnly) - { - DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n"); - return; - } - - reg = result[final_candidate][2]; - PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][3] & 0x3F; - PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][3] >> 6) & 0xF; - PHY_SetBBReg(pAdapter, 0xca0, 0xF0000000, reg); - } -} - -static VOID -_PHY_PathBFillIQKMatrix( - IN PADAPTER pAdapter, - IN BOOLEAN bIQKOK, - IN int result[][8], - IN u8 final_candidate, - IN BOOLEAN bTxOnly //do Tx only - ) -{ - u32 Oldval_1, X, TX1_A, reg; - int Y, TX1_C; - - DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); - - if(final_candidate == 0xFF) - return; - else if(bIQKOK) - { - Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][4]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX1_A = (X * Oldval_1) >> 8; - //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); - - Y = result[final_candidate][5]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - TX1_C = (Y * Oldval_1) >> 8; - //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C)); - PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); - - if(bTxOnly) - return; - - reg = result[final_candidate][6]; - PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - -static VOID -_PHY_SaveADDARegisters( - IN PADAPTER pAdapter, - IN u32* ADDAReg, - IN u32* ADDABackup, - IN u32 RegisterNum - ) -{ - u32 i; - - //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); - for( i = 0 ; i < RegisterNum ; i++){ - ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord); - } -} - -static VOID -_PHY_SaveMACRegisters( - IN PADAPTER pAdapter, - IN u32* MACReg, - IN u32* MACBackup - ) -{ - u32 i; - - //RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n")); - for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ - MACBackup[i] =rtw_read8(pAdapter, MACReg[i]); - } - MACBackup[i] = rtw_read32(pAdapter, MACReg[i]); - -} - -static VOID -_PHY_ReloadADDARegisters( - IN PADAPTER pAdapter, - IN u32* ADDAReg, - IN u32* ADDABackup, - IN u32 RegiesterNum - ) -{ - u32 i; - - //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); - for(i = 0 ; i < RegiesterNum ; i++){ - PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]); - } -} - -static VOID -_PHY_ReloadMACRegisters( - IN PADAPTER pAdapter, - IN u32* MACReg, - IN u32* MACBackup - ) -{ - u32 i; - - //RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n")); - for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ - rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]); - } - rtw_write32(pAdapter, MACReg[i], MACBackup[i]); -} - -static VOID -_PHY_PathADDAOn( - IN PADAPTER pAdapter, - IN u32* ADDAReg, - IN BOOLEAN isPathAOn, - IN BOOLEAN is2T - ) -{ - u32 pathOn; - u32 i; - - //RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n")); - - pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; - if(_FALSE == is2T){ - pathOn = 0x0bdb25a0; - PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0); - } - else{ - PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn); - } - - for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ - PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn); - } - -} - -static VOID -_PHY_MACSettingCalibration( - IN PADAPTER pAdapter, - IN u32* MACReg, - IN u32* MACBackup - ) -{ - u32 i = 0; - - //RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n")); - - rtw_write8(pAdapter, MACReg[i], 0x3F); - - for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ - rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); - } - rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); - -} - -static VOID -_PHY_PathAStandBy( - IN PADAPTER pAdapter - ) -{ - //RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); - - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x0); - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000); -} - -static VOID -_PHY_PIModeSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN PIMode - ) -{ - u32 mode; - - //RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); - - mode = PIMode ? 0x01000100 : 0x01000000; - PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode); - PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode); -} - -/* -return _FALSE => do IQK again -*/ -static BOOLEAN -_PHY_SimularityCompare( - IN PADAPTER pAdapter, - IN int result[][8], - IN u8 c1, - IN u8 c2 - ) -{ - u32 i, j, diff, SimularityBitMap, bound = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u8 final_candidate[2] = {0xFF, 0xFF}; //for path A and path B - BOOLEAN bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); - - if(is2T) - bound = 8; - else - bound = 4; - - SimularityBitMap = 0; - - for( i = 0; i < bound; i++ ) - { - diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); - if (diff > MAX_TOLERANCE) - { - if((i == 2 || i == 6) && !SimularityBitMap) - { - if(result[c1][i]+result[c1][i+1] == 0) - final_candidate[(i/4)] = c2; - else if (result[c2][i]+result[c2][i+1] == 0) - final_candidate[(i/4)] = c1; - else - SimularityBitMap = SimularityBitMap|(1<dmpriv; - u32 i; - u8 PathAOK, PathBOK; - u32 ADDA_REG[IQK_ADDA_REG_NUM] = { 0x85c, 0xe6c, 0xe70, 0xe74, - 0xe78, 0xe7c, 0xe80, 0xe84, - 0xe88, 0xe8c, 0xed0, 0xed4, - 0xed8, 0xedc, 0xee0, 0xeec }; - - u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = {0x522, 0x550, 0x551,0x040}; - - u32 IQK_BB_REG[IQK_BB_REG_NUM] = { - 0xc04, 0xc08, 0x874, 0xb68, 0xb6c, - 0x870, 0x860, 0x864, 0x800 - }; - -#if MP_DRIVER - const u32 retryCount = 9; -#else - const u32 retryCount = 2; -#endif - - // Note: IQ calibration must be performed after loading - // PHY_REG.txt , and radio_a, radio_b.txt - - u32 bbvalue; - BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); - - if(t==0) - { - bbvalue = PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord); - //RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue)); - - //RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); - - // Save ADDA parameters, turn Path A ADDA on - _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM); - _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); - _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); - } - _PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T); - - if(t==0) - { - pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); - } - - if(!pdmpriv->bRfPiEnable){ - // Switch BB to PI mode to do IQ Calibration. - _PHY_PIModeSwitch(pAdapter, _TRUE); - } - - PHY_SetBBReg(pAdapter, 0x800, BIT24, 0x00); - PHY_SetBBReg(pAdapter, 0xc04, bMaskDWord, 0x03a05600); - PHY_SetBBReg(pAdapter, 0xc08, bMaskDWord, 0x000800e4); - PHY_SetBBReg(pAdapter, 0x874, bMaskDWord, 0x22204000); - PHY_SetBBReg(pAdapter, 0x870, BIT10, 0x01); - PHY_SetBBReg(pAdapter, 0x870, BIT26, 0x01); - PHY_SetBBReg(pAdapter, 0x860, BIT10, 0x00); - PHY_SetBBReg(pAdapter, 0x864, BIT10, 0x00); - - if(is2T) - { - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00010000); - } - - //MAC settings - _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); - - //Page B init - if(isNormal) - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00080000); - else - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0f600000); - - if(is2T) - { - if(isNormal) - PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00080000); - else - PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x0f600000); - } - - // IQ calibration setting - //RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000); - PHY_SetBBReg(pAdapter, 0xe40, bMaskDWord, 0x01007c00); - PHY_SetBBReg(pAdapter, 0xe44, bMaskDWord, 0x01004800); - - for(i = 0 ; i < retryCount ; i++){ - PathAOK = _PHY_PathA_IQK(pAdapter, is2T); - if(PathAOK == 0x03){ - DBG_8192C("Path A IQK Success!!\n"); - result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16; - result[t][2] = (PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK - { - DBG_8192C("Path A IQK Only Tx Success!!\n"); - - result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathAOK){ - DBG_8192C("Path A IQK failed!!\n"); - } - - if(is2T){ - _PHY_PathAStandBy(pAdapter); - - // Turn Path B ADDA on - _PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T); - - for(i = 0 ; i < retryCount ; i++){ - PathBOK = _PHY_PathB_IQK(pAdapter); - if(PathBOK == 0x03){ - DBG_8192C("Path B IQK Success!!\n"); - result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16; - result[t][6] = (PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord)&0x3FF0000)>>16; - result[t][7] = (PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK - { - DBG_8192C("Path B Only Tx IQK Success!!\n"); - result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathBOK){ - DBG_8192C("Path B IQK failed!!\n"); - } - } - - //Back to BB mode, load original value - //RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0); - - if(t!=0) - { - if(!pdmpriv->bRfPiEnable){ - // Switch back BB to SI mode after finish IQ Calibration. - _PHY_PIModeSwitch(pAdapter, _FALSE); - } - - // Reload ADDA power saving parameters - _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM); - - // Reload MAC parameters - _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); - - // Reload BB parameters - _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); - - // Restore RX initial gain - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00032ed3); - if(is2T){ - PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00032ed3); - } - - //load 0xe30 IQC default value - PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00); - - } - //RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n")); - -} - - -static VOID -_PHY_LCCalibrate( - IN PADAPTER pAdapter, - IN BOOLEAN is2T - ) -{ - u8 tmpReg; - u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); - - //Check continuous TX and Packet TX - tmpReg = rtw_read8(pAdapter, 0xd03); - - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX - else // Deal with Packet TX case - rtw_write8(pAdapter, REG_TXPAUSE, 0xFF); // block all queues - - if((tmpReg&0x70) != 0) - { - //1. Read original RF mode - //Path-A - RF_Amode = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits); - - //Path-B - if(is2T) - RF_Bmode = PHY_QueryRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits); - - //2. Set RF mode = standby mode - //Path-A - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); - - //Path-B - if(is2T) - PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); - } - - //3. Read RF reg18 - LC_Cal = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits); - - //4. Set LC calibration begin - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits, LC_Cal|0x08000); - - if(isNormal) { - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(100); - #else - rtw_mdelay_os(100); - #endif - } - else - rtw_mdelay_os(3); - - //Restore original situation - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - { - //Path-A - rtw_write8(pAdapter, 0xd03, tmpReg); - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, RF_Amode); - - //Path-B - if(is2T) - PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, RF_Bmode); - } - else // Deal with Packet TX case - { - rtw_write8(pAdapter, REG_TXPAUSE, 0x00); - } - -} - - -//Analog Pre-distortion calibration -#define APK_BB_REG_NUM 8 -#define APK_CURVE_REG_NUM 4 -#define PATH_NUM 2 - -static VOID -_PHY_APCalibrate( - IN PADAPTER pAdapter, - IN char delta, - IN BOOLEAN is2T - ) -{ -#if 1//(PLATFORM == PLATFORM_WINDOWS)//??? - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - u32 regD[PATH_NUM]; - u32 tmpReg, index, offset, path, i, pathbound = PATH_NUM, apkbound; - - u32 BB_backup[APK_BB_REG_NUM]; - u32 BB_REG[APK_BB_REG_NUM] = { - 0x904, 0xc04, 0x800, 0xc08, 0x874, - 0x870, 0x860, 0x864 }; - u32 BB_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x00204000 }; - u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x22204000 }; - - u32 AFE_backup[IQK_ADDA_REG_NUM]; - u32 AFE_REG[IQK_ADDA_REG_NUM] = { - 0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, - 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, - 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, - 0xeec}; - - u32 MAC_backup[IQK_MAC_REG_NUM]; - u32 MAC_REG[IQK_MAC_REG_NUM] = { - 0x522, 0x550, 0x551, 0x040}; - - u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, - {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} - }; - - u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings - {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} - }; - - u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, - {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} - }; - - u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} - }; - - u32 APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { - {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, - {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} - }; - - u32 AFE_on_off[PATH_NUM] = { - 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on - - u32 APK_offset[PATH_NUM] = { - 0xb68, 0xb6c}; - - u32 APK_normal_offset[PATH_NUM] = { - 0xb28, 0xb98}; - - u32 APK_value[PATH_NUM] = { - 0x92fc0000, 0x12fc0000}; - - u32 APK_normal_value[PATH_NUM] = { - 0x92680000, 0x12680000}; - - char APK_delta_mapping[APK_BB_REG_NUM][13] = { - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} - }; - - u32 APK_normal_setting_value_1[13] = { - 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, - 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, - 0x12680000, 0x00880000, 0x00880000 - }; - - u32 APK_normal_setting_value_2[16] = { - 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, - 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, - 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, - 0x00050006 - }; - - u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a - u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; - - int BB_offset, delta_V, delta_offset; - - BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); - -#if (MP_DRIVER == 1) - PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; - - pMptCtx->APK_bound[0] = 45; - pMptCtx->APK_bound[1] = 52; -#endif - - //RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta)); - - //RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip"))); - - if(!is2T) - pathbound = 1; - - //2 FOR NORMAL CHIP SETTINGS - if(isNormal) - { -// Temporarily do not allow normal driver to do the following settings because these offset -// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal -// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the -// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. -#if (MP_DRIVER != 1) - return; -#endif - - //settings adjust for normal chip - for(index = 0; index < PATH_NUM; index ++) - { - APK_offset[index] = APK_normal_offset[index]; - APK_value[index] = APK_normal_value[index]; - AFE_on_off[index] = 0x6fdb25a4; - } - - for(index = 0; index < APK_BB_REG_NUM; index ++) - { - for(path = 0; path < pathbound; path++) - { - APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; - APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; - } - BB_AP_MODE[index] = BB_normal_AP_MODE[index]; - } - - apkbound = 6; - } - else - { - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000); - if(is2T) - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000); - apkbound = 12; - } - - //save BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(index == 0 && isNormal) //skip - continue; - BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); - } - - //save MAC default value - _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //save AFE default value - _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup,16); - - for(path = 0; path < pathbound; path++) - { - //save old AP curve - if(isNormal) - { - if(path == RF90_PATH_A) - { - //path A APK - //load APK setting - //path-A - offset = 0xb00; - for(index = 0; index < 11; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000); - - offset = 0xb68; - for(; index < 13; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); - - //path A - offset = 0xb00; - for(index = 0; index < 16; index++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - } - else if(path == RF90_PATH_B) - { - //path B APK - //load APK setting - //path-B - offset = 0xb70; - for(index = 0; index < 10; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x12680000); - - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000); - - offset = 0xb68; - index = 11; - for(; index < 13; index ++) //offset 0xb68, 0xb6c - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); - - //path B - offset = 0xb60; - for(index = 0; index < 16; index++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - } - -#if 0 - tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord); - AP_curve[path][0] = tmpReg & 0x1F; //[4:0] - - tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord); - AP_curve[path][1] = (tmpReg & 0xF8000) >> 15; //[19:15] - AP_curve[path][2] = (tmpReg & 0x7C00) >> 10; //[14:10] - AP_curve[path][3] = (tmpReg & 0x3E0) >> 5; //[9:5] -#endif - } - else - { - tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord); - - AP_curve[path][0] = (tmpReg & 0xF8000) >> 15; //[19:15] - AP_curve[path][1] = (tmpReg & 0x7C00) >> 10; //[14:10] - AP_curve[path][2] = (tmpReg & 0x3E0) >> 5; //[9:5] - AP_curve[path][3] = tmpReg & 0x1F; //[4:0] - } - - //save RF default value - regD[path] = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord); - - //Path A AFE all on, path B AFE All off or vise versa - for(index = 0; index < IQK_ADDA_REG_NUM ; index++) - PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord))); - - //BB to AP mode - if(path == 0) - { - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(index == 0 && isNormal) //skip - continue; - else if (index < 5) - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); - else if (BB_REG[index] == 0x870) - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); - else - PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); - } - PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00); - } - else //path B - { - PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x01008c00); - } - - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); - - //MAC settings - _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); - - if(path == RF90_PATH_A) //Path B to standby mode - { - PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0, bMaskDWord, 0x10000); - } - else //Path A to standby mode - { - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x10000); - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f); - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20103); - } - - delta_offset = ((delta+14)/2); - if(delta_offset < 0) - delta_offset = 0; - else if (delta_offset > 12) - delta_offset = 12; - - //AP calibration - for(index = 0; index < APK_BB_REG_NUM; index++) - { - if(index != 1 && isNormal) //only DO PA11+PAD01001, AP RF setting - continue; - - tmpReg = APK_RF_init_value[path][index]; -#if 1 - if(!pdmpriv->bAPKThermalMeterIgnore) - { - BB_offset = (tmpReg & 0xF0000) >> 16; - - if(!(tmpReg & BIT15)) //sign bit 0 - { - BB_offset = -BB_offset; - } - - delta_V = APK_delta_mapping[index][delta_offset]; - - BB_offset += delta_V; - - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset)); - - if(BB_offset < 0) - { - tmpReg = tmpReg & (~BIT15); - BB_offset = -BB_offset; - } - else - { - tmpReg = tmpReg | BIT15; - } - tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); - } -#endif - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord, 0x8992e); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord))); - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord, APK_RF_value_0[path][index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord))); - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, tmpReg); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord))); - if(!isNormal) - { - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord, APK_RF_value_A[path][index]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xa %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord))); - } - - // PA11+PAD01111, one shot - i = 0; - do - { - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); - { - PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); - rtw_mdelay_os(3); - PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); - if(isNormal) { - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(20); - #else - rtw_mdelay_os(20); - #endif - } - else - rtw_mdelay_os(3); - } - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - - if(!isNormal) - { - tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xb, bMaskDWord); - tmpReg = (tmpReg & 0x3E00) >> 9; - } - else - { - if(path == RF90_PATH_A) - tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0x03E00000); - else - tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0xF8000000); - } - //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg)); - - i++; - } - while(tmpReg > apkbound && i < 4); - - APK_result[path][index] = tmpReg; - } - } - - //reload MAC default value - _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //reload BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(index == 0 && isNormal) //skip - continue; - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); - } - - //reload AFE default value - _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); - - //reload RF path default value - for(path = 0; path < pathbound; path++) - { - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); - if(path == RF90_PATH_B) - { - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f); - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20101); - } -#if 1 - if(!isNormal) - { - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(APK_result[path][index] > 12) - APK_result[path][index] = AP_curve[path][index-1]; - //RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", index, APK_result[path][index])); - } - } - else - { //note no index == 0 - if (APK_result[path][1] > 6) - APK_result[path][1] = 6; - //RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); - -#if 0 - if(APK_result[path][2] < 2) - APK_result[path][2] = 2; - else if (APK_result[path][2] > 6) - APK_result[path][2] = 6; - RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 2, APK_result[path][2])); - - if(APK_result[path][3] < 2) - APK_result[path][3] = 2; - else if (APK_result[path][3] > 6) - APK_result[path][3] = 6; - RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 3, APK_result[path][3])); - - if(APK_result[path][4] < 5) - APK_result[path][4] = 5; - else if (APK_result[path][4] > 9) - APK_result[path][4] = 9; - RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 4, APK_result[path][4])); -#endif - - } -#endif - } - - //RTPRINT(FINIT, INIT_IQK, ("\n")); - - - for(path = 0; path < pathbound; path++) - { - if(isNormal) - { - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); - if(path == RF90_PATH_A) - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); - else - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, - ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); - } - else - { - for(index = 0; index < 2; index++) - pdmpriv->APKoutput[path][index] = ((APK_result[path][index] << 15) | (APK_result[path][2] << 10) | (APK_result[path][3] << 5) | APK_result[path][4]); - -#if (MP_DRIVER == 1) - if(pMptCtx->TxPwrLevel[path] > pMptCtx->APK_bound[path]) - { - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, - pdmpriv->APKoutput[path][0]); - } - else - { - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, - pdmpriv->APKoutput[path][1]); - } -#else - PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, - pdmpriv->APKoutput[path][0]); -#endif - } - } - - pdmpriv->bAPKdone = _TRUE; - - //RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n")); -#endif -} - - -#define DP_BB_REG_NUM 7 -#define DP_RF_REG_NUM 1 -#define DP_RETRY_LIMIT 10 -#define DP_PATH_NUM 2 -#define DP_DPK_NUM 3 -#define DP_DPK_VALUE_NUM 2 - -//digital predistortion -static VOID -_PHY_DigitalPredistortion( - IN PADAPTER pAdapter, - IN BOOLEAN is2T - ) -{ -#if 1//(PLATFORM == PLATFORM_WINDOWS) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - - u32 tmpReg, tmpReg2, index, offset, path, i, pathbound = PATH_NUM; - u32 AFE_backup[IQK_ADDA_REG_NUM]; - u32 AFE_REG[IQK_ADDA_REG_NUM] = { - 0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, - 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, - 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, - 0xeec}; - - u32 BB_backup[DP_BB_REG_NUM]; - u32 BB_REG[DP_BB_REG_NUM] = { - 0xc04, 0x800, 0xc08, 0x874, - 0x870, 0x860, 0x864}; - u32 BB_settings[DP_BB_REG_NUM] = { - 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, - 0x0, 0x0, 0x0}; - - u32 RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; - u32 RF_REG[DP_RF_REG_NUM] = { - 0x0d}; - - u32 MAC_backup[IQK_MAC_REG_NUM]; - u32 MAC_REG[IQK_MAC_REG_NUM] = { - 0x522, 0x550, 0x551, 0x040}; - - u32 Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { - {0x1e1e1e1e, 0x03901e1e}, - {0x18181818, 0x03901818}, - {0x0e0e0e0e, 0x03900e0e} - }; - -// u32 RF_PATHA_backup[DP_RF_REG_NUM]; -// u32 RF_REG_PATHA[DP_RF_REG_NUM] = { -// 0x00, 0x10, 0x11}; - - u32 Reg800, Reg874, Regc04, Regc08, Reg040; - - u32 AFE_on_off[PATH_NUM] = { - 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on - - u32 RetryCount = 0; - - BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); - - //DBG_8192C("==>_PHY_DigitalPredistortion()\n"); - - //DBG_8192C("_PHY_DigitalPredistortion for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip")); - - if(!isNormal) - return; - - //save BB default value - for(index=0; index tx_agc 1f ~11 - // PA gain = 11 & PAD2 => tx_agc 10~0e - // PA gain = 01 => tx_agc 0b~0d - // PA gain = 00 => tx_agc 0a~00 - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); - PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - - //do inner loopback DPK 3 times - for(i = 0; i < 3; i++) - { - //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 - for(index = 0; index < 3; index++) - PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); - PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); - for(index = 0; index < 4; index++) - PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); - - // PAGE_B for Path-A inner loopback DPK setting - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02097098); - PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); - - //----send one shot signal----// - // Path A - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x80047788); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x00047788); - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(50); - #else - rtw_mdelay_os(50); - #endif - } - - //PA gain = 11 => tx_agc = 1a - for(index = 0; index < 3; index++) - PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, 0x34343434); - PHY_SetBBReg(pAdapter, 0xe08+index*4, bMaskDWord, 0x03903434); - for(index = 0; index < 4; index++) - PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, 0x34343434); - - //==================================== - // PAGE_B for Path-A DPK setting - //==================================== - // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098); - PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); - - //rf_lpbk_setup - //1.rf 00:5205a, rf 0d:0e52c - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0c, bMaskDWord, 0x8992b); - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0d, bMaskDWord, 0x0e52c); - PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x5205a ); - - //----send one shot signal----// - // Path A - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0); - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(50); - #else - rtw_mdelay_os(50); - #endif - - while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathAOK) - { - //----read back measurement results----// - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c297018); - tmpReg = PHY_QueryBBReg(pAdapter, 0xbe0, bMaskDWord); - rtw_mdelay_os(10); - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c29701f); - tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbe8, bMaskDWord); - rtw_mdelay_os(10); - - tmpReg = (tmpReg & bMaskHWord) >> 16; - tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; - if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) - { - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098); - - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0); - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(50); - #else - rtw_mdelay_os(50); - #endif - RetryCount++; - DBG_8192C("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2); - } - else - { - DBG_8192C("path A DPK Sucess\n"); - pdmpriv->bDPPathAOK = _TRUE; - break; - } - } - RetryCount = 0; - - //DPP path A - if(pdmpriv->bDPPathAOK) - { - // DP settings - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x01017098); - PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x776d9f84); - PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); - PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); - - for(i=0xb00; i<=0xb3c; i+=4) - { - PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000); - //DBG_8192C("path A ofsset = 0x%x\n", i); - } - - //pwsf - PHY_SetBBReg(pAdapter, 0xb40, bMaskDWord, 0x40404040); - PHY_SetBBReg(pAdapter, 0xb44, bMaskDWord, 0x28324040); - PHY_SetBBReg(pAdapter, 0xb48, bMaskDWord, 0x10141920); - - for(i=0xb4c; i<=0xb5c; i+=4) - { - PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c); - } - - //TX_AGC boundary - PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - } - else - { - PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x00000000); - PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x00000000); - } - - //DPK path B - if(is2T) - { - //Path A to standby mode - PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_AC, bMaskDWord, 0x10000); - - // LUTs => tx_agc - // PA gain = 11 & PAD1, => tx_agc 1f ~11 - // PA gain = 11 & PAD2, => tx_agc 10 ~0e - // PA gain = 01 => tx_agc 0b ~0d - // PA gain = 00 => tx_agc 0a ~00 - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); - PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - - //do inner loopback DPK 3 times - for(i = 0; i < 3; i++) - { - //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 - for(index = 0; index < 4; index++) - PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); - for(index = 0; index < 2; index++) - PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); - for(index = 0; index < 2; index++) - PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); - - // PAGE_B for Path-A inner loopback DPK setting - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02097098); - PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); - PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); - - //----send one shot signal----// - // Path B - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x80047788); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x00047788); - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(50); - #else - rtw_mdelay_os(50); - #endif - } - - // PA gain = 11 => tx_agc = 1a - for(index = 0; index < 4; index++) - PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, 0x34343434); - for(index = 0; index < 2; index++) - PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, 0x34343434); - for(index = 0; index < 2; index++) - PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, 0x34343434); - - // PAGE_B for Path-B DPK setting - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098); - PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); - PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); - - // RF lpbk switches on - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x0101000f); - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x01120103); - - //Path-B RF lpbk - PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0c, bMaskDWord, 0x8992b); - PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0d, bMaskDWord, 0x0e52c); - PHY_SetRFReg(pAdapter, RF90_PATH_B, RF_AC, bMaskDWord, 0x5205a); - - //----send one shot signal----// - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0); - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(50); - #else - rtw_mdelay_os(50); - #endif - - while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathBOK) - { - //----read back measurement results----// - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c297018); - tmpReg = PHY_QueryBBReg(pAdapter, 0xbf0, bMaskDWord); - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c29701f); - tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbf8, bMaskDWord); - - tmpReg = (tmpReg & bMaskHWord) >> 16; - tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; - - if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) - { - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098); - - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0); - rtw_mdelay_os(1); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0); - #ifdef CONFIG_LONG_DELAY_ISSUE - rtw_msleep_os(50); - #else - rtw_mdelay_os(50); - #endif - RetryCount++; - DBG_8192C("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2); - } - else - { - DBG_8192C("path B DPK Success\n"); - pdmpriv->bDPPathBOK = _TRUE; - break; - } - } - - //DPP path B - if(pdmpriv->bDPPathBOK) - { - // DP setting - // LUT by SRAM - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x01017098); - PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x776d9f84); - PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); - PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); - - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); - for(i=0xb60; i<=0xb9c; i+=4) - { - PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000); - //DBG_8192C("path B ofsset = 0x%x\n", i); - } - - // PWSF - PHY_SetBBReg(pAdapter, 0xba0, bMaskDWord, 0x40404040); - PHY_SetBBReg(pAdapter, 0xba4, bMaskDWord, 0x28324050); - PHY_SetBBReg(pAdapter, 0xba8, bMaskDWord, 0x0c141920); - - for(i=0xbac; i<=0xbbc; i+=4) - { - PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c); - } - - // tx_agc boundary - PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f); - PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); - - } - else - { - PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x00000000); - PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x00000000); - } - } - - //reload BB default value - for(index=0; indexbDPdone = _TRUE; - //DBG_8192C("<==_PHY_DigitalPredistortion()\n"); -#endif -} - - -static VOID _PHY_SetRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN bMain, - IN BOOLEAN is2T - ) -{ - u8 u1bTmp; - - if(!pAdapter->hw_init_completed) - { - u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; - rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); - //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if(is2T) - { - if(bMain) - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A - else - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT - } - else - { - - if(bMain) - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main - else - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux - } - -} - -//return value TRUE => Main; FALSE => Aux - -static BOOLEAN _PHY_QueryRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN is2T - ) -{ -// if(is2T) -// return _TRUE; - - if(!pAdapter->hw_init_completed) - { - PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if(is2T) - { - if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) - return _TRUE; - else - return _FALSE; - } - else - { - if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) - return _TRUE; - else - return _FALSE; - } -} - - -static VOID -_PHY_DumpRFReg(IN PADAPTER pAdapter) -{ - u32 rfRegValue,rfRegOffset; - - //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); - - for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ - rfRegValue = PHY_QueryRFReg(pAdapter,RF90_PATH_A, rfRegOffset, bMaskDWord); - //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); - } - //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); -} - - -VOID -rtl8192c_PHY_IQCalibrate( - IN PADAPTER pAdapter, - IN BOOLEAN bReCovery - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u32 IQK_BB_REG[9] = { - rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, - rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta}; - int result[4][8]; //last is final result - u8 i, final_candidate; - BOOLEAN bPathAOK, bPathBOK; - int RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; - BOOLEAN is12simular, is13simular, is23simular; - - -#if (MP_DRIVER == 1) - //ignore IQK when continuous Tx - if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE) - return; - if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE) - return; - if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE) - return; - if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE) - return; -#endif - -#if DISABLE_BB_RF - return; -#endif - - if(bReCovery) - { - _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); - return; - } - DBG_8192C("IQK:Start!!!\n"); - - for(i = 0; i < 8; i++) - { - result[0][i] = 0; - result[1][i] = 0; - result[2][i] = 0; - result[3][i] = 0; - } - final_candidate = 0xff; - bPathAOK = _FALSE; - bPathBOK = _FALSE; - is12simular = _FALSE; - is23simular = _FALSE; - is13simular = _FALSE; - - for (i=0; i<3; i++) - { - if(IS_92C_SERIAL( pHalData->VersionID)){ - _PHY_IQCalibrate(pAdapter, result, i, _TRUE); - //_PHY_DumpRFReg(pAdapter); - } - else{ - // For 88C 1T1R - _PHY_IQCalibrate(pAdapter, result, i, _FALSE); - } - - if(i == 1) - { - is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1); - if(is12simular) - { - final_candidate = 0; - break; - } - } - - if(i == 2) - { - is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2); - if(is13simular) - { - final_candidate = 0; - break; - } - - is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2); - if(is23simular) - final_candidate = 1; - else - { - for(i = 0; i < 8; i++) - RegTmp += result[3][i]; - - if(RegTmp != 0) - final_candidate = 3; - else - final_candidate = 0xFF; - } - } - } - - for (i=0; i<4; i++) - { - RegE94 = result[i][0]; - RegE9C = result[i][1]; - RegEA4 = result[i][2]; - RegEAC = result[i][3]; - RegEB4 = result[i][4]; - RegEBC = result[i][5]; - RegEC4 = result[i][6]; - RegECC = result[i][7]; - //RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - } - - if(final_candidate != 0xff) - { - pdmpriv->RegE94 = RegE94 = result[final_candidate][0]; - pdmpriv->RegE9C = RegE9C = result[final_candidate][1]; - RegEA4 = result[final_candidate][2]; - RegEAC = result[final_candidate][3]; - pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4]; - pdmpriv->RegEBC = RegEBC = result[final_candidate][5]; - RegEC4 = result[final_candidate][6]; - RegECC = result[final_candidate][7]; - DBG_8192C("IQK: final_candidate is %x\n", final_candidate); - DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC); - bPathAOK = bPathBOK = _TRUE; - } - else - { - - #if 0 - DBG_871X("%s do _PHY_ReloadADDARegisters\n"); - _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); - return; - #else - pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100; //X default value - pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0; //Y default value - #endif - } - - if((RegE94 != 0)/*&&(RegEA4 != 0)*/) - _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); - - if(IS_92C_SERIAL( pHalData->VersionID)){ - if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) - _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - } - - _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); - -} - - -VOID -rtl8192c_PHY_LCCalibrate( - IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - -#if (MP_DRIVER == 1) - // ignore LCK when continuous Tx - if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE) - return; - if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE) - return; - if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE) - return; - if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE) - return; -#endif - -#if DISABLE_BB_RF - return; -#endif - - if(IS_92C_SERIAL( pHalData->VersionID)){ - _PHY_LCCalibrate(pAdapter, _TRUE); - } - else{ - // For 88C 1T1R - _PHY_LCCalibrate(pAdapter, _FALSE); - } -} - -VOID -rtl8192c_PHY_APCalibrate( - IN PADAPTER pAdapter, - IN char delta - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - -#if DISABLE_BB_RF - return; -#endif - - if(pdmpriv->bAPKdone) - return; - -// if(IS_NORMAL_CHIP(pHalData->VersionID)) -// return; - - if(IS_92C_SERIAL( pHalData->VersionID)){ - _PHY_APCalibrate(pAdapter, delta, _TRUE); - } - else{ - // For 88C 1T1R - _PHY_APCalibrate(pAdapter, delta, _FALSE); - } -} - -VOID -rtl8192c_PHY_DigitalPredistortion( - IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - -#if DISABLE_BB_RF - return; -#endif - - return; - - if(pdmpriv->bDPdone) - return; - - if(IS_92C_SERIAL( pHalData->VersionID)){ - _PHY_DigitalPredistortion(pAdapter, _TRUE); - } - else{ - // For 88C 1T1R - _PHY_DigitalPredistortion(pAdapter, _FALSE); - } -} - -VOID rtl8192c_PHY_SetRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN bMain - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - -#if DISABLE_BB_RF - return; -#endif - - if(IS_92C_SERIAL( pHalData->VersionID)){ - _PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE); - } - else{ - // For 88C 1T1R - _PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE); - } -} - -// -// Move from phycfg.c to gen.c to be code independent later -// -//-------------------------Move to other DIR later----------------------------*/ -#ifdef CONFIG_USB_HCI - -// -// Description: -// To dump all Tx FIFO LLT related link-list table. -// Added by Roger, 2009.03.10. -// -VOID -DumpBBDbgPort_92CU( - IN PADAPTER Adapter - ) -{ - - //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); - PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); - PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); - -} -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +/****************************************************************************** + + Module: rtl8192c_phycfg.c + + Note: Merge 92SE/SU PHY config as below + 1. BB register R/W API + 2. RF register R/W API + 3. Initial BB/RF/MAC config by reading BB/MAC/RF txt. + 3. Power setting API + 4. Channel switch API + 5. Initial gain switch API. + 6. Other BB/MAC/RF API. + + Function: PHY: Extern function, phy: local function + + Export: PHY_FunctionName + + Abbrev: NONE + + History: + Data Who Remark + 08/08/2008 MHC 1. Port from 9x series phycfg.c + 2. Reorganize code arch and ad description. + 3. Collect similar function. + 4. Seperate extern/local API. + 08/12/2008 MHC We must merge or move USB PHY relative function later. + 10/07/2008 MHC Add IQ calibration for PHY.(Only 1T2R mode now!!!) + 11/06/2008 MHC Add TX Power index PG file to config in 0xExx register + area to map with EEPROM/EFUSE tx pwr index. + +******************************************************************************/ +#define _HAL_8192C_PHYCFG_C_ + +#include +#include +#include +#include + +#ifdef CONFIG_IOL +#include +#endif + +#include + + +/*---------------------------Define Local Constant---------------------------*/ +/* Channel switch:The size of command tables for switch channel*/ +#define MAX_PRECMD_CNT 16 +#define MAX_RFDEPENDCMD_CNT 16 +#define MAX_POSTCMD_CNT 16 + +#define MAX_DOZE_WAITING_TIMES_9x 64 + +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ + +/*------------------------Define local variable------------------------------*/ + + +/*--------------------Define export function prototype-----------------------*/ +// Please refer to header file +/*--------------------Define export function prototype-----------------------*/ + +/*----------------------------Function Body----------------------------------*/ +// +// 1. BB register R/W API +// + +/** +* Function: phy_CalculateBitShift +* +* OverView: Get shifted position of the BitMask +* +* Input: +* u4Byte BitMask, +* +* Output: none +* Return: u4Byte Return the shift bit bit position of the mask +*/ +static u32 +phy_CalculateBitShift( + u32 BitMask + ) +{ + u32 i; + + for(i=0; i<=31; i++) + { + if ( ((BitMask>>i) & 0x1 ) == 1) + break; + } + + return (i); +} + + +/** +* Function: PHY_QueryBBReg +* +* OverView: Read "sepcific bits" from BB register +* +* Input: +* PADAPTER Adapter, +* u4Byte RegAddr, //The target address to be readback +* u4Byte BitMask //The target bit position in the target address +* //to be readback +* Output: None +* Return: u4Byte Data //The readback register value +* Note: This function is equal to "GetRegSetting" in PHY programming guide +*/ +u32 +rtl8192c_PHY_QueryBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 ReturnValue = 0, OriginalValue, BitShift; + u16 BBWaitCounter = 0; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); + + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); + + return (ReturnValue); + +} + + +/** +* Function: PHY_SetBBReg +* +* OverView: Write "Specific bits" to BB register (page 8~) +* +* Input: +* PADAPTER Adapter, +* u4Byte RegAddr, //The target address to be modified +* u4Byte BitMask //The target bit position in the target address +* //to be modified +* u4Byte Data //The new register value in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRegSetting" in PHY programming guide +*/ + +VOID +rtl8192c_PHY_SetBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u16 BBWaitCounter = 0; + u32 OriginalValue, BitShift; + +#if (DISABLE_BB_RF == 1) + return; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); + + if(BitMask!= bMaskDWord){//if not "double word" write + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + Data = ((OriginalValue & (~BitMask)) | (Data << BitShift)); + } + + rtw_write32(Adapter, RegAddr, Data); + + //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); + +} + + +// +// 2. RF register R/W API +// + +/*----------------------------------------------------------------------------- + * Function: phy_FwRFSerialRead() + * + * Overview: We support firmware to execute RF-R/W. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/21/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +static u32 +phy_FwRFSerialRead( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset ) +{ + u32 retValue = 0; + //RT_ASSERT(FALSE,("deprecate!\n")); + return (retValue); + +} /* phy_FwRFSerialRead */ + + +/*----------------------------------------------------------------------------- + * Function: phy_FwRFSerialWrite() + * + * Overview: We support firmware to execute RF-R/W. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 01/21/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +static VOID +phy_FwRFSerialWrite( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data ) +{ + //RT_ASSERT(FALSE,("deprecate!\n")); +} + + +/** +* Function: phy_RFSerialRead +* +* OverView: Read regster from RF chips +* +* Input: +* PADAPTER Adapter, +* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte Offset, //The target address to be read +* +* Output: None +* Return: u4Byte reback value +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() +*/ +static u32 +phy_RFSerialRead( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset + ) +{ + u32 retValue = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + u32 tmplong,tmplong2; + u8 RfPiEnable=0; +#if 0 + if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs + return retValue; + if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs + return retValue; +#endif + // + // Make sure RF register offset is correct + // + Offset &= 0x3f; + + // + // Switch page for 8256 RF IC + // + NewOffset = Offset; + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); + // return 0xFFFFFFFF; + //} + + // For 92S LSSI Read RFLSSIRead + // For RF A/B write 0x824/82c(does not work in the future) + // We must use 0x824 for RF A and B to execute read trigger + tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); + if(eRFPath == RF90_PATH_A) + tmplong2 = tmplong; + else + tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); + + tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF + + PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); + rtw_udelay_os(10);// PlatformStallExecution(10); + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); + rtw_udelay_os(100);//PlatformStallExecution(100); + + PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); + rtw_udelay_os(10);//PlatformStallExecution(10); + + if(eRFPath == RF90_PATH_A) + RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); + else if(eRFPath == RF90_PATH_B) + RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); + + if(RfPiEnable) + { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF + retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); + //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); + } + else + { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF + retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); + //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); + } + //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); + + return retValue; + +} + + + +/** +* Function: phy_RFSerialWrite +* +* OverView: Write data to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte Offset, //The target address to be read +* u4Byte Data //The new register Data in the target bit position +* //of the target to be read +* +* Output: None +* Return: None +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() + * + * Note: For RF8256 only + * The total count of RTL8256(Zebra4) register is around 36 bit it only employs + * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) + * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration + * programming guide" for more details. + * Thus, we define a sub-finction for RTL8526 register address conversion + * =========================================================== + * Register Mode RegCTL[1] RegCTL[0] Note + * (Reg00[12]) (Reg00[10]) + * =========================================================== + * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * + * 2008/09/02 MH Add 92S RF definition + * + * + * +*/ +static VOID +phy_RFSerialWrite( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data + ) +{ + u32 DataAndAddr = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + +#if 0 + // We should check valid regs for RF_6052 case. + if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs + return; + if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs + return; +#endif + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); + // return; + //} + + Offset &= 0x3f; + + // + // Shadow Update + // + //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); + + // + // Switch page for 8256 RF IC + // + NewOffset = Offset; + + // + // Put write addr in [5:0] and write data in [31:16] + // + //DataAndAddr = (Data<<16) | (NewOffset&0x3f); + DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF + + // + // Write Operation + // + PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); + //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); + +} + + +/** +* Function: PHY_QueryRFReg +* +* OverView: Query "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte RegAddr, //The target address to be read +* u4Byte BitMask //The target bit position in the target address +* //to be read +* +* Output: None +* Return: u4Byte Readback value +* Note: This function is equal to "GetRFRegSetting" in PHY programming guide +*/ +u32 +rtl8192c_PHY_QueryRFReg( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 Original_Value, Readback_Value, BitShift; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u8 RFWaitCounter = 0; + //_irqL irqL; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); + +#ifdef CONFIG_USB_HCI + //PlatformAcquireMutex(&pHalData->mxRFOperate); +#else + //_enter_critical(&pHalData->rf_lock, &irqL); +#endif + + + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + + BitShift = phy_CalculateBitShift(BitMask); + Readback_Value = (Original_Value & BitMask) >> BitShift; + +#ifdef CONFIG_USB_HCI + //PlatformReleaseMutex(&pHalData->mxRFOperate); +#else + //_exit_critical(&pHalData->rf_lock, &irqL); +#endif + + + //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", + // RegAddr, eRFPath, Original_Value)); + + return (Readback_Value); +} + +/** +* Function: PHY_SetRFReg +* +* OverView: Write "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte RegAddr, //The target address to be modified +* u4Byte BitMask //The target bit position in the target address +* //to be modified +* u4Byte Data //The new register Data in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRFRegSetting" in PHY programming guide +*/ +VOID +rtl8192c_PHY_SetRFReg( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u1Byte RFWaitCounter = 0; + u32 Original_Value, BitShift; + //_irqL irqL; + +#if (DISABLE_BB_RF == 1) + return; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + + +#ifdef CONFIG_USB_HCI + //PlatformAcquireMutex(&pHalData->mxRFOperate); +#else + //_enter_critical(&pHalData->rf_lock, &irqL); +#endif + + + // RF data is 12 bits only + if (BitMask != bRFRegOffsetMask) + { + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); + } + + phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); + + + +#ifdef CONFIG_USB_HCI + //PlatformReleaseMutex(&pHalData->mxRFOperate); +#else + //_exit_critical(&pHalData->rf_lock, &irqL); +#endif + + //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + +} + + +// +// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. +// + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigMACWithParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: The format of MACPHY_REG.txt is different from PHY and RF. + * [Register][Mask][Value] + *---------------------------------------------------------------------------*/ +static int +phy_ConfigMACWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + return rtStatus; +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigMACWithHeaderFile() + * + * Overview: This function read BB parameters from Header file we gen, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: The format of MACPHY_REG.txt is different from PHY and RF. + * [Register][Mask][Value] + *---------------------------------------------------------------------------*/ +static int +phy_ConfigMACWithHeaderFile( + IN PADAPTER Adapter +) +{ + u32 i = 0; + u32 ArrayLength = 0; + u32* ptrArray; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //2008.11.06 Modified by tynli. + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); + ArrayLength = MAC_2T_ArrayLength; + ptrArray = Rtl819XMAC_Array; + +#ifdef CONFIG_IOL_MAC + if(rtw_IOL_applied(Adapter)) + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) + return _FAIL; + + for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column + rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); + } + + return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); + } + else +#endif + { + for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column + rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); + } + } + + return _SUCCESS; + +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_MACConfig8192C + * + * Overview: Condig MAC by header file or parameter file. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 08/12/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +int +PHY_MACConfig8192C( + IN PADAPTER Adapter + ) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s8 *pszMACRegFile; + s8 sz88CMACRegFile[] = RTL8188C_PHY_MACREG; + s8 sz92CMACRegFile[] = RTL8192C_PHY_MACREG; + BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); + BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + if(isNormal) + { + if(is92C) + pszMACRegFile = sz92CMACRegFile; + else + pszMACRegFile = sz88CMACRegFile; + } + else + { + //pszMACRegFile = TestMacRegFile; + } + + // + // Config MAC + // +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigMACWithHeaderFile(Adapter); +#else + + // Not make sure EEPROM, add later + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); + rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); +#endif + +#ifdef CONFIG_PCI_HCI + //this switching setting cause some 8192cu hw have redownload fw fail issue + //improve 2-stream TX EVM by Jenyu + if(isNormal && is92C) + rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71); +#endif + + + // 2010.07.13 AMPDU aggregation number 9 + //rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); + rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18. +#ifdef CONFIG_USB_HCI + if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType)) + rtw_write8(Adapter, 0x40,0x04); +#endif + + return rtStatus; + +} + + +/** +* Function: phy_InitBBRFRegisterDefinition +* +* OverView: Initialize Register definition offset for Radio Path A/B/C/D +* +* Input: +* PADAPTER Adapter, +* +* Output: None +* Return: None +* Note: The initialization value is constant and it should never be changes +*/ +static VOID +phy_InitBBRFRegisterDefinition( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // RF Interface Sowrtware Control + pHalData->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 + pHalData->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) + pHalData->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 + pHalData->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) + + // RF Interface Readback Value + pHalData->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 + pHalData->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) + pHalData->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 + pHalData->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) + + // RF Interface Output (and Enable) + pHalData->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 + pHalData->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 + + // RF Interface (Output and) Enable + pHalData->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) + pHalData->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) + + //Addr of LSSI. Wirte RF register by driver + pHalData->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter + pHalData->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; + + // RF parameter + pHalData->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select + pHalData->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; + pHalData->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; + pHalData->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; + + // Tx AGC Gain Stage (same for all path. Should we remove this?) + pHalData->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + + // Tranceiver A~D HSSI Parameter-1 + pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 + pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 + + // Tranceiver A~D HSSI Parameter-2 + pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 + pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 + + // RF switch Control + pHalData->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control + pHalData->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; + pHalData->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; + pHalData->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; + + // AGC control 1 + pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; + pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; + pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; + pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; + + // AGC control 2 + pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; + pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; + pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; + pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; + + // RX AFE control 1 + pHalData->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; + pHalData->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; + pHalData->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; + pHalData->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; + + // RX AFE control 1 + pHalData->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; + pHalData->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; + pHalData->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; + pHalData->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; + + // Tx AFE control 1 + pHalData->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; + pHalData->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; + pHalData->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; + pHalData->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; + + // Tx AFE control 2 + pHalData->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; + pHalData->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; + pHalData->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; + pHalData->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; + + // Tranceiver LSSI Readback SI mode + pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; + pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; + pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; + pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; + + // Tranceiver LSSI Readback PI mode + pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; + pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; + //pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; + //pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; + +} + + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * 2008/11/06 MH For 92S we do not support silent reset now. Disable + * parameter file compare!!!!!!?? + * + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + return rtStatus; +} + + + +//**************************************** +// The following is for High Power PA +//**************************************** +VOID +phy_ConfigBBExternalPA( + IN PADAPTER Adapter +) +{ +#ifdef CONFIG_USB_HCI + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 i=0; + u32 temp=0; + + if(!pHalData->ExternalPA) + { + return; + } + + // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the + // same code as SU. It is already updated in PHY_REG_1T_HP.txt. +#if 0 + PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); + temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); + temp |= (BIT26|BIT21|BIT10|BIT5); + PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); + PHY_SetBBReg(Adapter, 0x870, BIT10, 0); + PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); + PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); +#endif + +#endif +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithHeaderFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * u1Byte ConfigType 0 => PHY_CONFIG + * 1 =>AGC_TAB + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithHeaderFile( + IN PADAPTER Adapter, + IN u8 ConfigType +) +{ + int i; + u32* Rtl819XPHY_REGArray_Table; + u32* Rtl819XAGCTAB_Array_Table; + u16 PHY_REGArrayLen, AGCTAB_ArrayLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int ret = _SUCCESS; + + // + // 2009.11.24. Modified by tynli. + // + if(IS_92C_SERIAL(pHalData->VersionID)) + { + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + AGCTAB_ArrayLen = AGCTAB_2TArrayLength; + Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_2TArray; + PHY_REGArrayLen = PHY_REG_2TArrayLength; + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2TArray; +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType == BOARD_MINICARD ) + { + PHY_REGArrayLen = PHY_REG_2T_mCardArrayLength; + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2T_mCardArray; + } +#endif + } + else + { + DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n"); + ret = _FAIL; + goto exit; + } + } + else + { + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + AGCTAB_ArrayLen = AGCTAB_1TArrayLength; + Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1TArray; + PHY_REGArrayLen = PHY_REG_1TArrayLength; + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1TArray; +#ifdef CONFIG_USB_HCI + if(pHalData->BoardType == BOARD_MINICARD ) + { + PHY_REGArrayLen = PHY_REG_1T_mCardArrayLength; + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_mCardArray; + } + else if(pHalData->BoardType == BOARD_USB_High_PA) + { + AGCTAB_ArrayLen = AGCTAB_1T_HPArrayLength; + Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1T_HPArray; + PHY_REGArrayLen = PHY_REG_1T_HPArrayLength; + Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_HPArray; + } +#endif + } + else + { + DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n"); + ret = _FAIL; + goto exit; + } + } + + if(ConfigType == BaseBand_Config_PHY_REG) + { + #ifdef CONFIG_IOL_BB_PHY_REG + if(rtw_IOL_applied(Adapter)) + { + struct xmit_frame *xmit_frame; + u32 tmp_value; + + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + ret = _FAIL; + goto exit; + } + + for(i=0;iMCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0])); + } + if(RegAddr == rTxAGC_A_Rate54_24) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1])); + } + if(RegAddr == rTxAGC_A_CCK1_Mcs32) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6])); + } + if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7])); + } + if(RegAddr == rTxAGC_A_Mcs03_Mcs00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2])); + } + if(RegAddr == rTxAGC_A_Mcs07_Mcs04) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3])); + } + if(RegAddr == rTxAGC_A_Mcs11_Mcs08) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4])); + } + if(RegAddr == rTxAGC_A_Mcs15_Mcs12) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5])); + } + if(RegAddr == rTxAGC_B_Rate18_06) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8])); + } + if(RegAddr == rTxAGC_B_Rate54_24) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9])); + } + if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14])); + } + if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15])); + } + if(RegAddr == rTxAGC_B_Mcs03_Mcs00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10])); + } + if(RegAddr == rTxAGC_B_Mcs07_Mcs04) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11])); + } + if(RegAddr == rTxAGC_B_Mcs11_Mcs08) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12])); + } + if(RegAddr == rTxAGC_B_Mcs15_Mcs12) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; + //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13])); + pHalData->pwrGroupCnt++; + } +} +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithPgParaFile + * + * Overview: + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/06/2008 MHC Create Version 0. + * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithPgParaFile( + IN PADAPTER Adapter, + IN u8* pFileName) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} /* phy_ConfigBBWithPgParaFile */ + + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithPgHeaderFile + * + * Overview: Config PHY_REG_PG array + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! + * 11/10/2008 tynli Modify to mew files. + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithPgHeaderFile( + IN PADAPTER Adapter, + IN u8 ConfigType) +{ + int i; + u32* Rtl819XPHY_REGArray_Table_PG; + u16 PHY_REGArrayPGLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // Default: pHalData->RF_Type = RF_2T2R. + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + PHY_REGArrayPGLen = PHY_REG_Array_PGLength; + Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG; + +#ifdef CONFIG_USB_HCI +// 2010/10/19 Chiyoko According to Alex/Willson opinion, VAU/dongle can share the same PHY_REG_PG.txt +/* + if(pHalData->BoardType == BOARD_MINICARD ) + { + PHY_REGArrayPGLen = PHY_REG_Array_PG_mCardLength; + Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_mCard; + } + else */if(pHalData->BoardType ==BOARD_USB_High_PA ) + { + PHY_REGArrayPGLen = PHY_REG_Array_PG_HPLength; + Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_HP; + } +#endif + } + else + { + DBG_8192C(" ===> phy_ConfigBBWithPgHeaderFile(): do not support test chip\n"); + return _FAIL; + } + + if(ConfigType == BaseBand_Config_PHY_REG) + { + for(i=0;iBufOfLines), + MAX_LINES_HWCONFIG_TXT, + MAX_BYTES_LINE_HWCONFIG_TXT, + &nLinesRead + ); + if(rtStatus == RT_STATUS_SUCCESS) + { + PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesRead6 = nLinesRead; + } + else + { + // Temporarily skip PHY_REG_MP.txt if file does not exist. + pHalData->nLinesRead6 = 0; + RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n")); + return RT_STATUS_SUCCESS; + } + } + else + { + PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + nLinesRead = pHalData->nLinesRead6; + rtStatus = RT_STATUS_SUCCESS; + } + + + if(rtStatus == RT_STATUS_SUCCESS) + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName)); + + for(ithLine = 0; ithLine < nLinesRead; ithLine++) + { + szLine = pHalData->BufOfLines[ithLine]; + + if(!IsCommentString(szLine)) + { + // Get 1st hex value as register offset. + if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) + { + if(u4bRegOffset == 0xff) + { // Ending. + break; + } + else if (u4bRegOffset == 0xfe) + delay_ms(50); + else if (u4bRegOffset == 0xfd) + delay_ms(5); + else if (u4bRegOffset == 0xfc) + delay_ms(1); + else if (u4bRegOffset == 0xfb) + PlatformStallExecution(50); + else if (u4bRegOffset == 0xfa) + PlatformStallExecution(5); + else if (u4bRegOffset == 0xf9) + PlatformStallExecution(1); + + // Get 2nd hex value as register value. + szLine += u4bMove; + if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) + { + RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue)); + PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); + + // Add 1us delay between BB/RF register setting. + PlatformStallExecution(1); + } + } + } + } + } + else + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName)); + } +#endif + + return rtStatus; +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithMpHeaderFile + * + * Overview: Config PHY_REG_MP array + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 02/04/2010 chiyokolin Modify to new files. + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithMpHeaderFile( + IN PADAPTER Adapter, + IN u1Byte ConfigType) +{ + int i; + u32* Rtl8192CPHY_REGArray_Table_MP; + u16 PHY_REGArrayMPLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PHY_REGArrayMPLen = PHY_REG_Array_MPLength; + Rtl8192CPHY_REGArray_Table_MP = Rtl819XPHY_REG_Array_MP; + + if(ConfigType == BaseBand_Config_PHY_REG) + { + for(i=0;iphy_BB8192S_Config_ParaFile\n")); + + if(IS_92C_SERIAL(pHalData->VersionID)){ + pszBBRegFile=(u8*)&sz92CBBRegFile ; + pszAGCTableFile =(u8*)&sz92CAGCTableFile; + } + else{ + pszBBRegFile=(u8*)&sz88CBBRegFile ; + pszAGCTableFile =(u8*)&sz88CAGCTableFile; + } + + // + // 1. Read PHY_REG.TXT BB INIT!! + // We will seperate as 88C / 92C according to chip version + // +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG); +#else + // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different + // type of parameter files to phy_reg.txt at first. + rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); +#endif + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + +#if MP_DRIVER == 1 + // + // 1.1 Read PHY_REG_MP.TXT BB INIT!! + // We will seperate as 88C / 92C according to chip version + // +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG); +#else + // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different + // type of parameter files to phy_reg.txt at first. + rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile); +#endif + + if(rtStatus != _SUCCESS){ +// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } +#endif // #if (MP_DRIVER == 1) + + // + // 20100318 Joseph: Config 2T2R to 1T2R if necessary. + // + if(pHalData->rf_type == RF_1T2R) + { + phy_BB8192C_Config_1T(Adapter); + DBG_8192C("phy_BB8192C_Config_ParaFile():Config to 1T!!\n"); + } + + // + // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt + // + if (pEEPROM->bautoload_fail_flag == _FALSE) + { + pHalData->pwrGroupCnt = 0; + +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG); +#else + rtStatus = phy_ConfigBBWithPgParaFile(Adapter, (u8*)&szBBRegPgFile); +#endif + } + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + + // + // 3. BB AGC table Initialization + // +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB); +#else + //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); + rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); +#endif + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); + goto phy_BB8190_Config_ParaFile_Fail; + } + + // Check if the CCK HighPower is turned ON. + // This is used to calculate PWDB. + pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200)); + +phy_BB8190_Config_ParaFile_Fail: + + return rtStatus; +} + + +int +PHY_BBConfig8192C( + IN PADAPTER Adapter + ) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 RegVal; + u8 TmpU1B=0; + u8 value8; + + phy_InitBBRFRegisterDefinition(Adapter); + + if(IS_HARDWARE_TYPE_8723(Adapter)) + { + // Suggested by Scott. tynli_test. 2010.12.30. + //1. 0x28[1] = 1 + TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL); + rtw_udelay_os(2); + rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1)); + rtw_udelay_os(2); + + //2. 0x29[7:0] = 0xFF + rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff); + rtw_udelay_os(2); + + //3. 0x02[1:0] = 2b'11 + TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); + rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB)); + + //4. 0x25[6] = 0 + TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1); + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6))); + + //5. 0x24[20] = 0 //Advised by SD3 Alex Wang. 2011.02.09. + TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2); + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4))); + + //6. 0x1f[7:0] = 0x07 + rtw_write8(Adapter, REG_RF_CTRL, 0x07); + } + else + { + // Enable BB and RF + RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); + rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); + + // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. + rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); + rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); + + rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); + +#ifdef CONFIG_USB_HCI + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); +#else + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); +#endif + + // 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. + if(!IS_NORMAL_CHIP(pHalData->VersionID)) + { +#ifdef CONFIG_USB_HCI + rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1f); +#else + rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1b); +#endif + } + else + { +#ifdef CONFIG_USB_HCI + //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. + rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); + rtw_write8(Adapter, 0x15, 0xe9); +#endif + } + + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); + +#ifdef CONFIG_PCI_HCI + // Force use left antenna by default for 88C. + // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) + if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) + { + RegVal = rtw_read32(Adapter, REG_LEDCFG0); + rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); + } +#endif + } + + // + // Config BB and AGC + // + rtStatus = phy_BB8192C_Config_ParaFile(Adapter); +#if 0 + switch(Adapter->MgntInfo.bRegHwParaFile) + { + case 0: + phy_BB8190_Config_HardCode(Adapter); + break; + + case 1: + rtStatus = phy_BB8192C_Config_ParaFile(Adapter); + break; + + case 2: + // Partial Modify. + phy_BB8190_Config_HardCode(Adapter); + phy_BB8192C_Config_ParaFile(Adapter); + break; + + default: + phy_BB8190_Config_HardCode(Adapter); + break; + } +#endif +#ifdef CONFIG_USB_HCI + if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) + &&(pHalData->BoardType == BOARD_USB_High_PA)) + rtw_write8(Adapter, 0xc72, 0x50); +#endif + + // For fix 8723 WL_TRSW bug. Suggested by Scott. 2011.01.24. + if(IS_HARDWARE_TYPE_8723(Adapter)) + { + if(!IS_NORMAL_CHIP(pHalData->VersionID)) + { + // 1. 0x40[2] = 1 + value8 = rtw_read8(Adapter, REG_GPIO_MUXCFG); + rtw_write8(Adapter, REG_GPIO_MUXCFG, (value8|BIT2)); + + // 2. 0x804[14] = 0 // BB disable TRSW control, enable SW control + PHY_SetBBReg(Adapter, rFPGA0_TxInfo, BIT14, 0x0); + + // 3. 0x870[6:5] = 2'b11 + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, (BIT5|BIT6), 0x3); + + // 4. 0x860[6:5] = 2'b00 // BB SW control TRSW pin output level + PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, (BIT5|BIT6), 0x0); + } + } +#if 0 + // Check BB/RF confiuration setting. + // We only need to configure RF which is turned on. + PathMap = (u1Byte)(PHY_QueryBBReg(Adapter, rFPGA0_TxInfo, 0xf) | + PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf)); + pHalData->RF_PathMap = PathMap; + for(index = 0; index<4; index++) + { + if((PathMap>>index)&0x1) + rf_num++; + } + + if((GET_RF_TYPE(Adapter) ==RF_1T1R && rf_num!=1) || + (GET_RF_TYPE(Adapter)==RF_1T2R && rf_num!=2) || + (GET_RF_TYPE(Adapter)==RF_2T2R && rf_num!=2) || + (GET_RF_TYPE(Adapter)==RF_2T2R_GREEN && rf_num!=2) || + (GET_RF_TYPE(Adapter)==RF_2T4R && rf_num!=4)) + { + RT_TRACE( + COMP_INIT, + DBG_LOUD, + ("PHY_BBConfig8192C: RF_Type(%x) does not match RF_Num(%x)!!\n", pHalData->RF_Type, rf_num)); + } +#endif + + return rtStatus; +} + + +int +PHY_RFConfig8192C( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // + // RF config + // + rtStatus = PHY_RF6052_Config8192C(Adapter); +#if 0 + switch(pHalData->rf_chip) + { + case RF_6052: + rtStatus = PHY_RF6052_Config(Adapter); + break; + case RF_8225: + rtStatus = PHY_RF8225_Config(Adapter); + break; + case RF_8256: + rtStatus = PHY_RF8256_Config(Adapter); + break; + case RF_8258: + break; + case RF_PSEUDO_11N: + rtStatus = PHY_RF8225_Config(Adapter); + break; + default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch + break; + } +#endif + return rtStatus; +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_ConfigRFWithParaFile() + * + * Overview: This function read RF parameters from general file format, and do RF 3-wire + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * RF90_RADIO_PATH_E eRFPath + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: Delay may be required for RF configuration + *---------------------------------------------------------------------------*/ +int +rtl8192c_PHY_ConfigRFWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName, + RF90_RADIO_PATH_E eRFPath +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} + +//**************************************** +// The following is for High Power PA +//**************************************** +#define HighPowerRadioAArrayLen 22 +//This is for High power PA +u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { +0x013,0x00029ea4, +0x013,0x00025e74, +0x013,0x00020ea4, +0x013,0x0001ced0, +0x013,0x00019f40, +0x013,0x00014e70, +0x013,0x000106a0, +0x013,0x0000c670, +0x013,0x000082a0, +0x013,0x00004270, +0x013,0x00000240, +}; + +int +PHY_ConfigRFExternalPA( + IN PADAPTER Adapter, + RF90_RADIO_PATH_E eRFPath +) +{ + int rtStatus = _SUCCESS; +#ifdef CONFIG_USB_HCI + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 i=0; + + if(!pHalData->ExternalPA) + { + return rtStatus; + } + + // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the + // same code as SU. It is already updated in radio_a_1T_HP.txt. +#if 0 + //add for SU High Power PA + for(i = 0;iVersionID)) + { + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + RadioA_ArrayLen = RadioA_2TArrayLength; + Rtl819XRadioA_Array_Table = Rtl819XRadioA_2TArray; + RadioB_ArrayLen = RadioB_2TArrayLength; + Rtl819XRadioB_Array_Table = Rtl819XRadioB_2TArray; + } + else + { + rtStatus = _FAIL; + goto exit; + } + } + else + { + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + RadioA_ArrayLen = RadioA_1TArrayLength; + Rtl819XRadioA_Array_Table = Rtl819XRadioA_1TArray; + RadioB_ArrayLen = RadioB_1TArrayLength; + Rtl819XRadioB_Array_Table = Rtl819XRadioB_1TArray; +#ifdef CONFIG_USB_HCI + if( BOARD_MINICARD == pHalData->BoardType ) + { + RadioA_ArrayLen = RadioA_1T_mCardArrayLength; + Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_mCardArray; + RadioB_ArrayLen = RadioB_1T_mCardArrayLength; + Rtl819XRadioB_Array_Table = Rtl819XRadioB_1T_mCardArray; + } + else if( BOARD_USB_High_PA == pHalData->BoardType ) + { + RadioA_ArrayLen = RadioA_1T_HPArrayLength; + Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_HPArray; + } +#endif + } + else + { + rtStatus = _FAIL; + goto exit; + } + } + + switch(eRFPath){ + case RF90_PATH_A: + #ifdef CONFIG_IOL_RF_RF90_PATH_A + if(rtw_IOL_applied(Adapter)) + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + rtStatus = _FAIL; + goto exit; + } + + for(i = 0;iPHYRegDef[eRFPath]; + u32 NewOffset = 0; + u32 DataAndAddr = 0; + + NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; + DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF + rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); + } + } + rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); + } + else + #endif + { + for(i = 0;iPHYRegDef[eRFPath]; + u32 NewOffset = 0; + u32 DataAndAddr = 0; + + NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; + DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF + rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); + } + } + rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); + } + else + #endif + { + for(i = 0;i actually we call PlatformStallExecution()) to do NdisStallExecution() + // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK + // to run at Dispatch level to achive it. + //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); + WriteData[i] &= 0xfff; + PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); + // TODO: we should not delay for such a long time. Ask SD3 + rtw_mdelay_os(10); + ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); + rtw_mdelay_os(10); + //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); + break; + + default: + rtStatus = _FAIL; + break; + } + + + // + // Check whether readback data is correct + // + if(ulRegRead != WriteData[i]) + { + //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); + rtStatus = _FAIL; + break; + } + } + + return rtStatus; +} + + +VOID +rtl8192c_PHY_GetHWRegOriginalValue( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // read rx initial gain + pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", + //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], + //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); + + // read framesync + pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); + pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", + // rOFDM0_RxDetector3, pHalData->framesync)); +} + + +// +// Description: +// Map dBm into Tx power index according to +// current HW model, for example, RF and PA, and +// current wireless mode. +// By Bruce, 2008-01-29. +// +static u8 +phy_DbmToTxPwrIdx( + IN PADAPTER Adapter, + IN WIRELESS_MODE WirelessMode, + IN int PowerInDbm + ) +{ + u8 TxPwrIdx = 0; + int Offset = 0; + + + // + // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to + // 3dbm, and OFDM HT equals to 0dbm repectively. + // Note: + // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. + // By Bruce, 2008-01-29. + // + switch(WirelessMode) + { + case WIRELESS_MODE_B: + Offset = -7; + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + Offset = -8; + break; + default: + Offset = -8; + break; + } + + if((PowerInDbm - Offset) > 0) + { + TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); + } + else + { + TxPwrIdx = 0; + } + + // Tx Power Index is too large. + if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) + TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; + + return TxPwrIdx; +} + +// +// Description: +// Map Tx power index into dBm according to +// current HW model, for example, RF and PA, and +// current wireless mode. +// By Bruce, 2008-01-29. +// +int +phy_TxPwrIdxToDbm( + IN PADAPTER Adapter, + IN WIRELESS_MODE WirelessMode, + IN u8 TxPwrIdx + ) +{ + int Offset = 0; + int PwrOutDbm = 0; + + // + // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. + // Note: + // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. + // By Bruce, 2008-01-29. + // + switch(WirelessMode) + { + case WIRELESS_MODE_B: + Offset = -7; + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + Offset = -8; + default: + Offset = -8; + break; + } + + PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. + + return PwrOutDbm; +} + + +/*----------------------------------------------------------------------------- + * Function: GetTxPowerLevel8190() + * + * Overview: This function is export to "common" moudule + * + * Input: PADAPTER Adapter + * psByte Power Level + * + * Output: NONE + * + * Return: NONE + * + *---------------------------------------------------------------------------*/ +VOID +PHY_GetTxPowerLevel8192C( + IN PADAPTER Adapter, + OUT u32* powerlevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 TxPwrLevel = 0; + int TxPwrDbm; + + // + // Because the Tx power indexes are different, we report the maximum of them to + // meet the CCX TPC request. By Bruce, 2008-01-31. + // + + // CCK + TxPwrLevel = pHalData->CurrentCckTxPwrIdx; + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); + + // Legacy OFDM + TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; + + // Compare with Legacy OFDM Tx power. + if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); + + // HT OFDM + TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; + + // Compare with HT OFDM Tx power. + if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); + + *powerlevel = TxPwrDbm; +} + + +static void getTxPowerIndex( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8* cckPowerLevel, + IN OUT u8* ofdmPowerLevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 index = (channel -1); + // 1. CCK + cckPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelCck[RF90_PATH_A][index]; //RF-A + cckPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelCck[RF90_PATH_B][index]; //RF-B + + // 2. OFDM for 1S or 2S + if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) + { + // Read HT 40 OFDM TX power + ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_A][index]; + ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_B][index]; + } + else if (GET_RF_TYPE(Adapter) == RF_2T2R) + { + // Read HT 40 OFDM TX power + ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_A][index]; + ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_B][index]; + } + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); +} + +static void ccxPowerIndexCheck( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8* cckPowerLevel, + IN OUT u8* ofdmPowerLevel + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); + + // + // CCX 2 S31, AP control of client transmit power: + // 1. We shall not exceed Cell Power Limit as possible as we can. + // 2. Tolerance is +/- 5dB. + // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. + // + // TODO: + // 1. 802.11h power contraint + // + // 071011, by rcnjko. + // + if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && + pMgntInfo->mAssoc && + pCcxInfo->bUpdateCcxPwr && + pCcxInfo->bWithCcxCellPwr && + channel == pMgntInfo->dot11CurrentChannelNumber) + { + u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); + u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); + u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", + pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", + channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); + + // CCK + if(cckPowerLevel[0] > CckCellPwrIdx) + cckPowerLevel[0] = CckCellPwrIdx; + // Legacy OFDM, HT OFDM + if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) + { + if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) + { + ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; + } + else + { + ofdmPowerLevel[0] = 0; + } + } + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", + cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); + } + + pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; + pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", + cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); +#endif +} +/*----------------------------------------------------------------------------- + * Function: SetTxPowerLevel8190() + * + * Overview: This function is export to "HalCommon" moudule + * We must consider RF path later!!!!!!! + * + * Input: PADAPTER Adapter + * u1Byte channel + * + * Output: NONE + * + * Return: NONE + * 2008/11/04 MHC We remove EEPROM_93C56. + * We need to move CCX relative code to independet file. + * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. + * + *---------------------------------------------------------------------------*/ +VOID +PHY_SetTxPowerLevel8192C( + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 cckPowerLevel[2], ofdmPowerLevel[2]; // [0]:RF-A, [1]:RF-B + +#if(MP_DRIVER == 1) + return; +#endif + + if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE) + return; + + getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", + // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); + + ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); + + rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); + rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); + +#if 0 + switch(pHalData->rf_chip) + { + case RF_8225: + PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); + PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); + break; + + case RF_8256: + PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); + PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); + break; + + case RF_6052: + PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); + PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); + break; + + case RF_8258: + break; + } +#endif + +} + + +// +// Description: +// Update transmit power level of all channel supported. +// +// TODO: +// A mode. +// By Bruce, 2008-02-04. +// +BOOLEAN +PHY_UpdateTxPowerDbm8192C( + IN PADAPTER Adapter, + IN int powerInDbm + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 idx; + u8 rf_path; + + // TODO: A mode Tx power. + u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); + u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); + + if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) + OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; + else + OfdmTxPwrIdx = 0; + + //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); + + for(idx = 0; idx < 14; idx++) + { + for (rf_path = 0; rf_path < 2; rf_path++) + { + pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; + pHalData->TxPwrLevelHT40_1S[rf_path][idx] = + pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; + } + } + + //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo + + return _TRUE; +} + + +/* + Description: + When beacon interval is changed, the values of the + hw registers should be modified. + By tynli, 2008.10.24. + +*/ + + +void +rtl8192c_PHY_SetBeaconHwReg( + IN PADAPTER Adapter, + IN u16 BeaconInterval + ) +{ + +} + + +VOID +PHY_ScanOperationBackup8192C( + IN PADAPTER Adapter, + IN u8 Operation + ) +{ +#if 0 + IO_TYPE IoType; + + if(!Adapter->bDriverStopped) + { + switch(Operation) + { + case SCAN_OPT_BACKUP: + IoType = IO_CMD_PAUSE_DM_BY_SCAN; + Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); + + break; + + case SCAN_OPT_RESTORE: + IoType = IO_CMD_RESUME_DM_BY_SCAN; + Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); + break; + + default: + RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); + break; + } + } +#endif +} + +/*----------------------------------------------------------------------------- + * Function: PHY_SetBWModeCallback8192C() + * + * Overview: Timer callback function for SetSetBWMode + * + * Input: PRT_TIMER pTimer + * + * Output: NONE + * + * Return: NONE + * + * Note: (1) We do not take j mode into consideration now + * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run + * concurrently? + *---------------------------------------------------------------------------*/ +static VOID +_PHY_SetBWMode92C( + IN PADAPTER Adapter +) +{ +// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 regBwOpMode; + u8 regRRSR_RSC; + + //return; + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //u4Byte NowL, NowH; + //u8Byte BeginTime, EndTime; + + /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ + pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SetBWModeInProgress= _FALSE; + return; + } + + // There is no 40MHz mode in RF_8225. + if(pHalData->rf_chip==RF_8225) + return; + + if(Adapter->bDriverStopped) + return; + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //NowL = PlatformEFIORead4Byte(Adapter, TSFR); + //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); + //BeginTime = ((u8Byte)NowH << 32) + NowL; + + //3// + //3//<1>Set MAC register + //3// + //Adapter->HalFunc.SetBWModeHandler(); + + regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); + regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); + //regBwOpMode = Adapter->HalFunc.GetHwRegHandler(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); + + switch(pHalData->CurrentChannelBW) + { + case HT_CHANNEL_WIDTH_20: + regBwOpMode |= BW_OPMODE_20MHZ; + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + break; + + case HT_CHANNEL_WIDTH_40: + regBwOpMode &= ~BW_OPMODE_20MHZ; + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + + regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); + rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); + break; + + default: + /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): + unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ + break; + } + + //3// + //3//<2>Set PHY related register + //3// + switch(pHalData->CurrentChannelBW) + { + /* 20 MHz channel*/ + case HT_CHANNEL_WIDTH_20: + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); + PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); + PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); + + break; + + + /* 40 MHz channel*/ + case HT_CHANNEL_WIDTH_40: + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); + PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); + + // Set Control channel to upper or lower. These settings are required only for 40MHz + PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); + PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); + PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); + + PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); + + break; + + + + default: + /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ + ,pHalData->CurrentChannelBW));*/ + break; + + } + //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //NowL = PlatformEFIORead4Byte(Adapter, TSFR); + //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); + //EndTime = ((u8Byte)NowH << 32) + NowL; + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); + + //3<3>Set RF related register + switch(pHalData->rf_chip) + { + case RF_8225: + //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + case RF_8256: + // Please implement this function in Hal8190PciPhy8256.c + //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + case RF_8258: + // Please implement this function in Hal8190PciPhy8258.c + // PHY_SetRF8258Bandwidth(); + break; + + case RF_PSEUDO_11N: + // Do Nothing + break; + + case RF_6052: + rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + default: + //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); + break; + } + + //pHalData->SetBWModeInProgress= FALSE; + + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); +} + + + /*----------------------------------------------------------------------------- + * Function: SetBWMode8190Pci() + * + * Overview: This function is export to "HalCommon" moudule + * + * Input: PADAPTER Adapter + * HT_CHANNEL_WIDTH Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: We do not take j mode into consideration now + *---------------------------------------------------------------------------*/ +VOID +PHY_SetBWMode8192C( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M + IN unsigned char Offset // Upper, Lower, or Don't care +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; + // Modified it for 20/40 mhz switch by guangan 070531 + //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; + + //return; + + //if(pHalData->SwChnlInProgress) +// if(pMgntInfo->bScanInProgress) +// { +// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", +// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); +// return; +// } + +// if(pHalData->SetBWModeInProgress) +// { +// // Modified it for 20/40 mhz switch by guangan 070531 +// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", +// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); +// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); +// //return; +// } + + //if(pHalData->SetBWModeInProgress) + // return; + + //pHalData->SetBWModeInProgress= TRUE; + + pHalData->CurrentChannelBW = Bandwidth; + +#if 0 + if(Offset==HT_EXTCHNL_OFFSET_LOWER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; + else if(Offset==HT_EXTCHNL_OFFSET_UPPER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; + else + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +#else + pHalData->nCur40MhzPrimeSC = Offset; +#endif + + if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) + { +#ifdef USE_WORKITEM + //PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem)); +#else + #if 0 + //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); + #else + _PHY_SetBWMode92C(Adapter); + #endif +#endif + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); + //pHalData->SetBWModeInProgress= FALSE; + pHalData->CurrentChannelBW = tmpBW; + } + +} + + +static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) +{ + u8 eRFPath; + u32 param1, param2; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //s1. pre common command - CmdID_SetTxPowerLevel + PHY_SetTxPowerLevel8192C(Adapter, channel); + + //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel + param1 = RF_CHNLBW; + param2 = channel; + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); + } + + + //s3. post common command - CmdID_End, None + +} + +VOID +PHY_SwChnl8192C( // Call after initialization + IN PADAPTER Adapter, + IN u8 channel + ) +{ + //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 tmpchannel = pHalData->CurrentChannel; + BOOLEAN bResult = _TRUE; + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SwChnlInProgress=FALSE; + return; //return immediately if it is peudo-phy + } + + //if(pHalData->SwChnlInProgress) + // return; + + //if(pHalData->SetBWModeInProgress) + // return; + + //-------------------------------------------- + switch(pHalData->CurrentWirelessMode) + { + case WIRELESS_MODE_A: + case WIRELESS_MODE_N_5G: + //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); + break; + + case WIRELESS_MODE_B: + //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); + break; + + default: + //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); + break; + } + //-------------------------------------------- + + //pHalData->SwChnlInProgress = TRUE; + if(channel == 0) + channel = 1; + + pHalData->CurrentChannel=channel; + + //pHalData->SwChnlStage=0; + //pHalData->SwChnlStep=0; + + if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) + { +#ifdef USE_WORKITEM + //bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem)); +#else + #if 0 + //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); + #else + _PHY_SwChnl8192C(Adapter, channel); + #endif +#endif + if(bResult) + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); + //if(IS_HARDWARE_TYPE_8192SU(Adapter)) + //{ + // pHalData->SwChnlInProgress = FALSE; + pHalData->CurrentChannel = tmpchannel; + //} + } + + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); + //if(IS_HARDWARE_TYPE_8192SU(Adapter)) + //{ + // pHalData->SwChnlInProgress = FALSE; + pHalData->CurrentChannel = tmpchannel; + //} + } +} + + +static BOOLEAN +phy_SwChnlStepByStep( + IN PADAPTER Adapter, + IN u8 channel, + IN u8 *stage, + IN u8 *step, + OUT u32 *delay + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PCHANNEL_ACCESS_SETTING pChnlAccessSetting; + SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; + u4Byte PreCommonCmdCnt; + SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; + u4Byte PostCommonCmdCnt; + SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; + u4Byte RfDependCmdCnt; + SwChnlCmd *CurrentCmd; + u1Byte eRFPath; + u4Byte RfTXPowerCtrl; + BOOLEAN bAdjRfTXPowerCtrl = _FALSE; + + + RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); +#if(MP_DRIVER != 1) + RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); +#endif + RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); + + pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; + RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); + + //for(eRFPath = RF90_PATH_A; eRFPath NumTotalRFPath; eRFPath++) + //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + //{ + // <1> Fill up pre common command. + PreCommonCmdCnt = 0; + phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, + CmdID_SetTxPowerLevel, 0, 0, 0); + phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, + CmdID_End, 0, 0, 0); + + // <2> Fill up post common command. + PostCommonCmdCnt = 0; + + phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, + CmdID_End, 0, 0, 0); + + // <3> Fill up RF dependent command. + RfDependCmdCnt = 0; + switch( pHalData->RFChipID ) + { + case RF_8225: + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + // 2008/09/04 MH Change channel. + if(channel==14) channel++; + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + break; + + case RF_8256: + // TEST!! This is not the table for 8256!! + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rRfChannel, channel, 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + break; + + case RF_6052: + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + + break; + + case RF_8258: + break; + + // For FPGA two MAC verification + case RF_PSEUDO_11N: + return TRUE; + default: + RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); + return FALSE; + break; + } + + + do{ + switch(*stage) + { + case 0: + CurrentCmd=&PreCommonCmd[*step]; + break; + case 1: + CurrentCmd=&RfDependCmd[*step]; + break; + case 2: + CurrentCmd=&PostCommonCmd[*step]; + break; + } + + if(CurrentCmd->CmdID==CmdID_End) + { + if((*stage)==2) + { + return TRUE; + } + else + { + (*stage)++; + (*step)=0; + continue; + } + } + + switch(CurrentCmd->CmdID) + { + case CmdID_SetTxPowerLevel: + PHY_SetTxPowerLevel8192C(Adapter,channel); + break; + case CmdID_WritePortUlong: + PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); + break; + case CmdID_WritePortUshort: + PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); + break; + case CmdID_WritePortUchar: + PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); + break; + case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { +#if 1 + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); +#else + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); +#endif + } + break; + } + + break; + }while(TRUE); + //cosa }/*for(Number of RF paths)*/ + + (*delay)=CurrentCmd->msDelay; + (*step)++; + return FALSE; +#endif + return _TRUE; +} + + +static BOOLEAN +phy_SetSwChnlCmdArray( + SwChnlCmd* CmdTable, + u32 CmdTableIdx, + u32 CmdTableSz, + SwChnlCmdID CmdID, + u32 Para1, + u32 Para2, + u32 msDelay + ) +{ + SwChnlCmd* pCmd; + + if(CmdTable == NULL) + { + //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); + return _FALSE; + } + if(CmdTableIdx >= CmdTableSz) + { + //RT_ASSERT(FALSE, + // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", + // CmdTableIdx, CmdTableSz)); + return _FALSE; + } + + pCmd = CmdTable + CmdTableIdx; + pCmd->CmdID = CmdID; + pCmd->Para1 = Para1; + pCmd->Para2 = Para2; + pCmd->msDelay = msDelay; + + return _TRUE; +} + + +static void +phy_FinishSwChnlNow( // We should not call this function directly + IN PADAPTER Adapter, + IN u8 channel + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 delay; + + while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) + { + if(delay>0) + rtw_mdelay_os(delay); + } +#endif +} + + + +// +// Description: +// Switch channel synchronously. Called by SwChnlByDelayHandler. +// +// Implemented by Bruce, 2008-02-14. +// The following procedure is operted according to SwChanlCallback8190Pci(). +// However, this procedure is performed synchronously which should be running under +// passive level. +// +VOID +PHY_SwChnlPhy8192C( // Only called during initialize + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); + + // Cannot IO. + //if(RT_CANNOT_IO(Adapter)) + // return; + + // Channel Switching is in progress. + //if(pHalData->SwChnlInProgress) + // return; + + //return immediately if it is peudo-phy + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SwChnlInProgress=FALSE; + return; + } + + //pHalData->SwChnlInProgress = TRUE; + if( channel == 0) + channel = 1; + + pHalData->CurrentChannel=channel; + + //pHalData->SwChnlStage = 0; + //pHalData->SwChnlStep = 0; + + phy_FinishSwChnlNow(Adapter,channel); + + //pHalData->SwChnlInProgress = FALSE; +} + + +// +// Description: +// Configure H/W functionality to enable/disable Monitor mode. +// Note, because we possibly need to configure BB and RF in this function, +// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. +// +VOID +PHY_SetMonitorMode8192C( + IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; + + //2 Note: we may need to stop antenna diversity. + if(bEnableMonitorMode) + { + bFilterOutNonAssociatedBSSID = FALSE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); + + pHalData->bInMonitorMode = TRUE; + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); + pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); + } + else + { + bFilterOutNonAssociatedBSSID = TRUE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); + + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); + pHalData->bInMonitorMode = FALSE; + pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); + } +#endif +} + + +/*----------------------------------------------------------------------------- + * Function: PHYCheckIsLegalRfPath8190Pci() + * + * Overview: Check different RF type to execute legal judgement. If RF Path is illegal + * We will return false. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/15/2007 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +BOOLEAN +PHY_CheckIsLegalRfPath8192C( + IN PADAPTER pAdapter, + IN u32 eRFPath) +{ +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN rtValue = _TRUE; + + // NOt check RF Path now.! +#if 0 + if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A) + { + rtValue = FALSE; + } + if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A) + { + + } +#endif + return rtValue; + +} /* PHY_CheckIsLegalRfPath8192C */ + +//------------------------------------------------------------------------- +// +// IQK +// +//------------------------------------------------------------------------- +#define MAX_TOLERANCE 5 +#define IQK_DELAY_TIME 1 //ms + +static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +_PHY_PathA_IQK( + IN PADAPTER pAdapter, + IN BOOLEAN configPathB + ) +{ + u32 regEAC, regE94, regE9C, regEA4; + u8 result = 0x00; + + //RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); + + //path-A IQK setting + //RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); + PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x10008c1f); + PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x10008c1f); + PHY_SetBBReg(pAdapter, 0xe38, bMaskDWord, 0x82140102); + + PHY_SetBBReg(pAdapter, 0xe3c, bMaskDWord, configPathB ? 0x28160202 : 0x28160502); + +#if 1 + //path-B IQK setting + if(configPathB) + { + PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102); + PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202); + } +#endif + //LO calibration setting + //RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); + PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1); + + //One shot, path A LOK & IQK + //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); + PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf9000000); + PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf8000000); + + // delay x ms + //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); + rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); + + // Check failed + regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); + regE94 = PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); + regE9C= PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); + regEA4= PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); + + if(!(regEAC & BIT28) && + (((regE94 & 0x03FF0000)>>16) != 0x142) && + (((regE9C & 0x03FF0000)>>16) != 0x42) ) + result |= 0x01; + else //if Tx not OK, ignore Rx + return result; + + if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK + (((regEA4 & 0x03FF0000)>>16) != 0x132) && + (((regEAC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + DBG_8192C("Path A Rx IQK fail!!\n"); + + return result; + + +} + +static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +_PHY_PathB_IQK( + IN PADAPTER pAdapter + ) +{ + u32 regEAC, regEB4, regEBC, regEC4, regECC; + u8 result = 0x00; + //RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); +#if 0 + //path-B IQK setting + RTPRINT(FINIT, INIT_IQK, ("Path-B IQK setting!\n")); + PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102); + PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202); + + //LO calibration setting + RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); + PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1); +#endif + //One shot, path B LOK & IQK + //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); + PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000002); + PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000000); + + // delay x ms + //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); + rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); + + // Check failed + regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); + regEB4 = PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); + regEBC= PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); + regEC4= PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); + regECC= PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); + + if(!(regEAC & BIT31) && + (((regEB4 & 0x03FF0000)>>16) != 0x142) && + (((regEBC & 0x03FF0000)>>16) != 0x42)) + result |= 0x01; + else + return result; + + if(!(regEAC & BIT30) && + (((regEC4 & 0x03FF0000)>>16) != 0x132) && + (((regECC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + DBG_8192C("Path B Rx IQK fail!!\n"); + + + return result; + +} + +static VOID +_PHY_PathAFillIQKMatrix( + IN PADAPTER pAdapter, + IN BOOLEAN bIQKOK, + IN int result[][8], + IN u8 final_candidate, + IN BOOLEAN bTxOnly + ) +{ + u32 Oldval_0, X, TX0_A, reg; + int Y, TX0_C; + + DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); + + if(final_candidate == 0xFF) + return; + else if(bIQKOK) + { + Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + + X = result[final_candidate][0]; + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + TX0_A = (X * Oldval_0) >> 8; + //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0)); + PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); + + Y = result[final_candidate][1]; + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + TX0_C = (Y * Oldval_0) >> 8; + //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C)); + PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); + PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); + + if(bTxOnly) + { + DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n"); + return; + } + + reg = result[final_candidate][2]; + PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); + + reg = result[final_candidate][3] & 0x3F; + PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); + + reg = (result[final_candidate][3] >> 6) & 0xF; + PHY_SetBBReg(pAdapter, 0xca0, 0xF0000000, reg); + } +} + +static VOID +_PHY_PathBFillIQKMatrix( + IN PADAPTER pAdapter, + IN BOOLEAN bIQKOK, + IN int result[][8], + IN u8 final_candidate, + IN BOOLEAN bTxOnly //do Tx only + ) +{ + u32 Oldval_1, X, TX1_A, reg; + int Y, TX1_C; + + DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); + + if(final_candidate == 0xFF) + return; + else if(bIQKOK) + { + Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + + X = result[final_candidate][4]; + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + TX1_A = (X * Oldval_1) >> 8; + //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A)); + PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); + + Y = result[final_candidate][5]; + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + TX1_C = (Y * Oldval_1) >> 8; + //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C)); + PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); + PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); + + if(bTxOnly) + return; + + reg = result[final_candidate][6]; + PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); + + reg = result[final_candidate][7] & 0x3F; + PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); + + reg = (result[final_candidate][7] >> 6) & 0xF; + PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); + } +} + +static VOID +_PHY_SaveADDARegisters( + IN PADAPTER pAdapter, + IN u32* ADDAReg, + IN u32* ADDABackup, + IN u32 RegisterNum + ) +{ + u32 i; + + //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); + for( i = 0 ; i < RegisterNum ; i++){ + ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord); + } +} + +static VOID +_PHY_SaveMACRegisters( + IN PADAPTER pAdapter, + IN u32* MACReg, + IN u32* MACBackup + ) +{ + u32 i; + + //RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n")); + for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + MACBackup[i] =rtw_read8(pAdapter, MACReg[i]); + } + MACBackup[i] = rtw_read32(pAdapter, MACReg[i]); + +} + +static VOID +_PHY_ReloadADDARegisters( + IN PADAPTER pAdapter, + IN u32* ADDAReg, + IN u32* ADDABackup, + IN u32 RegiesterNum + ) +{ + u32 i; + + //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); + for(i = 0 ; i < RegiesterNum ; i++){ + PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]); + } +} + +static VOID +_PHY_ReloadMACRegisters( + IN PADAPTER pAdapter, + IN u32* MACReg, + IN u32* MACBackup + ) +{ + u32 i; + + //RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n")); + for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]); + } + rtw_write32(pAdapter, MACReg[i], MACBackup[i]); +} + +static VOID +_PHY_PathADDAOn( + IN PADAPTER pAdapter, + IN u32* ADDAReg, + IN BOOLEAN isPathAOn, + IN BOOLEAN is2T + ) +{ + u32 pathOn; + u32 i; + + //RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n")); + + pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; + if(_FALSE == is2T){ + pathOn = 0x0bdb25a0; + PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0); + } + else{ + PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn); + } + + for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ + PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn); + } + +} + +static VOID +_PHY_MACSettingCalibration( + IN PADAPTER pAdapter, + IN u32* MACReg, + IN u32* MACBackup + ) +{ + u32 i = 0; + + //RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n")); + + rtw_write8(pAdapter, MACReg[i], 0x3F); + + for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ + rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); + } + rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); + +} + +static VOID +_PHY_PathAStandBy( + IN PADAPTER pAdapter + ) +{ + //RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); + + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x0); + PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000); +} + +static VOID +_PHY_PIModeSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN PIMode + ) +{ + u32 mode; + + //RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); + + mode = PIMode ? 0x01000100 : 0x01000000; + PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode); + PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode); +} + +/* +return _FALSE => do IQK again +*/ +static BOOLEAN +_PHY_SimularityCompare( + IN PADAPTER pAdapter, + IN int result[][8], + IN u8 c1, + IN u8 c2 + ) +{ + u32 i, j, diff, SimularityBitMap, bound = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 final_candidate[2] = {0xFF, 0xFF}; //for path A and path B + BOOLEAN bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); + + if(is2T) + bound = 8; + else + bound = 4; + + SimularityBitMap = 0; + + for( i = 0; i < bound; i++ ) + { + diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); + if (diff > MAX_TOLERANCE) + { + if((i == 2 || i == 6) && !SimularityBitMap) + { + if(result[c1][i]+result[c1][i+1] == 0) + final_candidate[(i/4)] = c2; + else if (result[c2][i]+result[c2][i+1] == 0) + final_candidate[(i/4)] = c1; + else + SimularityBitMap = SimularityBitMap|(1<dmpriv; + u32 i; + u8 PathAOK, PathBOK; + u32 ADDA_REG[IQK_ADDA_REG_NUM] = { 0x85c, 0xe6c, 0xe70, 0xe74, + 0xe78, 0xe7c, 0xe80, 0xe84, + 0xe88, 0xe8c, 0xed0, 0xed4, + 0xed8, 0xedc, 0xee0, 0xeec }; + + u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = {0x522, 0x550, 0x551,0x040}; + + u32 IQK_BB_REG[IQK_BB_REG_NUM] = { + 0xc04, 0xc08, 0x874, 0xb68, 0xb6c, + 0x870, 0x860, 0x864, 0x800 + }; + +#if MP_DRIVER + const u32 retryCount = 9; +#else + const u32 retryCount = 2; +#endif + + // Note: IQ calibration must be performed after loading + // PHY_REG.txt , and radio_a, radio_b.txt + + u32 bbvalue; + BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); + + if(t==0) + { + bbvalue = PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord); + //RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue)); + + //RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); + + // Save ADDA parameters, turn Path A ADDA on + _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM); + _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); + _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); + } + _PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T); + + if(t==0) + { + pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); + } + + if(!pdmpriv->bRfPiEnable){ + // Switch BB to PI mode to do IQ Calibration. + _PHY_PIModeSwitch(pAdapter, _TRUE); + } + + PHY_SetBBReg(pAdapter, 0x800, BIT24, 0x00); + PHY_SetBBReg(pAdapter, 0xc04, bMaskDWord, 0x03a05600); + PHY_SetBBReg(pAdapter, 0xc08, bMaskDWord, 0x000800e4); + PHY_SetBBReg(pAdapter, 0x874, bMaskDWord, 0x22204000); + PHY_SetBBReg(pAdapter, 0x870, BIT10, 0x01); + PHY_SetBBReg(pAdapter, 0x870, BIT26, 0x01); + PHY_SetBBReg(pAdapter, 0x860, BIT10, 0x00); + PHY_SetBBReg(pAdapter, 0x864, BIT10, 0x00); + + if(is2T) + { + PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); + PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00010000); + } + + //MAC settings + _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); + + //Page B init + if(isNormal) + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00080000); + else + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0f600000); + + if(is2T) + { + if(isNormal) + PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00080000); + else + PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x0f600000); + } + + // IQ calibration setting + //RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000); + PHY_SetBBReg(pAdapter, 0xe40, bMaskDWord, 0x01007c00); + PHY_SetBBReg(pAdapter, 0xe44, bMaskDWord, 0x01004800); + + for(i = 0 ; i < retryCount ; i++){ + PathAOK = _PHY_PathA_IQK(pAdapter, is2T); + if(PathAOK == 0x03){ + DBG_8192C("Path A IQK Success!!\n"); + result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16; + result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16; + result[t][2] = (PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord)&0x3FF0000)>>16; + result[t][3] = (PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord)&0x3FF0000)>>16; + break; + } + else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK + { + DBG_8192C("Path A IQK Only Tx Success!!\n"); + + result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16; + result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16; + } + } + + if(0x00 == PathAOK){ + DBG_8192C("Path A IQK failed!!\n"); + } + + if(is2T){ + _PHY_PathAStandBy(pAdapter); + + // Turn Path B ADDA on + _PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T); + + for(i = 0 ; i < retryCount ; i++){ + PathBOK = _PHY_PathB_IQK(pAdapter); + if(PathBOK == 0x03){ + DBG_8192C("Path B IQK Success!!\n"); + result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16; + result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16; + result[t][6] = (PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord)&0x3FF0000)>>16; + result[t][7] = (PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord)&0x3FF0000)>>16; + break; + } + else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK + { + DBG_8192C("Path B Only Tx IQK Success!!\n"); + result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16; + result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16; + } + } + + if(0x00 == PathBOK){ + DBG_8192C("Path B IQK failed!!\n"); + } + } + + //Back to BB mode, load original value + //RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0); + + if(t!=0) + { + if(!pdmpriv->bRfPiEnable){ + // Switch back BB to SI mode after finish IQ Calibration. + _PHY_PIModeSwitch(pAdapter, _FALSE); + } + + // Reload ADDA power saving parameters + _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM); + + // Reload MAC parameters + _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); + + // Reload BB parameters + _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); + + // Restore RX initial gain + PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00032ed3); + if(is2T){ + PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00032ed3); + } + + //load 0xe30 IQC default value + PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); + PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00); + + } + //RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n")); + +} + + +static VOID +_PHY_LCCalibrate( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ + u8 tmpReg; + u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); + + //Check continuous TX and Packet TX + tmpReg = rtw_read8(pAdapter, 0xd03); + + if((tmpReg&0x70) != 0) //Deal with contisuous TX case + rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX + else // Deal with Packet TX case + rtw_write8(pAdapter, REG_TXPAUSE, 0xFF); // block all queues + + if((tmpReg&0x70) != 0) + { + //1. Read original RF mode + //Path-A + RF_Amode = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits); + + //Path-B + if(is2T) + RF_Bmode = PHY_QueryRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits); + + //2. Set RF mode = standby mode + //Path-A + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); + + //Path-B + if(is2T) + PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); + } + + //3. Read RF reg18 + LC_Cal = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits); + + //4. Set LC calibration begin + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits, LC_Cal|0x08000); + + if(isNormal) { + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(100); + #else + rtw_mdelay_os(100); + #endif + } + else + rtw_mdelay_os(3); + + //Restore original situation + if((tmpReg&0x70) != 0) //Deal with contisuous TX case + { + //Path-A + rtw_write8(pAdapter, 0xd03, tmpReg); + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, RF_Amode); + + //Path-B + if(is2T) + PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, RF_Bmode); + } + else // Deal with Packet TX case + { + rtw_write8(pAdapter, REG_TXPAUSE, 0x00); + } + +} + + +//Analog Pre-distortion calibration +#define APK_BB_REG_NUM 8 +#define APK_CURVE_REG_NUM 4 +#define PATH_NUM 2 + +static VOID +_PHY_APCalibrate( + IN PADAPTER pAdapter, + IN char delta, + IN BOOLEAN is2T + ) +{ +#if 1//(PLATFORM == PLATFORM_WINDOWS)//??? + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + u32 regD[PATH_NUM]; + u32 tmpReg, index, offset, path, i, pathbound = PATH_NUM, apkbound; + + u32 BB_backup[APK_BB_REG_NUM]; + u32 BB_REG[APK_BB_REG_NUM] = { + 0x904, 0xc04, 0x800, 0xc08, 0x874, + 0x870, 0x860, 0x864 }; + u32 BB_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x00204000 }; + u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x22204000 }; + + u32 AFE_backup[IQK_ADDA_REG_NUM]; + u32 AFE_REG[IQK_ADDA_REG_NUM] = { + 0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, + 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, + 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, + 0xeec}; + + u32 MAC_backup[IQK_MAC_REG_NUM]; + u32 MAC_REG[IQK_MAC_REG_NUM] = { + 0x522, 0x550, 0x551, 0x040}; + + u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, + {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} + }; + + u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings + {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} + }; + + u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, + {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} + }; + + u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} + }; + + u32 APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { + {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, + {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} + }; + + u32 AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u32 APK_offset[PATH_NUM] = { + 0xb68, 0xb6c}; + + u32 APK_normal_offset[PATH_NUM] = { + 0xb28, 0xb98}; + + u32 APK_value[PATH_NUM] = { + 0x92fc0000, 0x12fc0000}; + + u32 APK_normal_value[PATH_NUM] = { + 0x92680000, 0x12680000}; + + char APK_delta_mapping[APK_BB_REG_NUM][13] = { + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} + }; + + u32 APK_normal_setting_value_1[13] = { + 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, + 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, + 0x12680000, 0x00880000, 0x00880000 + }; + + u32 APK_normal_setting_value_2[16] = { + 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, + 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, + 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, + 0x00050006 + }; + + u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a + u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; + + int BB_offset, delta_V, delta_offset; + + BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); + +#if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; + + pMptCtx->APK_bound[0] = 45; + pMptCtx->APK_bound[1] = 52; +#endif + + //RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta)); + + //RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip"))); + + if(!is2T) + pathbound = 1; + + //2 FOR NORMAL CHIP SETTINGS + if(isNormal) + { +// Temporarily do not allow normal driver to do the following settings because these offset +// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal +// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the +// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. +#if (MP_DRIVER != 1) + return; +#endif + + //settings adjust for normal chip + for(index = 0; index < PATH_NUM; index ++) + { + APK_offset[index] = APK_normal_offset[index]; + APK_value[index] = APK_normal_value[index]; + AFE_on_off[index] = 0x6fdb25a4; + } + + for(index = 0; index < APK_BB_REG_NUM; index ++) + { + for(path = 0; path < pathbound; path++) + { + APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; + APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; + } + BB_AP_MODE[index] = BB_normal_AP_MODE[index]; + } + + apkbound = 6; + } + else + { + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000); + if(is2T) + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000); + apkbound = 12; + } + + //save BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0 && isNormal) //skip + continue; + BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); + } + + //save MAC default value + _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup,16); + + for(path = 0; path < pathbound; path++) + { + //save old AP curve + if(isNormal) + { + if(path == RF90_PATH_A) + { + //path A APK + //load APK setting + //path-A + offset = 0xb00; + for(index = 0; index < 11; index ++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000); + + offset = 0xb68; + for(; index < 13; index ++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); + + //path A + offset = 0xb00; + for(index = 0; index < 16; index++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + } + else if(path == RF90_PATH_B) + { + //path B APK + //load APK setting + //path-B + offset = 0xb70; + for(index = 0; index < 10; index ++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x12680000); + + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000); + + offset = 0xb68; + index = 11; + for(; index < 13; index ++) //offset 0xb68, 0xb6c + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); + + //path B + offset = 0xb60; + for(index = 0; index < 16; index++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + } + +#if 0 + tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord); + AP_curve[path][0] = tmpReg & 0x1F; //[4:0] + + tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord); + AP_curve[path][1] = (tmpReg & 0xF8000) >> 15; //[19:15] + AP_curve[path][2] = (tmpReg & 0x7C00) >> 10; //[14:10] + AP_curve[path][3] = (tmpReg & 0x3E0) >> 5; //[9:5] +#endif + } + else + { + tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord); + + AP_curve[path][0] = (tmpReg & 0xF8000) >> 15; //[19:15] + AP_curve[path][1] = (tmpReg & 0x7C00) >> 10; //[14:10] + AP_curve[path][2] = (tmpReg & 0x3E0) >> 5; //[9:5] + AP_curve[path][3] = tmpReg & 0x1F; //[4:0] + } + + //save RF default value + regD[path] = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord); + + //Path A AFE all on, path B AFE All off or vise versa + for(index = 0; index < IQK_ADDA_REG_NUM ; index++) + PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord))); + + //BB to AP mode + if(path == 0) + { + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0 && isNormal) //skip + continue; + else if (index < 5) + PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); + else if (BB_REG[index] == 0x870) + PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); + else + PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); + } + PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); + PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00); + } + else //path B + { + PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x01008c00); + PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x01008c00); + } + + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); + + //MAC settings + _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); + + if(path == RF90_PATH_A) //Path B to standby mode + { + PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0, bMaskDWord, 0x10000); + } + else //Path A to standby mode + { + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x10000); + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f); + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20103); + } + + delta_offset = ((delta+14)/2); + if(delta_offset < 0) + delta_offset = 0; + else if (delta_offset > 12) + delta_offset = 12; + + //AP calibration + for(index = 0; index < APK_BB_REG_NUM; index++) + { + if(index != 1 && isNormal) //only DO PA11+PAD01001, AP RF setting + continue; + + tmpReg = APK_RF_init_value[path][index]; +#if 1 + if(!pdmpriv->bAPKThermalMeterIgnore) + { + BB_offset = (tmpReg & 0xF0000) >> 16; + + if(!(tmpReg & BIT15)) //sign bit 0 + { + BB_offset = -BB_offset; + } + + delta_V = APK_delta_mapping[index][delta_offset]; + + BB_offset += delta_V; + + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset)); + + if(BB_offset < 0) + { + tmpReg = tmpReg & (~BIT15); + BB_offset = -BB_offset; + } + else + { + tmpReg = tmpReg | BIT15; + } + tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); + } +#endif + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord, 0x8992e); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord))); + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord, APK_RF_value_0[path][index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord))); + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, tmpReg); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord))); + if(!isNormal) + { + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord, APK_RF_value_A[path][index]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xa %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord))); + } + + // PA11+PAD01111, one shot + i = 0; + do + { + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); + { + PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); + rtw_mdelay_os(3); + PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); + if(isNormal) { + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(20); + #else + rtw_mdelay_os(20); + #endif + } + else + rtw_mdelay_os(3); + } + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + + if(!isNormal) + { + tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xb, bMaskDWord); + tmpReg = (tmpReg & 0x3E00) >> 9; + } + else + { + if(path == RF90_PATH_A) + tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0x03E00000); + else + tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0xF8000000); + } + //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg)); + + i++; + } + while(tmpReg > apkbound && i < 4); + + APK_result[path][index] = tmpReg; + } + } + + //reload MAC default value + _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); + + //reload BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0 && isNormal) //skip + continue; + PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); + } + + //reload AFE default value + _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); + + //reload RF path default value + for(path = 0; path < pathbound; path++) + { + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); + if(path == RF90_PATH_B) + { + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f); + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20101); + } +#if 1 + if(!isNormal) + { + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(APK_result[path][index] > 12) + APK_result[path][index] = AP_curve[path][index-1]; + //RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", index, APK_result[path][index])); + } + } + else + { //note no index == 0 + if (APK_result[path][1] > 6) + APK_result[path][1] = 6; + //RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); + +#if 0 + if(APK_result[path][2] < 2) + APK_result[path][2] = 2; + else if (APK_result[path][2] > 6) + APK_result[path][2] = 6; + RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 2, APK_result[path][2])); + + if(APK_result[path][3] < 2) + APK_result[path][3] = 2; + else if (APK_result[path][3] > 6) + APK_result[path][3] = 6; + RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 3, APK_result[path][3])); + + if(APK_result[path][4] < 5) + APK_result[path][4] = 5; + else if (APK_result[path][4] > 9) + APK_result[path][4] = 9; + RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 4, APK_result[path][4])); +#endif + + } +#endif + } + + //RTPRINT(FINIT, INIT_IQK, ("\n")); + + + for(path = 0; path < pathbound; path++) + { + if(isNormal) + { + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); + if(path == RF90_PATH_A) + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); + else + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, + ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); + } + else + { + for(index = 0; index < 2; index++) + pdmpriv->APKoutput[path][index] = ((APK_result[path][index] << 15) | (APK_result[path][2] << 10) | (APK_result[path][3] << 5) | APK_result[path][4]); + +#if (MP_DRIVER == 1) + if(pMptCtx->TxPwrLevel[path] > pMptCtx->APK_bound[path]) + { + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, + pdmpriv->APKoutput[path][0]); + } + else + { + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, + pdmpriv->APKoutput[path][1]); + } +#else + PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, + pdmpriv->APKoutput[path][0]); +#endif + } + } + + pdmpriv->bAPKdone = _TRUE; + + //RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n")); +#endif +} + + +#define DP_BB_REG_NUM 7 +#define DP_RF_REG_NUM 1 +#define DP_RETRY_LIMIT 10 +#define DP_PATH_NUM 2 +#define DP_DPK_NUM 3 +#define DP_DPK_VALUE_NUM 2 + +//digital predistortion +static VOID +_PHY_DigitalPredistortion( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ +#if 1//(PLATFORM == PLATFORM_WINDOWS) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + + u32 tmpReg, tmpReg2, index, offset, path, i, pathbound = PATH_NUM; + u32 AFE_backup[IQK_ADDA_REG_NUM]; + u32 AFE_REG[IQK_ADDA_REG_NUM] = { + 0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, + 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, + 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, + 0xeec}; + + u32 BB_backup[DP_BB_REG_NUM]; + u32 BB_REG[DP_BB_REG_NUM] = { + 0xc04, 0x800, 0xc08, 0x874, + 0x870, 0x860, 0x864}; + u32 BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, + 0x0, 0x0, 0x0}; + + u32 RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; + u32 RF_REG[DP_RF_REG_NUM] = { + 0x0d}; + + u32 MAC_backup[IQK_MAC_REG_NUM]; + u32 MAC_REG[IQK_MAC_REG_NUM] = { + 0x522, 0x550, 0x551, 0x040}; + + u32 Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { + {0x1e1e1e1e, 0x03901e1e}, + {0x18181818, 0x03901818}, + {0x0e0e0e0e, 0x03900e0e} + }; + +// u32 RF_PATHA_backup[DP_RF_REG_NUM]; +// u32 RF_REG_PATHA[DP_RF_REG_NUM] = { +// 0x00, 0x10, 0x11}; + + u32 Reg800, Reg874, Regc04, Regc08, Reg040; + + u32 AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u32 RetryCount = 0; + + BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); + + //DBG_8192C("==>_PHY_DigitalPredistortion()\n"); + + //DBG_8192C("_PHY_DigitalPredistortion for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip")); + + if(!isNormal) + return; + + //save BB default value + for(index=0; index tx_agc 1f ~11 + // PA gain = 11 & PAD2 => tx_agc 10~0e + // PA gain = 01 => tx_agc 0b~0d + // PA gain = 00 => tx_agc 0a~00 + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); + PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + + //do inner loopback DPK 3 times + for(i = 0; i < 3; i++) + { + //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 + for(index = 0; index < 3; index++) + PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); + PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); + for(index = 0; index < 4; index++) + PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); + + // PAGE_B for Path-A inner loopback DPK setting + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02097098); + PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); + + //----send one shot signal----// + // Path A + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x80047788); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x00047788); + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + + //PA gain = 11 => tx_agc = 1a + for(index = 0; index < 3; index++) + PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, 0x34343434); + PHY_SetBBReg(pAdapter, 0xe08+index*4, bMaskDWord, 0x03903434); + for(index = 0; index < 4; index++) + PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, 0x34343434); + + //==================================== + // PAGE_B for Path-A DPK setting + //==================================== + // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098); + PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); + + //rf_lpbk_setup + //1.rf 00:5205a, rf 0d:0e52c + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0c, bMaskDWord, 0x8992b); + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0d, bMaskDWord, 0x0e52c); + PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x5205a ); + + //----send one shot signal----// + // Path A + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0); + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + + while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathAOK) + { + //----read back measurement results----// + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c297018); + tmpReg = PHY_QueryBBReg(pAdapter, 0xbe0, bMaskDWord); + rtw_mdelay_os(10); + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c29701f); + tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbe8, bMaskDWord); + rtw_mdelay_os(10); + + tmpReg = (tmpReg & bMaskHWord) >> 16; + tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; + if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) + { + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098); + + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0); + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + RetryCount++; + DBG_8192C("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2); + } + else + { + DBG_8192C("path A DPK Sucess\n"); + pdmpriv->bDPPathAOK = _TRUE; + break; + } + } + RetryCount = 0; + + //DPP path A + if(pdmpriv->bDPPathAOK) + { + // DP settings + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x01017098); + PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x776d9f84); + PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); + PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); + + for(i=0xb00; i<=0xb3c; i+=4) + { + PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000); + //DBG_8192C("path A ofsset = 0x%x\n", i); + } + + //pwsf + PHY_SetBBReg(pAdapter, 0xb40, bMaskDWord, 0x40404040); + PHY_SetBBReg(pAdapter, 0xb44, bMaskDWord, 0x28324040); + PHY_SetBBReg(pAdapter, 0xb48, bMaskDWord, 0x10141920); + + for(i=0xb4c; i<=0xb5c; i+=4) + { + PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c); + } + + //TX_AGC boundary + PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + } + else + { + PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x00000000); + PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x00000000); + } + + //DPK path B + if(is2T) + { + //Path A to standby mode + PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_AC, bMaskDWord, 0x10000); + + // LUTs => tx_agc + // PA gain = 11 & PAD1, => tx_agc 1f ~11 + // PA gain = 11 & PAD2, => tx_agc 10 ~0e + // PA gain = 01 => tx_agc 0b ~0d + // PA gain = 00 => tx_agc 0a ~00 + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); + PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + + //do inner loopback DPK 3 times + for(i = 0; i < 3; i++) + { + //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 + for(index = 0; index < 4; index++) + PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); + for(index = 0; index < 2; index++) + PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); + for(index = 0; index < 2; index++) + PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); + + // PAGE_B for Path-A inner loopback DPK setting + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02097098); + PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); + PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); + + //----send one shot signal----// + // Path B + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x80047788); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x00047788); + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + } + + // PA gain = 11 => tx_agc = 1a + for(index = 0; index < 4; index++) + PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, 0x34343434); + for(index = 0; index < 2; index++) + PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, 0x34343434); + for(index = 0; index < 2; index++) + PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, 0x34343434); + + // PAGE_B for Path-B DPK setting + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098); + PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); + PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); + + // RF lpbk switches on + PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x0101000f); + PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x01120103); + + //Path-B RF lpbk + PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0c, bMaskDWord, 0x8992b); + PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0d, bMaskDWord, 0x0e52c); + PHY_SetRFReg(pAdapter, RF90_PATH_B, RF_AC, bMaskDWord, 0x5205a); + + //----send one shot signal----// + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0); + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + + while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathBOK) + { + //----read back measurement results----// + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c297018); + tmpReg = PHY_QueryBBReg(pAdapter, 0xbf0, bMaskDWord); + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c29701f); + tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbf8, bMaskDWord); + + tmpReg = (tmpReg & bMaskHWord) >> 16; + tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; + + if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) + { + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098); + + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0); + rtw_mdelay_os(1); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0); + #ifdef CONFIG_LONG_DELAY_ISSUE + rtw_msleep_os(50); + #else + rtw_mdelay_os(50); + #endif + RetryCount++; + DBG_8192C("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2); + } + else + { + DBG_8192C("path B DPK Success\n"); + pdmpriv->bDPPathBOK = _TRUE; + break; + } + } + + //DPP path B + if(pdmpriv->bDPPathBOK) + { + // DP setting + // LUT by SRAM + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x01017098); + PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x776d9f84); + PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); + PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); + + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); + for(i=0xb60; i<=0xb9c; i+=4) + { + PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000); + //DBG_8192C("path B ofsset = 0x%x\n", i); + } + + // PWSF + PHY_SetBBReg(pAdapter, 0xba0, bMaskDWord, 0x40404040); + PHY_SetBBReg(pAdapter, 0xba4, bMaskDWord, 0x28324050); + PHY_SetBBReg(pAdapter, 0xba8, bMaskDWord, 0x0c141920); + + for(i=0xbac; i<=0xbbc; i+=4) + { + PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c); + } + + // tx_agc boundary + PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f); + PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); + + } + else + { + PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x00000000); + PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x00000000); + } + } + + //reload BB default value + for(index=0; indexbDPdone = _TRUE; + //DBG_8192C("<==_PHY_DigitalPredistortion()\n"); +#endif +} + + +static VOID _PHY_SetRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ + u8 u1bTmp; + + if(!pAdapter->hw_init_completed) + { + u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; + rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); + //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) + { + if(bMain) + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A + else + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT + } + else + { + + if(bMain) + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main + else + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux + } + +} + +//return value TRUE => Main; FALSE => Aux + +static BOOLEAN _PHY_QueryRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ +// if(is2T) +// return _TRUE; + + if(!pAdapter->hw_init_completed) + { + PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) + { + if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) + return _TRUE; + else + return _FALSE; + } + else + { + if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) + return _TRUE; + else + return _FALSE; + } +} + + +static VOID +_PHY_DumpRFReg(IN PADAPTER pAdapter) +{ + u32 rfRegValue,rfRegOffset; + + //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); + + for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ + rfRegValue = PHY_QueryRFReg(pAdapter,RF90_PATH_A, rfRegOffset, bMaskDWord); + //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); + } + //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); +} + + +VOID +rtl8192c_PHY_IQCalibrate( + IN PADAPTER pAdapter, + IN BOOLEAN bReCovery + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u32 IQK_BB_REG[9] = { + rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, + rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta}; + int result[4][8]; //last is final result + u8 i, final_candidate; + BOOLEAN bPathAOK, bPathBOK; + int RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; + BOOLEAN is12simular, is13simular, is23simular; + + +#if (MP_DRIVER == 1) + //ignore IQK when continuous Tx + if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE) + return; + if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE) + return; + if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE) + return; + if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE) + return; +#endif + +#if DISABLE_BB_RF + return; +#endif + + if(bReCovery) + { + _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); + return; + } + DBG_8192C("IQK:Start!!!\n"); + + for(i = 0; i < 8; i++) + { + result[0][i] = 0; + result[1][i] = 0; + result[2][i] = 0; + result[3][i] = 0; + } + final_candidate = 0xff; + bPathAOK = _FALSE; + bPathBOK = _FALSE; + is12simular = _FALSE; + is23simular = _FALSE; + is13simular = _FALSE; + + for (i=0; i<3; i++) + { + if(IS_92C_SERIAL( pHalData->VersionID)){ + _PHY_IQCalibrate(pAdapter, result, i, _TRUE); + //_PHY_DumpRFReg(pAdapter); + } + else{ + // For 88C 1T1R + _PHY_IQCalibrate(pAdapter, result, i, _FALSE); + } + + if(i == 1) + { + is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1); + if(is12simular) + { + final_candidate = 0; + break; + } + } + + if(i == 2) + { + is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2); + if(is13simular) + { + final_candidate = 0; + break; + } + + is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2); + if(is23simular) + final_candidate = 1; + else + { + for(i = 0; i < 8; i++) + RegTmp += result[3][i]; + + if(RegTmp != 0) + final_candidate = 3; + else + final_candidate = 0xFF; + } + } + } + + for (i=0; i<4; i++) + { + RegE94 = result[i][0]; + RegE9C = result[i][1]; + RegEA4 = result[i][2]; + RegEAC = result[i][3]; + RegEB4 = result[i][4]; + RegEBC = result[i][5]; + RegEC4 = result[i][6]; + RegECC = result[i][7]; + //RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); + } + + if(final_candidate != 0xff) + { + pdmpriv->RegE94 = RegE94 = result[final_candidate][0]; + pdmpriv->RegE9C = RegE9C = result[final_candidate][1]; + RegEA4 = result[final_candidate][2]; + RegEAC = result[final_candidate][3]; + pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4]; + pdmpriv->RegEBC = RegEBC = result[final_candidate][5]; + RegEC4 = result[final_candidate][6]; + RegECC = result[final_candidate][7]; + DBG_8192C("IQK: final_candidate is %x\n", final_candidate); + DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC); + bPathAOK = bPathBOK = _TRUE; + } + else + { + + #if 0 + DBG_871X("%s do _PHY_ReloadADDARegisters\n"); + _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); + return; + #else + pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100; //X default value + pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0; //Y default value + #endif + } + + if((RegE94 != 0)/*&&(RegEA4 != 0)*/) + _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); + + if(IS_92C_SERIAL( pHalData->VersionID)){ + if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) + _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); + } + + _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); + +} + + +VOID +rtl8192c_PHY_LCCalibrate( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + +#if (MP_DRIVER == 1) + // ignore LCK when continuous Tx + if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE) + return; + if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE) + return; + if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE) + return; + if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE) + return; +#endif + +#if DISABLE_BB_RF + return; +#endif + + if(IS_92C_SERIAL( pHalData->VersionID)){ + _PHY_LCCalibrate(pAdapter, _TRUE); + } + else{ + // For 88C 1T1R + _PHY_LCCalibrate(pAdapter, _FALSE); + } +} + +VOID +rtl8192c_PHY_APCalibrate( + IN PADAPTER pAdapter, + IN char delta + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + +#if DISABLE_BB_RF + return; +#endif + + if(pdmpriv->bAPKdone) + return; + +// if(IS_NORMAL_CHIP(pHalData->VersionID)) +// return; + + if(IS_92C_SERIAL( pHalData->VersionID)){ + _PHY_APCalibrate(pAdapter, delta, _TRUE); + } + else{ + // For 88C 1T1R + _PHY_APCalibrate(pAdapter, delta, _FALSE); + } +} + +VOID +rtl8192c_PHY_DigitalPredistortion( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + +#if DISABLE_BB_RF + return; +#endif + + return; + + if(pdmpriv->bDPdone) + return; + + if(IS_92C_SERIAL( pHalData->VersionID)){ + _PHY_DigitalPredistortion(pAdapter, _TRUE); + } + else{ + // For 88C 1T1R + _PHY_DigitalPredistortion(pAdapter, _FALSE); + } +} + +VOID rtl8192c_PHY_SetRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN bMain + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#if DISABLE_BB_RF + return; +#endif + + if(IS_92C_SERIAL( pHalData->VersionID)){ + _PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE); + } + else{ + // For 88C 1T1R + _PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE); + } +} + +// +// Move from phycfg.c to gen.c to be code independent later +// +//-------------------------Move to other DIR later----------------------------*/ +#ifdef CONFIG_USB_HCI + +// +// Description: +// To dump all Tx FIFO LLT related link-list table. +// Added by Roger, 2009.03.10. +// +VOID +DumpBBDbgPort_92CU( + IN PADAPTER Adapter + ) +{ + + //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); + PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); + PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); + +} +#endif + diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c old mode 100755 new mode 100644 index d17c23f9a7207a..593ea09f8d0942 --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c @@ -1,1047 +1,1047 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -/****************************************************************************** - * - * - * Module: rtl8192c_rf6052.c ( Source C File) - * - * Note: Provide RF 6052 series relative API. - * - * Function: - * - * Export: - * - * Abbrev: - * - * History: - * Data Who Remark - * - * 09/25/2008 MHC Create initial version. - * 11/05/2008 MHC Add API for tw power setting. - * - * -******************************************************************************/ - -#define _RTL8192C_RF6052_C_ - -#include -#include -#include -#include - -#include - -/*---------------------------Define Local Constant---------------------------*/ -// Define local structure for debug!!!!! -typedef struct RF_Shadow_Compare_Map { - // Shadow register value - u32 Value; - // Compare or not flag - u8 Compare; - // Record If it had ever modified unpredicted - u8 ErrorOrNot; - // Recorver Flag - u8 Recorver; - // - u8 Driver_Write; -}RF_SHADOW_T; -/*---------------------------Define Local Constant---------------------------*/ - - -/*------------------------Define global variable-----------------------------*/ -/*------------------------Define global variable-----------------------------*/ - - -/*------------------------Define local variable------------------------------*/ -// 2008/11/20 MH For Debug only, RF -//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; -static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; -/*------------------------Define local variable------------------------------*/ - - -/*----------------------------------------------------------------------------- - * Function: RF_ChangeTxPath - * - * Overview: For RL6052, we must change some RF settign for 1T or 2T. - * - * Input: u2Byte DataRate // 0x80-8f, 0x90-9f - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 09/25/2008 MHC Create Version 0. - * Firmwaer support the utility later. - * - *---------------------------------------------------------------------------*/ -void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, - IN u16 DataRate) -{ -// We do not support gain table change inACUT now !!!! Delete later !!! -#if 0//(RTL92SE_FPGA_VERIFY == 0) - static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T - static u4Byte tx_gain_tbl1[6] - = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; - static u4Byte tx_gain_tbl2[6] - = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; - u1Byte i; - - if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) - { - // Set TX SYNC power G2G3 loop filter - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); - - // Change TX AGC gain table - for (i = 0; i < 6; i++) - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); - - // Set PA to high value - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); - } - else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) - { - // Set TX SYNC power G2G3 loop filter - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x04440); - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); - - // Change TX AGC gain table - for (i = 0; i < 6; i++) - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); - - // Set PA low gain - PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); - } -#endif - -} /* RF_ChangeTxPath */ - - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetBandwidth() - * - * Overview: This function is called by SetBWModeCallback8190Pci() only - * - * Input: PADAPTER Adapter - * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M - * - * Output: NONE - * - * Return: NONE - * - * Note: For RF type 0222D - *---------------------------------------------------------------------------*/ -VOID -rtl8192c_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - switch(Bandwidth) - { - case HT_CHANNEL_WIDTH_20: - pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400); - PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); - break; - - case HT_CHANNEL_WIDTH_40: - pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)); - PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); - break; - - default: - //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); - break; - } - -} - - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetCckTxPower - * - * Overview: - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/05/2008 MHC Simulate 8192series.. - * - *---------------------------------------------------------------------------*/ - -VOID -rtl8192c_PHY_RF6052SetCckTxPower( - IN PADAPTER Adapter, - IN u8* pPowerlevel) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; - u32 TxAGC[2]={0, 0}, tmpval=0; - BOOLEAN TurboScanOff = _FALSE; - u8 idx1, idx2; - u8* ptr; - - // 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU. - // Otherwise, external PA will be broken if power index > 0x20. -#ifdef CONFIG_USB_HCI - if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA) -#else - if (pHalData->EEPROMRegulatory != 0) -#endif - { - //DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA); - TurboScanOff = _TRUE; - } - - if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) - { - TxAGC[RF90_PATH_A] = 0x3f3f3f3f; - TxAGC[RF90_PATH_B] = 0x3f3f3f3f; - - TurboScanOff = _TRUE;//disable turbo scan - - if(TurboScanOff) - { - for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) - { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | - (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); -#ifdef CONFIG_USB_HCI - // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. - if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) - TxAGC[idx1] = 0x20; -#endif - } - } - } - else - { -// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. -// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. -// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - { - TxAGC[RF90_PATH_A] = 0x10101010; - TxAGC[RF90_PATH_B] = 0x10101010; - } - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - { - TxAGC[RF90_PATH_A] = 0x00000000; - TxAGC[RF90_PATH_B] = 0x00000000; - } - else - { - for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) - { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | - (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); - } - - if(pHalData->EEPROMRegulatory==0) - { - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); - TxAGC[RF90_PATH_A] += tmpval; - - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); - TxAGC[RF90_PATH_B] += tmpval; - } - } - } - - for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) - { - ptr = (u8*)(&(TxAGC[idx1])); - for(idx2=0; idx2<4; idx2++) - { - if(*ptr > RF6052_MAX_TX_PWR) - *ptr = RF6052_MAX_TX_PWR; - ptr++; - } - } - - // rf-A cck tx power - tmpval = TxAGC[RF90_PATH_A]&0xff; - PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); - //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32)); - tmpval = TxAGC[RF90_PATH_A]>>8; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); - //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); - - // rf-B cck tx power - tmpval = TxAGC[RF90_PATH_B]>>24; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); - //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); - tmpval = TxAGC[RF90_PATH_B]&0x00ffffff; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); - //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", - // tmpval, rTxAGC_B_CCK1_55_Mcs32)); - -} /* PHY_RF6052SetCckTxPower */ - -// -// powerbase0 for OFDM rates -// powerbase1 for HT MCS rates -// -static void getPowerBase( - IN PADAPTER Adapter, - IN u8* pPowerLevel, - IN u8 Channel, - IN OUT u32* OfdmBase, - IN OUT u32* MCSBase - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 powerBase0, powerBase1; - u8 Legacy_pwrdiff=0, HT20_pwrdiff=0; - u8 i, powerlevel[2]; - - for(i=0; i<2; i++) - { - powerlevel[i] = pPowerLevel[i]; - Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; - powerBase0 = powerlevel[i] + Legacy_pwrdiff; - - powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; - *(OfdmBase+i) = powerBase0; - //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); - } - - for(i=0; i<2; i++) - { - //Check HT20 to HT40 diff - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - { - HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; - powerlevel[i] += HT20_pwrdiff; - } - powerBase1 = powerlevel[i]; - powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; - *(MCSBase+i) = powerBase1; - //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); - } -} - -static void getTxPowerWriteValByRegulatory( - IN PADAPTER Adapter, - IN u8 Channel, - IN u8 index, - IN u32* powerBase0, - IN u32* powerBase1, - OUT u32* pOutWriteVal - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u8 i, chnlGroup, pwr_diff_limit[4]; - u32 writeVal, customer_limit, rf; - - // - // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate - // - for(rf=0; rf<2; rf++) - { - switch(pHalData->EEPROMRegulatory) - { - case 0: // Realtek better performance - // increase power diff defined by Realtek for large power - chnlGroup = 0; - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - case 1: // Realtek regulatory - // increase power diff defined by Realtek for regulatory - { - if(pHalData->pwrGroupCnt == 1) - chnlGroup = 0; - if(pHalData->pwrGroupCnt >= 3) - { - if(Channel <= 3) - chnlGroup = 0; - else if(Channel >= 4 && Channel <= 9) - chnlGroup = 1; - else if(Channel > 9) - chnlGroup = 2; - - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - chnlGroup++; - else - chnlGroup+=4; - } - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - } - break; - case 2: // Better regulatory - // don't increase any power diff - writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - case 3: // Customer defined power diff. - // increase power diff defined by customer. - chnlGroup = 0; - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - { - //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", - // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); - } - else - { - //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", - // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); - } - for (i=0; i<4; i++) - { - pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - { - if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) - pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; - } - else - { - if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) - pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; - } - } - customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | - (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); - //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); - - writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - default: - chnlGroup = 0; - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - } - -// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. -// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. -// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. - - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - writeVal = 0x14141414; - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - writeVal = 0x00000000; - - - // 20100628 Joseph: High power mode for BT-Coexist mechanism. - // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) - { - //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); - writeVal = writeVal - 0x06060606; - } - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) - { - //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); - writeVal = writeVal; - } - *(pOutWriteVal+rf) = writeVal; - } -} - -static void writeOFDMPowerReg( - IN PADAPTER Adapter, - IN u8 index, - IN u32* pValue - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, - rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, - rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; - u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, - rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, - rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; - u8 i, rf, pwr_val[4]; - u32 writeVal; - u16 RegOffset; - - for(rf=0; rf<2; rf++) - { - writeVal = pValue[rf]; - for(i=0; i<4; i++) - { - pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); - if (pwr_val[i] > RF6052_MAX_TX_PWR) - pwr_val[i] = RF6052_MAX_TX_PWR; - } - writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; - - if(rf == 0) - RegOffset = RegOffset_A[index]; - else - RegOffset = RegOffset_B[index]; - - PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); - //RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal)); - - // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. - if(((pHalData->rf_type == RF_2T2R) && - (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| - ((pHalData->rf_type != RF_2T2R) && - (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) - { - writeVal = pwr_val[3]; - if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) - RegOffset = 0xc90; - if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) - RegOffset = 0xc98; - for(i=0; i<3; i++) - { - if(i!=2) - writeVal = (writeVal>8)?(writeVal-8):0; - else - writeVal = (writeVal>6)?(writeVal-6):0; - rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); - } - } - } -} -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetOFDMTxPower - * - * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for - * different channel and read original value in TX power register area from - * 0xe00. We increase offset and original value to be correct tx pwr. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/05/2008 MHC Simulate 8192 series method. - * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to - * A/B pwr difference or legacy/HT pwr diff. - * 2. We concern with path B legacy/HT OFDM difference. - * 01/22/2009 MHC Support new EPRO format from SD3. - * - *---------------------------------------------------------------------------*/ -VOID -rtl8192c_PHY_RF6052SetOFDMTxPower( - IN PADAPTER Adapter, - IN u8* pPowerLevel, - IN u8 Channel) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 writeVal[2], powerBase0[2], powerBase1[2]; - u8 index = 0; - - getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]); - - for(index=0; index<6; index++) - { - getTxPowerWriteValByRegulatory(Adapter, Channel, index, - &powerBase0[0], &powerBase1[0], &writeVal[0]); - - writeOFDMPowerReg(Adapter, index, &writeVal[0]); - } - -} - - -static VOID -phy_RF6052_Config_HardCode( - IN PADAPTER Adapter - ) -{ - - // Set Default Bandwidth to 20M - //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); - - // TODO: Set Default Channel to channel one for RTL8225 - -} - -static int -phy_RF6052_Config_ParaFile( - IN PADAPTER Adapter - ) -{ - u32 u4RegValue; - u8 eRFPath; - BB_REGISTER_DEFINITION_T *pPhyReg; - - int rtStatus = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - static char sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A; - static char sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B; -#ifdef CONFIG_USB_HCI - static char sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard; - static char sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard; - static char sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP; -#endif - static char sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A; - static char sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B; - static char sz8723RadioAFile[] = RTL8723_PHY_RADIO_A; - static char sz8723RadioBFile[] = RTL8723_PHY_RADIO_B; - char *pszRadioAFile, *pszRadioBFile; - - - if(IS_HARDWARE_TYPE_8192C(Adapter)) - { - if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA is different from 92c's - { - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - pszRadioAFile = sz92CRadioAFile; - pszRadioBFile = sz92CRadioBFile; - } - else - { - rtStatus = _FAIL; - return rtStatus; - } - } - else - { - if(IS_NORMAL_CHIP(pHalData->VersionID)) - { - pszRadioAFile = sz88CRadioAFile; - pszRadioBFile = sz88CRadioBFile; -#ifdef CONFIG_USB_HCI - if( BOARD_MINICARD == pHalData->BoardType) - { - pszRadioAFile = sz88CRadioAFile_mCard; - pszRadioBFile = sz88CRadioBFile_mCard; - } - else if( BOARD_USB_High_PA == pHalData->BoardType) - { - pszRadioAFile = sz88CRadioAFile_HP; - } -#endif - } - else - { - rtStatus = _FAIL; - return rtStatus; - } - } - } - else if(IS_HARDWARE_TYPE_8723(Adapter)) - { - pszRadioAFile = sz8723RadioAFile; - pszRadioBFile = sz8723RadioBFile; - } - - //3//----------------------------------------------------------------- - //3// <2> Initialize RF - //3//----------------------------------------------------------------- - //for(eRFPath = RF90_PATH_A; eRFPath NumTotalRFPath; eRFPath++) - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - { - - pPhyReg = &pHalData->PHYRegDef[eRFPath]; - - /*----Store original RFENV control type----*/ - switch(eRFPath) - { - case RF90_PATH_A: - case RF90_PATH_C: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); - break; - case RF90_PATH_B : - case RF90_PATH_D: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); - break; - } - - /*----Set RF_ENV enable----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); - rtw_udelay_os(1);//PlatformStallExecution(1); - - /*----Set RF_ENV output high----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); - rtw_udelay_os(1);//PlatformStallExecution(1); - - /* Set bit number of Address and Data for RF register */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 - rtw_udelay_os(1);//PlatformStallExecution(1); - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 - rtw_udelay_os(1);//PlatformStallExecution(1); - - /*----Initialize RF fom connfiguration file----*/ - switch(eRFPath) - { - case RF90_PATH_A: -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath); -#else - rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF90_RADIO_PATH_E)eRFPath); -#endif - break; - case RF90_PATH_B: -#ifdef CONFIG_EMBEDDED_FWIMG - rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath); -#else - rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF90_RADIO_PATH_E)eRFPath); -#endif - break; - case RF90_PATH_C: - break; - case RF90_PATH_D: - break; - } - - /*----Restore RFENV control type----*/; - switch(eRFPath) - { - case RF90_PATH_A: - case RF90_PATH_C: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); - break; - case RF90_PATH_B : - case RF90_PATH_D: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); - break; - } - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); - goto phy_RF6052_Config_ParaFile_Fail; - } - - } - - //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); - return rtStatus; - -phy_RF6052_Config_ParaFile_Fail: - return rtStatus; -} - - -int -PHY_RF6052_Config8192C( - IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - // - // Initialize general global value - // - // TODO: Extend RF_PATH_C and RF_PATH_D in the future - if(pHalData->rf_type == RF_1T1R) - pHalData->NumTotalRFPath = 1; - else - pHalData->NumTotalRFPath = 2; - - // - // Config BB and RF - // - rtStatus = phy_RF6052_Config_ParaFile(Adapter); -#if 0 - switch( Adapter->MgntInfo.bRegHwParaFile ) - { - case 0: - phy_RF6052_Config_HardCode(Adapter); - break; - - case 1: - rtStatus = phy_RF6052_Config_ParaFile(Adapter); - break; - - case 2: - // Partial Modify. - phy_RF6052_Config_HardCode(Adapter); - phy_RF6052_Config_ParaFile(Adapter); - break; - - default: - phy_RF6052_Config_HardCode(Adapter); - break; - } -#endif - return rtStatus; - -} - - -// -// ==> RF shadow Operation API Code Section!!! -// -/*----------------------------------------------------------------------------- - * Function: PHY_RFShadowRead - * PHY_RFShadowWrite - * PHY_RFShadowCompare - * PHY_RFShadowRecorver - * PHY_RFShadowCompareAll - * PHY_RFShadowRecorverAll - * PHY_RFShadowCompareFlagSet - * PHY_RFShadowRecorverFlagSet - * - * Overview: When we set RF register, we must write shadow at first. - * When we are running, we must compare shadow abd locate error addr. - * Decide to recorver or not. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/20/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -u32 -PHY_RFShadowRead( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset) -{ - return RF_Shadow[eRFPath][Offset].Value; - -} /* PHY_RFShadowRead */ - - -VOID -PHY_RFShadowWrite( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u32 Data) -{ - RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); - RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; - -} /* PHY_RFShadowWrite */ - - -BOOLEAN -PHY_RFShadowCompare( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset) -{ - u32 reg; - // Check if we need to check the register - if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) - { - reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); - // Compare shadow and real rf register for 20bits!! - if (RF_Shadow[eRFPath][Offset].Value != reg) - { - // Locate error position. - RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; - //RT_TRACE(COMP_INIT, DBG_LOUD, - //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", - //eRFPath, Offset, reg)); - } - return RF_Shadow[eRFPath][Offset].ErrorOrNot ; - } - return _FALSE; -} /* PHY_RFShadowCompare */ - - -VOID -PHY_RFShadowRecorver( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset) -{ - // Check if the address is error - if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) - { - // Check if we need to recorver the register. - if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) - { - PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, - RF_Shadow[eRFPath][Offset].Value); - //RT_TRACE(COMP_INIT, DBG_LOUD, - //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", - //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); - } - } - -} /* PHY_RFShadowRecorver */ - - -VOID -PHY_RFShadowCompareAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - PHY_RFShadowCompare(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset); - } - } - -} /* PHY_RFShadowCompareAll */ - - -VOID -PHY_RFShadowRecorverAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - PHY_RFShadowRecorver(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset); - } - } - -} /* PHY_RFShadowRecorverAll */ - - -VOID -PHY_RFShadowCompareFlagSet( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u8 Type) -{ - // Set True or False!!! - RF_Shadow[eRFPath][Offset].Compare = Type; - -} /* PHY_RFShadowCompareFlagSet */ - - -VOID -PHY_RFShadowRecorverFlagSet( - IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u8 Type) -{ - // Set True or False!!! - RF_Shadow[eRFPath][Offset].Recorver= Type; - -} /* PHY_RFShadowRecorverFlagSet */ - - -VOID -PHY_RFShadowCompareFlagSetAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! - if (Offset != 0x26 && Offset != 0x27) - PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE); - else - PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE); - } - } - -} /* PHY_RFShadowCompareFlagSetAll */ - - -VOID -PHY_RFShadowRecorverFlagSetAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! - if (Offset != 0x26 && Offset != 0x27) - PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE); - else - PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE); - } - } - -} /* PHY_RFShadowCompareFlagSetAll */ - -VOID -PHY_RFShadowRefresh( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - RF_Shadow[eRFPath][Offset].Value = 0; - RF_Shadow[eRFPath][Offset].Compare = _FALSE; - RF_Shadow[eRFPath][Offset].Recorver = _FALSE; - RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; - RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; - } - } - -} /* PHY_RFShadowRead */ - -/* End of HalRf6052.c */ - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +/****************************************************************************** + * + * + * Module: rtl8192c_rf6052.c ( Source C File) + * + * Note: Provide RF 6052 series relative API. + * + * Function: + * + * Export: + * + * Abbrev: + * + * History: + * Data Who Remark + * + * 09/25/2008 MHC Create initial version. + * 11/05/2008 MHC Add API for tw power setting. + * + * +******************************************************************************/ + +#define _RTL8192C_RF6052_C_ + +#include +#include +#include +#include + +#include + +/*---------------------------Define Local Constant---------------------------*/ +// Define local structure for debug!!!!! +typedef struct RF_Shadow_Compare_Map { + // Shadow register value + u32 Value; + // Compare or not flag + u8 Compare; + // Record If it had ever modified unpredicted + u8 ErrorOrNot; + // Recorver Flag + u8 Recorver; + // + u8 Driver_Write; +}RF_SHADOW_T; +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ +/*------------------------Define global variable-----------------------------*/ + + +/*------------------------Define local variable------------------------------*/ +// 2008/11/20 MH For Debug only, RF +//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; +static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; +/*------------------------Define local variable------------------------------*/ + + +/*----------------------------------------------------------------------------- + * Function: RF_ChangeTxPath + * + * Overview: For RL6052, we must change some RF settign for 1T or 2T. + * + * Input: u2Byte DataRate // 0x80-8f, 0x90-9f + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 09/25/2008 MHC Create Version 0. + * Firmwaer support the utility later. + * + *---------------------------------------------------------------------------*/ +void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, + IN u16 DataRate) +{ +// We do not support gain table change inACUT now !!!! Delete later !!! +#if 0//(RTL92SE_FPGA_VERIFY == 0) + static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T + static u4Byte tx_gain_tbl1[6] + = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; + static u4Byte tx_gain_tbl2[6] + = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; + u1Byte i; + + if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) + { + // Set TX SYNC power G2G3 loop filter + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); + + // Change TX AGC gain table + for (i = 0; i < 6; i++) + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); + + // Set PA to high value + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); + } + else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) + { + // Set TX SYNC power G2G3 loop filter + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x04440); + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); + + // Change TX AGC gain table + for (i = 0; i < 6; i++) + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); + + // Set PA low gain + PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); + } +#endif + +} /* RF_ChangeTxPath */ + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetBandwidth() + * + * Overview: This function is called by SetBWModeCallback8190Pci() only + * + * Input: PADAPTER Adapter + * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: For RF type 0222D + *---------------------------------------------------------------------------*/ +VOID +rtl8192c_PHY_RF6052SetBandwidth( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(Bandwidth) + { + case HT_CHANNEL_WIDTH_20: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400); + PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + case HT_CHANNEL_WIDTH_40: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)); + PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + default: + //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); + break; + } + +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetCckTxPower + * + * Overview: + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/05/2008 MHC Simulate 8192series.. + * + *---------------------------------------------------------------------------*/ + +VOID +rtl8192c_PHY_RF6052SetCckTxPower( + IN PADAPTER Adapter, + IN u8* pPowerlevel) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; + u32 TxAGC[2]={0, 0}, tmpval=0; + BOOLEAN TurboScanOff = _FALSE; + u8 idx1, idx2; + u8* ptr; + + // 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU. + // Otherwise, external PA will be broken if power index > 0x20. +#ifdef CONFIG_USB_HCI + if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA) +#else + if (pHalData->EEPROMRegulatory != 0) +#endif + { + //DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA); + TurboScanOff = _TRUE; + } + + if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) + { + TxAGC[RF90_PATH_A] = 0x3f3f3f3f; + TxAGC[RF90_PATH_B] = 0x3f3f3f3f; + + TurboScanOff = _TRUE;//disable turbo scan + + if(TurboScanOff) + { + for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) + { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | + (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); +#ifdef CONFIG_USB_HCI + // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. + if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) + TxAGC[idx1] = 0x20; +#endif + } + } + } + else + { +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + { + TxAGC[RF90_PATH_A] = 0x10101010; + TxAGC[RF90_PATH_B] = 0x10101010; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + { + TxAGC[RF90_PATH_A] = 0x00000000; + TxAGC[RF90_PATH_B] = 0x00000000; + } + else + { + for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) + { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | + (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); + } + + if(pHalData->EEPROMRegulatory==0) + { + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); + TxAGC[RF90_PATH_A] += tmpval; + + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); + TxAGC[RF90_PATH_B] += tmpval; + } + } + } + + for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) + { + ptr = (u8*)(&(TxAGC[idx1])); + for(idx2=0; idx2<4; idx2++) + { + if(*ptr > RF6052_MAX_TX_PWR) + *ptr = RF6052_MAX_TX_PWR; + ptr++; + } + } + + // rf-A cck tx power + tmpval = TxAGC[RF90_PATH_A]&0xff; + PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32)); + tmpval = TxAGC[RF90_PATH_A]>>8; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); + + // rf-B cck tx power + tmpval = TxAGC[RF90_PATH_B]>>24; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); + tmpval = TxAGC[RF90_PATH_B]&0x00ffffff; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", + // tmpval, rTxAGC_B_CCK1_55_Mcs32)); + +} /* PHY_RF6052SetCckTxPower */ + +// +// powerbase0 for OFDM rates +// powerbase1 for HT MCS rates +// +static void getPowerBase( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel, + IN OUT u32* OfdmBase, + IN OUT u32* MCSBase + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 powerBase0, powerBase1; + u8 Legacy_pwrdiff=0, HT20_pwrdiff=0; + u8 i, powerlevel[2]; + + for(i=0; i<2; i++) + { + powerlevel[i] = pPowerLevel[i]; + Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; + powerBase0 = powerlevel[i] + Legacy_pwrdiff; + + powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; + *(OfdmBase+i) = powerBase0; + //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); + } + + for(i=0; i<2; i++) + { + //Check HT20 to HT40 diff + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + { + HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; + powerlevel[i] += HT20_pwrdiff; + } + powerBase1 = powerlevel[i]; + powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; + *(MCSBase+i) = powerBase1; + //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); + } +} + +static void getTxPowerWriteValByRegulatory( + IN PADAPTER Adapter, + IN u8 Channel, + IN u8 index, + IN u32* powerBase0, + IN u32* powerBase1, + OUT u32* pOutWriteVal + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 i, chnlGroup, pwr_diff_limit[4]; + u32 writeVal, customer_limit, rf; + + // + // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate + // + for(rf=0; rf<2; rf++) + { + switch(pHalData->EEPROMRegulatory) + { + case 0: // Realtek better performance + // increase power diff defined by Realtek for large power + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 1: // Realtek regulatory + // increase power diff defined by Realtek for regulatory + { + if(pHalData->pwrGroupCnt == 1) + chnlGroup = 0; + if(pHalData->pwrGroupCnt >= 3) + { + if(Channel <= 3) + chnlGroup = 0; + else if(Channel >= 4 && Channel <= 9) + chnlGroup = 1; + else if(Channel > 9) + chnlGroup = 2; + + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + chnlGroup++; + else + chnlGroup+=4; + } + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + } + break; + case 2: // Better regulatory + // don't increase any power diff + writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 3: // Customer defined power diff. + // increase power diff defined by customer. + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + { + //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", + // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); + } + else + { + //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", + // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); + } + for (i=0; i<4; i++) + { + pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + { + if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) + pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; + } + else + { + if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) + pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; + } + } + customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | + (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); + + writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + default: + chnlGroup = 0; + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + } + +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + writeVal = 0x14141414; + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + writeVal = 0x00000000; + + + // 20100628 Joseph: High power mode for BT-Coexist mechanism. + // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); + writeVal = writeVal - 0x06060606; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); + writeVal = writeVal; + } + *(pOutWriteVal+rf) = writeVal; + } +} + +static void writeOFDMPowerReg( + IN PADAPTER Adapter, + IN u8 index, + IN u32* pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, + rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, + rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; + u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, + rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, + rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; + u8 i, rf, pwr_val[4]; + u32 writeVal; + u16 RegOffset; + + for(rf=0; rf<2; rf++) + { + writeVal = pValue[rf]; + for(i=0; i<4; i++) + { + pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); + if (pwr_val[i] > RF6052_MAX_TX_PWR) + pwr_val[i] = RF6052_MAX_TX_PWR; + } + writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; + + if(rf == 0) + RegOffset = RegOffset_A[index]; + else + RegOffset = RegOffset_B[index]; + + PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); + //RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal)); + + // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. + if(((pHalData->rf_type == RF_2T2R) && + (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| + ((pHalData->rf_type != RF_2T2R) && + (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) + { + writeVal = pwr_val[3]; + if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) + RegOffset = 0xc90; + if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) + RegOffset = 0xc98; + for(i=0; i<3; i++) + { + if(i!=2) + writeVal = (writeVal>8)?(writeVal-8):0; + else + writeVal = (writeVal>6)?(writeVal-6):0; + rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); + } + } + } +} +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetOFDMTxPower + * + * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for + * different channel and read original value in TX power register area from + * 0xe00. We increase offset and original value to be correct tx pwr. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/05/2008 MHC Simulate 8192 series method. + * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to + * A/B pwr difference or legacy/HT pwr diff. + * 2. We concern with path B legacy/HT OFDM difference. + * 01/22/2009 MHC Support new EPRO format from SD3. + * + *---------------------------------------------------------------------------*/ +VOID +rtl8192c_PHY_RF6052SetOFDMTxPower( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 writeVal[2], powerBase0[2], powerBase1[2]; + u8 index = 0; + + getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]); + + for(index=0; index<6; index++) + { + getTxPowerWriteValByRegulatory(Adapter, Channel, index, + &powerBase0[0], &powerBase1[0], &writeVal[0]); + + writeOFDMPowerReg(Adapter, index, &writeVal[0]); + } + +} + + +static VOID +phy_RF6052_Config_HardCode( + IN PADAPTER Adapter + ) +{ + + // Set Default Bandwidth to 20M + //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); + + // TODO: Set Default Channel to channel one for RTL8225 + +} + +static int +phy_RF6052_Config_ParaFile( + IN PADAPTER Adapter + ) +{ + u32 u4RegValue; + u8 eRFPath; + BB_REGISTER_DEFINITION_T *pPhyReg; + + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + static char sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A; + static char sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B; +#ifdef CONFIG_USB_HCI + static char sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard; + static char sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard; + static char sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP; +#endif + static char sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A; + static char sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B; + static char sz8723RadioAFile[] = RTL8723_PHY_RADIO_A; + static char sz8723RadioBFile[] = RTL8723_PHY_RADIO_B; + char *pszRadioAFile, *pszRadioBFile; + + + if(IS_HARDWARE_TYPE_8192C(Adapter)) + { + if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA is different from 92c's + { + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + pszRadioAFile = sz92CRadioAFile; + pszRadioBFile = sz92CRadioBFile; + } + else + { + rtStatus = _FAIL; + return rtStatus; + } + } + else + { + if(IS_NORMAL_CHIP(pHalData->VersionID)) + { + pszRadioAFile = sz88CRadioAFile; + pszRadioBFile = sz88CRadioBFile; +#ifdef CONFIG_USB_HCI + if( BOARD_MINICARD == pHalData->BoardType) + { + pszRadioAFile = sz88CRadioAFile_mCard; + pszRadioBFile = sz88CRadioBFile_mCard; + } + else if( BOARD_USB_High_PA == pHalData->BoardType) + { + pszRadioAFile = sz88CRadioAFile_HP; + } +#endif + } + else + { + rtStatus = _FAIL; + return rtStatus; + } + } + } + else if(IS_HARDWARE_TYPE_8723(Adapter)) + { + pszRadioAFile = sz8723RadioAFile; + pszRadioBFile = sz8723RadioBFile; + } + + //3//----------------------------------------------------------------- + //3// <2> Initialize RF + //3//----------------------------------------------------------------- + //for(eRFPath = RF90_PATH_A; eRFPath NumTotalRFPath; eRFPath++) + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { + + pPhyReg = &pHalData->PHYRegDef[eRFPath]; + + /*----Store original RFENV control type----*/ + switch(eRFPath) + { + case RF90_PATH_A: + case RF90_PATH_C: + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); + break; + case RF90_PATH_B : + case RF90_PATH_D: + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); + break; + } + + /*----Set RF_ENV enable----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); + rtw_udelay_os(1);//PlatformStallExecution(1); + + /*----Set RF_ENV output high----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); + rtw_udelay_os(1);//PlatformStallExecution(1); + + /* Set bit number of Address and Data for RF register */ + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 + rtw_udelay_os(1);//PlatformStallExecution(1); + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 + rtw_udelay_os(1);//PlatformStallExecution(1); + + /*----Initialize RF fom connfiguration file----*/ + switch(eRFPath) + { + case RF90_PATH_A: +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath); +#else + rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF90_RADIO_PATH_E)eRFPath); +#endif + break; + case RF90_PATH_B: +#ifdef CONFIG_EMBEDDED_FWIMG + rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath); +#else + rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF90_RADIO_PATH_E)eRFPath); +#endif + break; + case RF90_PATH_C: + break; + case RF90_PATH_D: + break; + } + + /*----Restore RFENV control type----*/; + switch(eRFPath) + { + case RF90_PATH_A: + case RF90_PATH_C: + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); + break; + case RF90_PATH_B : + case RF90_PATH_D: + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); + break; + } + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); + goto phy_RF6052_Config_ParaFile_Fail; + } + + } + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); + return rtStatus; + +phy_RF6052_Config_ParaFile_Fail: + return rtStatus; +} + + +int +PHY_RF6052_Config8192C( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // + // Initialize general global value + // + // TODO: Extend RF_PATH_C and RF_PATH_D in the future + if(pHalData->rf_type == RF_1T1R) + pHalData->NumTotalRFPath = 1; + else + pHalData->NumTotalRFPath = 2; + + // + // Config BB and RF + // + rtStatus = phy_RF6052_Config_ParaFile(Adapter); +#if 0 + switch( Adapter->MgntInfo.bRegHwParaFile ) + { + case 0: + phy_RF6052_Config_HardCode(Adapter); + break; + + case 1: + rtStatus = phy_RF6052_Config_ParaFile(Adapter); + break; + + case 2: + // Partial Modify. + phy_RF6052_Config_HardCode(Adapter); + phy_RF6052_Config_ParaFile(Adapter); + break; + + default: + phy_RF6052_Config_HardCode(Adapter); + break; + } +#endif + return rtStatus; + +} + + +// +// ==> RF shadow Operation API Code Section!!! +// +/*----------------------------------------------------------------------------- + * Function: PHY_RFShadowRead + * PHY_RFShadowWrite + * PHY_RFShadowCompare + * PHY_RFShadowRecorver + * PHY_RFShadowCompareAll + * PHY_RFShadowRecorverAll + * PHY_RFShadowCompareFlagSet + * PHY_RFShadowRecorverFlagSet + * + * Overview: When we set RF register, we must write shadow at first. + * When we are running, we must compare shadow abd locate error addr. + * Decide to recorver or not. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/20/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +u32 +PHY_RFShadowRead( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + return RF_Shadow[eRFPath][Offset].Value; + +} /* PHY_RFShadowRead */ + + +VOID +PHY_RFShadowWrite( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data) +{ + RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); + RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; + +} /* PHY_RFShadowWrite */ + + +BOOLEAN +PHY_RFShadowCompare( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + u32 reg; + // Check if we need to check the register + if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) + { + reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); + // Compare shadow and real rf register for 20bits!! + if (RF_Shadow[eRFPath][Offset].Value != reg) + { + // Locate error position. + RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", + //eRFPath, Offset, reg)); + } + return RF_Shadow[eRFPath][Offset].ErrorOrNot ; + } + return _FALSE; +} /* PHY_RFShadowCompare */ + + +VOID +PHY_RFShadowRecorver( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + // Check if the address is error + if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) + { + // Check if we need to recorver the register. + if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) + { + PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, + RF_Shadow[eRFPath][Offset].Value); + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", + //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); + } + } + +} /* PHY_RFShadowRecorver */ + + +VOID +PHY_RFShadowCompareAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + PHY_RFShadowCompare(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset); + } + } + +} /* PHY_RFShadowCompareAll */ + + +VOID +PHY_RFShadowRecorverAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + PHY_RFShadowRecorver(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset); + } + } + +} /* PHY_RFShadowRecorverAll */ + + +VOID +PHY_RFShadowCompareFlagSet( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u8 Type) +{ + // Set True or False!!! + RF_Shadow[eRFPath][Offset].Compare = Type; + +} /* PHY_RFShadowCompareFlagSet */ + + +VOID +PHY_RFShadowRecorverFlagSet( + IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u8 Type) +{ + // Set True or False!!! + RF_Shadow[eRFPath][Offset].Recorver= Type; + +} /* PHY_RFShadowRecorverFlagSet */ + + +VOID +PHY_RFShadowCompareFlagSetAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! + if (Offset != 0x26 && Offset != 0x27) + PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE); + else + PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE); + } + } + +} /* PHY_RFShadowCompareFlagSetAll */ + + +VOID +PHY_RFShadowRecorverFlagSetAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! + if (Offset != 0x26 && Offset != 0x27) + PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE); + else + PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE); + } + } + +} /* PHY_RFShadowCompareFlagSetAll */ + +VOID +PHY_RFShadowRefresh( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + RF_Shadow[eRFPath][Offset].Value = 0; + RF_Shadow[eRFPath][Offset].Compare = _FALSE; + RF_Shadow[eRFPath][Offset].Recorver = _FALSE; + RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; + RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; + } + } + +} /* PHY_RFShadowRead */ + +/* End of HalRf6052.c */ + diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c old mode 100755 new mode 100644 index 3f9adb5649993b..e2817f3f1e132a --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c @@ -1,293 +1,293 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#include -#include -#ifdef DBG_CONFIG_ERROR_DETECT -extern void rtw_cancel_all_timer(_adapter *padapter); - -void rtl8192c_sreset_init_value(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - _rtw_mutex_init(&psrtpriv->silentreset_mutex ); - psrtpriv->silent_reset_inprogress = _FALSE; - psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; - psrtpriv->last_tx_time =0; - psrtpriv->last_tx_complete_time =0; -} -void rtl8192c_sreset_reset_value(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - psrtpriv->silent_reset_inprogress = _FALSE; - psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; - psrtpriv->last_tx_time =0; - psrtpriv->last_tx_complete_time =0; -} - -static void _restore_security_setting(_adapter *padapter) -{ - u8 EntryId = 0; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct sta_priv * pstapriv = &padapter->stapriv; - struct sta_info *psta; - struct security_priv* psecuritypriv=&(padapter->securitypriv); - struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; - - (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) - ? rtw_write8(padapter, REG_SECCFG, 0xcc) - : rtw_write8(padapter, REG_SECCFG, 0xcf); - - if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || - ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) - { - - for(EntryId=0; EntryId<4; EntryId++) - { - if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) - rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1); - else - rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0); - } - - } - else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || - (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) - { - psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); - if (psta == NULL) { - //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); - } - else - { - //pairwise key - rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); - //group key - rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0); - } - } - -} - -static void _restore_network_status(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); - unsigned short caps; - u8 join_type; -#if 1 - - //======================================================= - // reset related register of Beacon control - - //set MSR to nolink - Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); - // reject all data frame - rtw_write16(padapter, REG_RXFLTMAP2,0x00); - //reset TSF - rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); - - //disable update TSF - if(IS_NORMAL_CHIP(pHalData->VersionID)) - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); - else - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)|BIT(5)); - - //======================================================= - rtw_joinbss_reset(padapter); - set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); - //pmlmeinfo->assoc_AP_vendor = maxAP; - - if (padapter->registrypriv.wifi_spec) { - // for WiFi test, follow WMM test plan spec - rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C); - rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C); - rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525); - rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549); - - // for WiFi test, mixed mode with intel STA under bg mode throughput issue - if (padapter->mlmepriv.htpriv.ht_option == 0) - rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320); - - } else { - rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217); - rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317); - rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320); - rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444); - } - - //disable dynamic functions, such as high power, DIG - //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); -#endif - - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); - join_type = 0; - padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); - - Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3)); - - mlmeext_joinbss_event_callback(padapter, 1); - //restore Sequence No. - rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn); -} -void rtl8192c_silentreset_for_specific_platform(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - _irqL irqL; - -#ifdef DBG_CONFIG_ERROR_RESET - - DBG_871X("%s\n", __FUNCTION__); - - psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; - - if (!netif_queue_stopped(padapter->pnetdev)) - netif_stop_queue(padapter->pnetdev); - - rtw_cancel_all_timer(padapter); - tasklet_kill(&pxmitpriv->xmit_tasklet); - - _enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL); - psrtpriv->silent_reset_inprogress = _TRUE; - pwrpriv->change_rfpwrstate = rf_off; -#ifdef CONFIG_IPS - ips_enter(padapter); - ips_leave(padapter); -#endif - if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - _restore_network_status(padapter); - _restore_security_setting(padapter); - } - - _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING); - - psrtpriv->silent_reset_inprogress = _FALSE; - _exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL); - - tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); - _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); - - if (netif_queue_stopped(padapter->pnetdev)) - netif_wake_queue(padapter->pnetdev); -#endif -} - -void rtl8192c_sreset_xmit_status_check(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - unsigned long current_time; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - unsigned int diff_time; - u32 txdma_status; - if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ - DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); - rtl8192c_silentreset_for_specific_platform(padapter); - } - - //total xmit irp = 4 - //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); - //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) - current_time = rtw_get_current_time(); - if(0==pxmitpriv->free_xmitbuf_cnt) - { - diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time); - - if(diff_time > 2000){ - if(psrtpriv->last_tx_complete_time==0){ - psrtpriv->last_tx_complete_time = current_time; - } - else{ - diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time); - if(diff_time > 4000){ - //padapter->Wifi_Error_Status = WIFI_TX_HANG; - DBG_8192C("%s tx hang\n", __FUNCTION__); - rtl8192c_silentreset_for_specific_platform(padapter); - } - } - } - } -} -void rtl8192c_sreset_linked_status_check(_adapter *padapter) -{ - u32 regc50,regc58,reg824,reg800; - regc50 = rtw_read32(padapter,0xc50); - regc58 = rtw_read32(padapter,0xc58); - reg824 = rtw_read32(padapter,0x824); - reg800 = rtw_read32(padapter,0x800); - if( ((regc50&0xFFFFFF00)!= 0x69543400)|| - ((regc58&0xFFFFFF00)!= 0x69543400)|| - (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| - ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) - { - DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, - regc50, regc58, reg824, reg800); - rtl8192c_silentreset_for_specific_platform(padapter); - } -} - -#ifdef DBG_CONFIG_ERROR_DETECT -u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - u8 status = WIFI_STATUS_SUCCESS; - u32 val32 = 0; - _irqL irqL; - if(psrtpriv->silent_reset_inprogress == _TRUE) - { - return status; - } - val32 =rtw_read32(padapter,REG_TXDMA_STATUS); - if(val32==0xeaeaeaea){ - psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; - } - else if(val32!=0){ - DBG_8192C("txdmastatu(%x)\n",val32); - psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; - } - - if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) - { - DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); - status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); - } - DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); - - //status restore - psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; - - return status; -} -#endif - -#endif +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#include +#include +#ifdef DBG_CONFIG_ERROR_DETECT +extern void rtw_cancel_all_timer(_adapter *padapter); + +void rtl8192c_sreset_init_value(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + _rtw_mutex_init(&psrtpriv->silentreset_mutex ); + psrtpriv->silent_reset_inprogress = _FALSE; + psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; + psrtpriv->last_tx_time =0; + psrtpriv->last_tx_complete_time =0; +} +void rtl8192c_sreset_reset_value(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + psrtpriv->silent_reset_inprogress = _FALSE; + psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; + psrtpriv->last_tx_time =0; + psrtpriv->last_tx_complete_time =0; +} + +static void _restore_security_setting(_adapter *padapter) +{ + u8 EntryId = 0; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct sta_priv * pstapriv = &padapter->stapriv; + struct sta_info *psta; + struct security_priv* psecuritypriv=&(padapter->securitypriv); + struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; + + (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) + ? rtw_write8(padapter, REG_SECCFG, 0xcc) + : rtw_write8(padapter, REG_SECCFG, 0xcf); + + if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || + ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) + { + + for(EntryId=0; EntryId<4; EntryId++) + { + if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) + rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1); + else + rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0); + } + + } + else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || + (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) + { + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); + if (psta == NULL) { + //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); + } + else + { + //pairwise key + rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); + //group key + rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0); + } + } + +} + +static void _restore_network_status(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); + unsigned short caps; + u8 join_type; +#if 1 + + //======================================================= + // reset related register of Beacon control + + //set MSR to nolink + Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); + // reject all data frame + rtw_write16(padapter, REG_RXFLTMAP2,0x00); + //reset TSF + rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); + + //disable update TSF + if(IS_NORMAL_CHIP(pHalData->VersionID)) + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); + else + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)|BIT(5)); + + //======================================================= + rtw_joinbss_reset(padapter); + set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); + //pmlmeinfo->assoc_AP_vendor = maxAP; + + if (padapter->registrypriv.wifi_spec) { + // for WiFi test, follow WMM test plan spec + rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C); + rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C); + rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525); + rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549); + + // for WiFi test, mixed mode with intel STA under bg mode throughput issue + if (padapter->mlmepriv.htpriv.ht_option == 0) + rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320); + + } else { + rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217); + rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317); + rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320); + rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444); + } + + //disable dynamic functions, such as high power, DIG + //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); +#endif + + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); + join_type = 0; + padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); + + Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3)); + + mlmeext_joinbss_event_callback(padapter, 1); + //restore Sequence No. + rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn); +} +void rtl8192c_silentreset_for_specific_platform(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + _irqL irqL; + +#ifdef DBG_CONFIG_ERROR_RESET + + DBG_871X("%s\n", __FUNCTION__); + + psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; + + if (!netif_queue_stopped(padapter->pnetdev)) + netif_stop_queue(padapter->pnetdev); + + rtw_cancel_all_timer(padapter); + tasklet_kill(&pxmitpriv->xmit_tasklet); + + _enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL); + psrtpriv->silent_reset_inprogress = _TRUE; + pwrpriv->change_rfpwrstate = rf_off; +#ifdef CONFIG_IPS + ips_enter(padapter); + ips_leave(padapter); +#endif + if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + _restore_network_status(padapter); + _restore_security_setting(padapter); + } + + _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING); + + psrtpriv->silent_reset_inprogress = _FALSE; + _exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL); + + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); + _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); + + if (netif_queue_stopped(padapter->pnetdev)) + netif_wake_queue(padapter->pnetdev); +#endif +} + +void rtl8192c_sreset_xmit_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + unsigned long current_time; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + unsigned int diff_time; + u32 txdma_status; + if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ + DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); + rtl8192c_silentreset_for_specific_platform(padapter); + } + + //total xmit irp = 4 + //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); + //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) + current_time = rtw_get_current_time(); + if(0==pxmitpriv->free_xmitbuf_cnt) + { + diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time); + + if(diff_time > 2000){ + if(psrtpriv->last_tx_complete_time==0){ + psrtpriv->last_tx_complete_time = current_time; + } + else{ + diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time); + if(diff_time > 4000){ + //padapter->Wifi_Error_Status = WIFI_TX_HANG; + DBG_8192C("%s tx hang\n", __FUNCTION__); + rtl8192c_silentreset_for_specific_platform(padapter); + } + } + } + } +} +void rtl8192c_sreset_linked_status_check(_adapter *padapter) +{ + u32 regc50,regc58,reg824,reg800; + regc50 = rtw_read32(padapter,0xc50); + regc58 = rtw_read32(padapter,0xc58); + reg824 = rtw_read32(padapter,0x824); + reg800 = rtw_read32(padapter,0x800); + if( ((regc50&0xFFFFFF00)!= 0x69543400)|| + ((regc58&0xFFFFFF00)!= 0x69543400)|| + (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| + ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) + { + DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, + regc50, regc58, reg824, reg800); + rtl8192c_silentreset_for_specific_platform(padapter); + } +} + +#ifdef DBG_CONFIG_ERROR_DETECT +u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + u8 status = WIFI_STATUS_SUCCESS; + u32 val32 = 0; + _irqL irqL; + if(psrtpriv->silent_reset_inprogress == _TRUE) + { + return status; + } + val32 =rtw_read32(padapter,REG_TXDMA_STATUS); + if(val32==0xeaeaeaea){ + psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; + } + else if(val32!=0){ + DBG_8192C("txdmastatu(%x)\n",val32); + psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; + } + + if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) + { + DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); + status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); + } + DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); + + //status restore + psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; + + return status; +} +#endif + +#endif diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c old mode 100755 new mode 100644 index 23969fc1cf4b20..1615b5d42fa09a --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c @@ -1,9662 +1,9662 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -/*Created on 2011/ 6/15, 5:45*/ - -#include -#include "Hal8192CUHWImg.h" - -#ifdef CONFIG_BT_COEXISTENCE -// =================== v79 TSMC COMMON 2011-10-06 ======================= -u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { -0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x02,0x58,0x3f,0x00,0x00, -0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 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=================== v80 TSMC COMMON 2011-12-14 ======================= -u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { -0xc1,0x88,0x02,0x00,0x50,0x00,0x00,0x00,0x12,0x14,0x15,0x52,0xd4,0x3e,0x00,0x00, -0x25,0x86,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x02,0x48,0x79,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x02,0x5e,0xff,0x00,0x00,0x00,0x00,0x00,0xa1,0xd4,0x00,0x00,0x00, -0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, -0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, -0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, 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-0x90,0x97,0x97,0xe0,0x90,0x97,0x2d,0xf0,0x22,0x8f,0x1b,0x8c,0x1c,0x8d,0x1d,0x22, -0x8f,0x1e,0x8c,0x1f,0x8d,0x20,0x22,0x12,0x1c,0xd6,0xf5,0x64,0x22,0x22,0x52,0x09, -}; - -u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength] = { -0x024,0x0011800f, -0x028,0x00ffdb83, -0x800,0x80040002, -0x804,0x00000003, -0x808,0x0000fc00, -0x80c,0x0000000a, -0x810,0x10005388, -0x814,0x020c3d10, -0x818,0x02200385, -0x81c,0x00000000, -0x820,0x01000100, -0x824,0x00390004, -0x828,0x01000100, -0x82c,0x00390004, -0x830,0x27272727, -0x834,0x27272727, -0x838,0x27272727, -0x83c,0x27272727, -0x840,0x00010000, -0x844,0x00010000, -0x848,0x27272727, -0x84c,0x27272727, -0x850,0x00000000, -0x854,0x00000000, -0x858,0x569a569a, -0x85c,0x0c1b25a4, -0x860,0x66e60230, -0x864,0x061f0130, -0x868,0x27272727, -0x86c,0x2b2b2b27, -0x870,0x07000700, -0x874,0x22184000, -0x878,0x08080808, -0x87c,0x00000000, -0x880,0xc0083070, -0x884,0x000004d5, -0x888,0x00000000, -0x88c,0xcc0000c0, -0x890,0x00000800, -0x894,0xfffffffe, -0x898,0x40302010, -0x89c,0x00706050, -0x900,0x00000000, -0x904,0x00000023, -0x908,0x00000000, -0x90c,0x81121313, -0xa00,0x00d047c8, -0xa04,0x80ff000c, -0xa08,0x8c838300, -0xa0c,0x2e68120f, -0xa10,0x9500bb78, -0xa14,0x11144028, -0xa18,0x00881117, -0xa1c,0x89140f00, -0xa20,0x1a1b0000, -0xa24,0x090e1317, -0xa28,0x00000204, -0xa2c,0x00d30000, -0xa70,0x101fbf00, -0xa74,0x00000007, -0xc00,0x48071d40, -0xc04,0x03a05633, -0xc08,0x000000e4, -0xc0c,0x6c6c6c6c, -0xc10,0x08800000, -0xc14,0x40000100, -0xc18,0x08800000, -0xc1c,0x40000100, -0xc20,0x00000000, -0xc24,0x00000000, -0xc28,0x00000000, -0xc2c,0x00000000, -0xc30,0x69e9ac44, -0xc34,0x469652cf, -0xc38,0x49795994, -0xc3c,0x0a97971c, -0xc40,0x1f7c403f, -0xc44,0x000100b7, -0xc48,0xec020107, -0xc4c,0x007f037f, -0xc50,0x6954341e, -0xc54,0x43bc0094, -0xc58,0x6954341e, -0xc5c,0x433c0094, -0xc60,0x00000000, -0xc64,0x5116848b, -0xc68,0x47c00bff, -0xc6c,0x00000036, -0xc70,0x2c7f000d, -0xc74,0x0186115b, -0xc78,0x0000001f, -0xc7c,0x00b99612, -0xc80,0x40000100, -0xc84,0x20f60000, -0xc88,0x40000100, -0xc8c,0x20200000, -0xc90,0x00121820, -0xc94,0x00000000, -0xc98,0x00121820, -0xc9c,0x00007f7f, -0xca0,0x00000000, -0xca4,0x00000080, -0xca8,0x00000000, -0xcac,0x00000000, -0xcb0,0x00000000, -0xcb4,0x00000000, -0xcb8,0x00000000, -0xcbc,0x28000000, -0xcc0,0x00000000, -0xcc4,0x00000000, -0xcc8,0x00000000, -0xccc,0x00000000, -0xcd0,0x00000000, -0xcd4,0x00000000, -0xcd8,0x64b22427, -0xcdc,0x00766932, -0xce0,0x00222222, -0xce4,0x00000000, -0xce8,0x37644302, -0xcec,0x2f97d40c, -0xd00,0x00080740, -0xd04,0x00020403, -0xd08,0x0000907f, -0xd0c,0x20010201, -0xd10,0xa0633333, -0xd14,0x3333bc43, -0xd18,0x7a8f5b6b, -0xd2c,0xcc979975, -0xd30,0x00000000, -0xd34,0x80608000, -0xd38,0x00000000, -0xd3c,0x00027293, -0xd40,0x00000000, -0xd44,0x00000000, -0xd48,0x00000000, -0xd4c,0x00000000, -0xd50,0x6437140a, -0xd54,0x00000000, -0xd58,0x00000000, -0xd5c,0x30032064, -0xd60,0x4653de68, -0xd64,0x04518a3c, -0xd68,0x00002101, -0xd6c,0x2a201c16, -0xd70,0x1812362e, -0xd74,0x322c2220, -0xd78,0x000e3c24, -0xe00,0x2a2a2a2a, -0xe04,0x2a2a2a2a, -0xe08,0x03902a2a, -0xe10,0x2a2a2a2a, -0xe14,0x2a2a2a2a, -0xe18,0x2a2a2a2a, -0xe1c,0x2a2a2a2a, -0xe28,0x00000000, -0xe30,0x1000dc1f, -0xe34,0x10008c1f, -0xe38,0x02140102, -0xe3c,0x681604c2, -0xe40,0x01007c00, -0xe44,0x01004800, -0xe48,0xfb000000, -0xe4c,0x000028d1, -0xe50,0x1000dc1f, -0xe54,0x10008c1f, -0xe58,0x02140102, -0xe5c,0x28160d05, -0xe60,0x00000010, -0xe68,0x001b25a4, -0xe6c,0x63db25a4, -0xe70,0x63db25a4, -0xe74,0x0c1b25a4, -0xe78,0x0c1b25a4, -0xe7c,0x0c1b25a4, -0xe80,0x0c1b25a4, -0xe84,0x63db25a4, -0xe88,0x0c1b25a4, -0xe8c,0x63db25a4, -0xed0,0x63db25a4, -0xed4,0x63db25a4, -0xed8,0x63db25a4, -0xedc,0x001b25a4, -0xee0,0x001b25a4, -0xeec,0x6fdb25a4, -0xf14,0x00000003, -0xf4c,0x00000000, -0xf00,0x00000300, -}; - -u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength] = { -0x024,0x0011800f, -0x028,0x00ffdb83, -0x800,0x80040000, -0x804,0x00000001, -0x808,0x0000fc00, -0x80c,0x0000000a, -0x810,0x10005388, -0x814,0x020c3d10, -0x818,0x02200385, -0x81c,0x00000000, -0x820,0x01000100, -0x824,0x00390004, -0x828,0x00000000, -0x82c,0x00000000, -0x830,0x00000000, -0x834,0x00000000, -0x838,0x00000000, -0x83c,0x00000000, -0x840,0x00010000, -0x844,0x00000000, -0x848,0x00000000, -0x84c,0x00000000, -0x850,0x00000000, -0x854,0x00000000, -0x858,0x569a569a, -0x85c,0x001b25a4, -0x860,0x66e60230, -0x864,0x061f0130, -0x868,0x00000000, -0x86c,0x32323200, -0x870,0x07000700, -0x874,0x22004000, -0x878,0x00000808, -0x87c,0x00000000, -0x880,0xc0083070, -0x884,0x000004d5, -0x888,0x00000000, -0x88c,0xccc000c0, -0x890,0x00000800, -0x894,0xfffffffe, -0x898,0x40302010, -0x89c,0x00706050, -0x900,0x00000000, -0x904,0x00000023, -0x908,0x00000000, -0x90c,0x81121111, -0xa00,0x00d047c8, -0xa04,0x80ff000c, -0xa08,0x8c838300, -0xa0c,0x2e68120f, -0xa10,0x9500bb78, -0xa14,0x11144028, -0xa18,0x00881117, -0xa1c,0x89140f00, -0xa20,0x1a1b0000, -0xa24,0x090e1317, -0xa28,0x00000204, -0xa2c,0x00d30000, -0xa70,0x101fbf00, -0xa74,0x00000007, -0xc00,0x48071d40, -0xc04,0x03a05611, -0xc08,0x000000e4, -0xc0c,0x6c6c6c6c, -0xc10,0x08800000, -0xc14,0x40000100, -0xc18,0x08800000, -0xc1c,0x40000100, -0xc20,0x00000000, -0xc24,0x00000000, -0xc28,0x00000000, -0xc2c,0x00000000, -0xc30,0x69e9ac44, -0xc34,0x469652cf, -0xc38,0x49795994, -0xc3c,0x0a97971c, -0xc40,0x1f7c403f, -0xc44,0x000100b7, -0xc48,0xec020107, -0xc4c,0x007f037f, -0xc50,0x6954341e, -0xc54,0x43bc0094, -0xc58,0x6954341e, -0xc5c,0x433c0094, -0xc60,0x00000000, -0xc64,0x5116848b, -0xc68,0x47c00bff, -0xc6c,0x00000036, -0xc70,0x2c7f000d, -0xc74,0x018610db, -0xc78,0x0000001f, -0xc7c,0x00b91612, -0xc80,0x40000100, -0xc84,0x20f60000, -0xc88,0x40000100, -0xc8c,0x20200000, -0xc90,0x00121820, -0xc94,0x00000000, -0xc98,0x00121820, -0xc9c,0x00007f7f, -0xca0,0x00000000, -0xca4,0x00000080, -0xca8,0x00000000, -0xcac,0x00000000, -0xcb0,0x00000000, -0xcb4,0x00000000, -0xcb8,0x00000000, -0xcbc,0x28000000, -0xcc0,0x00000000, -0xcc4,0x00000000, -0xcc8,0x00000000, -0xccc,0x00000000, -0xcd0,0x00000000, -0xcd4,0x00000000, -0xcd8,0x64b22427, -0xcdc,0x00766932, -0xce0,0x00222222, -0xce4,0x00000000, -0xce8,0x37644302, -0xcec,0x2f97d40c, -0xd00,0x00080740, -0xd04,0x00020401, -0xd08,0x0000907f, -0xd0c,0x20010201, -0xd10,0xa0633333, -0xd14,0x3333bc43, -0xd18,0x7a8f5b6b, -0xd2c,0xcc979975, -0xd30,0x00000000, -0xd34,0x80608000, -0xd38,0x00000000, -0xd3c,0x00027293, -0xd40,0x00000000, -0xd44,0x00000000, -0xd48,0x00000000, -0xd4c,0x00000000, -0xd50,0x6437140a, -0xd54,0x00000000, -0xd58,0x00000000, -0xd5c,0x30032064, -0xd60,0x4653de68, -0xd64,0x04518a3c, -0xd68,0x00002101, -0xd6c,0x2a201c16, -0xd70,0x1812362e, -0xd74,0x322c2220, -0xd78,0x000e3c24, -0xe00,0x2a2a2a2a, -0xe04,0x2a2a2a2a, -0xe08,0x03902a2a, -0xe10,0x2a2a2a2a, -0xe14,0x2a2a2a2a, -0xe18,0x2a2a2a2a, -0xe1c,0x2a2a2a2a, -0xe28,0x00000000, -0xe30,0x1000dc1f, -0xe34,0x10008c1f, -0xe38,0x02140102, -0xe3c,0x681604c2, -0xe40,0x01007c00, -0xe44,0x01004800, -0xe48,0xfb000000, -0xe4c,0x000028d1, -0xe50,0x1000dc1f, -0xe54,0x10008c1f, -0xe58,0x02140102, -0xe5c,0x28160d05, -0xe60,0x00000008, -0xe68,0x001b25a4, -0xe6c,0x631b25a0, -0xe70,0x631b25a0, -0xe74,0x081b25a0, -0xe78,0x081b25a0, -0xe7c,0x081b25a0, -0xe80,0x081b25a0, -0xe84,0x631b25a0, -0xe88,0x081b25a0, -0xe8c,0x631b25a0, -0xed0,0x631b25a0, -0xed4,0x631b25a0, -0xed8,0x631b25a0, -0xedc,0x001b25a0, -0xee0,0x001b25a0, -0xeec,0x6b1b25a0, -0xf14,0x00000003, -0xf4c,0x00000000, -0xf00,0x00000300, -}; - -u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = { -0x0, }; - -u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = { -0x0, }; - -u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = { -0x0, }; - -u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = { -0xe00,0xffffffff,0x07090c0c, -0xe04,0xffffffff,0x01020405, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x0b0c0c0e, -0xe14,0xffffffff,0x01030506, -0xe18,0xffffffff,0x0b0c0d0e, -0xe1c,0xffffffff,0x01030509, -0x830,0xffffffff,0x07090c0c, -0x834,0xffffffff,0x01020405, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x0b0c0d0e, -0x848,0xffffffff,0x01030509, -0x84c,0xffffffff,0x0b0c0d0e, -0x868,0xffffffff,0x01030509, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x04040404, -0xe04,0xffffffff,0x00020204, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x06060606, -0xe14,0xffffffff,0x00020406, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x04040404, -0x834,0xffffffff,0x00020204, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x06060606, -0x848,0xffffffff,0x00020406, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x04040404, -0xe04,0xffffffff,0x00020204, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x04040404, -0x834,0xffffffff,0x00020204, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -}; - -u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength] = { -0xe00,0xffffffff,0x0a0c0c0c, -0xe04,0xffffffff,0x02040608, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x0a0c0d0e, -0xe14,0xffffffff,0x02040608, -0xe18,0xffffffff,0x0a0c0d0e, -0xe1c,0xffffffff,0x02040608, -0x830,0xffffffff,0x0a0c0c0c, -0x834,0xffffffff,0x02040608, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x0a0c0d0e, -0x848,0xffffffff,0x02040608, -0x84c,0xffffffff,0x0a0c0d0e, -0x868,0xffffffff,0x02040608, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x04040404, -0xe04,0xffffffff,0x00020204, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x06060606, -0xe14,0xffffffff,0x00020406, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x04040404, -0x834,0xffffffff,0x00020204, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x06060606, -0x848,0xffffffff,0x00020406, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x04040404, -0xe04,0xffffffff,0x00020204, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x04040404, -0x834,0xffffffff,0x00020204, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -}; - -u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength] = { -0xc30,0x69e9ac4a, -0xc3c,0x0a979718, -}; - -u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength] = { -0x024,0x0011800f, -0x028,0x00ffdb83, -0x040,0x000c0004, -0x800,0x80040000, -0x804,0x00000001, -0x808,0x0000fc00, -0x80c,0x0000000a, -0x810,0x10005388, -0x814,0x020c3d10, -0x818,0x02200385, -0x81c,0x00000000, -0x820,0x01000100, -0x824,0x00390204, -0x828,0x00000000, -0x82c,0x00000000, -0x830,0x00000000, -0x834,0x00000000, -0x838,0x00000000, -0x83c,0x00000000, -0x840,0x00010000, -0x844,0x00000000, -0x848,0x00000000, -0x84c,0x00000000, -0x850,0x00000000, -0x854,0x00000000, -0x858,0x569a569a, -0x85c,0x001b25a4, -0x860,0x66e60230, -0x864,0x061f0130, -0x868,0x00000000, -0x86c,0x20202000, -0x870,0x03000300, -0x874,0x22004000, -0x878,0x00000808, -0x87c,0x00ffc3f1, -0x880,0xc0083070, -0x884,0x000004d5, -0x888,0x00000000, -0x88c,0xccc000c0, -0x890,0x00000800, -0x894,0xfffffffe, -0x898,0x40302010, -0x89c,0x00706050, -0x900,0x00000000, -0x904,0x00000023, -0x908,0x00000000, -0x90c,0x81121111, -0xa00,0x00d047c8, -0xa04,0x80ff000c, -0xa08,0x8c838300, -0xa0c,0x2e68120f, -0xa10,0x9500bb78, -0xa14,0x11144028, -0xa18,0x00881117, -0xa1c,0x89140f00, -0xa20,0x15160000, -0xa24,0x070b0f12, -0xa28,0x00000104, -0xa2c,0x00d30000, -0xa70,0x101fbf00, -0xa74,0x00000007, -0xc00,0x48071d40, -0xc04,0x03a05611, -0xc08,0x000000e4, -0xc0c,0x6c6c6c6c, -0xc10,0x08800000, -0xc14,0x40000100, -0xc18,0x08800000, -0xc1c,0x40000100, -0xc20,0x00000000, -0xc24,0x00000000, -0xc28,0x00000000, -0xc2c,0x00000000, -0xc30,0x69e9ac44, -0xc34,0x469652cf, -0xc38,0x49795994, -0xc3c,0x0a97971c, -0xc40,0x1f7c403f, -0xc44,0x000100b7, -0xc48,0xec020107, -0xc4c,0x007f037f, -0xc50,0x6954342e, -0xc54,0x43bc0094, -0xc58,0x6954342f, -0xc5c,0x433c0094, -0xc60,0x00000000, -0xc64,0x5116848b, -0xc68,0x47c00bff, -0xc6c,0x00000036, -0xc70,0x2c46000d, -0xc74,0x018610db, -0xc78,0x0000001f, -0xc7c,0x00b91612, -0xc80,0x24000090, -0xc84,0x20f60000, -0xc88,0x24000090, -0xc8c,0x20200000, -0xc90,0x00121820, -0xc94,0x00000000, -0xc98,0x00121820, -0xc9c,0x00007f7f, -0xca0,0x00000000, -0xca4,0x00000080, -0xca8,0x00000000, -0xcac,0x00000000, -0xcb0,0x00000000, -0xcb4,0x00000000, -0xcb8,0x00000000, -0xcbc,0x28000000, -0xcc0,0x00000000, -0xcc4,0x00000000, -0xcc8,0x00000000, -0xccc,0x00000000, -0xcd0,0x00000000, -0xcd4,0x00000000, -0xcd8,0x64b22427, -0xcdc,0x00766932, -0xce0,0x00222222, -0xce4,0x00000000, -0xce8,0x37644302, -0xcec,0x2f97d40c, -0xd00,0x00080740, -0xd04,0x00020401, -0xd08,0x0000907f, -0xd0c,0x20010201, -0xd10,0xa0633333, -0xd14,0x3333bc43, -0xd18,0x7a8f5b6b, -0xd2c,0xcc979975, -0xd30,0x00000000, -0xd34,0x80608000, -0xd38,0x00000000, -0xd3c,0x00027293, -0xd40,0x00000000, -0xd44,0x00000000, -0xd48,0x00000000, -0xd4c,0x00000000, -0xd50,0x6437140a, -0xd54,0x00000000, -0xd58,0x00000000, -0xd5c,0x30032064, -0xd60,0x4653de68, -0xd64,0x04518a3c, -0xd68,0x00002101, -0xd6c,0x2a201c16, -0xd70,0x1812362e, -0xd74,0x322c2220, -0xd78,0x000e3c24, -0xe00,0x24242424, -0xe04,0x24242424, -0xe08,0x03902024, -0xe10,0x24242424, -0xe14,0x24242424, -0xe18,0x24242424, -0xe1c,0x24242424, -0xe28,0x00000000, -0xe30,0x1000dc1f, -0xe34,0x10008c1f, -0xe38,0x02140102, -0xe3c,0x681604c2, -0xe40,0x01007c00, -0xe44,0x01004800, -0xe48,0xfb000000, -0xe4c,0x000028d1, -0xe50,0x1000dc1f, -0xe54,0x10008c1f, -0xe58,0x02140102, -0xe5c,0x28160d05, -0xe60,0x00000008, -0xe68,0x001b25a4, -0xe6c,0x631b25a0, -0xe70,0x631b25a0, -0xe74,0x081b25a0, -0xe78,0x081b25a0, -0xe7c,0x081b25a0, -0xe80,0x081b25a0, -0xe84,0x631b25a0, -0xe88,0x081b25a0, -0xe8c,0x631b25a0, -0xed0,0x631b25a0, -0xed4,0x631b25a0, -0xed8,0x631b25a0, -0xedc,0x001b25a0, -0xee0,0x001b25a0, -0xeec,0x6b1b25a0, -0xee8,0x31555448, -0xf14,0x00000003, -0xf4c,0x00000000, -0xf00,0x00000300, -}; - -u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength] = { -0x024,0x0011800d, -0x028,0x00ffdb83, -0x800,0x80040000, -0x804,0x00000001, -0x808,0x0000fc00, -0x80c,0x0000000a, -0x810,0x10005388, -0x814,0x020c3d10, -0x818,0x02200385, -0x81c,0x00000000, -0x820,0x01000100, -0x824,0x00390004, -0x828,0x00000000, -0x82c,0x00000000, -0x830,0x00000000, -0x834,0x00000000, -0x838,0x00000000, -0x83c,0x00000000, -0x840,0x00010000, -0x844,0x00000000, -0x848,0x00000000, -0x84c,0x00000000, -0x850,0x00000000, -0x854,0x00000000, -0x858,0x569a569a, -0x85c,0x001b25a4, -0x860,0x66e60230, -0x864,0x061f0130, -0x868,0x00000000, -0x86c,0x32323200, -0x870,0x07000700, -0x874,0x22004000, -0x878,0x00000808, -0x87c,0x00000000, -0x880,0xc0083070, -0x884,0x000004d5, -0x888,0x00000000, -0x88c,0xccc000c0, -0x890,0x00000800, -0x894,0xfffffffe, -0x898,0x40302010, -0x89c,0x00706050, -0x900,0x00000000, -0x904,0x00000023, -0x908,0x00000000, -0x90c,0x81121111, -0xa00,0x00d047c8, -0xa04,0x80ff000c, -0xa08,0x8c838300, -0xa0c,0x2e68120f, -0xa10,0x9500bb78, -0xa14,0x11144028, -0xa18,0x00881117, -0xa1c,0x89140f00, -0xa20,0x1a1b0000, -0xa24,0x090e1317, -0xa28,0x00000204, -0xa2c,0x00d30000, -0xa70,0x101fbf00, -0xa74,0x00000007, -0xc00,0x48071d40, -0xc04,0x03a05611, -0xc08,0x000000e4, -0xc0c,0x6c6c6c6c, -0xc10,0x08800000, -0xc14,0x40000100, -0xc18,0x08800000, -0xc1c,0x40000100, -0xc20,0x00000000, -0xc24,0x00000000, -0xc28,0x00000000, -0xc2c,0x00000000, -0xc30,0x69e9ac44, -0xc34,0x469652cf, -0xc38,0x49795994, -0xc3c,0x0a97971c, -0xc40,0x1f7c403f, -0xc44,0x000100b7, -0xc48,0xec020107, -0xc4c,0x007f037f, -0xc50,0x6954341e, -0xc54,0x43bc0094, -0xc58,0x6954341e, -0xc5c,0x433c0094, -0xc60,0x00000000, -0xc64,0x5116848b, -0xc68,0x47c00bff, -0xc6c,0x00000036, -0xc70,0x2c7f000d, -0xc74,0x018610db, -0xc78,0x0000001f, -0xc7c,0x00b91612, -0xc80,0x40000100, -0xc84,0x20f60000, -0xc88,0x40000100, -0xc8c,0x20200000, -0xc90,0x00121820, -0xc94,0x00000000, -0xc98,0x00121820, -0xc9c,0x00007f7f, -0xca0,0x00000000, -0xca4,0x00000080, -0xca8,0x00000000, -0xcac,0x00000000, -0xcb0,0x00000000, -0xcb4,0x00000000, -0xcb8,0x00000000, -0xcbc,0x28000000, -0xcc0,0x00000000, -0xcc4,0x00000000, -0xcc8,0x00000000, -0xccc,0x00000000, -0xcd0,0x00000000, -0xcd4,0x00000000, -0xcd8,0x64b22427, -0xcdc,0x00766932, -0xce0,0x00222222, -0xce4,0x00000000, -0xce8,0x37644302, -0xcec,0x2f97d40c, -0xd00,0x00080740, -0xd04,0x00020401, -0xd08,0x0000907f, -0xd0c,0x20010201, -0xd10,0xa0633333, -0xd14,0x3333bc43, -0xd18,0x7a8f5b6b, -0xd2c,0xcc979975, -0xd30,0x00000000, -0xd34,0x80608000, -0xd38,0x00000000, -0xd3c,0x00027293, -0xd40,0x00000000, -0xd44,0x00000000, -0xd48,0x00000000, -0xd4c,0x00000000, -0xd50,0x6437140a, -0xd54,0x00000000, -0xd58,0x00000000, -0xd5c,0x30032064, -0xd60,0x4653de68, -0xd64,0x04518a3c, -0xd68,0x00002101, -0xd6c,0x2a201c16, -0xd70,0x1812362e, -0xd74,0x322c2220, -0xd78,0x000e3c24, -0xe00,0x2a2a2a2a, -0xe04,0x2a2a2a2a, -0xe08,0x03902a2a, -0xe10,0x2a2a2a2a, -0xe14,0x2a2a2a2a, -0xe18,0x2a2a2a2a, -0xe1c,0x2a2a2a2a, -0xe28,0x00000000, -0xe30,0x1000dc1f, -0xe34,0x10008c1f, -0xe38,0x02140102, -0xe3c,0x681604c2, -0xe40,0x01007c00, -0xe44,0x01004800, -0xe48,0xfb000000, -0xe4c,0x000028d1, -0xe50,0x1000dc1f, -0xe54,0x10008c1f, -0xe58,0x02140102, -0xe5c,0x28160d05, -0xe60,0x00000008, -0xe68,0x001b25a4, -0xe6c,0x631b25a0, -0xe70,0x631b25a0, -0xe74,0x081b25a0, -0xe78,0x081b25a0, -0xe7c,0x081b25a0, -0xe80,0x081b25a0, -0xe84,0x631b25a0, -0xe88,0x081b25a0, -0xe8c,0x631b25a0, -0xed0,0x631b25a0, -0xed4,0x631b25a0, -0xed8,0x631b25a0, -0xedc,0x001b25a0, -0xee0,0x001b25a0, -0xeec,0x6b1b25a0, -0xf14,0x00000003, -0xf4c,0x00000000, -0xf00,0x00000300, -}; - -u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength] = { -0x024,0x0011800d, -0x028,0x00ffdb83, -0x800,0x80040002, -0x804,0x00000003, -0x808,0x0000fc00, -0x80c,0x0000000a, -0x810,0x10005388, -0x814,0x020c3d10, -0x818,0x02200385, -0x81c,0x00000000, -0x820,0x01000100, -0x824,0x00390004, -0x828,0x01000100, -0x82c,0x00390004, -0x830,0x27272727, -0x834,0x27272727, -0x838,0x27272727, -0x83c,0x27272727, -0x840,0x00010000, -0x844,0x00010000, -0x848,0x27272727, -0x84c,0x27272727, -0x850,0x00000000, -0x854,0x00000000, -0x858,0x569a569a, -0x85c,0x0c1b25a4, -0x860,0x66e60230, -0x864,0x061f0130, -0x868,0x27272727, -0x86c,0x2b2b2b27, -0x870,0x07000700, -0x874,0x22184000, -0x878,0x08080808, -0x87c,0x00000000, -0x880,0xc0083070, -0x884,0x000004d5, -0x888,0x00000000, -0x88c,0xcc0000c0, -0x890,0x00000800, -0x894,0xfffffffe, -0x898,0x40302010, -0x89c,0x00706050, -0x900,0x00000000, -0x904,0x00000023, -0x908,0x00000000, -0x90c,0x81121313, -0xa00,0x00d047c8, -0xa04,0x80ff000c, -0xa08,0x8c838300, -0xa0c,0x2e68120f, -0xa10,0x9500bb78, -0xa14,0x11144028, -0xa18,0x00881117, -0xa1c,0x89140f00, -0xa20,0x1a1b0000, -0xa24,0x090e1317, -0xa28,0x00000204, -0xa2c,0x00d30000, -0xa70,0x101fbf00, -0xa74,0x00000007, -0xc00,0x48071d40, -0xc04,0x03a05633, -0xc08,0x000000e4, -0xc0c,0x6c6c6c6c, -0xc10,0x08800000, -0xc14,0x40000100, -0xc18,0x08800000, -0xc1c,0x40000100, -0xc20,0x00000000, -0xc24,0x00000000, -0xc28,0x00000000, -0xc2c,0x00000000, -0xc30,0x69e9ac44, -0xc34,0x469652cf, -0xc38,0x49795994, -0xc3c,0x0a97971c, -0xc40,0x1f7c403f, -0xc44,0x000100b7, -0xc48,0xec020107, -0xc4c,0x007f037f, -0xc50,0x6954341e, -0xc54,0x43bc0094, -0xc58,0x6954341e, -0xc5c,0x433c0094, -0xc60,0x00000000, -0xc64,0x5116848b, -0xc68,0x47c00bff, -0xc6c,0x00000036, -0xc70,0x2c7f000d, -0xc74,0x018610db, -0xc78,0x0000001f, -0xc7c,0x00b91612, -0xc80,0x40000100, -0xc84,0x20f60000, -0xc88,0x40000100, -0xc8c,0x20200000, -0xc90,0x00121820, -0xc94,0x00000000, -0xc98,0x00121820, -0xc9c,0x00007f7f, -0xca0,0x00000000, -0xca4,0x00000080, -0xca8,0x00000000, -0xcac,0x00000000, -0xcb0,0x00000000, -0xcb4,0x00000000, -0xcb8,0x00000000, -0xcbc,0x28000000, -0xcc0,0x00000000, -0xcc4,0x00000000, -0xcc8,0x00000000, -0xccc,0x00000000, -0xcd0,0x00000000, -0xcd4,0x00000000, -0xcd8,0x64b22427, -0xcdc,0x00766932, -0xce0,0x00222222, -0xce4,0x00000000, -0xce8,0x37644302, -0xcec,0x2f97d40c, -0xd00,0x00080740, -0xd04,0x00020403, -0xd08,0x0000907f, -0xd0c,0x20010201, -0xd10,0xa0633333, -0xd14,0x3333bc43, -0xd18,0x7a8f5b6b, -0xd2c,0xcc979975, -0xd30,0x00000000, -0xd34,0x80608000, -0xd38,0x00000000, -0xd3c,0x00027293, -0xd40,0x00000000, -0xd44,0x00000000, -0xd48,0x00000000, -0xd4c,0x00000000, -0xd50,0x6437140a, -0xd54,0x00000000, -0xd58,0x00000000, -0xd5c,0x30032064, -0xd60,0x4653de68, -0xd64,0x04518a3c, -0xd68,0x00002101, -0xd6c,0x2a201c16, -0xd70,0x1812362e, -0xd74,0x322c2220, -0xd78,0x000e3c24, -0xe00,0x2a2a2a2a, -0xe04,0x2a2a2a2a, -0xe08,0x03902a2a, -0xe10,0x2a2a2a2a, -0xe14,0x2a2a2a2a, -0xe18,0x2a2a2a2a, -0xe1c,0x2a2a2a2a, -0xe28,0x00000000, -0xe30,0x1000dc1f, -0xe34,0x10008c1f, -0xe38,0x02140102, -0xe3c,0x681604c2, -0xe40,0x01007c00, -0xe44,0x01004800, -0xe48,0xfb000000, -0xe4c,0x000028d1, -0xe50,0x1000dc1f, -0xe54,0x10008c1f, -0xe58,0x02140102, -0xe5c,0x28160d05, -0xe60,0x00000010, -0xe68,0x001b25a4, -0xe6c,0x63db25a4, -0xe70,0x63db25a4, -0xe74,0x0c1b25a4, -0xe78,0x0c1b25a4, -0xe7c,0x0c1b25a4, -0xe80,0x0c1b25a4, -0xe84,0x63db25a4, -0xe88,0x0c1b25a4, -0xe8c,0x63db25a4, -0xed0,0x63db25a4, -0xed4,0x63db25a4, -0xed8,0x63db25a4, -0xedc,0x001b25a4, -0xee0,0x001b25a4, -0xeec,0x6fdb25a4, -0xf14,0x00000003, -0xf4c,0x00000000, -0xf00,0x00000300, -}; - -u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength] = { -0xe00,0xffffffff,0x06080808, -0xe04,0xffffffff,0x00040406, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x04060608, -0xe14,0xffffffff,0x00020204, -0xe18,0xffffffff,0x04060608, -0xe1c,0xffffffff,0x00020204, -0x830,0xffffffff,0x06080808, -0x834,0xffffffff,0x00040406, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x04060608, -0x848,0xffffffff,0x00020204, -0x84c,0xffffffff,0x04060608, -0x868,0xffffffff,0x00020204, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -0xe00,0xffffffff,0x00000000, -0xe04,0xffffffff,0x00000000, -0xe08,0x0000ff00,0x00000000, -0x86c,0xffffff00,0x00000000, -0xe10,0xffffffff,0x00000000, -0xe14,0xffffffff,0x00000000, -0xe18,0xffffffff,0x00000000, -0xe1c,0xffffffff,0x00000000, -0x830,0xffffffff,0x00000000, -0x834,0xffffffff,0x00000000, -0x838,0xffffff00,0x00000000, -0x86c,0x000000ff,0x00000000, -0x83c,0xffffffff,0x00000000, -0x848,0xffffffff,0x00000000, -0x84c,0xffffffff,0x00000000, -0x868,0xffffffff,0x00000000, -}; - -u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength] = { -0x000,0x00030159, -0x001,0x00031284, -0x002,0x00098000, -0x003,0x00018c63, -0x004,0x000210e7, -0x009,0x0002044f, -0x00a,0x0001adb1, -0x00b,0x00054867, -0x00c,0x0008992e, -0x00d,0x0000e52c, -0x00e,0x00039ce7, -0x00f,0x00000451, -0x019,0x00000000, -0x01a,0x00010255, -0x01b,0x00060a00, -0x01c,0x000fc378, -0x01d,0x000a1250, -0x01e,0x0004445f, -0x01f,0x00080001, -0x020,0x0000b614, -0x021,0x0006c000, -0x022,0x00000000, -0x023,0x00001558, -0x024,0x00000060, -0x025,0x00000483, -0x026,0x0004f000, -0x027,0x000ec7d9, -0x028,0x000577c0, -0x029,0x00004783, -0x02a,0x00000001, -0x02b,0x00021334, -0x02a,0x00000000, -0x02b,0x00000054, -0x02a,0x00000001, -0x02b,0x00000808, -0x02b,0x00053333, -0x02c,0x0000000c, -0x02a,0x00000002, -0x02b,0x00000808, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000003, -0x02b,0x00000808, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000004, -0x02b,0x00000808, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x00000005, -0x02b,0x00000808, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x00000006, -0x02b,0x00000709, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000007, -0x02b,0x00000709, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000008, -0x02b,0x0000060a, -0x02b,0x0004b333, -0x02c,0x0000000d, -0x02a,0x00000009, -0x02b,0x0000060a, -0x02b,0x00053333, -0x02c,0x0000000d, -0x02a,0x0000000a, -0x02b,0x0000060a, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x0000000b, -0x02b,0x0000060a, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x0000000c, -0x02b,0x0000060a, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x0000000d, -0x02b,0x0000060a, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x0000000e, -0x02b,0x0000050b, -0x02b,0x00066666, -0x02c,0x0000001a, -0x02a,0x000e0000, -0x010,0x0004000f, -0x011,0x000e31fc, -0x010,0x0006000f, -0x011,0x000ff9f8, -0x010,0x0002000f, -0x011,0x000203f9, -0x010,0x0003000f, -0x011,0x000ff500, -0x010,0x00000000, -0x011,0x00000000, -0x010,0x0008000f, -0x011,0x0003f100, -0x010,0x0009000f, -0x011,0x00023100, -0x012,0x00032000, -0x012,0x00071000, -0x012,0x000b0000, -0x012,0x000fc000, -0x013,0x000287b3, -0x013,0x000244b7, -0x013,0x000204ab, -0x013,0x0001c49f, -0x013,0x00018493, -0x013,0x0001429b, -0x013,0x00010299, -0x013,0x0000c29c, -0x013,0x000081a0, -0x013,0x000040ac, -0x013,0x00000020, -0x014,0x0001944c, -0x014,0x00059444, -0x014,0x0009944c, -0x014,0x000d9444, -0x015,0x0000f424, -0x015,0x0004f424, -0x015,0x0008f424, -0x015,0x000cf424, -0x016,0x000e0330, -0x016,0x000a0330, -0x016,0x00060330, -0x016,0x00020330, -0x000,0x00010159, -0x018,0x0000f401, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01f,0x00080003, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01e,0x00044457, -0x01f,0x00080000, -0x000,0x00030159, -}; - -u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength] = { -0x000,0x00030159, -0x001,0x00031284, -0x002,0x00098000, -0x003,0x00018c63, -0x004,0x000210e7, -0x009,0x0002044f, -0x00a,0x0001adb1, -0x00b,0x00054867, -0x00c,0x0008992e, -0x00d,0x0000e52c, -0x00e,0x00039ce7, -0x00f,0x00000451, -0x012,0x00032000, -0x012,0x00071000, -0x012,0x000b0000, -0x012,0x000fc000, -0x013,0x000287af, -0x013,0x000244b7, -0x013,0x000204ab, -0x013,0x0001c49f, -0x013,0x00018493, -0x013,0x00014297, -0x013,0x00010295, -0x013,0x0000c298, -0x013,0x0000819c, -0x013,0x000040a8, -0x013,0x0000001c, -0x014,0x0001944c, -0x014,0x00059444, -0x014,0x0009944c, -0x014,0x000d9444, -0x015,0x0000f424, -0x015,0x0004f424, -0x015,0x0008f424, -0x015,0x000cf424, -0x016,0x000e0330, -0x016,0x000a0330, -0x016,0x00060330, -0x016,0x00020330, -}; - -u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength] = { -0x000,0x00030159, -0x001,0x00031284, -0x002,0x00098000, -0x003,0x00018c63, -0x004,0x000210e7, -0x009,0x0002044f, -0x00a,0x0001adb1, -0x00b,0x00054867, -0x00c,0x0008992e, -0x00d,0x0000e52c, -0x00e,0x00039ce7, -0x00f,0x00000451, -0x019,0x00000000, -0x01a,0x00010255, -0x01b,0x00060a00, -0x01c,0x000fc378, -0x01d,0x000a1250, -0x01e,0x0004445f, -0x01f,0x00080001, -0x020,0x0000b614, -0x021,0x0006c000, -0x022,0x00000000, -0x023,0x00001558, -0x024,0x00000060, -0x025,0x00000483, -0x026,0x0004f000, -0x027,0x000ec7d9, -0x028,0x000577c0, -0x029,0x00004783, -0x02a,0x00000001, -0x02b,0x00021334, -0x02a,0x00000000, -0x02b,0x00000054, -0x02a,0x00000001, -0x02b,0x00000808, -0x02b,0x00053333, -0x02c,0x0000000c, -0x02a,0x00000002, -0x02b,0x00000808, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000003, -0x02b,0x00000808, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000004, -0x02b,0x00000808, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x00000005, -0x02b,0x00000808, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x00000006, -0x02b,0x00000709, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000007, -0x02b,0x00000709, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000008, -0x02b,0x0000060a, -0x02b,0x0004b333, -0x02c,0x0000000d, -0x02a,0x00000009, -0x02b,0x0000060a, -0x02b,0x00053333, -0x02c,0x0000000d, -0x02a,0x0000000a, -0x02b,0x0000060a, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x0000000b, -0x02b,0x0000060a, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x0000000c, -0x02b,0x0000060a, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x0000000d, -0x02b,0x0000060a, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x0000000e, -0x02b,0x0000050b, -0x02b,0x00066666, -0x02c,0x0000001a, -0x02a,0x000e0000, -0x010,0x0004000f, -0x011,0x000e31fc, -0x010,0x0006000f, -0x011,0x000ff9f8, -0x010,0x0002000f, -0x011,0x000203f9, -0x010,0x0003000f, -0x011,0x000ff500, -0x010,0x00000000, -0x011,0x00000000, -0x010,0x0008000f, -0x011,0x0003f100, -0x010,0x0009000f, -0x011,0x00023100, -0x012,0x00032000, -0x012,0x00071000, -0x012,0x000b0000, -0x012,0x000fc000, -0x013,0x000287b3, -0x013,0x000244b7, -0x013,0x000204ab, -0x013,0x0001c49f, -0x013,0x00018493, -0x013,0x0001429b, -0x013,0x00010299, -0x013,0x0000c29c, -0x013,0x000081a0, -0x013,0x000040ac, -0x013,0x00000020, -0x014,0x0001944c, -0x014,0x00059444, -0x014,0x0009944c, -0x014,0x000d9444, -0x015,0x0000f405, -0x015,0x0004f405, -0x015,0x0008f405, -0x015,0x000cf405, -0x016,0x000e0330, -0x016,0x000a0330, -0x016,0x00060330, -0x016,0x00020330, -0x000,0x00010159, -0x018,0x0000f401, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01f,0x00080003, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01e,0x00044457, -0x01f,0x00080000, -0x000,0x00030159, -}; - -u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength] = { -0x0, }; - - -u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength] = { -0x000,0x00030159, -0x001,0x00031284, -0x002,0x00098000, -0x003,0x00018c63, -0x004,0x000210e7, -0x009,0x0002044f, -0x00a,0x0001adb1, -0x00b,0x00054867, -0x00c,0x0008992e, -0x00d,0x0000e52c, -0x00e,0x00039ce7, -0x00f,0x00000451, -0x019,0x00000000, -0x01a,0x00010255, -0x01b,0x00060a00, -0x01c,0x000fc378, -0x01d,0x000a1250, -0x01e,0x0004445f, -0x01f,0x00080001, -0x020,0x0000b614, -0x021,0x0006c000, -0x022,0x00000000, -0x023,0x00001558, -0x024,0x00000060, -0x025,0x00000483, -0x026,0x0004f200, -0x027,0x000ec7d9, -0x028,0x000577c0, -0x029,0x00004783, -0x02a,0x00000001, -0x02b,0x00021334, -0x02a,0x00000000, -0x02b,0x00000054, -0x02a,0x00000001, -0x02b,0x00000808, -0x02b,0x00053333, -0x02c,0x0000000c, -0x02a,0x00000002, -0x02b,0x00000808, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000003, -0x02b,0x00000808, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000004, -0x02b,0x00000808, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x00000005, -0x02b,0x00000808, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x00000006, -0x02b,0x00000709, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000007, -0x02b,0x00000709, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000008, -0x02b,0x0000060a, -0x02b,0x0004b333, -0x02c,0x0000000d, -0x02a,0x00000009, -0x02b,0x0000060a, -0x02b,0x00053333, -0x02c,0x0000000d, -0x02a,0x0000000a, -0x02b,0x0000060a, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x0000000b, -0x02b,0x0000060a, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x0000000c, -0x02b,0x0000060a, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x0000000d, -0x02b,0x0000060a, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x0000000e, -0x02b,0x0000050b, -0x02b,0x00066666, -0x02c,0x0000001a, -0x02a,0x000e0000, -0x010,0x0004000f, -0x011,0x000e31fc, -0x010,0x0006000f, -0x011,0x000ff9f8, -0x010,0x0002000f, -0x011,0x000203f9, -0x010,0x0003000f, -0x011,0x000ff500, -0x010,0x00000000, -0x011,0x00000000, -0x010,0x0008000f, -0x011,0x0003f100, -0x010,0x0009000f, -0x011,0x00023100, -0x012,0x00032000, -0x012,0x00071000, -0x012,0x000b0000, -0x012,0x000fc000, -0x013,0x000287b3, -0x013,0x000244b7, -0x013,0x000204ab, -0x013,0x0001c49f, -0x013,0x00018493, -0x013,0x0001429b, -0x013,0x00010299, -0x013,0x0000c29c, -0x013,0x000081a0, -0x013,0x000040ac, -0x013,0x00000020, -0x014,0x0001944c, -0x014,0x00059444, -0x014,0x0009944c, -0x014,0x000d9444, -0x015,0x0000f424, -0x015,0x0004f424, -0x015,0x0008f424, -0x015,0x000cf424, -0x016,0x000e0330, -0x016,0x000a0330, -0x016,0x00060330, -0x016,0x00020330, -0x000,0x00010159, -0x018,0x0000f401, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01f,0x00080003, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01e,0x00044457, -0x01f,0x00080000, -0x000,0x00030159, -}; - -u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength] = { -0x0, }; - -u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength] = { -0x000,0x00030159, -0x001,0x00031284, -0x002,0x00098000, -0x003,0x00018c63, -0x004,0x000210e7, -0x009,0x0002044f, -0x00a,0x0001adb0, -0x00b,0x00054867, -0x00c,0x0008992e, -0x00d,0x0000e529, -0x00e,0x00039ce7, -0x00f,0x00000451, -0x019,0x00000000, -0x01a,0x00000255, -0x01b,0x00060a00, -0x01c,0x000fc378, -0x01d,0x000a1250, -0x01e,0x0004445f, -0x01f,0x00080001, -0x020,0x0000b614, -0x021,0x0006c000, -0x022,0x0000083c, -0x023,0x00001558, -0x024,0x00000060, -0x025,0x00000483, -0x026,0x0004f000, -0x027,0x000ec7d9, -0x028,0x000977c0, -0x029,0x00004783, -0x02a,0x00000001, -0x02b,0x00021334, -0x02a,0x00000000, -0x02b,0x00000054, -0x02a,0x00000001, -0x02b,0x00000808, -0x02b,0x00053333, -0x02c,0x0000000c, -0x02a,0x00000002, -0x02b,0x00000808, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000003, -0x02b,0x00000808, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000004, -0x02b,0x00000808, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x00000005, -0x02b,0x00000808, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x00000006, -0x02b,0x00000709, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x00000007, -0x02b,0x00000709, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x00000008, -0x02b,0x0000060a, -0x02b,0x0004b333, -0x02c,0x0000000d, -0x02a,0x00000009, -0x02b,0x0000060a, -0x02b,0x00053333, -0x02c,0x0000000d, -0x02a,0x0000000a, -0x02b,0x0000060a, -0x02b,0x0005b333, -0x02c,0x0000000d, -0x02a,0x0000000b, -0x02b,0x0000060a, -0x02b,0x00063333, -0x02c,0x0000000d, -0x02a,0x0000000c, -0x02b,0x0000060a, -0x02b,0x0006b333, -0x02c,0x0000000d, -0x02a,0x0000000d, -0x02b,0x0000060a, -0x02b,0x00073333, -0x02c,0x0000000d, -0x02a,0x0000000e, -0x02b,0x0000050b, -0x02b,0x00066666, -0x02c,0x0000001a, -0x02a,0x000e0000, -0x010,0x0004000f, -0x011,0x000e31fc, -0x010,0x0006000f, -0x011,0x000ff9f8, -0x010,0x0002000f, -0x011,0x000203f9, -0x010,0x0003000f, -0x011,0x000ff500, -0x010,0x00000000, -0x011,0x00000000, -0x010,0x0008000f, -0x011,0x0003f100, -0x010,0x0009000f, -0x011,0x00023100, -0x012,0x000d8000, -0x012,0x00090000, -0x012,0x00051000, -0x012,0x00012000, -0x013,0x00028fb4, -0x013,0x00024fa8, -0x013,0x000207a4, -0x013,0x0001c798, -0x013,0x000183a4, -0x013,0x00014398, -0x013,0x000101a4, -0x013,0x0000c198, -0x013,0x000080a4, -0x013,0x00004098, -0x013,0x00000000, -0x014,0x0001944c, -0x014,0x00059444, -0x014,0x0009944c, -0x014,0x000d9444, -0x015,0x0000f405, -0x015,0x0004f405, -0x015,0x0008f405, -0x015,0x000cf405, -0x016,0x000e0330, -0x016,0x000a0330, -0x016,0x00060330, -0x016,0x00020330, -0x000,0x00010159, -0x018,0x0000f401, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01f,0x00080003, -0x0fe,0x00000000, -0x0fe,0x00000000, -0x01e,0x00044457, -0x01f,0x00080000, -0x000,0x00030159, -}; - -u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength] = { -0x0, }; - -// MAC reg V13 - 2010-12-07 -u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength] = { -0x420,0x00000080, -0x423,0x00000000, -0x430,0x00000000, -0x431,0x00000000, -0x432,0x00000000, -0x433,0x00000001, -0x434,0x00000004, -0x435,0x00000005, -0x436,0x00000006, -0x437,0x00000007, -0x438,0x00000000, -0x439,0x00000000, -0x43a,0x00000000, -0x43b,0x00000001, -0x43c,0x00000004, -0x43d,0x00000005, -0x43e,0x00000006, -0x43f,0x00000007, -0x440,0x0000005d, -0x441,0x00000001, -0x442,0x00000000, -0x444,0x00000015, -0x445,0x000000f0, -0x446,0x0000000f, -0x447,0x00000000, -0x458,0x00000041, -0x459,0x000000a8, -0x45a,0x00000072, -0x45b,0x000000b9, -0x460,0x00000066, -0x461,0x00000066, -0x462,0x00000008, -0x463,0x00000003, -0x4c8,0x000000ff, -0x4c9,0x00000008, -0x4cc,0x000000ff, -0x4cd,0x000000ff, -0x4ce,0x00000001, -0x500,0x00000026, -0x501,0x000000a2, -0x502,0x0000002f, -0x503,0x00000000, -0x504,0x00000028, -0x505,0x000000a3, -0x506,0x0000005e, -0x507,0x00000000, -0x508,0x0000002b, -0x509,0x000000a4, -0x50a,0x0000005e, -0x50b,0x00000000, -0x50c,0x0000004f, -0x50d,0x000000a4, -0x50e,0x00000000, -0x50f,0x00000000, -0x512,0x0000001c, -0x514,0x0000000a, -0x515,0x00000010, -0x516,0x0000000a, -0x517,0x00000010, -0x51a,0x00000016, -0x524,0x0000000f, -0x525,0x0000004f, -0x546,0x00000040, -0x547,0x00000000, -0x550,0x00000010, -0x551,0x00000010, -0x559,0x00000002, -0x55a,0x00000002, -0x55d,0x000000ff, -0x605,0x00000030, -0x608,0x0000000e, -0x609,0x0000002a, -0x652,0x00000020, -0x63c,0x0000000a, -0x63d,0x0000000e, -0x63e,0x0000000a, -0x63f,0x0000000e, -0x66e,0x00000005, -0x700,0x00000021, -0x701,0x00000043, -0x702,0x00000065, -0x703,0x00000087, -0x708,0x00000021, -0x709,0x00000043, -0x70a,0x00000065, -0x70b,0x00000087, -}; - -u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength] = { -0x0, }; - -u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength] = { -0xc78,0x7b000001, -0xc78,0x7b010001, -0xc78,0x7b020001, -0xc78,0x7b030001, -0xc78,0x7b040001, -0xc78,0x7b050001, -0xc78,0x7a060001, -0xc78,0x79070001, -0xc78,0x78080001, -0xc78,0x77090001, -0xc78,0x760a0001, -0xc78,0x750b0001, -0xc78,0x740c0001, -0xc78,0x730d0001, -0xc78,0x720e0001, -0xc78,0x710f0001, -0xc78,0x70100001, -0xc78,0x6f110001, -0xc78,0x6e120001, -0xc78,0x6d130001, -0xc78,0x6c140001, -0xc78,0x6b150001, -0xc78,0x6a160001, -0xc78,0x69170001, -0xc78,0x68180001, -0xc78,0x67190001, -0xc78,0x661a0001, -0xc78,0x651b0001, -0xc78,0x641c0001, -0xc78,0x631d0001, -0xc78,0x621e0001, -0xc78,0x611f0001, -0xc78,0x60200001, -0xc78,0x49210001, -0xc78,0x48220001, -0xc78,0x47230001, -0xc78,0x46240001, -0xc78,0x45250001, -0xc78,0x44260001, -0xc78,0x43270001, -0xc78,0x42280001, -0xc78,0x41290001, -0xc78,0x402a0001, -0xc78,0x262b0001, -0xc78,0x252c0001, -0xc78,0x242d0001, -0xc78,0x232e0001, -0xc78,0x222f0001, -0xc78,0x21300001, -0xc78,0x20310001, -0xc78,0x06320001, -0xc78,0x05330001, -0xc78,0x04340001, -0xc78,0x03350001, -0xc78,0x02360001, -0xc78,0x01370001, -0xc78,0x00380001, -0xc78,0x00390001, -0xc78,0x003a0001, -0xc78,0x003b0001, -0xc78,0x003c0001, -0xc78,0x003d0001, -0xc78,0x003e0001, -0xc78,0x003f0001, -0xc78,0x7b400001, -0xc78,0x7b410001, -0xc78,0x7b420001, -0xc78,0x7b430001, -0xc78,0x7b440001, -0xc78,0x7b450001, -0xc78,0x7a460001, -0xc78,0x79470001, -0xc78,0x78480001, -0xc78,0x77490001, -0xc78,0x764a0001, -0xc78,0x754b0001, -0xc78,0x744c0001, -0xc78,0x734d0001, -0xc78,0x724e0001, -0xc78,0x714f0001, -0xc78,0x70500001, -0xc78,0x6f510001, -0xc78,0x6e520001, -0xc78,0x6d530001, -0xc78,0x6c540001, -0xc78,0x6b550001, -0xc78,0x6a560001, -0xc78,0x69570001, -0xc78,0x68580001, -0xc78,0x67590001, -0xc78,0x665a0001, -0xc78,0x655b0001, -0xc78,0x645c0001, -0xc78,0x635d0001, -0xc78,0x625e0001, -0xc78,0x615f0001, -0xc78,0x60600001, -0xc78,0x49610001, -0xc78,0x48620001, -0xc78,0x47630001, -0xc78,0x46640001, -0xc78,0x45650001, -0xc78,0x44660001, -0xc78,0x43670001, -0xc78,0x42680001, -0xc78,0x41690001, -0xc78,0x406a0001, -0xc78,0x266b0001, -0xc78,0x256c0001, -0xc78,0x246d0001, -0xc78,0x236e0001, -0xc78,0x226f0001, -0xc78,0x21700001, -0xc78,0x20710001, -0xc78,0x06720001, -0xc78,0x05730001, -0xc78,0x04740001, -0xc78,0x03750001, -0xc78,0x02760001, -0xc78,0x01770001, -0xc78,0x00780001, -0xc78,0x00790001, -0xc78,0x007a0001, -0xc78,0x007b0001, -0xc78,0x007c0001, -0xc78,0x007d0001, -0xc78,0x007e0001, -0xc78,0x007f0001, -0xc78,0x3800001e, -0xc78,0x3801001e, -0xc78,0x3802001e, -0xc78,0x3803001e, -0xc78,0x3804001e, -0xc78,0x3805001e, -0xc78,0x3806001e, -0xc78,0x3807001e, -0xc78,0x3808001e, -0xc78,0x3c09001e, -0xc78,0x3e0a001e, -0xc78,0x400b001e, -0xc78,0x440c001e, -0xc78,0x480d001e, -0xc78,0x4c0e001e, -0xc78,0x500f001e, -0xc78,0x5210001e, -0xc78,0x5611001e, -0xc78,0x5a12001e, -0xc78,0x5e13001e, -0xc78,0x6014001e, -0xc78,0x6015001e, -0xc78,0x6016001e, -0xc78,0x6217001e, -0xc78,0x6218001e, -0xc78,0x6219001e, -0xc78,0x621a001e, -0xc78,0x621b001e, -0xc78,0x621c001e, -0xc78,0x621d001e, -0xc78,0x621e001e, -0xc78,0x621f001e, -}; - -u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength] = { -0xc78,0x7b000001, -0xc78,0x7b010001, -0xc78,0x7b020001, -0xc78,0x7b030001, -0xc78,0x7b040001, -0xc78,0x7b050001, -0xc78,0x7a060001, -0xc78,0x79070001, -0xc78,0x78080001, -0xc78,0x77090001, -0xc78,0x760a0001, -0xc78,0x750b0001, -0xc78,0x740c0001, -0xc78,0x730d0001, -0xc78,0x720e0001, -0xc78,0x710f0001, -0xc78,0x70100001, -0xc78,0x6f110001, -0xc78,0x6e120001, -0xc78,0x6d130001, -0xc78,0x6c140001, -0xc78,0x6b150001, -0xc78,0x6a160001, -0xc78,0x69170001, -0xc78,0x68180001, -0xc78,0x67190001, -0xc78,0x661a0001, -0xc78,0x651b0001, -0xc78,0x641c0001, -0xc78,0x631d0001, -0xc78,0x621e0001, -0xc78,0x611f0001, -0xc78,0x60200001, -0xc78,0x49210001, -0xc78,0x48220001, -0xc78,0x47230001, -0xc78,0x46240001, -0xc78,0x45250001, -0xc78,0x44260001, -0xc78,0x43270001, -0xc78,0x42280001, -0xc78,0x41290001, -0xc78,0x402a0001, -0xc78,0x262b0001, -0xc78,0x252c0001, -0xc78,0x242d0001, -0xc78,0x232e0001, -0xc78,0x222f0001, -0xc78,0x21300001, -0xc78,0x20310001, -0xc78,0x06320001, -0xc78,0x05330001, -0xc78,0x04340001, -0xc78,0x03350001, -0xc78,0x02360001, -0xc78,0x01370001, -0xc78,0x00380001, -0xc78,0x00390001, -0xc78,0x003a0001, -0xc78,0x003b0001, -0xc78,0x003c0001, -0xc78,0x003d0001, -0xc78,0x003e0001, -0xc78,0x003f0001, -0xc78,0x7b400001, -0xc78,0x7b410001, -0xc78,0x7b420001, -0xc78,0x7b430001, -0xc78,0x7b440001, -0xc78,0x7b450001, -0xc78,0x7a460001, -0xc78,0x79470001, -0xc78,0x78480001, -0xc78,0x77490001, -0xc78,0x764a0001, -0xc78,0x754b0001, -0xc78,0x744c0001, -0xc78,0x734d0001, -0xc78,0x724e0001, -0xc78,0x714f0001, -0xc78,0x70500001, -0xc78,0x6f510001, -0xc78,0x6e520001, -0xc78,0x6d530001, -0xc78,0x6c540001, -0xc78,0x6b550001, -0xc78,0x6a560001, -0xc78,0x69570001, -0xc78,0x68580001, -0xc78,0x67590001, -0xc78,0x665a0001, -0xc78,0x655b0001, -0xc78,0x645c0001, -0xc78,0x635d0001, -0xc78,0x625e0001, -0xc78,0x615f0001, -0xc78,0x60600001, -0xc78,0x49610001, -0xc78,0x48620001, -0xc78,0x47630001, -0xc78,0x46640001, -0xc78,0x45650001, -0xc78,0x44660001, -0xc78,0x43670001, -0xc78,0x42680001, -0xc78,0x41690001, -0xc78,0x406a0001, -0xc78,0x266b0001, -0xc78,0x256c0001, -0xc78,0x246d0001, -0xc78,0x236e0001, -0xc78,0x226f0001, -0xc78,0x21700001, -0xc78,0x20710001, -0xc78,0x06720001, -0xc78,0x05730001, -0xc78,0x04740001, -0xc78,0x03750001, -0xc78,0x02760001, -0xc78,0x01770001, -0xc78,0x00780001, -0xc78,0x00790001, -0xc78,0x007a0001, -0xc78,0x007b0001, -0xc78,0x007c0001, -0xc78,0x007d0001, -0xc78,0x007e0001, -0xc78,0x007f0001, -0xc78,0x3800001e, -0xc78,0x3801001e, -0xc78,0x3802001e, -0xc78,0x3803001e, -0xc78,0x3804001e, -0xc78,0x3805001e, -0xc78,0x3806001e, -0xc78,0x3807001e, -0xc78,0x3808001e, -0xc78,0x3c09001e, -0xc78,0x3e0a001e, -0xc78,0x400b001e, -0xc78,0x440c001e, -0xc78,0x480d001e, -0xc78,0x4c0e001e, -0xc78,0x500f001e, -0xc78,0x5210001e, -0xc78,0x5611001e, -0xc78,0x5a12001e, -0xc78,0x5e13001e, -0xc78,0x6014001e, -0xc78,0x6015001e, -0xc78,0x6016001e, -0xc78,0x6217001e, -0xc78,0x6218001e, -0xc78,0x6219001e, -0xc78,0x621a001e, -0xc78,0x621b001e, -0xc78,0x621c001e, -0xc78,0x621d001e, -0xc78,0x621e001e, -0xc78,0x621f001e, -}; - -u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength] = { -0xc78,0x7b000001, -0xc78,0x7b010001, -0xc78,0x7b020001, -0xc78,0x7b030001, -0xc78,0x7b040001, -0xc78,0x7b050001, -0xc78,0x7b060001, -0xc78,0x7b070001, -0xc78,0x7b080001, -0xc78,0x7a090001, -0xc78,0x790a0001, -0xc78,0x780b0001, -0xc78,0x770c0001, -0xc78,0x760d0001, -0xc78,0x750e0001, -0xc78,0x740f0001, -0xc78,0x73100001, -0xc78,0x72110001, -0xc78,0x71120001, -0xc78,0x70130001, -0xc78,0x6f140001, -0xc78,0x6e150001, -0xc78,0x6d160001, -0xc78,0x6c170001, -0xc78,0x6b180001, -0xc78,0x6a190001, -0xc78,0x691a0001, -0xc78,0x681b0001, -0xc78,0x671c0001, -0xc78,0x661d0001, -0xc78,0x651e0001, -0xc78,0x641f0001, -0xc78,0x63200001, -0xc78,0x62210001, -0xc78,0x61220001, -0xc78,0x60230001, -0xc78,0x46240001, -0xc78,0x45250001, -0xc78,0x44260001, -0xc78,0x43270001, -0xc78,0x42280001, -0xc78,0x41290001, -0xc78,0x402a0001, -0xc78,0x262b0001, -0xc78,0x252c0001, -0xc78,0x242d0001, -0xc78,0x232e0001, -0xc78,0x222f0001, -0xc78,0x21300001, -0xc78,0x20310001, -0xc78,0x06320001, -0xc78,0x05330001, -0xc78,0x04340001, -0xc78,0x03350001, -0xc78,0x02360001, -0xc78,0x01370001, -0xc78,0x00380001, -0xc78,0x00390001, -0xc78,0x003a0001, -0xc78,0x003b0001, -0xc78,0x003c0001, -0xc78,0x003d0001, -0xc78,0x003e0001, -0xc78,0x003f0001, -0xc78,0x7b400001, -0xc78,0x7b410001, -0xc78,0x7b420001, -0xc78,0x7b430001, -0xc78,0x7b440001, -0xc78,0x7b450001, -0xc78,0x7b460001, -0xc78,0x7b470001, -0xc78,0x7b480001, -0xc78,0x7a490001, -0xc78,0x794a0001, -0xc78,0x784b0001, -0xc78,0x774c0001, -0xc78,0x764d0001, -0xc78,0x754e0001, -0xc78,0x744f0001, -0xc78,0x73500001, -0xc78,0x72510001, -0xc78,0x71520001, -0xc78,0x70530001, -0xc78,0x6f540001, -0xc78,0x6e550001, -0xc78,0x6d560001, -0xc78,0x6c570001, -0xc78,0x6b580001, -0xc78,0x6a590001, -0xc78,0x695a0001, -0xc78,0x685b0001, -0xc78,0x675c0001, -0xc78,0x665d0001, -0xc78,0x655e0001, -0xc78,0x645f0001, -0xc78,0x63600001, -0xc78,0x62610001, -0xc78,0x61620001, -0xc78,0x60630001, -0xc78,0x46640001, -0xc78,0x45650001, -0xc78,0x44660001, -0xc78,0x43670001, -0xc78,0x42680001, -0xc78,0x41690001, -0xc78,0x406a0001, -0xc78,0x266b0001, -0xc78,0x256c0001, -0xc78,0x246d0001, -0xc78,0x236e0001, -0xc78,0x226f0001, -0xc78,0x21700001, -0xc78,0x20710001, -0xc78,0x06720001, -0xc78,0x05730001, -0xc78,0x04740001, -0xc78,0x03750001, -0xc78,0x02760001, -0xc78,0x01770001, -0xc78,0x00780001, -0xc78,0x00790001, -0xc78,0x007a0001, -0xc78,0x007b0001, -0xc78,0x007c0001, -0xc78,0x007d0001, -0xc78,0x007e0001, -0xc78,0x007f0001, -0xc78,0x3800001e, -0xc78,0x3801001e, -0xc78,0x3802001e, -0xc78,0x3803001e, -0xc78,0x3804001e, -0xc78,0x3805001e, -0xc78,0x3806001e, -0xc78,0x3807001e, -0xc78,0x3808001e, -0xc78,0x3c09001e, -0xc78,0x3e0a001e, -0xc78,0x400b001e, -0xc78,0x440c001e, -0xc78,0x480d001e, -0xc78,0x4c0e001e, -0xc78,0x500f001e, -0xc78,0x5210001e, -0xc78,0x5611001e, -0xc78,0x5a12001e, -0xc78,0x5e13001e, -0xc78,0x6014001e, -0xc78,0x6015001e, -0xc78,0x6016001e, -0xc78,0x6217001e, -0xc78,0x6218001e, -0xc78,0x6219001e, -0xc78,0x621a001e, -0xc78,0x621b001e, -0xc78,0x621c001e, -0xc78,0x621d001e, -0xc78,0x621e001e, -0xc78,0x621f001e, -}; - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +/*Created on 2011/ 6/15, 5:45*/ + +#include +#include "Hal8192CUHWImg.h" + +#ifdef CONFIG_BT_COEXISTENCE +// =================== v79 TSMC COMMON 2011-10-06 ======================= +u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { +0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x02,0x58,0x3f,0x00,0x00, +0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 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=================== v80 TSMC COMMON 2011-12-14 ======================= +u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { +0xc1,0x88,0x02,0x00,0x50,0x00,0x00,0x00,0x12,0x14,0x15,0x52,0xd4,0x3e,0x00,0x00, +0x25,0x86,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x02,0x48,0x79,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x02,0x5e,0xff,0x00,0x00,0x00,0x00,0x00,0xa1,0xd4,0x00,0x00,0x00, +0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, +0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, +0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, 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+0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0, +0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0, +0x22,0x00,0x6a,0xe7,}; + +// =================== v80 UMC B Cut COMMON 2011-12-14 ===================== +u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = { +0xc2,0x88,0x02,0x00,0x50,0x00,0x00,0x00,0x12,0x14,0x16,0x10,0xc0,0x3e,0x01,0x00, +0x25,0x86,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x02,0x48,0x79,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x02,0x5e,0xff,0x00,0x00,0x00,0x00,0x00,0xa1,0xd4,0x00,0x00,0x00, +0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, 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+0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x97,0x97,0xe0,0xb4,0x01,0x05,0x7f,0x01, +0x12,0x4e,0x3b,0x22,0x90,0x00,0x49,0xe0,0x90,0x97,0xb4,0xf0,0xe0,0x54,0x0f,0xf0, +0xe0,0xff,0x44,0xf0,0x90,0x00,0x49,0xf0,0xef,0x44,0xb0,0xf0,0x22,0xe4,0x90,0x97, +0x8e,0xf0,0x90,0x97,0x80,0xf0,0x90,0x97,0x89,0xf0,0x90,0x97,0x8f,0xf0,0x22,0xe5, +0x5e,0xb4,0x01,0x0b,0x12,0x7e,0x61,0xbf,0x01,0x05,0x7f,0x01,0x12,0x7f,0x1b,0x22, +0x90,0x09,0x28,0xef,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22, +0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x41,0x97, +0xb1,0x00,0x41,0x97,0x7e,0x80,0x41,0x97,0xb3,0x00,0x00,0x90,0x01,0xca,0xe5,0x61, +0xf0,0xef,0x60,0x03,0x12,0x7e,0xb4,0x22,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0, +0xa3,0xe9,0xf0,0x22,0x90,0x97,0xa7,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22, +0x90,0x97,0xaa,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0x8f,0x82,0x8e,0x83, +0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x5e,0x7f,0x60,0x7e,0x01,0x02,0x7f,0x4c, +0x90,0x97,0x97,0xe0,0x90,0x97,0x2d,0xf0,0x22,0x8f,0x1b,0x8c,0x1c,0x8d,0x1d,0x22, +0x8f,0x1e,0x8c,0x1f,0x8d,0x20,0x22,0x12,0x1c,0xd6,0xf5,0x64,0x22,0x22,0x52,0x09, +}; + +u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength] = { +0x024,0x0011800f, +0x028,0x00ffdb83, +0x800,0x80040002, +0x804,0x00000003, +0x808,0x0000fc00, +0x80c,0x0000000a, +0x810,0x10005388, +0x814,0x020c3d10, +0x818,0x02200385, +0x81c,0x00000000, +0x820,0x01000100, +0x824,0x00390004, +0x828,0x01000100, +0x82c,0x00390004, +0x830,0x27272727, +0x834,0x27272727, +0x838,0x27272727, +0x83c,0x27272727, +0x840,0x00010000, +0x844,0x00010000, +0x848,0x27272727, +0x84c,0x27272727, +0x850,0x00000000, +0x854,0x00000000, +0x858,0x569a569a, +0x85c,0x0c1b25a4, +0x860,0x66e60230, +0x864,0x061f0130, +0x868,0x27272727, +0x86c,0x2b2b2b27, +0x870,0x07000700, +0x874,0x22184000, +0x878,0x08080808, +0x87c,0x00000000, +0x880,0xc0083070, +0x884,0x000004d5, +0x888,0x00000000, +0x88c,0xcc0000c0, +0x890,0x00000800, +0x894,0xfffffffe, +0x898,0x40302010, +0x89c,0x00706050, +0x900,0x00000000, +0x904,0x00000023, +0x908,0x00000000, +0x90c,0x81121313, +0xa00,0x00d047c8, +0xa04,0x80ff000c, +0xa08,0x8c838300, +0xa0c,0x2e68120f, +0xa10,0x9500bb78, +0xa14,0x11144028, +0xa18,0x00881117, +0xa1c,0x89140f00, +0xa20,0x1a1b0000, +0xa24,0x090e1317, +0xa28,0x00000204, +0xa2c,0x00d30000, +0xa70,0x101fbf00, +0xa74,0x00000007, +0xc00,0x48071d40, +0xc04,0x03a05633, +0xc08,0x000000e4, +0xc0c,0x6c6c6c6c, +0xc10,0x08800000, +0xc14,0x40000100, +0xc18,0x08800000, +0xc1c,0x40000100, +0xc20,0x00000000, +0xc24,0x00000000, +0xc28,0x00000000, +0xc2c,0x00000000, +0xc30,0x69e9ac44, +0xc34,0x469652cf, +0xc38,0x49795994, +0xc3c,0x0a97971c, +0xc40,0x1f7c403f, +0xc44,0x000100b7, +0xc48,0xec020107, +0xc4c,0x007f037f, +0xc50,0x6954341e, +0xc54,0x43bc0094, +0xc58,0x6954341e, +0xc5c,0x433c0094, +0xc60,0x00000000, +0xc64,0x5116848b, +0xc68,0x47c00bff, +0xc6c,0x00000036, +0xc70,0x2c7f000d, +0xc74,0x0186115b, +0xc78,0x0000001f, +0xc7c,0x00b99612, +0xc80,0x40000100, +0xc84,0x20f60000, +0xc88,0x40000100, +0xc8c,0x20200000, +0xc90,0x00121820, +0xc94,0x00000000, +0xc98,0x00121820, +0xc9c,0x00007f7f, +0xca0,0x00000000, +0xca4,0x00000080, +0xca8,0x00000000, +0xcac,0x00000000, +0xcb0,0x00000000, +0xcb4,0x00000000, +0xcb8,0x00000000, +0xcbc,0x28000000, +0xcc0,0x00000000, +0xcc4,0x00000000, +0xcc8,0x00000000, +0xccc,0x00000000, +0xcd0,0x00000000, +0xcd4,0x00000000, +0xcd8,0x64b22427, +0xcdc,0x00766932, +0xce0,0x00222222, +0xce4,0x00000000, +0xce8,0x37644302, +0xcec,0x2f97d40c, +0xd00,0x00080740, +0xd04,0x00020403, +0xd08,0x0000907f, +0xd0c,0x20010201, +0xd10,0xa0633333, +0xd14,0x3333bc43, +0xd18,0x7a8f5b6b, +0xd2c,0xcc979975, +0xd30,0x00000000, +0xd34,0x80608000, +0xd38,0x00000000, +0xd3c,0x00027293, +0xd40,0x00000000, +0xd44,0x00000000, +0xd48,0x00000000, +0xd4c,0x00000000, +0xd50,0x6437140a, +0xd54,0x00000000, +0xd58,0x00000000, +0xd5c,0x30032064, +0xd60,0x4653de68, +0xd64,0x04518a3c, +0xd68,0x00002101, +0xd6c,0x2a201c16, +0xd70,0x1812362e, +0xd74,0x322c2220, +0xd78,0x000e3c24, +0xe00,0x2a2a2a2a, +0xe04,0x2a2a2a2a, +0xe08,0x03902a2a, +0xe10,0x2a2a2a2a, +0xe14,0x2a2a2a2a, +0xe18,0x2a2a2a2a, +0xe1c,0x2a2a2a2a, +0xe28,0x00000000, +0xe30,0x1000dc1f, +0xe34,0x10008c1f, +0xe38,0x02140102, +0xe3c,0x681604c2, +0xe40,0x01007c00, +0xe44,0x01004800, +0xe48,0xfb000000, +0xe4c,0x000028d1, +0xe50,0x1000dc1f, +0xe54,0x10008c1f, +0xe58,0x02140102, +0xe5c,0x28160d05, +0xe60,0x00000010, +0xe68,0x001b25a4, +0xe6c,0x63db25a4, +0xe70,0x63db25a4, +0xe74,0x0c1b25a4, +0xe78,0x0c1b25a4, +0xe7c,0x0c1b25a4, +0xe80,0x0c1b25a4, +0xe84,0x63db25a4, +0xe88,0x0c1b25a4, +0xe8c,0x63db25a4, +0xed0,0x63db25a4, +0xed4,0x63db25a4, +0xed8,0x63db25a4, +0xedc,0x001b25a4, +0xee0,0x001b25a4, +0xeec,0x6fdb25a4, +0xf14,0x00000003, +0xf4c,0x00000000, +0xf00,0x00000300, +}; + +u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength] = { +0x024,0x0011800f, +0x028,0x00ffdb83, +0x800,0x80040000, +0x804,0x00000001, +0x808,0x0000fc00, +0x80c,0x0000000a, +0x810,0x10005388, +0x814,0x020c3d10, +0x818,0x02200385, +0x81c,0x00000000, +0x820,0x01000100, +0x824,0x00390004, +0x828,0x00000000, +0x82c,0x00000000, +0x830,0x00000000, +0x834,0x00000000, +0x838,0x00000000, +0x83c,0x00000000, +0x840,0x00010000, +0x844,0x00000000, +0x848,0x00000000, +0x84c,0x00000000, +0x850,0x00000000, +0x854,0x00000000, +0x858,0x569a569a, +0x85c,0x001b25a4, +0x860,0x66e60230, +0x864,0x061f0130, +0x868,0x00000000, +0x86c,0x32323200, +0x870,0x07000700, +0x874,0x22004000, +0x878,0x00000808, +0x87c,0x00000000, +0x880,0xc0083070, +0x884,0x000004d5, +0x888,0x00000000, +0x88c,0xccc000c0, +0x890,0x00000800, +0x894,0xfffffffe, +0x898,0x40302010, +0x89c,0x00706050, +0x900,0x00000000, +0x904,0x00000023, +0x908,0x00000000, +0x90c,0x81121111, +0xa00,0x00d047c8, +0xa04,0x80ff000c, +0xa08,0x8c838300, +0xa0c,0x2e68120f, +0xa10,0x9500bb78, +0xa14,0x11144028, +0xa18,0x00881117, +0xa1c,0x89140f00, +0xa20,0x1a1b0000, +0xa24,0x090e1317, +0xa28,0x00000204, +0xa2c,0x00d30000, +0xa70,0x101fbf00, +0xa74,0x00000007, +0xc00,0x48071d40, +0xc04,0x03a05611, +0xc08,0x000000e4, +0xc0c,0x6c6c6c6c, +0xc10,0x08800000, +0xc14,0x40000100, +0xc18,0x08800000, +0xc1c,0x40000100, +0xc20,0x00000000, +0xc24,0x00000000, +0xc28,0x00000000, +0xc2c,0x00000000, +0xc30,0x69e9ac44, +0xc34,0x469652cf, +0xc38,0x49795994, +0xc3c,0x0a97971c, +0xc40,0x1f7c403f, +0xc44,0x000100b7, +0xc48,0xec020107, +0xc4c,0x007f037f, +0xc50,0x6954341e, +0xc54,0x43bc0094, +0xc58,0x6954341e, +0xc5c,0x433c0094, +0xc60,0x00000000, +0xc64,0x5116848b, +0xc68,0x47c00bff, +0xc6c,0x00000036, +0xc70,0x2c7f000d, +0xc74,0x018610db, +0xc78,0x0000001f, +0xc7c,0x00b91612, +0xc80,0x40000100, +0xc84,0x20f60000, +0xc88,0x40000100, +0xc8c,0x20200000, +0xc90,0x00121820, +0xc94,0x00000000, +0xc98,0x00121820, +0xc9c,0x00007f7f, +0xca0,0x00000000, +0xca4,0x00000080, +0xca8,0x00000000, +0xcac,0x00000000, +0xcb0,0x00000000, +0xcb4,0x00000000, +0xcb8,0x00000000, +0xcbc,0x28000000, +0xcc0,0x00000000, +0xcc4,0x00000000, +0xcc8,0x00000000, +0xccc,0x00000000, +0xcd0,0x00000000, +0xcd4,0x00000000, +0xcd8,0x64b22427, +0xcdc,0x00766932, +0xce0,0x00222222, +0xce4,0x00000000, +0xce8,0x37644302, +0xcec,0x2f97d40c, +0xd00,0x00080740, +0xd04,0x00020401, +0xd08,0x0000907f, +0xd0c,0x20010201, +0xd10,0xa0633333, +0xd14,0x3333bc43, +0xd18,0x7a8f5b6b, +0xd2c,0xcc979975, +0xd30,0x00000000, +0xd34,0x80608000, +0xd38,0x00000000, +0xd3c,0x00027293, +0xd40,0x00000000, +0xd44,0x00000000, +0xd48,0x00000000, +0xd4c,0x00000000, +0xd50,0x6437140a, +0xd54,0x00000000, +0xd58,0x00000000, +0xd5c,0x30032064, +0xd60,0x4653de68, +0xd64,0x04518a3c, +0xd68,0x00002101, +0xd6c,0x2a201c16, +0xd70,0x1812362e, +0xd74,0x322c2220, +0xd78,0x000e3c24, +0xe00,0x2a2a2a2a, +0xe04,0x2a2a2a2a, +0xe08,0x03902a2a, +0xe10,0x2a2a2a2a, +0xe14,0x2a2a2a2a, +0xe18,0x2a2a2a2a, +0xe1c,0x2a2a2a2a, +0xe28,0x00000000, +0xe30,0x1000dc1f, +0xe34,0x10008c1f, +0xe38,0x02140102, +0xe3c,0x681604c2, +0xe40,0x01007c00, +0xe44,0x01004800, +0xe48,0xfb000000, +0xe4c,0x000028d1, +0xe50,0x1000dc1f, +0xe54,0x10008c1f, +0xe58,0x02140102, +0xe5c,0x28160d05, +0xe60,0x00000008, +0xe68,0x001b25a4, +0xe6c,0x631b25a0, +0xe70,0x631b25a0, +0xe74,0x081b25a0, +0xe78,0x081b25a0, +0xe7c,0x081b25a0, +0xe80,0x081b25a0, +0xe84,0x631b25a0, +0xe88,0x081b25a0, +0xe8c,0x631b25a0, +0xed0,0x631b25a0, +0xed4,0x631b25a0, +0xed8,0x631b25a0, +0xedc,0x001b25a0, +0xee0,0x001b25a0, +0xeec,0x6b1b25a0, +0xf14,0x00000003, +0xf4c,0x00000000, +0xf00,0x00000300, +}; + +u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = { +0x0, }; + +u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = { +0x0, }; + +u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = { +0x0, }; + +u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = { +0xe00,0xffffffff,0x07090c0c, +0xe04,0xffffffff,0x01020405, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x0b0c0c0e, +0xe14,0xffffffff,0x01030506, +0xe18,0xffffffff,0x0b0c0d0e, +0xe1c,0xffffffff,0x01030509, +0x830,0xffffffff,0x07090c0c, +0x834,0xffffffff,0x01020405, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x0b0c0d0e, +0x848,0xffffffff,0x01030509, +0x84c,0xffffffff,0x0b0c0d0e, +0x868,0xffffffff,0x01030509, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x04040404, +0xe04,0xffffffff,0x00020204, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x06060606, +0xe14,0xffffffff,0x00020406, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x04040404, +0x834,0xffffffff,0x00020204, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x06060606, +0x848,0xffffffff,0x00020406, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x04040404, +0xe04,0xffffffff,0x00020204, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x04040404, +0x834,0xffffffff,0x00020204, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +}; + +u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength] = { +0xe00,0xffffffff,0x0a0c0c0c, +0xe04,0xffffffff,0x02040608, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x0a0c0d0e, +0xe14,0xffffffff,0x02040608, +0xe18,0xffffffff,0x0a0c0d0e, +0xe1c,0xffffffff,0x02040608, +0x830,0xffffffff,0x0a0c0c0c, +0x834,0xffffffff,0x02040608, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x0a0c0d0e, +0x848,0xffffffff,0x02040608, +0x84c,0xffffffff,0x0a0c0d0e, +0x868,0xffffffff,0x02040608, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x04040404, +0xe04,0xffffffff,0x00020204, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x06060606, +0xe14,0xffffffff,0x00020406, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x04040404, +0x834,0xffffffff,0x00020204, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x06060606, +0x848,0xffffffff,0x00020406, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x04040404, +0xe04,0xffffffff,0x00020204, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x04040404, +0x834,0xffffffff,0x00020204, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +}; + +u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength] = { +0xc30,0x69e9ac4a, +0xc3c,0x0a979718, +}; + +u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength] = { +0x024,0x0011800f, +0x028,0x00ffdb83, +0x040,0x000c0004, +0x800,0x80040000, +0x804,0x00000001, +0x808,0x0000fc00, +0x80c,0x0000000a, +0x810,0x10005388, +0x814,0x020c3d10, +0x818,0x02200385, +0x81c,0x00000000, +0x820,0x01000100, +0x824,0x00390204, +0x828,0x00000000, +0x82c,0x00000000, +0x830,0x00000000, +0x834,0x00000000, +0x838,0x00000000, +0x83c,0x00000000, +0x840,0x00010000, +0x844,0x00000000, +0x848,0x00000000, +0x84c,0x00000000, +0x850,0x00000000, +0x854,0x00000000, +0x858,0x569a569a, +0x85c,0x001b25a4, +0x860,0x66e60230, +0x864,0x061f0130, +0x868,0x00000000, +0x86c,0x20202000, +0x870,0x03000300, +0x874,0x22004000, +0x878,0x00000808, +0x87c,0x00ffc3f1, +0x880,0xc0083070, +0x884,0x000004d5, +0x888,0x00000000, +0x88c,0xccc000c0, +0x890,0x00000800, +0x894,0xfffffffe, +0x898,0x40302010, +0x89c,0x00706050, +0x900,0x00000000, +0x904,0x00000023, +0x908,0x00000000, +0x90c,0x81121111, +0xa00,0x00d047c8, +0xa04,0x80ff000c, +0xa08,0x8c838300, +0xa0c,0x2e68120f, +0xa10,0x9500bb78, +0xa14,0x11144028, +0xa18,0x00881117, +0xa1c,0x89140f00, +0xa20,0x15160000, +0xa24,0x070b0f12, +0xa28,0x00000104, +0xa2c,0x00d30000, +0xa70,0x101fbf00, +0xa74,0x00000007, +0xc00,0x48071d40, +0xc04,0x03a05611, +0xc08,0x000000e4, +0xc0c,0x6c6c6c6c, +0xc10,0x08800000, +0xc14,0x40000100, +0xc18,0x08800000, +0xc1c,0x40000100, +0xc20,0x00000000, +0xc24,0x00000000, +0xc28,0x00000000, +0xc2c,0x00000000, +0xc30,0x69e9ac44, +0xc34,0x469652cf, +0xc38,0x49795994, +0xc3c,0x0a97971c, +0xc40,0x1f7c403f, +0xc44,0x000100b7, +0xc48,0xec020107, +0xc4c,0x007f037f, +0xc50,0x6954342e, +0xc54,0x43bc0094, +0xc58,0x6954342f, +0xc5c,0x433c0094, +0xc60,0x00000000, +0xc64,0x5116848b, +0xc68,0x47c00bff, +0xc6c,0x00000036, +0xc70,0x2c46000d, +0xc74,0x018610db, +0xc78,0x0000001f, +0xc7c,0x00b91612, +0xc80,0x24000090, +0xc84,0x20f60000, +0xc88,0x24000090, +0xc8c,0x20200000, +0xc90,0x00121820, +0xc94,0x00000000, +0xc98,0x00121820, +0xc9c,0x00007f7f, +0xca0,0x00000000, +0xca4,0x00000080, +0xca8,0x00000000, +0xcac,0x00000000, +0xcb0,0x00000000, +0xcb4,0x00000000, +0xcb8,0x00000000, +0xcbc,0x28000000, +0xcc0,0x00000000, +0xcc4,0x00000000, +0xcc8,0x00000000, +0xccc,0x00000000, +0xcd0,0x00000000, +0xcd4,0x00000000, +0xcd8,0x64b22427, +0xcdc,0x00766932, +0xce0,0x00222222, +0xce4,0x00000000, +0xce8,0x37644302, +0xcec,0x2f97d40c, +0xd00,0x00080740, +0xd04,0x00020401, +0xd08,0x0000907f, +0xd0c,0x20010201, +0xd10,0xa0633333, +0xd14,0x3333bc43, +0xd18,0x7a8f5b6b, +0xd2c,0xcc979975, +0xd30,0x00000000, +0xd34,0x80608000, +0xd38,0x00000000, +0xd3c,0x00027293, +0xd40,0x00000000, +0xd44,0x00000000, +0xd48,0x00000000, +0xd4c,0x00000000, +0xd50,0x6437140a, +0xd54,0x00000000, +0xd58,0x00000000, +0xd5c,0x30032064, +0xd60,0x4653de68, +0xd64,0x04518a3c, +0xd68,0x00002101, +0xd6c,0x2a201c16, +0xd70,0x1812362e, +0xd74,0x322c2220, +0xd78,0x000e3c24, +0xe00,0x24242424, +0xe04,0x24242424, +0xe08,0x03902024, +0xe10,0x24242424, +0xe14,0x24242424, +0xe18,0x24242424, +0xe1c,0x24242424, +0xe28,0x00000000, +0xe30,0x1000dc1f, +0xe34,0x10008c1f, +0xe38,0x02140102, +0xe3c,0x681604c2, +0xe40,0x01007c00, +0xe44,0x01004800, +0xe48,0xfb000000, +0xe4c,0x000028d1, +0xe50,0x1000dc1f, +0xe54,0x10008c1f, +0xe58,0x02140102, +0xe5c,0x28160d05, +0xe60,0x00000008, +0xe68,0x001b25a4, +0xe6c,0x631b25a0, +0xe70,0x631b25a0, +0xe74,0x081b25a0, +0xe78,0x081b25a0, +0xe7c,0x081b25a0, +0xe80,0x081b25a0, +0xe84,0x631b25a0, +0xe88,0x081b25a0, +0xe8c,0x631b25a0, +0xed0,0x631b25a0, +0xed4,0x631b25a0, +0xed8,0x631b25a0, +0xedc,0x001b25a0, +0xee0,0x001b25a0, +0xeec,0x6b1b25a0, +0xee8,0x31555448, +0xf14,0x00000003, +0xf4c,0x00000000, +0xf00,0x00000300, +}; + +u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength] = { +0x024,0x0011800d, +0x028,0x00ffdb83, +0x800,0x80040000, +0x804,0x00000001, +0x808,0x0000fc00, +0x80c,0x0000000a, +0x810,0x10005388, +0x814,0x020c3d10, +0x818,0x02200385, +0x81c,0x00000000, +0x820,0x01000100, +0x824,0x00390004, +0x828,0x00000000, +0x82c,0x00000000, +0x830,0x00000000, +0x834,0x00000000, +0x838,0x00000000, +0x83c,0x00000000, +0x840,0x00010000, +0x844,0x00000000, +0x848,0x00000000, +0x84c,0x00000000, +0x850,0x00000000, +0x854,0x00000000, +0x858,0x569a569a, +0x85c,0x001b25a4, +0x860,0x66e60230, +0x864,0x061f0130, +0x868,0x00000000, +0x86c,0x32323200, +0x870,0x07000700, +0x874,0x22004000, +0x878,0x00000808, +0x87c,0x00000000, +0x880,0xc0083070, +0x884,0x000004d5, +0x888,0x00000000, +0x88c,0xccc000c0, +0x890,0x00000800, +0x894,0xfffffffe, +0x898,0x40302010, +0x89c,0x00706050, +0x900,0x00000000, +0x904,0x00000023, +0x908,0x00000000, +0x90c,0x81121111, +0xa00,0x00d047c8, +0xa04,0x80ff000c, +0xa08,0x8c838300, +0xa0c,0x2e68120f, +0xa10,0x9500bb78, +0xa14,0x11144028, +0xa18,0x00881117, +0xa1c,0x89140f00, +0xa20,0x1a1b0000, +0xa24,0x090e1317, +0xa28,0x00000204, +0xa2c,0x00d30000, +0xa70,0x101fbf00, +0xa74,0x00000007, +0xc00,0x48071d40, +0xc04,0x03a05611, +0xc08,0x000000e4, +0xc0c,0x6c6c6c6c, +0xc10,0x08800000, +0xc14,0x40000100, +0xc18,0x08800000, +0xc1c,0x40000100, +0xc20,0x00000000, +0xc24,0x00000000, +0xc28,0x00000000, +0xc2c,0x00000000, +0xc30,0x69e9ac44, +0xc34,0x469652cf, +0xc38,0x49795994, +0xc3c,0x0a97971c, +0xc40,0x1f7c403f, +0xc44,0x000100b7, +0xc48,0xec020107, +0xc4c,0x007f037f, +0xc50,0x6954341e, +0xc54,0x43bc0094, +0xc58,0x6954341e, +0xc5c,0x433c0094, +0xc60,0x00000000, +0xc64,0x5116848b, +0xc68,0x47c00bff, +0xc6c,0x00000036, +0xc70,0x2c7f000d, +0xc74,0x018610db, +0xc78,0x0000001f, +0xc7c,0x00b91612, +0xc80,0x40000100, +0xc84,0x20f60000, +0xc88,0x40000100, +0xc8c,0x20200000, +0xc90,0x00121820, +0xc94,0x00000000, +0xc98,0x00121820, +0xc9c,0x00007f7f, +0xca0,0x00000000, +0xca4,0x00000080, +0xca8,0x00000000, +0xcac,0x00000000, +0xcb0,0x00000000, +0xcb4,0x00000000, +0xcb8,0x00000000, +0xcbc,0x28000000, +0xcc0,0x00000000, +0xcc4,0x00000000, +0xcc8,0x00000000, +0xccc,0x00000000, +0xcd0,0x00000000, +0xcd4,0x00000000, +0xcd8,0x64b22427, +0xcdc,0x00766932, +0xce0,0x00222222, +0xce4,0x00000000, +0xce8,0x37644302, +0xcec,0x2f97d40c, +0xd00,0x00080740, +0xd04,0x00020401, +0xd08,0x0000907f, +0xd0c,0x20010201, +0xd10,0xa0633333, +0xd14,0x3333bc43, +0xd18,0x7a8f5b6b, +0xd2c,0xcc979975, +0xd30,0x00000000, +0xd34,0x80608000, +0xd38,0x00000000, +0xd3c,0x00027293, +0xd40,0x00000000, +0xd44,0x00000000, +0xd48,0x00000000, +0xd4c,0x00000000, +0xd50,0x6437140a, +0xd54,0x00000000, +0xd58,0x00000000, +0xd5c,0x30032064, +0xd60,0x4653de68, +0xd64,0x04518a3c, +0xd68,0x00002101, +0xd6c,0x2a201c16, +0xd70,0x1812362e, +0xd74,0x322c2220, +0xd78,0x000e3c24, +0xe00,0x2a2a2a2a, +0xe04,0x2a2a2a2a, +0xe08,0x03902a2a, +0xe10,0x2a2a2a2a, +0xe14,0x2a2a2a2a, +0xe18,0x2a2a2a2a, +0xe1c,0x2a2a2a2a, +0xe28,0x00000000, +0xe30,0x1000dc1f, +0xe34,0x10008c1f, +0xe38,0x02140102, +0xe3c,0x681604c2, +0xe40,0x01007c00, +0xe44,0x01004800, +0xe48,0xfb000000, +0xe4c,0x000028d1, +0xe50,0x1000dc1f, +0xe54,0x10008c1f, +0xe58,0x02140102, +0xe5c,0x28160d05, +0xe60,0x00000008, +0xe68,0x001b25a4, +0xe6c,0x631b25a0, +0xe70,0x631b25a0, +0xe74,0x081b25a0, +0xe78,0x081b25a0, +0xe7c,0x081b25a0, +0xe80,0x081b25a0, +0xe84,0x631b25a0, +0xe88,0x081b25a0, +0xe8c,0x631b25a0, +0xed0,0x631b25a0, +0xed4,0x631b25a0, +0xed8,0x631b25a0, +0xedc,0x001b25a0, +0xee0,0x001b25a0, +0xeec,0x6b1b25a0, +0xf14,0x00000003, +0xf4c,0x00000000, +0xf00,0x00000300, +}; + +u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength] = { +0x024,0x0011800d, +0x028,0x00ffdb83, +0x800,0x80040002, +0x804,0x00000003, +0x808,0x0000fc00, +0x80c,0x0000000a, +0x810,0x10005388, +0x814,0x020c3d10, +0x818,0x02200385, +0x81c,0x00000000, +0x820,0x01000100, +0x824,0x00390004, +0x828,0x01000100, +0x82c,0x00390004, +0x830,0x27272727, +0x834,0x27272727, +0x838,0x27272727, +0x83c,0x27272727, +0x840,0x00010000, +0x844,0x00010000, +0x848,0x27272727, +0x84c,0x27272727, +0x850,0x00000000, +0x854,0x00000000, +0x858,0x569a569a, +0x85c,0x0c1b25a4, +0x860,0x66e60230, +0x864,0x061f0130, +0x868,0x27272727, +0x86c,0x2b2b2b27, +0x870,0x07000700, +0x874,0x22184000, +0x878,0x08080808, +0x87c,0x00000000, +0x880,0xc0083070, +0x884,0x000004d5, +0x888,0x00000000, +0x88c,0xcc0000c0, +0x890,0x00000800, +0x894,0xfffffffe, +0x898,0x40302010, +0x89c,0x00706050, +0x900,0x00000000, +0x904,0x00000023, +0x908,0x00000000, +0x90c,0x81121313, +0xa00,0x00d047c8, +0xa04,0x80ff000c, +0xa08,0x8c838300, +0xa0c,0x2e68120f, +0xa10,0x9500bb78, +0xa14,0x11144028, +0xa18,0x00881117, +0xa1c,0x89140f00, +0xa20,0x1a1b0000, +0xa24,0x090e1317, +0xa28,0x00000204, +0xa2c,0x00d30000, +0xa70,0x101fbf00, +0xa74,0x00000007, +0xc00,0x48071d40, +0xc04,0x03a05633, +0xc08,0x000000e4, +0xc0c,0x6c6c6c6c, +0xc10,0x08800000, +0xc14,0x40000100, +0xc18,0x08800000, +0xc1c,0x40000100, +0xc20,0x00000000, +0xc24,0x00000000, +0xc28,0x00000000, +0xc2c,0x00000000, +0xc30,0x69e9ac44, +0xc34,0x469652cf, +0xc38,0x49795994, +0xc3c,0x0a97971c, +0xc40,0x1f7c403f, +0xc44,0x000100b7, +0xc48,0xec020107, +0xc4c,0x007f037f, +0xc50,0x6954341e, +0xc54,0x43bc0094, +0xc58,0x6954341e, +0xc5c,0x433c0094, +0xc60,0x00000000, +0xc64,0x5116848b, +0xc68,0x47c00bff, +0xc6c,0x00000036, +0xc70,0x2c7f000d, +0xc74,0x018610db, +0xc78,0x0000001f, +0xc7c,0x00b91612, +0xc80,0x40000100, +0xc84,0x20f60000, +0xc88,0x40000100, +0xc8c,0x20200000, +0xc90,0x00121820, +0xc94,0x00000000, +0xc98,0x00121820, +0xc9c,0x00007f7f, +0xca0,0x00000000, +0xca4,0x00000080, +0xca8,0x00000000, +0xcac,0x00000000, +0xcb0,0x00000000, +0xcb4,0x00000000, +0xcb8,0x00000000, +0xcbc,0x28000000, +0xcc0,0x00000000, +0xcc4,0x00000000, +0xcc8,0x00000000, +0xccc,0x00000000, +0xcd0,0x00000000, +0xcd4,0x00000000, +0xcd8,0x64b22427, +0xcdc,0x00766932, +0xce0,0x00222222, +0xce4,0x00000000, +0xce8,0x37644302, +0xcec,0x2f97d40c, +0xd00,0x00080740, +0xd04,0x00020403, +0xd08,0x0000907f, +0xd0c,0x20010201, +0xd10,0xa0633333, +0xd14,0x3333bc43, +0xd18,0x7a8f5b6b, +0xd2c,0xcc979975, +0xd30,0x00000000, +0xd34,0x80608000, +0xd38,0x00000000, +0xd3c,0x00027293, +0xd40,0x00000000, +0xd44,0x00000000, +0xd48,0x00000000, +0xd4c,0x00000000, +0xd50,0x6437140a, +0xd54,0x00000000, +0xd58,0x00000000, +0xd5c,0x30032064, +0xd60,0x4653de68, +0xd64,0x04518a3c, +0xd68,0x00002101, +0xd6c,0x2a201c16, +0xd70,0x1812362e, +0xd74,0x322c2220, +0xd78,0x000e3c24, +0xe00,0x2a2a2a2a, +0xe04,0x2a2a2a2a, +0xe08,0x03902a2a, +0xe10,0x2a2a2a2a, +0xe14,0x2a2a2a2a, +0xe18,0x2a2a2a2a, +0xe1c,0x2a2a2a2a, +0xe28,0x00000000, +0xe30,0x1000dc1f, +0xe34,0x10008c1f, +0xe38,0x02140102, +0xe3c,0x681604c2, +0xe40,0x01007c00, +0xe44,0x01004800, +0xe48,0xfb000000, +0xe4c,0x000028d1, +0xe50,0x1000dc1f, +0xe54,0x10008c1f, +0xe58,0x02140102, +0xe5c,0x28160d05, +0xe60,0x00000010, +0xe68,0x001b25a4, +0xe6c,0x63db25a4, +0xe70,0x63db25a4, +0xe74,0x0c1b25a4, +0xe78,0x0c1b25a4, +0xe7c,0x0c1b25a4, +0xe80,0x0c1b25a4, +0xe84,0x63db25a4, +0xe88,0x0c1b25a4, +0xe8c,0x63db25a4, +0xed0,0x63db25a4, +0xed4,0x63db25a4, +0xed8,0x63db25a4, +0xedc,0x001b25a4, +0xee0,0x001b25a4, +0xeec,0x6fdb25a4, +0xf14,0x00000003, +0xf4c,0x00000000, +0xf00,0x00000300, +}; + +u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength] = { +0xe00,0xffffffff,0x06080808, +0xe04,0xffffffff,0x00040406, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x04060608, +0xe14,0xffffffff,0x00020204, +0xe18,0xffffffff,0x04060608, +0xe1c,0xffffffff,0x00020204, +0x830,0xffffffff,0x06080808, +0x834,0xffffffff,0x00040406, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x04060608, +0x848,0xffffffff,0x00020204, +0x84c,0xffffffff,0x04060608, +0x868,0xffffffff,0x00020204, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +0xe00,0xffffffff,0x00000000, +0xe04,0xffffffff,0x00000000, +0xe08,0x0000ff00,0x00000000, +0x86c,0xffffff00,0x00000000, +0xe10,0xffffffff,0x00000000, +0xe14,0xffffffff,0x00000000, +0xe18,0xffffffff,0x00000000, +0xe1c,0xffffffff,0x00000000, +0x830,0xffffffff,0x00000000, +0x834,0xffffffff,0x00000000, +0x838,0xffffff00,0x00000000, +0x86c,0x000000ff,0x00000000, +0x83c,0xffffffff,0x00000000, +0x848,0xffffffff,0x00000000, +0x84c,0xffffffff,0x00000000, +0x868,0xffffffff,0x00000000, +}; + +u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength] = { +0x000,0x00030159, +0x001,0x00031284, +0x002,0x00098000, +0x003,0x00018c63, +0x004,0x000210e7, +0x009,0x0002044f, +0x00a,0x0001adb1, +0x00b,0x00054867, +0x00c,0x0008992e, +0x00d,0x0000e52c, +0x00e,0x00039ce7, +0x00f,0x00000451, +0x019,0x00000000, +0x01a,0x00010255, +0x01b,0x00060a00, +0x01c,0x000fc378, +0x01d,0x000a1250, +0x01e,0x0004445f, +0x01f,0x00080001, +0x020,0x0000b614, +0x021,0x0006c000, +0x022,0x00000000, +0x023,0x00001558, +0x024,0x00000060, +0x025,0x00000483, +0x026,0x0004f000, +0x027,0x000ec7d9, +0x028,0x000577c0, +0x029,0x00004783, +0x02a,0x00000001, +0x02b,0x00021334, +0x02a,0x00000000, +0x02b,0x00000054, +0x02a,0x00000001, +0x02b,0x00000808, +0x02b,0x00053333, +0x02c,0x0000000c, +0x02a,0x00000002, +0x02b,0x00000808, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000003, +0x02b,0x00000808, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000004, +0x02b,0x00000808, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x00000005, +0x02b,0x00000808, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x00000006, +0x02b,0x00000709, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000007, +0x02b,0x00000709, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000008, +0x02b,0x0000060a, +0x02b,0x0004b333, +0x02c,0x0000000d, +0x02a,0x00000009, +0x02b,0x0000060a, +0x02b,0x00053333, +0x02c,0x0000000d, +0x02a,0x0000000a, +0x02b,0x0000060a, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x0000000b, +0x02b,0x0000060a, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x0000000c, +0x02b,0x0000060a, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x0000000d, +0x02b,0x0000060a, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x0000000e, +0x02b,0x0000050b, +0x02b,0x00066666, +0x02c,0x0000001a, +0x02a,0x000e0000, +0x010,0x0004000f, +0x011,0x000e31fc, +0x010,0x0006000f, +0x011,0x000ff9f8, +0x010,0x0002000f, +0x011,0x000203f9, +0x010,0x0003000f, +0x011,0x000ff500, +0x010,0x00000000, +0x011,0x00000000, +0x010,0x0008000f, +0x011,0x0003f100, +0x010,0x0009000f, +0x011,0x00023100, +0x012,0x00032000, +0x012,0x00071000, +0x012,0x000b0000, +0x012,0x000fc000, +0x013,0x000287b3, +0x013,0x000244b7, +0x013,0x000204ab, +0x013,0x0001c49f, +0x013,0x00018493, +0x013,0x0001429b, +0x013,0x00010299, +0x013,0x0000c29c, +0x013,0x000081a0, +0x013,0x000040ac, +0x013,0x00000020, +0x014,0x0001944c, +0x014,0x00059444, +0x014,0x0009944c, +0x014,0x000d9444, +0x015,0x0000f424, +0x015,0x0004f424, +0x015,0x0008f424, +0x015,0x000cf424, +0x016,0x000e0330, +0x016,0x000a0330, +0x016,0x00060330, +0x016,0x00020330, +0x000,0x00010159, +0x018,0x0000f401, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01f,0x00080003, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01e,0x00044457, +0x01f,0x00080000, +0x000,0x00030159, +}; + +u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength] = { +0x000,0x00030159, +0x001,0x00031284, +0x002,0x00098000, +0x003,0x00018c63, +0x004,0x000210e7, +0x009,0x0002044f, +0x00a,0x0001adb1, +0x00b,0x00054867, +0x00c,0x0008992e, +0x00d,0x0000e52c, +0x00e,0x00039ce7, +0x00f,0x00000451, +0x012,0x00032000, +0x012,0x00071000, +0x012,0x000b0000, +0x012,0x000fc000, +0x013,0x000287af, +0x013,0x000244b7, +0x013,0x000204ab, +0x013,0x0001c49f, +0x013,0x00018493, +0x013,0x00014297, +0x013,0x00010295, +0x013,0x0000c298, +0x013,0x0000819c, +0x013,0x000040a8, +0x013,0x0000001c, +0x014,0x0001944c, +0x014,0x00059444, +0x014,0x0009944c, +0x014,0x000d9444, +0x015,0x0000f424, +0x015,0x0004f424, +0x015,0x0008f424, +0x015,0x000cf424, +0x016,0x000e0330, +0x016,0x000a0330, +0x016,0x00060330, +0x016,0x00020330, +}; + +u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength] = { +0x000,0x00030159, +0x001,0x00031284, +0x002,0x00098000, +0x003,0x00018c63, +0x004,0x000210e7, +0x009,0x0002044f, +0x00a,0x0001adb1, +0x00b,0x00054867, +0x00c,0x0008992e, +0x00d,0x0000e52c, +0x00e,0x00039ce7, +0x00f,0x00000451, +0x019,0x00000000, +0x01a,0x00010255, +0x01b,0x00060a00, +0x01c,0x000fc378, +0x01d,0x000a1250, +0x01e,0x0004445f, +0x01f,0x00080001, +0x020,0x0000b614, +0x021,0x0006c000, +0x022,0x00000000, +0x023,0x00001558, +0x024,0x00000060, +0x025,0x00000483, +0x026,0x0004f000, +0x027,0x000ec7d9, +0x028,0x000577c0, +0x029,0x00004783, +0x02a,0x00000001, +0x02b,0x00021334, +0x02a,0x00000000, +0x02b,0x00000054, +0x02a,0x00000001, +0x02b,0x00000808, +0x02b,0x00053333, +0x02c,0x0000000c, +0x02a,0x00000002, +0x02b,0x00000808, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000003, +0x02b,0x00000808, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000004, +0x02b,0x00000808, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x00000005, +0x02b,0x00000808, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x00000006, +0x02b,0x00000709, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000007, +0x02b,0x00000709, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000008, +0x02b,0x0000060a, +0x02b,0x0004b333, +0x02c,0x0000000d, +0x02a,0x00000009, +0x02b,0x0000060a, +0x02b,0x00053333, +0x02c,0x0000000d, +0x02a,0x0000000a, +0x02b,0x0000060a, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x0000000b, +0x02b,0x0000060a, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x0000000c, +0x02b,0x0000060a, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x0000000d, +0x02b,0x0000060a, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x0000000e, +0x02b,0x0000050b, +0x02b,0x00066666, +0x02c,0x0000001a, +0x02a,0x000e0000, +0x010,0x0004000f, +0x011,0x000e31fc, +0x010,0x0006000f, +0x011,0x000ff9f8, +0x010,0x0002000f, +0x011,0x000203f9, +0x010,0x0003000f, +0x011,0x000ff500, +0x010,0x00000000, +0x011,0x00000000, +0x010,0x0008000f, +0x011,0x0003f100, +0x010,0x0009000f, +0x011,0x00023100, +0x012,0x00032000, +0x012,0x00071000, +0x012,0x000b0000, +0x012,0x000fc000, +0x013,0x000287b3, +0x013,0x000244b7, +0x013,0x000204ab, +0x013,0x0001c49f, +0x013,0x00018493, +0x013,0x0001429b, +0x013,0x00010299, +0x013,0x0000c29c, +0x013,0x000081a0, +0x013,0x000040ac, +0x013,0x00000020, +0x014,0x0001944c, +0x014,0x00059444, +0x014,0x0009944c, +0x014,0x000d9444, +0x015,0x0000f405, +0x015,0x0004f405, +0x015,0x0008f405, +0x015,0x000cf405, +0x016,0x000e0330, +0x016,0x000a0330, +0x016,0x00060330, +0x016,0x00020330, +0x000,0x00010159, +0x018,0x0000f401, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01f,0x00080003, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01e,0x00044457, +0x01f,0x00080000, +0x000,0x00030159, +}; + +u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength] = { +0x0, }; + + +u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength] = { +0x000,0x00030159, +0x001,0x00031284, +0x002,0x00098000, +0x003,0x00018c63, +0x004,0x000210e7, +0x009,0x0002044f, +0x00a,0x0001adb1, +0x00b,0x00054867, +0x00c,0x0008992e, +0x00d,0x0000e52c, +0x00e,0x00039ce7, +0x00f,0x00000451, +0x019,0x00000000, +0x01a,0x00010255, +0x01b,0x00060a00, +0x01c,0x000fc378, +0x01d,0x000a1250, +0x01e,0x0004445f, +0x01f,0x00080001, +0x020,0x0000b614, +0x021,0x0006c000, +0x022,0x00000000, +0x023,0x00001558, +0x024,0x00000060, +0x025,0x00000483, +0x026,0x0004f200, +0x027,0x000ec7d9, +0x028,0x000577c0, +0x029,0x00004783, +0x02a,0x00000001, +0x02b,0x00021334, +0x02a,0x00000000, +0x02b,0x00000054, +0x02a,0x00000001, +0x02b,0x00000808, +0x02b,0x00053333, +0x02c,0x0000000c, +0x02a,0x00000002, +0x02b,0x00000808, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000003, +0x02b,0x00000808, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000004, +0x02b,0x00000808, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x00000005, +0x02b,0x00000808, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x00000006, +0x02b,0x00000709, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000007, +0x02b,0x00000709, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000008, +0x02b,0x0000060a, +0x02b,0x0004b333, +0x02c,0x0000000d, +0x02a,0x00000009, +0x02b,0x0000060a, +0x02b,0x00053333, +0x02c,0x0000000d, +0x02a,0x0000000a, +0x02b,0x0000060a, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x0000000b, +0x02b,0x0000060a, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x0000000c, +0x02b,0x0000060a, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x0000000d, +0x02b,0x0000060a, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x0000000e, +0x02b,0x0000050b, +0x02b,0x00066666, +0x02c,0x0000001a, +0x02a,0x000e0000, +0x010,0x0004000f, +0x011,0x000e31fc, +0x010,0x0006000f, +0x011,0x000ff9f8, +0x010,0x0002000f, +0x011,0x000203f9, +0x010,0x0003000f, +0x011,0x000ff500, +0x010,0x00000000, +0x011,0x00000000, +0x010,0x0008000f, +0x011,0x0003f100, +0x010,0x0009000f, +0x011,0x00023100, +0x012,0x00032000, +0x012,0x00071000, +0x012,0x000b0000, +0x012,0x000fc000, +0x013,0x000287b3, +0x013,0x000244b7, +0x013,0x000204ab, +0x013,0x0001c49f, +0x013,0x00018493, +0x013,0x0001429b, +0x013,0x00010299, +0x013,0x0000c29c, +0x013,0x000081a0, +0x013,0x000040ac, +0x013,0x00000020, +0x014,0x0001944c, +0x014,0x00059444, +0x014,0x0009944c, +0x014,0x000d9444, +0x015,0x0000f424, +0x015,0x0004f424, +0x015,0x0008f424, +0x015,0x000cf424, +0x016,0x000e0330, +0x016,0x000a0330, +0x016,0x00060330, +0x016,0x00020330, +0x000,0x00010159, +0x018,0x0000f401, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01f,0x00080003, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01e,0x00044457, +0x01f,0x00080000, +0x000,0x00030159, +}; + +u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength] = { +0x0, }; + +u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength] = { +0x000,0x00030159, +0x001,0x00031284, +0x002,0x00098000, +0x003,0x00018c63, +0x004,0x000210e7, +0x009,0x0002044f, +0x00a,0x0001adb0, +0x00b,0x00054867, +0x00c,0x0008992e, +0x00d,0x0000e529, +0x00e,0x00039ce7, +0x00f,0x00000451, +0x019,0x00000000, +0x01a,0x00000255, +0x01b,0x00060a00, +0x01c,0x000fc378, +0x01d,0x000a1250, +0x01e,0x0004445f, +0x01f,0x00080001, +0x020,0x0000b614, +0x021,0x0006c000, +0x022,0x0000083c, +0x023,0x00001558, +0x024,0x00000060, +0x025,0x00000483, +0x026,0x0004f000, +0x027,0x000ec7d9, +0x028,0x000977c0, +0x029,0x00004783, +0x02a,0x00000001, +0x02b,0x00021334, +0x02a,0x00000000, +0x02b,0x00000054, +0x02a,0x00000001, +0x02b,0x00000808, +0x02b,0x00053333, +0x02c,0x0000000c, +0x02a,0x00000002, +0x02b,0x00000808, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000003, +0x02b,0x00000808, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000004, +0x02b,0x00000808, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x00000005, +0x02b,0x00000808, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x00000006, +0x02b,0x00000709, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x00000007, +0x02b,0x00000709, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x00000008, +0x02b,0x0000060a, +0x02b,0x0004b333, +0x02c,0x0000000d, +0x02a,0x00000009, +0x02b,0x0000060a, +0x02b,0x00053333, +0x02c,0x0000000d, +0x02a,0x0000000a, +0x02b,0x0000060a, +0x02b,0x0005b333, +0x02c,0x0000000d, +0x02a,0x0000000b, +0x02b,0x0000060a, +0x02b,0x00063333, +0x02c,0x0000000d, +0x02a,0x0000000c, +0x02b,0x0000060a, +0x02b,0x0006b333, +0x02c,0x0000000d, +0x02a,0x0000000d, +0x02b,0x0000060a, +0x02b,0x00073333, +0x02c,0x0000000d, +0x02a,0x0000000e, +0x02b,0x0000050b, +0x02b,0x00066666, +0x02c,0x0000001a, +0x02a,0x000e0000, +0x010,0x0004000f, +0x011,0x000e31fc, +0x010,0x0006000f, +0x011,0x000ff9f8, +0x010,0x0002000f, +0x011,0x000203f9, +0x010,0x0003000f, +0x011,0x000ff500, +0x010,0x00000000, +0x011,0x00000000, +0x010,0x0008000f, +0x011,0x0003f100, +0x010,0x0009000f, +0x011,0x00023100, +0x012,0x000d8000, +0x012,0x00090000, +0x012,0x00051000, +0x012,0x00012000, +0x013,0x00028fb4, +0x013,0x00024fa8, +0x013,0x000207a4, +0x013,0x0001c798, +0x013,0x000183a4, +0x013,0x00014398, +0x013,0x000101a4, +0x013,0x0000c198, +0x013,0x000080a4, +0x013,0x00004098, +0x013,0x00000000, +0x014,0x0001944c, +0x014,0x00059444, +0x014,0x0009944c, +0x014,0x000d9444, +0x015,0x0000f405, +0x015,0x0004f405, +0x015,0x0008f405, +0x015,0x000cf405, +0x016,0x000e0330, +0x016,0x000a0330, +0x016,0x00060330, +0x016,0x00020330, +0x000,0x00010159, +0x018,0x0000f401, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01f,0x00080003, +0x0fe,0x00000000, +0x0fe,0x00000000, +0x01e,0x00044457, +0x01f,0x00080000, +0x000,0x00030159, +}; + +u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength] = { +0x0, }; + +// MAC reg V13 - 2010-12-07 +u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength] = { +0x420,0x00000080, +0x423,0x00000000, +0x430,0x00000000, +0x431,0x00000000, +0x432,0x00000000, +0x433,0x00000001, +0x434,0x00000004, +0x435,0x00000005, +0x436,0x00000006, +0x437,0x00000007, +0x438,0x00000000, +0x439,0x00000000, +0x43a,0x00000000, +0x43b,0x00000001, +0x43c,0x00000004, +0x43d,0x00000005, +0x43e,0x00000006, +0x43f,0x00000007, +0x440,0x0000005d, +0x441,0x00000001, +0x442,0x00000000, +0x444,0x00000015, +0x445,0x000000f0, +0x446,0x0000000f, +0x447,0x00000000, +0x458,0x00000041, +0x459,0x000000a8, +0x45a,0x00000072, +0x45b,0x000000b9, +0x460,0x00000066, +0x461,0x00000066, +0x462,0x00000008, +0x463,0x00000003, +0x4c8,0x000000ff, +0x4c9,0x00000008, +0x4cc,0x000000ff, +0x4cd,0x000000ff, +0x4ce,0x00000001, +0x500,0x00000026, +0x501,0x000000a2, +0x502,0x0000002f, +0x503,0x00000000, +0x504,0x00000028, +0x505,0x000000a3, +0x506,0x0000005e, +0x507,0x00000000, +0x508,0x0000002b, +0x509,0x000000a4, +0x50a,0x0000005e, +0x50b,0x00000000, +0x50c,0x0000004f, +0x50d,0x000000a4, +0x50e,0x00000000, +0x50f,0x00000000, +0x512,0x0000001c, +0x514,0x0000000a, +0x515,0x00000010, +0x516,0x0000000a, +0x517,0x00000010, +0x51a,0x00000016, +0x524,0x0000000f, +0x525,0x0000004f, +0x546,0x00000040, +0x547,0x00000000, +0x550,0x00000010, +0x551,0x00000010, +0x559,0x00000002, +0x55a,0x00000002, +0x55d,0x000000ff, +0x605,0x00000030, +0x608,0x0000000e, +0x609,0x0000002a, +0x652,0x00000020, +0x63c,0x0000000a, +0x63d,0x0000000e, +0x63e,0x0000000a, +0x63f,0x0000000e, +0x66e,0x00000005, +0x700,0x00000021, +0x701,0x00000043, +0x702,0x00000065, +0x703,0x00000087, +0x708,0x00000021, +0x709,0x00000043, +0x70a,0x00000065, +0x70b,0x00000087, +}; + +u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength] = { +0x0, }; + +u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength] = { +0xc78,0x7b000001, +0xc78,0x7b010001, +0xc78,0x7b020001, +0xc78,0x7b030001, +0xc78,0x7b040001, +0xc78,0x7b050001, +0xc78,0x7a060001, +0xc78,0x79070001, +0xc78,0x78080001, +0xc78,0x77090001, +0xc78,0x760a0001, +0xc78,0x750b0001, +0xc78,0x740c0001, +0xc78,0x730d0001, +0xc78,0x720e0001, +0xc78,0x710f0001, +0xc78,0x70100001, +0xc78,0x6f110001, +0xc78,0x6e120001, +0xc78,0x6d130001, +0xc78,0x6c140001, +0xc78,0x6b150001, +0xc78,0x6a160001, +0xc78,0x69170001, +0xc78,0x68180001, +0xc78,0x67190001, +0xc78,0x661a0001, +0xc78,0x651b0001, +0xc78,0x641c0001, +0xc78,0x631d0001, +0xc78,0x621e0001, +0xc78,0x611f0001, +0xc78,0x60200001, +0xc78,0x49210001, +0xc78,0x48220001, +0xc78,0x47230001, +0xc78,0x46240001, +0xc78,0x45250001, +0xc78,0x44260001, +0xc78,0x43270001, +0xc78,0x42280001, +0xc78,0x41290001, +0xc78,0x402a0001, +0xc78,0x262b0001, +0xc78,0x252c0001, +0xc78,0x242d0001, +0xc78,0x232e0001, +0xc78,0x222f0001, +0xc78,0x21300001, +0xc78,0x20310001, +0xc78,0x06320001, +0xc78,0x05330001, +0xc78,0x04340001, +0xc78,0x03350001, +0xc78,0x02360001, +0xc78,0x01370001, +0xc78,0x00380001, +0xc78,0x00390001, +0xc78,0x003a0001, +0xc78,0x003b0001, +0xc78,0x003c0001, +0xc78,0x003d0001, +0xc78,0x003e0001, +0xc78,0x003f0001, +0xc78,0x7b400001, +0xc78,0x7b410001, +0xc78,0x7b420001, +0xc78,0x7b430001, +0xc78,0x7b440001, +0xc78,0x7b450001, +0xc78,0x7a460001, +0xc78,0x79470001, +0xc78,0x78480001, +0xc78,0x77490001, +0xc78,0x764a0001, +0xc78,0x754b0001, +0xc78,0x744c0001, +0xc78,0x734d0001, +0xc78,0x724e0001, +0xc78,0x714f0001, +0xc78,0x70500001, +0xc78,0x6f510001, +0xc78,0x6e520001, +0xc78,0x6d530001, +0xc78,0x6c540001, +0xc78,0x6b550001, +0xc78,0x6a560001, +0xc78,0x69570001, +0xc78,0x68580001, +0xc78,0x67590001, +0xc78,0x665a0001, +0xc78,0x655b0001, +0xc78,0x645c0001, +0xc78,0x635d0001, +0xc78,0x625e0001, +0xc78,0x615f0001, +0xc78,0x60600001, +0xc78,0x49610001, +0xc78,0x48620001, +0xc78,0x47630001, +0xc78,0x46640001, +0xc78,0x45650001, +0xc78,0x44660001, +0xc78,0x43670001, +0xc78,0x42680001, +0xc78,0x41690001, +0xc78,0x406a0001, +0xc78,0x266b0001, +0xc78,0x256c0001, +0xc78,0x246d0001, +0xc78,0x236e0001, +0xc78,0x226f0001, +0xc78,0x21700001, +0xc78,0x20710001, +0xc78,0x06720001, +0xc78,0x05730001, +0xc78,0x04740001, +0xc78,0x03750001, +0xc78,0x02760001, +0xc78,0x01770001, +0xc78,0x00780001, +0xc78,0x00790001, +0xc78,0x007a0001, +0xc78,0x007b0001, +0xc78,0x007c0001, +0xc78,0x007d0001, +0xc78,0x007e0001, +0xc78,0x007f0001, +0xc78,0x3800001e, +0xc78,0x3801001e, +0xc78,0x3802001e, +0xc78,0x3803001e, +0xc78,0x3804001e, +0xc78,0x3805001e, +0xc78,0x3806001e, +0xc78,0x3807001e, +0xc78,0x3808001e, +0xc78,0x3c09001e, +0xc78,0x3e0a001e, +0xc78,0x400b001e, +0xc78,0x440c001e, +0xc78,0x480d001e, +0xc78,0x4c0e001e, +0xc78,0x500f001e, +0xc78,0x5210001e, +0xc78,0x5611001e, +0xc78,0x5a12001e, +0xc78,0x5e13001e, +0xc78,0x6014001e, +0xc78,0x6015001e, +0xc78,0x6016001e, +0xc78,0x6217001e, +0xc78,0x6218001e, +0xc78,0x6219001e, +0xc78,0x621a001e, +0xc78,0x621b001e, +0xc78,0x621c001e, +0xc78,0x621d001e, +0xc78,0x621e001e, +0xc78,0x621f001e, +}; + +u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength] = { +0xc78,0x7b000001, +0xc78,0x7b010001, +0xc78,0x7b020001, +0xc78,0x7b030001, +0xc78,0x7b040001, +0xc78,0x7b050001, +0xc78,0x7a060001, +0xc78,0x79070001, +0xc78,0x78080001, +0xc78,0x77090001, +0xc78,0x760a0001, +0xc78,0x750b0001, +0xc78,0x740c0001, +0xc78,0x730d0001, +0xc78,0x720e0001, +0xc78,0x710f0001, +0xc78,0x70100001, +0xc78,0x6f110001, +0xc78,0x6e120001, +0xc78,0x6d130001, +0xc78,0x6c140001, +0xc78,0x6b150001, +0xc78,0x6a160001, +0xc78,0x69170001, +0xc78,0x68180001, +0xc78,0x67190001, +0xc78,0x661a0001, +0xc78,0x651b0001, +0xc78,0x641c0001, +0xc78,0x631d0001, +0xc78,0x621e0001, +0xc78,0x611f0001, +0xc78,0x60200001, +0xc78,0x49210001, +0xc78,0x48220001, +0xc78,0x47230001, +0xc78,0x46240001, +0xc78,0x45250001, +0xc78,0x44260001, +0xc78,0x43270001, +0xc78,0x42280001, +0xc78,0x41290001, +0xc78,0x402a0001, +0xc78,0x262b0001, +0xc78,0x252c0001, +0xc78,0x242d0001, +0xc78,0x232e0001, +0xc78,0x222f0001, +0xc78,0x21300001, +0xc78,0x20310001, +0xc78,0x06320001, +0xc78,0x05330001, +0xc78,0x04340001, +0xc78,0x03350001, +0xc78,0x02360001, +0xc78,0x01370001, +0xc78,0x00380001, +0xc78,0x00390001, +0xc78,0x003a0001, +0xc78,0x003b0001, +0xc78,0x003c0001, +0xc78,0x003d0001, +0xc78,0x003e0001, +0xc78,0x003f0001, +0xc78,0x7b400001, +0xc78,0x7b410001, +0xc78,0x7b420001, +0xc78,0x7b430001, +0xc78,0x7b440001, +0xc78,0x7b450001, +0xc78,0x7a460001, +0xc78,0x79470001, +0xc78,0x78480001, +0xc78,0x77490001, +0xc78,0x764a0001, +0xc78,0x754b0001, +0xc78,0x744c0001, +0xc78,0x734d0001, +0xc78,0x724e0001, +0xc78,0x714f0001, +0xc78,0x70500001, +0xc78,0x6f510001, +0xc78,0x6e520001, +0xc78,0x6d530001, +0xc78,0x6c540001, +0xc78,0x6b550001, +0xc78,0x6a560001, +0xc78,0x69570001, +0xc78,0x68580001, +0xc78,0x67590001, +0xc78,0x665a0001, +0xc78,0x655b0001, +0xc78,0x645c0001, +0xc78,0x635d0001, +0xc78,0x625e0001, +0xc78,0x615f0001, +0xc78,0x60600001, +0xc78,0x49610001, +0xc78,0x48620001, +0xc78,0x47630001, +0xc78,0x46640001, +0xc78,0x45650001, +0xc78,0x44660001, +0xc78,0x43670001, +0xc78,0x42680001, +0xc78,0x41690001, +0xc78,0x406a0001, +0xc78,0x266b0001, +0xc78,0x256c0001, +0xc78,0x246d0001, +0xc78,0x236e0001, +0xc78,0x226f0001, +0xc78,0x21700001, +0xc78,0x20710001, +0xc78,0x06720001, +0xc78,0x05730001, +0xc78,0x04740001, +0xc78,0x03750001, +0xc78,0x02760001, +0xc78,0x01770001, +0xc78,0x00780001, +0xc78,0x00790001, +0xc78,0x007a0001, +0xc78,0x007b0001, +0xc78,0x007c0001, +0xc78,0x007d0001, +0xc78,0x007e0001, +0xc78,0x007f0001, +0xc78,0x3800001e, +0xc78,0x3801001e, +0xc78,0x3802001e, +0xc78,0x3803001e, +0xc78,0x3804001e, +0xc78,0x3805001e, +0xc78,0x3806001e, +0xc78,0x3807001e, +0xc78,0x3808001e, +0xc78,0x3c09001e, +0xc78,0x3e0a001e, +0xc78,0x400b001e, +0xc78,0x440c001e, +0xc78,0x480d001e, +0xc78,0x4c0e001e, +0xc78,0x500f001e, +0xc78,0x5210001e, +0xc78,0x5611001e, +0xc78,0x5a12001e, +0xc78,0x5e13001e, +0xc78,0x6014001e, +0xc78,0x6015001e, +0xc78,0x6016001e, +0xc78,0x6217001e, +0xc78,0x6218001e, +0xc78,0x6219001e, +0xc78,0x621a001e, +0xc78,0x621b001e, +0xc78,0x621c001e, +0xc78,0x621d001e, +0xc78,0x621e001e, +0xc78,0x621f001e, +}; + +u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength] = { +0xc78,0x7b000001, +0xc78,0x7b010001, +0xc78,0x7b020001, +0xc78,0x7b030001, +0xc78,0x7b040001, +0xc78,0x7b050001, +0xc78,0x7b060001, +0xc78,0x7b070001, +0xc78,0x7b080001, +0xc78,0x7a090001, +0xc78,0x790a0001, +0xc78,0x780b0001, +0xc78,0x770c0001, +0xc78,0x760d0001, +0xc78,0x750e0001, +0xc78,0x740f0001, +0xc78,0x73100001, +0xc78,0x72110001, +0xc78,0x71120001, +0xc78,0x70130001, +0xc78,0x6f140001, +0xc78,0x6e150001, +0xc78,0x6d160001, +0xc78,0x6c170001, +0xc78,0x6b180001, +0xc78,0x6a190001, +0xc78,0x691a0001, +0xc78,0x681b0001, +0xc78,0x671c0001, +0xc78,0x661d0001, +0xc78,0x651e0001, +0xc78,0x641f0001, +0xc78,0x63200001, +0xc78,0x62210001, +0xc78,0x61220001, +0xc78,0x60230001, +0xc78,0x46240001, +0xc78,0x45250001, +0xc78,0x44260001, +0xc78,0x43270001, +0xc78,0x42280001, +0xc78,0x41290001, +0xc78,0x402a0001, +0xc78,0x262b0001, +0xc78,0x252c0001, +0xc78,0x242d0001, +0xc78,0x232e0001, +0xc78,0x222f0001, +0xc78,0x21300001, +0xc78,0x20310001, +0xc78,0x06320001, +0xc78,0x05330001, +0xc78,0x04340001, +0xc78,0x03350001, +0xc78,0x02360001, +0xc78,0x01370001, +0xc78,0x00380001, +0xc78,0x00390001, +0xc78,0x003a0001, +0xc78,0x003b0001, +0xc78,0x003c0001, +0xc78,0x003d0001, +0xc78,0x003e0001, +0xc78,0x003f0001, +0xc78,0x7b400001, +0xc78,0x7b410001, +0xc78,0x7b420001, +0xc78,0x7b430001, +0xc78,0x7b440001, +0xc78,0x7b450001, +0xc78,0x7b460001, +0xc78,0x7b470001, +0xc78,0x7b480001, +0xc78,0x7a490001, +0xc78,0x794a0001, +0xc78,0x784b0001, +0xc78,0x774c0001, +0xc78,0x764d0001, +0xc78,0x754e0001, +0xc78,0x744f0001, +0xc78,0x73500001, +0xc78,0x72510001, +0xc78,0x71520001, +0xc78,0x70530001, +0xc78,0x6f540001, +0xc78,0x6e550001, +0xc78,0x6d560001, +0xc78,0x6c570001, +0xc78,0x6b580001, +0xc78,0x6a590001, +0xc78,0x695a0001, +0xc78,0x685b0001, +0xc78,0x675c0001, +0xc78,0x665d0001, +0xc78,0x655e0001, +0xc78,0x645f0001, +0xc78,0x63600001, +0xc78,0x62610001, +0xc78,0x61620001, +0xc78,0x60630001, +0xc78,0x46640001, +0xc78,0x45650001, +0xc78,0x44660001, +0xc78,0x43670001, +0xc78,0x42680001, +0xc78,0x41690001, +0xc78,0x406a0001, +0xc78,0x266b0001, +0xc78,0x256c0001, +0xc78,0x246d0001, +0xc78,0x236e0001, +0xc78,0x226f0001, +0xc78,0x21700001, +0xc78,0x20710001, +0xc78,0x06720001, +0xc78,0x05730001, +0xc78,0x04740001, +0xc78,0x03750001, +0xc78,0x02760001, +0xc78,0x01770001, +0xc78,0x00780001, +0xc78,0x00790001, +0xc78,0x007a0001, +0xc78,0x007b0001, +0xc78,0x007c0001, +0xc78,0x007d0001, +0xc78,0x007e0001, +0xc78,0x007f0001, +0xc78,0x3800001e, +0xc78,0x3801001e, +0xc78,0x3802001e, +0xc78,0x3803001e, +0xc78,0x3804001e, +0xc78,0x3805001e, +0xc78,0x3806001e, +0xc78,0x3807001e, +0xc78,0x3808001e, +0xc78,0x3c09001e, +0xc78,0x3e0a001e, +0xc78,0x400b001e, +0xc78,0x440c001e, +0xc78,0x480d001e, +0xc78,0x4c0e001e, +0xc78,0x500f001e, +0xc78,0x5210001e, +0xc78,0x5611001e, +0xc78,0x5a12001e, +0xc78,0x5e13001e, +0xc78,0x6014001e, +0xc78,0x6015001e, +0xc78,0x6016001e, +0xc78,0x6217001e, +0xc78,0x6218001e, +0xc78,0x6219001e, +0xc78,0x621a001e, +0xc78,0x621b001e, +0xc78,0x621c001e, +0xc78,0x621d001e, +0xc78,0x621e001e, +0xc78,0x621f001e, +}; + diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c old mode 100755 new mode 100644 index 27a31ce326c3d4..66970f1c079980 --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c @@ -1,2564 +1,2564 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/*Created on 2011/11/ 8, 14:15*/ - -#include -#include "Hal8192CUHWImg_wowlan.h" - - -u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength] = { -0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x43,0x72,0x34,0x00,0x00, -0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x02,0x5c,0xb6,0x00,0x00,0x00,0x00,0x00,0x02,0x5d,0x99,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, -0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, -0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, -0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, -0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, -0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, 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Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/*Created on 2011/11/ 8, 14:15*/ + +#include +#include "Hal8192CUHWImg_wowlan.h" + + +u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength] = { +0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x43,0x72,0x34,0x00,0x00, +0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 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b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c old mode 100755 new mode 100644 index 6665648763bcf2..f39b4cb7bc53d6 --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c @@ -1,2668 +1,2668 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ - -#include "drv_types.h" -#include "rtl8192c_hal.h" - -//================================================================================ -// Constant. -//================================================================================ - -// -// Default LED behavior. -// -#define LED_BLINK_NORMAL_INTERVAL 100 -#define LED_BLINK_SLOWLY_INTERVAL 200 -#define LED_BLINK_LONG_INTERVAL 400 - -#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 -#define LED_BLINK_LINK_INTERVAL_ALPHA 500 //500 -#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 //150 -#define LED_BLINK_FASTER_INTERVAL_ALPHA 50 -#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 - -//================================================================================ -// LED object. -//================================================================================ - - -//================================================================================ -// Prototype of protected function. -//================================================================================ - - -static void -BlinkTimerCallback( - unsigned long data - ); - -static void -BlinkWorkItemCallback( - struct work_struct *work - ); - -// -// Description: -// Reset blinking status of LED_871x object. -// -static void -ResetLedStatus(PLED_871x pLed) { - pLed->CurrLedState = LED_OFF; // Current LED state. - pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. - - pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. - pLed->bLedNoLinkBlinkInProgress = _FALSE; - pLed->bLedLinkBlinkInProgress = _FALSE; - pLed->bLedStartToLinkBlinkInProgress = _FALSE; - pLed->bLedScanBlinkInProgress = _FALSE; - pLed->bLedWPSBlinkInProgress = _FALSE; - pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. - pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either LED_ON or LED_OFF are. -} - -//================================================================================ -// LED_819xUsb routines. -//================================================================================ - -// -// Description: -// Initialize an LED_871x object. -// -static void -InitLed871x( - _adapter *padapter, - PLED_871x pLed, - LED_PIN_871x LedPin - ) -{ - pLed->padapter = padapter; - pLed->LedPin = LedPin; - - ResetLedStatus(pLed); - - _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); - _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); -} - - -// -// Description: -// DeInitialize an LED_871x object. -// -static void -DeInitLed871x( - PLED_871x pLed - ) -{ - _cancel_timer_ex(&(pLed->BlinkTimer)); - ResetLedStatus(pLed); -} - -// -// Description: -// Turn on LED according to LedPin specified. -// -static void -SwLedOn( - _adapter *padapter, - PLED_871x pLed -) -{ - u8 LedCfg; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - return; - } - - if( (BOARD_MINICARD == pHalData->BoardType )|| - (BOARD_USB_SOLO == pHalData->BoardType)|| - (BOARD_USB_COMBO == pHalData->BoardType)) - { - LedCfg = rtw_read8(padapter, REG_LEDCFG2); - switch(pLed->LedPin) - { - case LED_PIN_GPIO0: - break; - - case LED_PIN_LED0: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. - break; - - case LED_PIN_LED1: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. - break; - - default: - break; - - } - } - else - { - switch(pLed->LedPin) - { - case LED_PIN_GPIO0: - break; - - case LED_PIN_LED0: -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - if(pHalData->AntDivCfg) - { - LedCfg = rtw_read8(padapter, REG_LEDCFG2); - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xe0)|BIT7|BIT6|BIT5); // SW control led0 on. - //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); - } - else -#endif - { - LedCfg = rtw_read8(padapter, REG_LEDCFG0); - rtw_write8(padapter,REG_LEDCFG0, LedCfg&0x70); // SW control led0 on. - //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); - } - break; - - case LED_PIN_LED1: - LedCfg = rtw_read8(padapter,(REG_LEDCFG1)); - rtw_write8(padapter,(REG_LEDCFG1), LedCfg&0x70); // SW control led1 on. - //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); - - break; - - default: - break; - } - } - pLed->bLedOn = _TRUE; - -} - - -// -// Description: -// Turn off LED according to LedPin specified. -// -static void -SwLedOff( - _adapter *padapter, - PLED_871x pLed -) -{ - u8 LedCfg; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - goto exit; - } - - if( (BOARD_MINICARD == pHalData->BoardType )|| - (BOARD_USB_SOLO == pHalData->BoardType)|| - (BOARD_USB_COMBO == pHalData->BoardType)) - { - LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E - - switch(pLed->LedPin) - { - - case LED_PIN_GPIO0: - break; - - case LED_PIN_LED0: - if(BOARD_USB_COMBO == pHalData->BoardType) - { - LedCfg &= 0x90; // Set to software control. - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); - LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); - LedCfg &= 0xFE; - rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); - } - else - { - LedCfg &= 0xf0; // Set to software control. - if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT1|BIT5|BIT6)); - else - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); - } - break; - - case LED_PIN_LED1: - LedCfg &= 0x0f; // Set to software control. - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); - break; - - default: - break; - } - } - else - { - switch(pLed->LedPin) - { - case LED_PIN_GPIO0: - break; - - case LED_PIN_LED0: -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - if(pHalData->AntDivCfg) - { - LedCfg = rtw_read8(padapter, REG_LEDCFG2); - LedCfg &= 0xe0; // Set to software control. - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5)); - //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); - } - else -#endif - { - LedCfg = rtw_read8(padapter, REG_LEDCFG0); - LedCfg &= 0x70; // Set to software control. - rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3)); - //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); - } - break; - - case LED_PIN_LED1: - LedCfg = rtw_read8(padapter, (REG_LEDCFG1)); - LedCfg &= 0x70; // Set to software control. - rtw_write8(padapter, (REG_LEDCFG1), (LedCfg|BIT3)); - //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); - break; - - default: - break; - } - } - -exit: - pLed->bLedOn = _FALSE; - -} - -//================================================================================ -// Interface to manipulate LED objects. -//================================================================================ - - -// -// Description: -// Implementation of LED blinking behavior. -// It toggle off LED and schedule corresponding timer if necessary. -// -static void -SwLedBlink( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - u8 bStopBlinking = _FALSE; - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON ) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - // Determine if we shall change LED state again. - pLed->BlinkTimes--; - switch(pLed->CurrLedState) - { - - case LED_BLINK_NORMAL: - if(pLed->BlinkTimes == 0) - { - bStopBlinking = _TRUE; - } - break; - - case LED_BLINK_StartToBlink: - if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) - { - bStopBlinking = _TRUE; - } - if( check_fwstate(pmlmepriv, _FW_LINKED) && - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) - { - bStopBlinking = _TRUE; - } - else if(pLed->BlinkTimes == 0) - { - bStopBlinking = _TRUE; - } - break; - - case LED_BLINK_WPS: - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - break; - - - default: - bStopBlinking = _TRUE; - break; - - } - - if(bStopBlinking) - { - //if( padapter->pwrctrlpriv.cpwm >= PS_STATE_S2) - if(0) - { - SwLedOff(padapter, pLed); - } - else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) - { - SwLedOn(padapter, pLed); - } - else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && pLed->bLedOn == _TRUE) - { - SwLedOff(padapter, pLed); - } - - pLed->BlinkTimes = 0; - pLed->bLedBlinkInProgress = _FALSE; - } - else - { - // Assign LED state to toggle. - if( pLed->BlinkingLedState == LED_ON ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - - // Schedule a timer to toggle LED state. - switch( pLed->CurrLedState ) - { - case LED_BLINK_NORMAL: - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - break; - - case LED_BLINK_SLOWLY: - case LED_BLINK_StartToBlink: - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - break; - - case LED_BLINK_WPS: - { - if( pLed->BlinkingLedState == LED_ON ) - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); - else - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); - } - break; - - default: - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - break; - } - } -} - - -static void -SwLedBlink1( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - PLED_871x pLed1 = &(ledpriv->SwLed1); - u8 bStopBlinking = _FALSE; - - if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) - pLed = &(ledpriv->SwLed1); - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON ) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - - if(pHalData->EEPROMCustomerID == RT_CID_DEFAULT) - { - if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - if(!pLed1->bSWLedCtrl) - { - SwLedOn(padapter, pLed1); - pLed1->bSWLedCtrl = _TRUE; - } - else if(!pLed1->bLedOn) - SwLedOn(padapter, pLed1); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); - } - else - { - if(!pLed1->bSWLedCtrl) - { - SwLedOff(padapter, pLed1); - pLed1->bSWLedCtrl = _TRUE; - } - else if(pLed1->bLedOn) - SwLedOff(padapter, pLed1); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); - } - } - - - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - ResetLedStatus(pLed); - return; - } - - - switch(pLed->CurrLedState) - { - case LED_BLINK_SLOWLY: - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - break; - - case LED_BLINK_NORMAL: - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); - break; - - case LED_SCAN_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - - if(bStopBlinking) - { - if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - pLed->bLedLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_NORMAL; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) - { - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->bLedScanBlinkInProgress = _FALSE; - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_TXRX_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - if(bStopBlinking) - { - if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - pLed->bLedLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_NORMAL; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) - { - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->BlinkTimes = 0; - pLed->bLedBlinkInProgress = _FALSE; - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - break; - - case LED_BLINK_WPS: - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - break; - - case LED_BLINK_WPS_STOP: //WPS success - if(pLed->BlinkingLedState == LED_ON) - bStopBlinking = _FALSE; - else - bStopBlinking = _TRUE; - - if(bStopBlinking) - { - pLed->bLedLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_NORMAL; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - - pLed->bLedWPSBlinkInProgress = _FALSE; - } - else - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); - } - break; - - default: - break; - } - -} - -static void -SwLedBlink2( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - u8 bStopBlinking = _FALSE; - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - switch(pLed->CurrLedState) - { - case LED_SCAN_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); - - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->bLedScanBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - } - break; - - case LED_TXRX_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); - - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->bLedBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - } - break; - - default: - break; - } - -} - -static void -SwLedBlink3( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - u8 bStopBlinking = _FALSE; - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON ) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - if(pLed->CurrLedState != LED_BLINK_WPS_STOP) - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - switch(pLed->CurrLedState) - { - case LED_SCAN_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - if( !pLed->bLedOn ) - SwLedOn(padapter, pLed); - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - if( pLed->bLedOn ) - SwLedOff(padapter, pLed); - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->bLedScanBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - } - break; - - case LED_TXRX_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - - if( !pLed->bLedOn ) - SwLedOn(padapter, pLed); - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - - if( pLed->bLedOn ) - SwLedOff(padapter, pLed); - - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->bLedBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - } - break; - - case LED_BLINK_WPS: - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - break; - - case LED_BLINK_WPS_STOP: //WPS success - if(pLed->BlinkingLedState == LED_ON) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); - bStopBlinking = _FALSE; - } - else - { - bStopBlinking = _TRUE; - } - - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) - { - SwLedOff(padapter, pLed); - } - else - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - pLed->bLedWPSBlinkInProgress = _FALSE; - } - break; - - - default: - break; - } - -} - - -static void -SwLedBlink4( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - PLED_871x pLed1 = &(ledpriv->SwLed1); - u8 bStopBlinking = _FALSE; - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON ) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) - { - pLed1->BlinkingLedState = LED_OFF; - pLed1->CurrLedState = LED_OFF; - SwLedOff(padapter, pLed1); - } - - switch(pLed->CurrLedState) - { - case LED_BLINK_SLOWLY: - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - break; - - case LED_BLINK_StartToBlink: - if( pLed->bLedOn ) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - } - break; - - case LED_SCAN_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _FALSE; - } - - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - SwLedOff(padapter, pLed); - } - else - { - pLed->bLedNoLinkBlinkInProgress = _FALSE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - } - pLed->bLedScanBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - } - break; - - case LED_TXRX_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - SwLedOff(padapter, pLed); - } - else - { - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - } - pLed->bLedBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - } - break; - - case LED_BLINK_WPS: - if( pLed->bLedOn ) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - } - break; - - case LED_BLINK_WPS_STOP: //WPS authentication fail - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - break; - - case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap - pLed->BlinkTimes--; - if(pLed->BlinkTimes == 0) - { - if(pLed->bLedOn) - { - pLed->BlinkTimes = 1; - } - else - { - bStopBlinking = _TRUE; - } - } - - if(bStopBlinking) - { - pLed->BlinkTimes = 10; - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - } - break; - - - default: - break; - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); - - -} - -static void -SwLedBlink5( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - u8 bStopBlinking = _FALSE; - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON ) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - switch(pLed->CurrLedState) - { - case LED_SCAN_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - if(pLed->bLedOn) - SwLedOff(padapter, pLed); - } - else - { pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - if(!pLed->bLedOn) - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - - pLed->bLedScanBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - } - break; - - - case LED_TXRX_BLINK: - pLed->BlinkTimes--; - if( pLed->BlinkTimes == 0 ) - { - bStopBlinking = _TRUE; - } - - if(bStopBlinking) - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - if(pLed->bLedOn) - SwLedOff(padapter, pLed); - } - else - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - if(!pLed->bLedOn) - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - - pLed->bLedBlinkInProgress = _FALSE; - } - else - { - if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) - { - SwLedOff(padapter, pLed); - } - else - { - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - } - break; - - default: - break; - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); - - -} - -static void -SwLedBlink6( - PLED_871x pLed - ) -{ - _adapter *padapter = pLed->padapter; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - u8 bStopBlinking = _FALSE; - - // Change LED according to BlinkingLedState specified. - if( pLed->BlinkingLedState == LED_ON ) - { - SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); - } - else - { - SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); -} - - -// -// Description: -// Callback function of LED BlinkTimer, -// it just schedules to corresponding BlinkWorkItem. -// -static void -BlinkTimerCallback( - unsigned long data - ) -{ - PLED_871x pLed = (PLED_871x)data; - _adapter *padapter = pLed->padapter; - - //DBG_871X("%s\n", __FUNCTION__); - - if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); - return; - } - -#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD - rtw_led_blink_cmd(padapter, pLed); -#else - _set_workitem(&(pLed->BlinkWorkItem)); -#endif -} - -// -// Description: -// Handler function of LED Blinking. -// We dispatch acture LED blink action according to LedStrategy. -// -void BlinkHandler(PLED_871x pLed) -{ - struct led_priv *ledpriv = &(pLed->padapter->ledpriv); - _adapter *padapter = pLed->padapter; - - //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); - - if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); - return; - } - - switch(ledpriv->LedStrategy) - { - case SW_LED_MODE0: - SwLedBlink(pLed); - break; - - case SW_LED_MODE1: - SwLedBlink1(pLed); - break; - - case SW_LED_MODE2: - SwLedBlink2(pLed); - break; - - case SW_LED_MODE3: - SwLedBlink3(pLed); - break; - - case SW_LED_MODE4: - SwLedBlink4(pLed); - break; - - case SW_LED_MODE5: - SwLedBlink5(pLed); - break; - - case SW_LED_MODE6: - SwLedBlink6(pLed); - break; - - default: - //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); - //SwLedBlink(pLed); - break; - } -} - -// -// Description: -// Callback function of LED BlinkWorkItem. -// We dispatch acture LED blink action according to LedStrategy. -// -static void BlinkWorkItemCallback(struct work_struct *work) -{ - PLED_871x pLed = container_of(work, LED_871x, BlinkWorkItem); - BlinkHandler(pLed); -} - - - -//================================================================================ -// Default LED behavior. -//================================================================================ - -// -// Description: -// Implement each led action for SW_LED_MODE0. -// This is default strategy. -// -static void -SwLedControlMode0( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - PLED_871x pLed = &(ledpriv->SwLed1); - - // Decide led state - switch(LedAction) - { - case LED_CTL_TX: - case LED_CTL_RX: - if( pLed->bLedBlinkInProgress == _FALSE ) - { - pLed->bLedBlinkInProgress = _TRUE; - - pLed->CurrLedState = LED_BLINK_NORMAL; - pLed->BlinkTimes = 2; - - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - } - break; - - case LED_CTL_START_TO_LINK: - if( pLed->bLedBlinkInProgress == _FALSE ) - { - pLed->bLedBlinkInProgress = _TRUE; - - pLed->CurrLedState = LED_BLINK_StartToBlink; - pLed->BlinkTimes = 24; - - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - } - else - { - pLed->CurrLedState = LED_BLINK_StartToBlink; - } - break; - - case LED_CTL_LINK: - pLed->CurrLedState = LED_ON; - if( pLed->bLedBlinkInProgress == _FALSE ) - { - SwLedOn(padapter, pLed); - } - break; - - case LED_CTL_NO_LINK: - pLed->CurrLedState = LED_OFF; - if( pLed->bLedBlinkInProgress == _FALSE ) - { - SwLedOff(padapter, pLed); - } - break; - - case LED_CTL_POWER_OFF: - pLed->CurrLedState = LED_OFF; - if(pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - SwLedOff(padapter, pLed); - break; - - case LED_CTL_START_WPS: - if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == LED_ON) - { - pLed->bLedBlinkInProgress = _TRUE; - - pLed->CurrLedState = LED_BLINK_WPS; - pLed->BlinkTimes = 20; - - if( pLed->bLedOn ) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); - } - } - break; - - case LED_CTL_STOP_WPS: - if(pLed->bLedBlinkInProgress) - { - pLed->CurrLedState = LED_OFF; - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - break; - - - default: - break; - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); - -} - - //ALPHA, added by chiyoko, 20090106 -static void -SwLedControlMode1( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct led_priv *ledpriv = &(padapter->ledpriv); - PLED_871x pLed = &(ledpriv->SwLed0); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - - if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) - pLed = &(ledpriv->SwLed1); - - switch(LedAction) - { - case LED_CTL_POWER_ON: - case LED_CTL_START_TO_LINK: - case LED_CTL_NO_LINK: - if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - if( pLed->bLedLinkBlinkInProgress == _TRUE ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - } - break; - - case LED_CTL_LINK: - if( pLed->bLedLinkBlinkInProgress == _FALSE ) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - pLed->bLedLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_NORMAL; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); - } - break; - - case LED_CTL_SITE_SURVEY: - if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) - ; - else if(pLed->bLedScanBlinkInProgress ==_FALSE) - { - if(IS_LED_WPS_BLINKING(pLed)) - return; - - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedLinkBlinkInProgress == _TRUE ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - pLed->bLedScanBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_SCAN_BLINK; - pLed->BlinkTimes = 24; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_CTL_TX: - case LED_CTL_RX: - if(pLed->bLedBlinkInProgress ==_FALSE) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedLinkBlinkInProgress == _TRUE ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - pLed->bLedBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_TXRX_BLINK; - pLed->BlinkTimes = 2; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - break; - - case LED_CTL_START_WPS: //wait until xinpin finish - case LED_CTL_START_WPS_BOTTON: - if(pLed->bLedWPSBlinkInProgress ==_FALSE) - { - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedLinkBlinkInProgress == _TRUE ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if(pLed->bLedScanBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - pLed->bLedWPSBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_WPS; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - - case LED_CTL_STOP_WPS: - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedLinkBlinkInProgress == _TRUE ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if(pLed->bLedScanBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - } - else - { - pLed->bLedWPSBlinkInProgress = _TRUE; - } - - pLed->CurrLedState = LED_BLINK_WPS_STOP; - if(pLed->bLedOn) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), 0); - } - break; - - case LED_CTL_STOP_WPS_FAIL: - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - break; - - case LED_CTL_POWER_OFF: - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - if( pLed->bLedNoLinkBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedLinkBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if( pLed->bLedWPSBlinkInProgress ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - if( pLed->bLedScanBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - - SwLedOff(padapter, pLed); - break; - - default: - break; - - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -} - - //Arcadyan/Sitecom , added by chiyoko, 20090216 -static void -SwLedControlMode2( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - PLED_871x pLed = &(ledpriv->SwLed0); - - switch(LedAction) - { - case LED_CTL_SITE_SURVEY: - if(pmlmepriv->LinkDetectInfo.bBusyTraffic) - ; - else if(pLed->bLedScanBlinkInProgress ==_FALSE) - { - if(IS_LED_WPS_BLINKING(pLed)) - return; - - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - pLed->bLedScanBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_SCAN_BLINK; - pLed->BlinkTimes = 24; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_CTL_TX: - case LED_CTL_RX: - if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - - pLed->bLedBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_TXRX_BLINK; - pLed->BlinkTimes = 2; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - break; - - case LED_CTL_LINK: - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if( pLed->bLedScanBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - - _set_timer(&(pLed->BlinkTimer), 0); - break; - - case LED_CTL_START_WPS: //wait until xinpin finish - case LED_CTL_START_WPS_BOTTON: - if(pLed->bLedWPSBlinkInProgress ==_FALSE) - { - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if(pLed->bLedScanBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - pLed->bLedWPSBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), 0); - } - break; - - case LED_CTL_STOP_WPS: - pLed->bLedWPSBlinkInProgress = _FALSE; - if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) - { - SwLedOff(padapter, pLed); - } - else - { - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), 0); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - break; - - case LED_CTL_STOP_WPS_FAIL: - pLed->bLedWPSBlinkInProgress = _FALSE; - if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) - { - SwLedOff(padapter, pLed); - } - else - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), 0); - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); - } - break; - - case LED_CTL_START_TO_LINK: - case LED_CTL_NO_LINK: - if(!IS_LED_BLINKING(pLed)) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), 0); - } - break; - - case LED_CTL_POWER_OFF: - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if( pLed->bLedScanBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - if( pLed->bLedWPSBlinkInProgress ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - _set_timer(&(pLed->BlinkTimer), 0); - break; - - default: - break; - - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -} - - //COREGA, added by chiyoko, 20090316 - static void - SwLedControlMode3( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - PLED_871x pLed = &(ledpriv->SwLed0); - - switch(LedAction) - { - case LED_CTL_SITE_SURVEY: - if(pmlmepriv->LinkDetectInfo.bBusyTraffic) - ; - else if(pLed->bLedScanBlinkInProgress ==_FALSE) - { - if(IS_LED_WPS_BLINKING(pLed)) - return; - - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - pLed->bLedScanBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_SCAN_BLINK; - pLed->BlinkTimes = 24; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_CTL_TX: - case LED_CTL_RX: - if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - - pLed->bLedBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_TXRX_BLINK; - pLed->BlinkTimes = 2; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - break; - - case LED_CTL_LINK: - if(IS_LED_WPS_BLINKING(pLed)) - return; - - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if( pLed->bLedScanBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - - _set_timer(&(pLed->BlinkTimer), 0); - break; - - case LED_CTL_START_WPS: //wait until xinpin finish - case LED_CTL_START_WPS_BOTTON: - if(pLed->bLedWPSBlinkInProgress ==_FALSE) - { - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if(pLed->bLedScanBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - pLed->bLedWPSBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_WPS; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_CTL_STOP_WPS: - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - else - { - pLed->bLedWPSBlinkInProgress = _TRUE; - } - - pLed->CurrLedState = LED_BLINK_WPS_STOP; - if(pLed->bLedOn) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), 0); - } - - break; - - case LED_CTL_STOP_WPS_FAIL: - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), 0); - break; - - case LED_CTL_START_TO_LINK: - case LED_CTL_NO_LINK: - if(!IS_LED_BLINKING(pLed)) - { - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), 0); - } - break; - - case LED_CTL_POWER_OFF: - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if( pLed->bLedScanBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - if( pLed->bLedWPSBlinkInProgress ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - _set_timer(&(pLed->BlinkTimer), 0); - break; - - default: - break; - - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); -} - - - //Edimax-Belkin, added by chiyoko, 20090413 -static void -SwLedControlMode4( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - PLED_871x pLed = &(ledpriv->SwLed0); - PLED_871x pLed1 = &(ledpriv->SwLed1); - - switch(LedAction) - { - case LED_CTL_START_TO_LINK: - if(pLed1->bLedWPSBlinkInProgress) - { - pLed1->bLedWPSBlinkInProgress = _FALSE; - _cancel_timer_ex(&(pLed1->BlinkTimer)); - - pLed1->BlinkingLedState = LED_OFF; - pLed1->CurrLedState = LED_OFF; - - if(pLed1->bLedOn) - _set_timer(&(pLed->BlinkTimer), 0); - } - - if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - - pLed->bLedStartToLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_StartToBlink; - if( pLed->bLedOn ) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - } - } - break; - - case LED_CTL_LINK: - case LED_CTL_NO_LINK: - //LED1 settings - if(LedAction == LED_CTL_LINK) - { - if(pLed1->bLedWPSBlinkInProgress) - { - pLed1->bLedWPSBlinkInProgress = _FALSE; - _cancel_timer_ex(&(pLed1->BlinkTimer)); - - pLed1->BlinkingLedState = LED_OFF; - pLed1->CurrLedState = LED_OFF; - - if(pLed1->bLedOn) - _set_timer(&(pLed->BlinkTimer), 0); - } - } - - if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - } - break; - - case LED_CTL_SITE_SURVEY: - if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) - ; - else if(pLed->bLedScanBlinkInProgress ==_FALSE) - { - if(IS_LED_WPS_BLINKING(pLed)) - return; - - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - pLed->bLedScanBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_SCAN_BLINK; - pLed->BlinkTimes = 24; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_CTL_TX: - case LED_CTL_RX: - if(pLed->bLedBlinkInProgress ==_FALSE) - { - if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) - { - return; - } - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - pLed->bLedBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_TXRX_BLINK; - pLed->BlinkTimes = 2; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - break; - - case LED_CTL_START_WPS: //wait until xinpin finish - case LED_CTL_START_WPS_BOTTON: - if(pLed1->bLedWPSBlinkInProgress) - { - pLed1->bLedWPSBlinkInProgress = _FALSE; - _cancel_timer_ex(&(pLed1->BlinkTimer)); - - pLed1->BlinkingLedState = LED_OFF; - pLed1->CurrLedState = LED_OFF; - - if(pLed1->bLedOn) - _set_timer(&(pLed->BlinkTimer), 0); - } - - if(pLed->bLedWPSBlinkInProgress ==_FALSE) - { - if(pLed->bLedNoLinkBlinkInProgress == _TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if(pLed->bLedScanBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - pLed->bLedWPSBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_WPS; - if( pLed->bLedOn ) - { - pLed->BlinkingLedState = LED_OFF; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); - } - else - { - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - } - } - break; - - case LED_CTL_STOP_WPS: //WPS connect success - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - - break; - - case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - - //LED1 settings - if(pLed1->bLedWPSBlinkInProgress) - _cancel_timer_ex(&(pLed1->BlinkTimer)); - else - pLed1->bLedWPSBlinkInProgress = _TRUE; - - pLed1->CurrLedState = LED_BLINK_WPS_STOP; - if( pLed1->bLedOn ) - pLed1->BlinkingLedState = LED_OFF; - else - pLed1->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - - break; - - case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap - if(pLed->bLedWPSBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - - pLed->bLedNoLinkBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); - - //LED1 settings - if(pLed1->bLedWPSBlinkInProgress) - _cancel_timer_ex(&(pLed1->BlinkTimer)); - else - pLed1->bLedWPSBlinkInProgress = _TRUE; - - pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; - pLed1->BlinkTimes = 10; - if( pLed1->bLedOn ) - pLed1->BlinkingLedState = LED_OFF; - else - pLed1->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); - - break; - - case LED_CTL_POWER_OFF: - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - - if( pLed->bLedNoLinkBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedNoLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedLinkBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedLinkBlinkInProgress = _FALSE; - } - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - if( pLed->bLedWPSBlinkInProgress ) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedWPSBlinkInProgress = _FALSE; - } - if( pLed->bLedScanBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedScanBlinkInProgress = _FALSE; - } - if( pLed->bLedStartToLinkBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedStartToLinkBlinkInProgress = _FALSE; - } - - if( pLed1->bLedWPSBlinkInProgress ) - { - _cancel_timer_ex(&(pLed1->BlinkTimer)); - pLed1->bLedWPSBlinkInProgress = _FALSE; - } - - pLed1->BlinkingLedState = LED_UNKNOWN; - SwLedOff(padapter, pLed); - SwLedOff(padapter, pLed1); - break; - - default: - break; - - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -} - - - - //Sercomm-Belkin, added by chiyoko, 20090415 -static void -SwLedControlMode5( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - PLED_871x pLed = &(ledpriv->SwLed0); - - if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) - pLed = &(ledpriv->SwLed1); - - switch(LedAction) - { - case LED_CTL_POWER_ON: - case LED_CTL_NO_LINK: - case LED_CTL_LINK: //solid blue - pLed->CurrLedState = LED_ON; - pLed->BlinkingLedState = LED_ON; - - _set_timer(&(pLed->BlinkTimer), 0); - break; - - case LED_CTL_SITE_SURVEY: - if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) - ; - else if(pLed->bLedScanBlinkInProgress ==_FALSE) - { - if(pLed->bLedBlinkInProgress ==_TRUE) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - pLed->bLedScanBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_SCAN_BLINK; - pLed->BlinkTimes = 24; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); - } - break; - - case LED_CTL_TX: - case LED_CTL_RX: - if(pLed->bLedBlinkInProgress ==_FALSE) - { - if(pLed->CurrLedState == LED_SCAN_BLINK) - { - return; - } - pLed->bLedBlinkInProgress = _TRUE; - pLed->CurrLedState = LED_TXRX_BLINK; - pLed->BlinkTimes = 2; - if( pLed->bLedOn ) - pLed->BlinkingLedState = LED_OFF; - else - pLed->BlinkingLedState = LED_ON; - _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); - } - break; - - case LED_CTL_POWER_OFF: - pLed->CurrLedState = LED_OFF; - pLed->BlinkingLedState = LED_OFF; - - if( pLed->bLedBlinkInProgress) - { - _cancel_timer_ex(&(pLed->BlinkTimer)); - pLed->bLedBlinkInProgress = _FALSE; - } - - SwLedOff(padapter, pLed); - break; - - default: - break; - - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); -} - - //WNC-Corega, added by chiyoko, 20090902 -static void -SwLedControlMode6( - _adapter *padapter, - LED_CTL_MODE LedAction -) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - PLED_871x pLed0 = &(ledpriv->SwLed0); - - switch(LedAction) - { - case LED_CTL_POWER_ON: - case LED_CTL_LINK: - case LED_CTL_NO_LINK: - _cancel_timer_ex(&(pLed0->BlinkTimer)); - pLed0->CurrLedState = LED_ON; - pLed0->BlinkingLedState = LED_ON; - _set_timer(&(pLed0->BlinkTimer), 0); - break; - - case LED_CTL_POWER_OFF: - SwLedOff(padapter, pLed0); - break; - - default: - break; - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed->CurrLedState)); -} - - -// -// Description: -// Dispatch LED action according to pHalData->LedStrategy. -// -static void -LedControl871x( - _adapter *padapter, - LED_CTL_MODE LedAction - ) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - - if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) - ||(padapter->hw_init_completed == _FALSE) ) - { - return; - } - - - if( ledpriv->bRegUseLed == _FALSE) - return; - - //if (!priv->up) - // return; - - //if(priv->bInHctTest) - // return; - - if( (padapter->pwrctrlpriv.rf_pwrstate != rf_on && - padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) && - (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || - LedAction == LED_CTL_SITE_SURVEY || - LedAction == LED_CTL_LINK || - LedAction == LED_CTL_NO_LINK || - LedAction == LED_CTL_POWER_ON) ) - { - return; - } - - switch(ledpriv->LedStrategy) - { - case SW_LED_MODE0: - //SwLedControlMode0(padapter, LedAction); - break; - - case SW_LED_MODE1: - SwLedControlMode1(padapter, LedAction); - break; - case SW_LED_MODE2: - SwLedControlMode2(padapter, LedAction); - break; - - case SW_LED_MODE3: - SwLedControlMode3(padapter, LedAction); - break; - - case SW_LED_MODE4: - SwLedControlMode4(padapter, LedAction); - break; - - case SW_LED_MODE5: - SwLedControlMode5(padapter, LedAction); - break; - - case SW_LED_MODE6: - SwLedControlMode6(padapter, LedAction); - break; - - default: - break; - } - - RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); -} - -// -// Description: -// Initialize all LED_871x objects. -// -void -rtl8192cu_InitSwLeds( - _adapter *padapter - ) -{ - struct led_priv *pledpriv = &(padapter->ledpriv); - - pledpriv->LedControlHandler = LedControl871x; - - InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); - - InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); -} - - -// -// Description: -// DeInitialize all LED_819xUsb objects. -// -void -rtl8192cu_DeInitSwLeds( - _adapter *padapter - ) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - - DeInitLed871x( &(ledpriv->SwLed0) ); - DeInitLed871x( &(ledpriv->SwLed1) ); -} - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ + +#include "drv_types.h" +#include "rtl8192c_hal.h" + +//================================================================================ +// Constant. +//================================================================================ + +// +// Default LED behavior. +// +#define LED_BLINK_NORMAL_INTERVAL 100 +#define LED_BLINK_SLOWLY_INTERVAL 200 +#define LED_BLINK_LONG_INTERVAL 400 + +#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 +#define LED_BLINK_LINK_INTERVAL_ALPHA 500 //500 +#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 //150 +#define LED_BLINK_FASTER_INTERVAL_ALPHA 50 +#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 + +//================================================================================ +// LED object. +//================================================================================ + + +//================================================================================ +// Prototype of protected function. +//================================================================================ + + +static void +BlinkTimerCallback( + unsigned long data + ); + +static void +BlinkWorkItemCallback( + struct work_struct *work + ); + +// +// Description: +// Reset blinking status of LED_871x object. +// +static void +ResetLedStatus(PLED_871x pLed) { + pLed->CurrLedState = LED_OFF; // Current LED state. + pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. + + pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. + pLed->bLedNoLinkBlinkInProgress = _FALSE; + pLed->bLedLinkBlinkInProgress = _FALSE; + pLed->bLedStartToLinkBlinkInProgress = _FALSE; + pLed->bLedScanBlinkInProgress = _FALSE; + pLed->bLedWPSBlinkInProgress = _FALSE; + pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. + pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either LED_ON or LED_OFF are. +} + +//================================================================================ +// LED_819xUsb routines. +//================================================================================ + +// +// Description: +// Initialize an LED_871x object. +// +static void +InitLed871x( + _adapter *padapter, + PLED_871x pLed, + LED_PIN_871x LedPin + ) +{ + pLed->padapter = padapter; + pLed->LedPin = LedPin; + + ResetLedStatus(pLed); + + _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); + _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); +} + + +// +// Description: +// DeInitialize an LED_871x object. +// +static void +DeInitLed871x( + PLED_871x pLed + ) +{ + _cancel_timer_ex(&(pLed->BlinkTimer)); + ResetLedStatus(pLed); +} + +// +// Description: +// Turn on LED according to LedPin specified. +// +static void +SwLedOn( + _adapter *padapter, + PLED_871x pLed +) +{ + u8 LedCfg; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + return; + } + + if( (BOARD_MINICARD == pHalData->BoardType )|| + (BOARD_USB_SOLO == pHalData->BoardType)|| + (BOARD_USB_COMBO == pHalData->BoardType)) + { + LedCfg = rtw_read8(padapter, REG_LEDCFG2); + switch(pLed->LedPin) + { + case LED_PIN_GPIO0: + break; + + case LED_PIN_LED0: + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. + break; + + case LED_PIN_LED1: + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. + break; + + default: + break; + + } + } + else + { + switch(pLed->LedPin) + { + case LED_PIN_GPIO0: + break; + + case LED_PIN_LED0: +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + if(pHalData->AntDivCfg) + { + LedCfg = rtw_read8(padapter, REG_LEDCFG2); + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xe0)|BIT7|BIT6|BIT5); // SW control led0 on. + //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); + } + else +#endif + { + LedCfg = rtw_read8(padapter, REG_LEDCFG0); + rtw_write8(padapter,REG_LEDCFG0, LedCfg&0x70); // SW control led0 on. + //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); + } + break; + + case LED_PIN_LED1: + LedCfg = rtw_read8(padapter,(REG_LEDCFG1)); + rtw_write8(padapter,(REG_LEDCFG1), LedCfg&0x70); // SW control led1 on. + //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); + + break; + + default: + break; + } + } + pLed->bLedOn = _TRUE; + +} + + +// +// Description: +// Turn off LED according to LedPin specified. +// +static void +SwLedOff( + _adapter *padapter, + PLED_871x pLed +) +{ + u8 LedCfg; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + goto exit; + } + + if( (BOARD_MINICARD == pHalData->BoardType )|| + (BOARD_USB_SOLO == pHalData->BoardType)|| + (BOARD_USB_COMBO == pHalData->BoardType)) + { + LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E + + switch(pLed->LedPin) + { + + case LED_PIN_GPIO0: + break; + + case LED_PIN_LED0: + if(BOARD_USB_COMBO == pHalData->BoardType) + { + LedCfg &= 0x90; // Set to software control. + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); + LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); + LedCfg &= 0xFE; + rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); + } + else + { + LedCfg &= 0xf0; // Set to software control. + if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT1|BIT5|BIT6)); + else + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); + } + break; + + case LED_PIN_LED1: + LedCfg &= 0x0f; // Set to software control. + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); + break; + + default: + break; + } + } + else + { + switch(pLed->LedPin) + { + case LED_PIN_GPIO0: + break; + + case LED_PIN_LED0: +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + if(pHalData->AntDivCfg) + { + LedCfg = rtw_read8(padapter, REG_LEDCFG2); + LedCfg &= 0xe0; // Set to software control. + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5)); + //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); + } + else +#endif + { + LedCfg = rtw_read8(padapter, REG_LEDCFG0); + LedCfg &= 0x70; // Set to software control. + rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3)); + //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); + } + break; + + case LED_PIN_LED1: + LedCfg = rtw_read8(padapter, (REG_LEDCFG1)); + LedCfg &= 0x70; // Set to software control. + rtw_write8(padapter, (REG_LEDCFG1), (LedCfg|BIT3)); + //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); + break; + + default: + break; + } + } + +exit: + pLed->bLedOn = _FALSE; + +} + +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ + + +// +// Description: +// Implementation of LED blinking behavior. +// It toggle off LED and schedule corresponding timer if necessary. +// +static void +SwLedBlink( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON ) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + // Determine if we shall change LED state again. + pLed->BlinkTimes--; + switch(pLed->CurrLedState) + { + + case LED_BLINK_NORMAL: + if(pLed->BlinkTimes == 0) + { + bStopBlinking = _TRUE; + } + break; + + case LED_BLINK_StartToBlink: + if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) + { + bStopBlinking = _TRUE; + } + if( check_fwstate(pmlmepriv, _FW_LINKED) && + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) + { + bStopBlinking = _TRUE; + } + else if(pLed->BlinkTimes == 0) + { + bStopBlinking = _TRUE; + } + break; + + case LED_BLINK_WPS: + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + break; + + + default: + bStopBlinking = _TRUE; + break; + + } + + if(bStopBlinking) + { + //if( padapter->pwrctrlpriv.cpwm >= PS_STATE_S2) + if(0) + { + SwLedOff(padapter, pLed); + } + else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) + { + SwLedOn(padapter, pLed); + } + else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && pLed->bLedOn == _TRUE) + { + SwLedOff(padapter, pLed); + } + + pLed->BlinkTimes = 0; + pLed->bLedBlinkInProgress = _FALSE; + } + else + { + // Assign LED state to toggle. + if( pLed->BlinkingLedState == LED_ON ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + + // Schedule a timer to toggle LED state. + switch( pLed->CurrLedState ) + { + case LED_BLINK_NORMAL: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + break; + + case LED_BLINK_SLOWLY: + case LED_BLINK_StartToBlink: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + break; + + case LED_BLINK_WPS: + { + if( pLed->BlinkingLedState == LED_ON ) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + } + break; + + default: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + break; + } + } +} + + +static void +SwLedBlink1( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + PLED_871x pLed1 = &(ledpriv->SwLed1); + u8 bStopBlinking = _FALSE; + + if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) + pLed = &(ledpriv->SwLed1); + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON ) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + + if(pHalData->EEPROMCustomerID == RT_CID_DEFAULT) + { + if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + if(!pLed1->bSWLedCtrl) + { + SwLedOn(padapter, pLed1); + pLed1->bSWLedCtrl = _TRUE; + } + else if(!pLed1->bLedOn) + SwLedOn(padapter, pLed1); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); + } + else + { + if(!pLed1->bSWLedCtrl) + { + SwLedOff(padapter, pLed1); + pLed1->bSWLedCtrl = _TRUE; + } + else if(pLed1->bLedOn) + SwLedOff(padapter, pLed1); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); + } + } + + + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + ResetLedStatus(pLed); + return; + } + + + switch(pLed->CurrLedState) + { + case LED_BLINK_SLOWLY: + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_NORMAL: + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + break; + + case LED_SCAN_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + + if(bStopBlinking) + { + if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) + { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_TXRX_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + if(bStopBlinking) + { + if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) + { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->BlinkTimes = 0; + pLed->bLedBlinkInProgress = _FALSE; + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_BLINK_WPS: + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + break; + + case LED_BLINK_WPS_STOP: //WPS success + if(pLed->BlinkingLedState == LED_ON) + bStopBlinking = _FALSE; + else + bStopBlinking = _TRUE; + + if(bStopBlinking) + { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + + pLed->bLedWPSBlinkInProgress = _FALSE; + } + else + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + } + break; + + default: + break; + } + +} + +static void +SwLedBlink2( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + switch(pLed->CurrLedState) + { + case LED_SCAN_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); + + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_TXRX_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); + + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->bLedBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } + +} + +static void +SwLedBlink3( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON ) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + if(pLed->CurrLedState != LED_BLINK_WPS_STOP) + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + switch(pLed->CurrLedState) + { + case LED_SCAN_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + if( !pLed->bLedOn ) + SwLedOn(padapter, pLed); + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + if( pLed->bLedOn ) + SwLedOff(padapter, pLed); + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_TXRX_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + + if( !pLed->bLedOn ) + SwLedOn(padapter, pLed); + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + + if( pLed->bLedOn ) + SwLedOff(padapter, pLed); + + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->bLedBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_WPS: + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + break; + + case LED_BLINK_WPS_STOP: //WPS success + if(pLed->BlinkingLedState == LED_ON) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + bStopBlinking = _FALSE; + } + else + { + bStopBlinking = _TRUE; + } + + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) + { + SwLedOff(padapter, pLed); + } + else + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + pLed->bLedWPSBlinkInProgress = _FALSE; + } + break; + + + default: + break; + } + +} + + +static void +SwLedBlink4( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + PLED_871x pLed1 = &(ledpriv->SwLed1); + u8 bStopBlinking = _FALSE; + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON ) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) + { + pLed1->BlinkingLedState = LED_OFF; + pLed1->CurrLedState = LED_OFF; + SwLedOff(padapter, pLed1); + } + + switch(pLed->CurrLedState) + { + case LED_BLINK_SLOWLY: + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_StartToBlink: + if( pLed->bLedOn ) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_SCAN_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _FALSE; + } + + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + SwLedOff(padapter, pLed); + } + else + { + pLed->bLedNoLinkBlinkInProgress = _FALSE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_TXRX_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + SwLedOff(padapter, pLed); + } + else + { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_WPS: + if( pLed->bLedOn ) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_WPS_STOP: //WPS authentication fail + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + break; + + case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap + pLed->BlinkTimes--; + if(pLed->BlinkTimes == 0) + { + if(pLed->bLedOn) + { + pLed->BlinkTimes = 1; + } + else + { + bStopBlinking = _TRUE; + } + } + + if(bStopBlinking) + { + pLed->BlinkTimes = 10; + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + + default: + break; + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); + + +} + +static void +SwLedBlink5( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON ) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + switch(pLed->CurrLedState) + { + case LED_SCAN_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + if(pLed->bLedOn) + SwLedOff(padapter, pLed); + } + else + { pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + if(!pLed->bLedOn) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + + pLed->bLedScanBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + + case LED_TXRX_BLINK: + pLed->BlinkTimes--; + if( pLed->BlinkTimes == 0 ) + { + bStopBlinking = _TRUE; + } + + if(bStopBlinking) + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + if(pLed->bLedOn) + SwLedOff(padapter, pLed); + } + else + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + if(!pLed->bLedOn) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + + pLed->bLedBlinkInProgress = _FALSE; + } + else + { + if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) + { + SwLedOff(padapter, pLed); + } + else + { + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); + + +} + +static void +SwLedBlink6( + PLED_871x pLed + ) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + // Change LED according to BlinkingLedState specified. + if( pLed->BlinkingLedState == LED_ON ) + { + SwLedOn(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + } + else + { + SwLedOff(padapter, pLed); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); +} + + +// +// Description: +// Callback function of LED BlinkTimer, +// it just schedules to corresponding BlinkWorkItem. +// +static void +BlinkTimerCallback( + unsigned long data + ) +{ + PLED_871x pLed = (PLED_871x)data; + _adapter *padapter = pLed->padapter; + + //DBG_871X("%s\n", __FUNCTION__); + + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); + return; + } + +#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD + rtw_led_blink_cmd(padapter, pLed); +#else + _set_workitem(&(pLed->BlinkWorkItem)); +#endif +} + +// +// Description: +// Handler function of LED Blinking. +// We dispatch acture LED blink action according to LedStrategy. +// +void BlinkHandler(PLED_871x pLed) +{ + struct led_priv *ledpriv = &(pLed->padapter->ledpriv); + _adapter *padapter = pLed->padapter; + + //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); + + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { + //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); + return; + } + + switch(ledpriv->LedStrategy) + { + case SW_LED_MODE0: + SwLedBlink(pLed); + break; + + case SW_LED_MODE1: + SwLedBlink1(pLed); + break; + + case SW_LED_MODE2: + SwLedBlink2(pLed); + break; + + case SW_LED_MODE3: + SwLedBlink3(pLed); + break; + + case SW_LED_MODE4: + SwLedBlink4(pLed); + break; + + case SW_LED_MODE5: + SwLedBlink5(pLed); + break; + + case SW_LED_MODE6: + SwLedBlink6(pLed); + break; + + default: + //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); + //SwLedBlink(pLed); + break; + } +} + +// +// Description: +// Callback function of LED BlinkWorkItem. +// We dispatch acture LED blink action according to LedStrategy. +// +static void BlinkWorkItemCallback(struct work_struct *work) +{ + PLED_871x pLed = container_of(work, LED_871x, BlinkWorkItem); + BlinkHandler(pLed); +} + + + +//================================================================================ +// Default LED behavior. +//================================================================================ + +// +// Description: +// Implement each led action for SW_LED_MODE0. +// This is default strategy. +// +static void +SwLedControlMode0( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + PLED_871x pLed = &(ledpriv->SwLed1); + + // Decide led state + switch(LedAction) + { + case LED_CTL_TX: + case LED_CTL_RX: + if( pLed->bLedBlinkInProgress == _FALSE ) + { + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_NORMAL; + pLed->BlinkTimes = 2; + + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_CTL_START_TO_LINK: + if( pLed->bLedBlinkInProgress == _FALSE ) + { + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_StartToBlink; + pLed->BlinkTimes = 24; + + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } + else + { + pLed->CurrLedState = LED_BLINK_StartToBlink; + } + break; + + case LED_CTL_LINK: + pLed->CurrLedState = LED_ON; + if( pLed->bLedBlinkInProgress == _FALSE ) + { + SwLedOn(padapter, pLed); + } + break; + + case LED_CTL_NO_LINK: + pLed->CurrLedState = LED_OFF; + if( pLed->bLedBlinkInProgress == _FALSE ) + { + SwLedOff(padapter, pLed); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = LED_OFF; + if(pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + SwLedOff(padapter, pLed); + break; + + case LED_CTL_START_WPS: + if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == LED_ON) + { + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_WPS; + pLed->BlinkTimes = 20; + + if( pLed->bLedOn ) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + } + } + break; + + case LED_CTL_STOP_WPS: + if(pLed->bLedBlinkInProgress) + { + pLed->CurrLedState = LED_OFF; + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + break; + + + default: + break; + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); + +} + + //ALPHA, added by chiyoko, 20090106 +static void +SwLedControlMode1( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct led_priv *ledpriv = &(padapter->ledpriv); + PLED_871x pLed = &(ledpriv->SwLed0); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + + if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) + pLed = &(ledpriv->SwLed1); + + switch(LedAction) + { + case LED_CTL_POWER_ON: + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + if( pLed->bLedLinkBlinkInProgress == _TRUE ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + break; + + case LED_CTL_LINK: + if( pLed->bLedLinkBlinkInProgress == _FALSE ) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } + break; + + case LED_CTL_SITE_SURVEY: + if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) + ; + else if(pLed->bLedScanBlinkInProgress ==_FALSE) + { + if(IS_LED_WPS_BLINKING(pLed)) + return; + + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedLinkBlinkInProgress == _TRUE ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_SCAN_BLINK; + pLed->BlinkTimes = 24; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if(pLed->bLedBlinkInProgress ==_FALSE) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedLinkBlinkInProgress == _TRUE ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_TXRX_BLINK; + pLed->BlinkTimes = 2; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_START_WPS: //wait until xinpin finish + case LED_CTL_START_WPS_BOTTON: + if(pLed->bLedWPSBlinkInProgress ==_FALSE) + { + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedLinkBlinkInProgress == _TRUE ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if(pLed->bLedScanBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + + case LED_CTL_STOP_WPS: + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedLinkBlinkInProgress == _TRUE ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if(pLed->bLedScanBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + } + else + { + pLed->bLedWPSBlinkInProgress = _TRUE; + } + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + if(pLed->bLedOn) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_STOP_WPS_FAIL: + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + if( pLed->bLedNoLinkBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedLinkBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if( pLed->bLedWPSBlinkInProgress ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + if( pLed->bLedScanBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + SwLedOff(padapter, pLed); + break; + + default: + break; + + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +} + + //Arcadyan/Sitecom , added by chiyoko, 20090216 +static void +SwLedControlMode2( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_871x pLed = &(ledpriv->SwLed0); + + switch(LedAction) + { + case LED_CTL_SITE_SURVEY: + if(pmlmepriv->LinkDetectInfo.bBusyTraffic) + ; + else if(pLed->bLedScanBlinkInProgress ==_FALSE) + { + if(IS_LED_WPS_BLINKING(pLed)) + return; + + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_SCAN_BLINK; + pLed->BlinkTimes = 24; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_TXRX_BLINK; + pLed->BlinkTimes = 2; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_LINK: + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if( pLed->bLedScanBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_WPS: //wait until xinpin finish + case LED_CTL_START_WPS_BOTTON: + if(pLed->bLedWPSBlinkInProgress ==_FALSE) + { + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if(pLed->bLedScanBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_STOP_WPS: + pLed->bLedWPSBlinkInProgress = _FALSE; + if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) + { + SwLedOff(padapter, pLed); + } + else + { + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + break; + + case LED_CTL_STOP_WPS_FAIL: + pLed->bLedWPSBlinkInProgress = _FALSE; + if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) + { + SwLedOff(padapter, pLed); + } + else + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); + } + break; + + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if(!IS_LED_BLINKING(pLed)) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if( pLed->bLedScanBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if( pLed->bLedWPSBlinkInProgress ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + default: + break; + + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +} + + //COREGA, added by chiyoko, 20090316 + static void + SwLedControlMode3( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_871x pLed = &(ledpriv->SwLed0); + + switch(LedAction) + { + case LED_CTL_SITE_SURVEY: + if(pmlmepriv->LinkDetectInfo.bBusyTraffic) + ; + else if(pLed->bLedScanBlinkInProgress ==_FALSE) + { + if(IS_LED_WPS_BLINKING(pLed)) + return; + + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_SCAN_BLINK; + pLed->BlinkTimes = 24; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_TXRX_BLINK; + pLed->BlinkTimes = 2; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_LINK: + if(IS_LED_WPS_BLINKING(pLed)) + return; + + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if( pLed->bLedScanBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_WPS: //wait until xinpin finish + case LED_CTL_START_WPS_BOTTON: + if(pLed->bLedWPSBlinkInProgress ==_FALSE) + { + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if(pLed->bLedScanBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_STOP_WPS: + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + else + { + pLed->bLedWPSBlinkInProgress = _TRUE; + } + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + if(pLed->bLedOn) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + + break; + + case LED_CTL_STOP_WPS_FAIL: + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if(!IS_LED_BLINKING(pLed)) + { + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if( pLed->bLedScanBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if( pLed->bLedWPSBlinkInProgress ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + default: + break; + + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); +} + + + //Edimax-Belkin, added by chiyoko, 20090413 +static void +SwLedControlMode4( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_871x pLed = &(ledpriv->SwLed0); + PLED_871x pLed1 = &(ledpriv->SwLed1); + + switch(LedAction) + { + case LED_CTL_START_TO_LINK: + if(pLed1->bLedWPSBlinkInProgress) + { + pLed1->bLedWPSBlinkInProgress = _FALSE; + _cancel_timer_ex(&(pLed1->BlinkTimer)); + + pLed1->BlinkingLedState = LED_OFF; + pLed1->CurrLedState = LED_OFF; + + if(pLed1->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + } + + if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + + pLed->bLedStartToLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_StartToBlink; + if( pLed->bLedOn ) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + } + break; + + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + //LED1 settings + if(LedAction == LED_CTL_LINK) + { + if(pLed1->bLedWPSBlinkInProgress) + { + pLed1->bLedWPSBlinkInProgress = _FALSE; + _cancel_timer_ex(&(pLed1->BlinkTimer)); + + pLed1->BlinkingLedState = LED_OFF; + pLed1->CurrLedState = LED_OFF; + + if(pLed1->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + } + } + + if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + break; + + case LED_CTL_SITE_SURVEY: + if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) + ; + else if(pLed->bLedScanBlinkInProgress ==_FALSE) + { + if(IS_LED_WPS_BLINKING(pLed)) + return; + + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_SCAN_BLINK; + pLed->BlinkTimes = 24; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if(pLed->bLedBlinkInProgress ==_FALSE) + { + if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) + { + return; + } + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_TXRX_BLINK; + pLed->BlinkTimes = 2; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_START_WPS: //wait until xinpin finish + case LED_CTL_START_WPS_BOTTON: + if(pLed1->bLedWPSBlinkInProgress) + { + pLed1->bLedWPSBlinkInProgress = _FALSE; + _cancel_timer_ex(&(pLed1->BlinkTimer)); + + pLed1->BlinkingLedState = LED_OFF; + pLed1->CurrLedState = LED_OFF; + + if(pLed1->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + } + + if(pLed->bLedWPSBlinkInProgress ==_FALSE) + { + if(pLed->bLedNoLinkBlinkInProgress == _TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if(pLed->bLedScanBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if( pLed->bLedOn ) + { + pLed->BlinkingLedState = LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } + else + { + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + } + break; + + case LED_CTL_STOP_WPS: //WPS connect success + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + + break; + + case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + + //LED1 settings + if(pLed1->bLedWPSBlinkInProgress) + _cancel_timer_ex(&(pLed1->BlinkTimer)); + else + pLed1->bLedWPSBlinkInProgress = _TRUE; + + pLed1->CurrLedState = LED_BLINK_WPS_STOP; + if( pLed1->bLedOn ) + pLed1->BlinkingLedState = LED_OFF; + else + pLed1->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + + break; + + case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap + if(pLed->bLedWPSBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + + //LED1 settings + if(pLed1->bLedWPSBlinkInProgress) + _cancel_timer_ex(&(pLed1->BlinkTimer)); + else + pLed1->bLedWPSBlinkInProgress = _TRUE; + + pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; + pLed1->BlinkTimes = 10; + if( pLed1->bLedOn ) + pLed1->BlinkingLedState = LED_OFF; + else + pLed1->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + + if( pLed->bLedNoLinkBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedLinkBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if( pLed->bLedWPSBlinkInProgress ) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + if( pLed->bLedScanBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if( pLed->bLedStartToLinkBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedStartToLinkBlinkInProgress = _FALSE; + } + + if( pLed1->bLedWPSBlinkInProgress ) + { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedWPSBlinkInProgress = _FALSE; + } + + pLed1->BlinkingLedState = LED_UNKNOWN; + SwLedOff(padapter, pLed); + SwLedOff(padapter, pLed1); + break; + + default: + break; + + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +} + + + + //Sercomm-Belkin, added by chiyoko, 20090415 +static void +SwLedControlMode5( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_871x pLed = &(ledpriv->SwLed0); + + if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) + pLed = &(ledpriv->SwLed1); + + switch(LedAction) + { + case LED_CTL_POWER_ON: + case LED_CTL_NO_LINK: + case LED_CTL_LINK: //solid blue + pLed->CurrLedState = LED_ON; + pLed->BlinkingLedState = LED_ON; + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_SITE_SURVEY: + if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) + ; + else if(pLed->bLedScanBlinkInProgress ==_FALSE) + { + if(pLed->bLedBlinkInProgress ==_TRUE) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_SCAN_BLINK; + pLed->BlinkTimes = 24; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if(pLed->bLedBlinkInProgress ==_FALSE) + { + if(pLed->CurrLedState == LED_SCAN_BLINK) + { + return; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_TXRX_BLINK; + pLed->BlinkTimes = 2; + if( pLed->bLedOn ) + pLed->BlinkingLedState = LED_OFF; + else + pLed->BlinkingLedState = LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = LED_OFF; + pLed->BlinkingLedState = LED_OFF; + + if( pLed->bLedBlinkInProgress) + { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + SwLedOff(padapter, pLed); + break; + + default: + break; + + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); +} + + //WNC-Corega, added by chiyoko, 20090902 +static void +SwLedControlMode6( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_871x pLed0 = &(ledpriv->SwLed0); + + switch(LedAction) + { + case LED_CTL_POWER_ON: + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + _cancel_timer_ex(&(pLed0->BlinkTimer)); + pLed0->CurrLedState = LED_ON; + pLed0->BlinkingLedState = LED_ON; + _set_timer(&(pLed0->BlinkTimer), 0); + break; + + case LED_CTL_POWER_OFF: + SwLedOff(padapter, pLed0); + break; + + default: + break; + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed->CurrLedState)); +} + + +// +// Description: +// Dispatch LED action according to pHalData->LedStrategy. +// +static void +LedControl871x( + _adapter *padapter, + LED_CTL_MODE LedAction + ) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) + ||(padapter->hw_init_completed == _FALSE) ) + { + return; + } + + + if( ledpriv->bRegUseLed == _FALSE) + return; + + //if (!priv->up) + // return; + + //if(priv->bInHctTest) + // return; + + if( (padapter->pwrctrlpriv.rf_pwrstate != rf_on && + padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) && + (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || + LedAction == LED_CTL_SITE_SURVEY || + LedAction == LED_CTL_LINK || + LedAction == LED_CTL_NO_LINK || + LedAction == LED_CTL_POWER_ON) ) + { + return; + } + + switch(ledpriv->LedStrategy) + { + case SW_LED_MODE0: + //SwLedControlMode0(padapter, LedAction); + break; + + case SW_LED_MODE1: + SwLedControlMode1(padapter, LedAction); + break; + case SW_LED_MODE2: + SwLedControlMode2(padapter, LedAction); + break; + + case SW_LED_MODE3: + SwLedControlMode3(padapter, LedAction); + break; + + case SW_LED_MODE4: + SwLedControlMode4(padapter, LedAction); + break; + + case SW_LED_MODE5: + SwLedControlMode5(padapter, LedAction); + break; + + case SW_LED_MODE6: + SwLedControlMode6(padapter, LedAction); + break; + + default: + break; + } + + RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); +} + +// +// Description: +// Initialize all LED_871x objects. +// +void +rtl8192cu_InitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *pledpriv = &(padapter->ledpriv); + + pledpriv->LedControlHandler = LedControl871x; + + InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); + + InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); +} + + +// +// Description: +// DeInitialize all LED_819xUsb objects. +// +void +rtl8192cu_DeInitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *ledpriv = &(padapter->ledpriv); + + DeInitLed871x( &(ledpriv->SwLed0) ); + DeInitLed871x( &(ledpriv->SwLed1) ); +} + diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_xmit.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_xmit.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c old mode 100755 new mode 100644 index e0db1ee6f94220..eb5ea29a22af97 --- a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c +++ b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c @@ -2586,6 +2586,9 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); DBG_8192C("MAC Address from REG_MACID = "MAC_FMT"\n", MAC_ARG(mac_addr)); } +#ifdef CONFIG_ENABLE_NOTCH_FILTER + rtw_write8(Adapter, 0xc41, 0x42); +#endif exit: HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); @@ -3783,8 +3786,6 @@ _ReadIDs( pHalData->CustomerID = RT_CID_DLINK; else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) pHalData->CustomerID = RT_CID_DLINK; - else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330d)) - pHalData->CustomerID = RT_CID_DLINK; break; case EEPROM_CID_WHQL: /* diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_linux.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_linux.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c b/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/ifcfg-wlan0 b/drivers/net/wireless/rtl8192cu/ifcfg-wlan0 old mode 100755 new mode 100644 index 20dcbec2b1ae4a..7ecb7ae62c7fb3 --- a/drivers/net/wireless/rtl8192cu/ifcfg-wlan0 +++ b/drivers/net/wireless/rtl8192cu/ifcfg-wlan0 @@ -1,4 +1,4 @@ -#DHCP client -DEVICE=wlan0 -BOOTPROTO=dhcp +#DHCP client +DEVICE=wlan0 +BOOTPROTO=dhcp ONBOOT=yes \ No newline at end of file diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192CEHWImg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192CEHWImg.h old mode 100755 new mode 100644 index e7c686935920e2..2ecb65d23bf778 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192CEHWImg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192CEHWImg.h @@ -1,81 +1,81 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192CE_FW_IMG_H -#define __INC_HAL8192CE_FW_IMG_H - -#include - -/*Created on 2011/ 6/15, 5:45*/ - -#ifdef CONFIG_BT_COEXISTENCE -#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06 -#else //#ifdef CONFIG_P2P -#define TSMCImgArrayLength 16404 //v79 TSMC P2PPS 2011-10-06 -#endif -extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength]; - -#ifdef CONFIG_BT_COEXISTENCE -#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 -#else //#ifdef CONFIG_P2P -#define UMCACutImgArrayLength 16404 //v79 UMC A Cut P2PPS 2011-10-06 -#endif -extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength]; - -#ifdef CONFIG_BT_COEXISTENCE -#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06 -#else //#ifdef CONFIG_P2P -#define UMCBCutImgArrayLength 16386 //v79 UMC B Cut P2PPS 2011-10-06 -#endif -extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength]; - -#define PHY_REG_2TArrayLength 374 -extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength]; -#define PHY_REG_1TArrayLength 374 -extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength]; -#define PHY_ChangeTo_1T1RArrayLength 1 -extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; -#define PHY_ChangeTo_1T2RArrayLength 1 -extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; -#define PHY_ChangeTo_2T2RArrayLength 1 -extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; -#define PHY_REG_Array_PGLength 336 -extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; -#define PHY_REG_Array_MPLength 4 -extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; -#define RadioA_2TArrayLength 282 -extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength]; -#define RadioB_2TArrayLength 78 -extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength]; -#define RadioA_1TArrayLength 282 -extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength]; -#define RadioB_1TArrayLength 1 -extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength]; -#define RadioB_GM_ArrayLength 1 -extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength]; -#define MAC_2T_ArrayLength 172 -extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength]; -#define MACPHY_Array_PGLength 1 -extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength]; -#define AGCTAB_2TArrayLength 320 -extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength]; -#define AGCTAB_1TArrayLength 320 -extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength]; - -#endif //__INC_HAL8192CE_FW_IMG_H +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192CE_FW_IMG_H +#define __INC_HAL8192CE_FW_IMG_H + +#include + +/*Created on 2011/ 6/15, 5:45*/ + +#ifdef CONFIG_BT_COEXISTENCE +#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06 +#else //#ifdef CONFIG_P2P +#define TSMCImgArrayLength 16404 //v79 TSMC P2PPS 2011-10-06 +#endif +extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength]; + +#ifdef CONFIG_BT_COEXISTENCE +#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 +#else //#ifdef CONFIG_P2P +#define UMCACutImgArrayLength 16404 //v79 UMC A Cut P2PPS 2011-10-06 +#endif +extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength]; + +#ifdef CONFIG_BT_COEXISTENCE +#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06 +#else //#ifdef CONFIG_P2P +#define UMCBCutImgArrayLength 16386 //v79 UMC B Cut P2PPS 2011-10-06 +#endif +extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength]; + +#define PHY_REG_2TArrayLength 374 +extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength]; +#define PHY_REG_1TArrayLength 374 +extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength]; +#define PHY_ChangeTo_1T1RArrayLength 1 +extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; +#define PHY_ChangeTo_1T2RArrayLength 1 +extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; +#define PHY_ChangeTo_2T2RArrayLength 1 +extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; +#define PHY_REG_Array_PGLength 336 +extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; +#define PHY_REG_Array_MPLength 4 +extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; +#define RadioA_2TArrayLength 282 +extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength]; +#define RadioB_2TArrayLength 78 +extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength]; +#define RadioA_1TArrayLength 282 +extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength]; +#define RadioB_1TArrayLength 1 +extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength]; +#define RadioB_GM_ArrayLength 1 +extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength]; +#define MAC_2T_ArrayLength 172 +extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength]; +#define MACPHY_Array_PGLength 1 +extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength]; +#define AGCTAB_2TArrayLength 320 +extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength]; +#define AGCTAB_1TArrayLength 320 +extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength]; + +#endif //__INC_HAL8192CE_FW_IMG_H diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyCfg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyCfg.h old mode 100755 new mode 100644 index 2e76d2ab43677f..6ecb754031ea13 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyCfg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyCfg.h @@ -1,451 +1,451 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/***************************************************************************** - * Module: __INC_HAL8192CPHYCFG_H - * - * - * Note: - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * Data Who Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * - *****************************************************************************/ - /* Check to see if the file has been included already. */ -#ifndef __INC_HAL8192CPHYCFG_H -#define __INC_HAL8192CPHYCFG_H - - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 //us -#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#define IQK_MAC_REG_NUM 4 -#define IQK_ADDA_REG_NUM 16 -#define IQK_BB_REG_NUM 9 -#define HP_THERMAL_NUM 8 - -#ifdef CONFIG_PCI_HCI -#define MAX_AGGR_NUM 0x0A0A -#else -#define MAX_AGGR_NUM 0x0909 -#endif - -#ifdef CONFIG_PCI_HCI -#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ -{ \ - u1Byte u1bTmp; \ - u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ - u1bTmp |= BIT0; \ - PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ - PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ - PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ - delay_us(100); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ - PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ - delay_us(10); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ - delay_us(10); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ - delay_us(10); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ -} -#endif - - -/*--------------------------Define Parameters-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ -typedef enum _SwChnlCmdID{ - CmdID_End, - CmdID_SetTxPowerLevel, - CmdID_BBRegWrite10, - CmdID_WritePortUlong, - CmdID_WritePortUshort, - CmdID_WritePortUchar, - CmdID_RF_WriteReg, -}SwChnlCmdID; - - -/* 1. Switch channel related */ -typedef struct _SwChnlCmd{ - SwChnlCmdID CmdID; - u32 Para1; - u32 Para2; - u32 msDelay; -}SwChnlCmd; - -typedef enum _HW90_BLOCK{ - HW90_BLOCK_MAC = 0, - HW90_BLOCK_PHY0 = 1, - HW90_BLOCK_PHY1 = 2, - HW90_BLOCK_RF = 3, - HW90_BLOCK_MAXIMUM = 4, // Never use this -}HW90_BLOCK_E, *PHW90_BLOCK_E; - -typedef enum _RF90_RADIO_PATH{ - RF90_PATH_A = 0, //Radio Path A - RF90_PATH_B = 1, //Radio Path B - RF90_PATH_C = 2, //Radio Path C - RF90_PATH_D = 3, //Radio Path D - //RF90_PATH_MAX //Max RF number 90 support -}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; - -#define RF90_PATH_MAX 2 - -#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number -#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups - -typedef enum _WIRELESS_MODE { - WIRELESS_MODE_UNKNOWN = 0x00, - WIRELESS_MODE_A = 0x01, - WIRELESS_MODE_B = 0x02, - WIRELESS_MODE_G = 0x04, - WIRELESS_MODE_AUTO = 0x08, - WIRELESS_MODE_N_24G = 0x10, - WIRELESS_MODE_N_5G = 0x20 -} WIRELESS_MODE; - -typedef enum _BaseBand_Config_Type{ - BaseBand_Config_PHY_REG = 0, //Radio Path A - BaseBand_Config_AGC_TAB = 1, //Radio Path B -}BaseBand_Config_Type, *PBaseBand_Config_Type; - - -typedef enum _PHY_Rate_Tx_Power_Offset_Area{ - RA_OFFSET_LEGACY_OFDM1, - RA_OFFSET_LEGACY_OFDM2, - RA_OFFSET_HT_OFDM1, - RA_OFFSET_HT_OFDM2, - RA_OFFSET_HT_OFDM3, - RA_OFFSET_HT_OFDM4, - RA_OFFSET_HT_CCK, -}RA_OFFSET_AREA,*PRA_OFFSET_AREA; - - -/* BB/RF related */ -typedef enum _RF_TYPE_8190P{ - RF_TYPE_MIN, // 0 - RF_8225=1, // 1 11b/g RF for verification only - RF_8256=2, // 2 11b/g/n - RF_8258=3, // 3 11a/b/g/n RF - RF_6052=4, // 4 11b/g/n RF - //RF_6052=5, // 4 11b/g/n RF - // TODO: We sholud remove this psudo PHY RF after we get new RF. - RF_PSEUDO_11N=5, // 5, It is a temporality RF. -}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; - - -typedef enum _RATR_TABLE_MODE_8192C{ - RATR_INX_WIRELESS_NGB = 0, - RATR_INX_WIRELESS_NG = 1, - RATR_INX_WIRELESS_NB = 2, - RATR_INX_WIRELESS_N = 3, - RATR_INX_WIRELESS_GB = 4, - RATR_INX_WIRELESS_G = 5, - RATR_INX_WIRELESS_B = 6, - RATR_INX_WIRELESS_MC = 7, - RATR_INX_WIRELESS_A = 8, -}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C; - -typedef struct _BB_REGISTER_DEFINITION{ - u32 rfintfs; // set software control: - // 0x870~0x877[8 bytes] - - u32 rfintfi; // readback data: - // 0x8e0~0x8e7[8 bytes] - - u32 rfintfo; // output data: - // 0x860~0x86f [16 bytes] - - u32 rfintfe; // output enable: - // 0x860~0x86f [16 bytes] - - u32 rf3wireOffset; // LSSI data: - // 0x840~0x84f [16 bytes] - - u32 rfLSSI_Select; // BB Band Select: - // 0x878~0x87f [8 bytes] - - u32 rfTxGainStage; // Tx gain stage: - // 0x80c~0x80f [4 bytes] - - u32 rfHSSIPara1; // wire parameter control1 : - // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] - - u32 rfHSSIPara2; // wire parameter control2 : - // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] - - u32 rfSwitchControl; //Tx Rx antenna control : - // 0x858~0x85f [16 bytes] - - u32 rfAGCControl1; //AGC parameter control1 : - // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] - - u32 rfAGCControl2; //AGC parameter control2 : - // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] - - u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : - // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] - - u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : - // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] - - u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix - // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] - - u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type - // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] - - u32 rfLSSIReadBack; //LSSI RF readback data SI mode - // 0x8a0~0x8af [16 bytes] - - u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B - -}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; - -#ifdef CONFIG_MP_INCLUDED -typedef enum _ANTENNA_PATH{ - ANTENNA_NONE = 0x00, - ANTENNA_D , - ANTENNA_C , - ANTENNA_CD , - ANTENNA_B , - ANTENNA_BD , - ANTENNA_BC , - ANTENNA_BCD , - ANTENNA_A , - ANTENNA_AD , - ANTENNA_AC , - ANTENNA_ACD , - ANTENNA_AB , - ANTENNA_ABD , - ANTENNA_ABC , - ANTENNA_ABCD -} ANTENNA_PATH; -#endif - -typedef struct _R_ANTENNA_SELECT_OFDM{ - u32 r_tx_antenna:4; - u32 r_ant_l:4; - u32 r_ant_non_ht:4; - u32 r_ant_ht1:4; - u32 r_ant_ht2:4; - u32 r_ant_ht_s1:4; - u32 r_ant_non_ht_s1:4; - u32 OFDM_TXSC:2; - u32 Reserved:2; -}R_ANTENNA_SELECT_OFDM; - -typedef struct _R_ANTENNA_SELECT_CCK{ - u8 r_cckrx_enable_2:2; - u8 r_cckrx_enable:2; - u8 r_ccktx_enable:4; -}R_ANTENNA_SELECT_CCK; - -/*------------------------------Define structure----------------------------*/ - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - - -/*------------------------Export Marco Definition---------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ - - -/*--------------------------Exported Function prototype---------------------*/ -// -// BB and RF register read/write -// -u32 rtl8192c_PHY_QueryBBReg( IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask ); -void rtl8192c_PHY_SetBBReg( IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data ); -u32 rtl8192c_PHY_QueryRFReg( IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask ); -void rtl8192c_PHY_SetRFReg( IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data ); - -// -// Initialization related function -// -/* MAC/BB/RF HAL config */ -int PHY_MACConfig8192C( IN PADAPTER Adapter ); -int PHY_BBConfig8192C( IN PADAPTER Adapter ); -int PHY_RFConfig8192C( IN PADAPTER Adapter ); -/* RF config */ -int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, - IN u8* pFileName, - IN RF90_RADIO_PATH_E eRFPath); -int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, - IN RF90_RADIO_PATH_E eRFPath); - -/* BB/RF readback check for making sure init OK */ -int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, - IN HW90_BLOCK_E CheckBlock, - IN RF90_RADIO_PATH_E eRFPath ); -/* Read initi reg value for tx power setting. */ -void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); - -// -// RF Power setting -// -//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, -// IN RT_RF_POWER_STATE eRFPowerState); - -// -// BB TX Power R/W -// -void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter, - OUT u32* powerlevel ); -void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter, - IN u8 channel ); -BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter, - IN int powerInDbm ); - -// -VOID -PHY_ScanOperationBackup8192C(IN PADAPTER Adapter, - IN u8 Operation ); - -// -// Switch bandwidth for 8192S -// -//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); -void PHY_SetBWMode8192C( IN PADAPTER pAdapter, - IN HT_CHANNEL_WIDTH ChnlWidth, - IN unsigned char Offset ); - -// -// Set FW CMD IO for 8192S. -// -//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, -// IN IO_TYPE IOType); - -// -// Set A2 entry to fw for 8192S -// -extern void FillA2Entry8192C( IN PADAPTER Adapter, - IN u8 index, - IN u8* val); - - -// -// channel switch related funciton -// -//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); -void PHY_SwChnl8192C( IN PADAPTER pAdapter, - IN u8 channel ); - // Call after initialization -void PHY_SwChnlPhy8192C( IN PADAPTER pAdapter, - IN u8 channel ); - -void ChkFwCmdIoDone( IN PADAPTER Adapter); - -#ifdef USE_WORKITEM -//extern void SetIOWorkItemCallback( IN PVOID pContext ); -#else -//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); -#endif - -// -// BB/MAC/RF other monitor API -// -void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, - IN BOOLEAN bEnableMonitorMode ); - -BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, - IN u32 eRFPath ); - -// -// IQ calibrate -// -VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery); - -// -// LC calibrate -// -VOID rtl8192c_PHY_LCCalibrate(IN PADAPTER pAdapter); - -// -// AP calibrate -// -VOID rtl8192c_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); - -VOID rtl8192c_PHY_DigitalPredistortion(IN PADAPTER pAdapter); - -VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); - -// -// Modify the value of the hw register when beacon interval be changed. -// -void -rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter, - IN u16 BeaconInterval ); - - -extern VOID -PHY_SwitchEphyParameter( - IN PADAPTER Adapter - ); - -extern VOID -PHY_EnableHostClkReq( - IN PADAPTER Adapter - ); - -BOOLEAN -SetAntennaConfig92C( - IN PADAPTER Adapter, - IN u8 DefaultAnt - ); - - -/*--------------------------Exported Function prototype---------------------*/ - -#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) -#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) -#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) -#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) - -#define PHY_SetMacReg PHY_SetBBReg - -#endif // __INC_HAL8192CPHYCFG_H - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/***************************************************************************** + * Module: __INC_HAL8192CPHYCFG_H + * + * + * Note: + * + * + * Export: Constants, macro, functions(API), global variables(None). + * + * Abbrev: + * + * History: + * Data Who Remark + * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. + * 2. Reorganize code architecture. + * + *****************************************************************************/ + /* Check to see if the file has been included already. */ +#ifndef __INC_HAL8192CPHYCFG_H +#define __INC_HAL8192CPHYCFG_H + + +/*--------------------------Define Parameters-------------------------------*/ +#define LOOP_LIMIT 5 +#define MAX_STALL_TIME 50 //us +#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) +#define MAX_TXPWR_IDX_NMODE_92S 63 +#define Reset_Cnt_Limit 3 + +#define IQK_MAC_REG_NUM 4 +#define IQK_ADDA_REG_NUM 16 +#define IQK_BB_REG_NUM 9 +#define HP_THERMAL_NUM 8 + +#ifdef CONFIG_PCI_HCI +#define MAX_AGGR_NUM 0x0A0A +#else +#define MAX_AGGR_NUM 0x0909 +#endif + +#ifdef CONFIG_PCI_HCI +#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ +{ \ + u1Byte u1bTmp; \ + u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ + u1bTmp |= BIT0; \ + PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ + PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ + PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ + delay_us(100); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ + PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ + delay_us(10); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ + delay_us(10); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ + delay_us(10); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ +} +#endif + + +/*--------------------------Define Parameters-------------------------------*/ + + +/*------------------------------Define structure----------------------------*/ +typedef enum _SwChnlCmdID{ + CmdID_End, + CmdID_SetTxPowerLevel, + CmdID_BBRegWrite10, + CmdID_WritePortUlong, + CmdID_WritePortUshort, + CmdID_WritePortUchar, + CmdID_RF_WriteReg, +}SwChnlCmdID; + + +/* 1. Switch channel related */ +typedef struct _SwChnlCmd{ + SwChnlCmdID CmdID; + u32 Para1; + u32 Para2; + u32 msDelay; +}SwChnlCmd; + +typedef enum _HW90_BLOCK{ + HW90_BLOCK_MAC = 0, + HW90_BLOCK_PHY0 = 1, + HW90_BLOCK_PHY1 = 2, + HW90_BLOCK_RF = 3, + HW90_BLOCK_MAXIMUM = 4, // Never use this +}HW90_BLOCK_E, *PHW90_BLOCK_E; + +typedef enum _RF90_RADIO_PATH{ + RF90_PATH_A = 0, //Radio Path A + RF90_PATH_B = 1, //Radio Path B + RF90_PATH_C = 2, //Radio Path C + RF90_PATH_D = 3, //Radio Path D + //RF90_PATH_MAX //Max RF number 90 support +}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; + +#define RF90_PATH_MAX 2 + +#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number +#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups + +typedef enum _WIRELESS_MODE { + WIRELESS_MODE_UNKNOWN = 0x00, + WIRELESS_MODE_A = 0x01, + WIRELESS_MODE_B = 0x02, + WIRELESS_MODE_G = 0x04, + WIRELESS_MODE_AUTO = 0x08, + WIRELESS_MODE_N_24G = 0x10, + WIRELESS_MODE_N_5G = 0x20 +} WIRELESS_MODE; + +typedef enum _BaseBand_Config_Type{ + BaseBand_Config_PHY_REG = 0, //Radio Path A + BaseBand_Config_AGC_TAB = 1, //Radio Path B +}BaseBand_Config_Type, *PBaseBand_Config_Type; + + +typedef enum _PHY_Rate_Tx_Power_Offset_Area{ + RA_OFFSET_LEGACY_OFDM1, + RA_OFFSET_LEGACY_OFDM2, + RA_OFFSET_HT_OFDM1, + RA_OFFSET_HT_OFDM2, + RA_OFFSET_HT_OFDM3, + RA_OFFSET_HT_OFDM4, + RA_OFFSET_HT_CCK, +}RA_OFFSET_AREA,*PRA_OFFSET_AREA; + + +/* BB/RF related */ +typedef enum _RF_TYPE_8190P{ + RF_TYPE_MIN, // 0 + RF_8225=1, // 1 11b/g RF for verification only + RF_8256=2, // 2 11b/g/n + RF_8258=3, // 3 11a/b/g/n RF + RF_6052=4, // 4 11b/g/n RF + //RF_6052=5, // 4 11b/g/n RF + // TODO: We sholud remove this psudo PHY RF after we get new RF. + RF_PSEUDO_11N=5, // 5, It is a temporality RF. +}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; + + +typedef enum _RATR_TABLE_MODE_8192C{ + RATR_INX_WIRELESS_NGB = 0, + RATR_INX_WIRELESS_NG = 1, + RATR_INX_WIRELESS_NB = 2, + RATR_INX_WIRELESS_N = 3, + RATR_INX_WIRELESS_GB = 4, + RATR_INX_WIRELESS_G = 5, + RATR_INX_WIRELESS_B = 6, + RATR_INX_WIRELESS_MC = 7, + RATR_INX_WIRELESS_A = 8, +}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C; + +typedef struct _BB_REGISTER_DEFINITION{ + u32 rfintfs; // set software control: + // 0x870~0x877[8 bytes] + + u32 rfintfi; // readback data: + // 0x8e0~0x8e7[8 bytes] + + u32 rfintfo; // output data: + // 0x860~0x86f [16 bytes] + + u32 rfintfe; // output enable: + // 0x860~0x86f [16 bytes] + + u32 rf3wireOffset; // LSSI data: + // 0x840~0x84f [16 bytes] + + u32 rfLSSI_Select; // BB Band Select: + // 0x878~0x87f [8 bytes] + + u32 rfTxGainStage; // Tx gain stage: + // 0x80c~0x80f [4 bytes] + + u32 rfHSSIPara1; // wire parameter control1 : + // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] + + u32 rfHSSIPara2; // wire parameter control2 : + // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] + + u32 rfSwitchControl; //Tx Rx antenna control : + // 0x858~0x85f [16 bytes] + + u32 rfAGCControl1; //AGC parameter control1 : + // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] + + u32 rfAGCControl2; //AGC parameter control2 : + // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] + + u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : + // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] + + u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : + // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] + + u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix + // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] + + u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type + // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] + + u32 rfLSSIReadBack; //LSSI RF readback data SI mode + // 0x8a0~0x8af [16 bytes] + + u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B + +}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; + +#ifdef CONFIG_MP_INCLUDED +typedef enum _ANTENNA_PATH{ + ANTENNA_NONE = 0x00, + ANTENNA_D , + ANTENNA_C , + ANTENNA_CD , + ANTENNA_B , + ANTENNA_BD , + ANTENNA_BC , + ANTENNA_BCD , + ANTENNA_A , + ANTENNA_AD , + ANTENNA_AC , + ANTENNA_ACD , + ANTENNA_AB , + ANTENNA_ABD , + ANTENNA_ABC , + ANTENNA_ABCD +} ANTENNA_PATH; +#endif + +typedef struct _R_ANTENNA_SELECT_OFDM{ + u32 r_tx_antenna:4; + u32 r_ant_l:4; + u32 r_ant_non_ht:4; + u32 r_ant_ht1:4; + u32 r_ant_ht2:4; + u32 r_ant_ht_s1:4; + u32 r_ant_non_ht_s1:4; + u32 OFDM_TXSC:2; + u32 Reserved:2; +}R_ANTENNA_SELECT_OFDM; + +typedef struct _R_ANTENNA_SELECT_CCK{ + u8 r_cckrx_enable_2:2; + u8 r_cckrx_enable:2; + u8 r_ccktx_enable:4; +}R_ANTENNA_SELECT_CCK; + +/*------------------------------Define structure----------------------------*/ + + +/*------------------------Export global variable----------------------------*/ +/*------------------------Export global variable----------------------------*/ + + +/*------------------------Export Marco Definition---------------------------*/ +/*------------------------Export Marco Definition---------------------------*/ + + +/*--------------------------Exported Function prototype---------------------*/ +// +// BB and RF register read/write +// +u32 rtl8192c_PHY_QueryBBReg( IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask ); +void rtl8192c_PHY_SetBBReg( IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data ); +u32 rtl8192c_PHY_QueryRFReg( IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask ); +void rtl8192c_PHY_SetRFReg( IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data ); + +// +// Initialization related function +// +/* MAC/BB/RF HAL config */ +int PHY_MACConfig8192C( IN PADAPTER Adapter ); +int PHY_BBConfig8192C( IN PADAPTER Adapter ); +int PHY_RFConfig8192C( IN PADAPTER Adapter ); +/* RF config */ +int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, + IN u8* pFileName, + IN RF90_RADIO_PATH_E eRFPath); +int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, + IN RF90_RADIO_PATH_E eRFPath); + +/* BB/RF readback check for making sure init OK */ +int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, + IN HW90_BLOCK_E CheckBlock, + IN RF90_RADIO_PATH_E eRFPath ); +/* Read initi reg value for tx power setting. */ +void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); + +// +// RF Power setting +// +//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, +// IN RT_RF_POWER_STATE eRFPowerState); + +// +// BB TX Power R/W +// +void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter, + OUT u32* powerlevel ); +void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter, + IN u8 channel ); +BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter, + IN int powerInDbm ); + +// +VOID +PHY_ScanOperationBackup8192C(IN PADAPTER Adapter, + IN u8 Operation ); + +// +// Switch bandwidth for 8192S +// +//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); +void PHY_SetBWMode8192C( IN PADAPTER pAdapter, + IN HT_CHANNEL_WIDTH ChnlWidth, + IN unsigned char Offset ); + +// +// Set FW CMD IO for 8192S. +// +//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, +// IN IO_TYPE IOType); + +// +// Set A2 entry to fw for 8192S +// +extern void FillA2Entry8192C( IN PADAPTER Adapter, + IN u8 index, + IN u8* val); + + +// +// channel switch related funciton +// +//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); +void PHY_SwChnl8192C( IN PADAPTER pAdapter, + IN u8 channel ); + // Call after initialization +void PHY_SwChnlPhy8192C( IN PADAPTER pAdapter, + IN u8 channel ); + +void ChkFwCmdIoDone( IN PADAPTER Adapter); + +#ifdef USE_WORKITEM +//extern void SetIOWorkItemCallback( IN PVOID pContext ); +#else +//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); +#endif + +// +// BB/MAC/RF other monitor API +// +void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode ); + +BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, + IN u32 eRFPath ); + +// +// IQ calibrate +// +VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery); + +// +// LC calibrate +// +VOID rtl8192c_PHY_LCCalibrate(IN PADAPTER pAdapter); + +// +// AP calibrate +// +VOID rtl8192c_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); + +VOID rtl8192c_PHY_DigitalPredistortion(IN PADAPTER pAdapter); + +VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); + +// +// Modify the value of the hw register when beacon interval be changed. +// +void +rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter, + IN u16 BeaconInterval ); + + +extern VOID +PHY_SwitchEphyParameter( + IN PADAPTER Adapter + ); + +extern VOID +PHY_EnableHostClkReq( + IN PADAPTER Adapter + ); + +BOOLEAN +SetAntennaConfig92C( + IN PADAPTER Adapter, + IN u8 DefaultAnt + ); + + +/*--------------------------Exported Function prototype---------------------*/ + +#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) +#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) +#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) +#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) + +#define PHY_SetMacReg PHY_SetBBReg + +#endif // __INC_HAL8192CPHYCFG_H + diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyReg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyReg.h old mode 100755 new mode 100644 index 5f2d451721985f..1f9f330f6f25a2 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyReg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyReg.h @@ -1,1102 +1,1102 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/***************************************************************************** - * - * Module: __INC_HAL8192CPHYREG_H - * - * - * Note: 1. Define PMAC/BB register map - * 2. Define RF register map - * 3. PMAC/BB register bit mask. - * 4. RF reg bit mask. - * 5. Other BB/RF relative definition. - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * Data Who Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * 09/25/2008 MH 1. Add RL6052 register definition - * - *****************************************************************************/ -#ifndef __INC_HAL8192CPHYREG_H -#define __INC_HAL8192CPHYREG_H - - -/*--------------------------Define Parameters-------------------------------*/ - -//============================================================ -// 8192S Regsiter offset definition -//============================================================ - -// -// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -// 3. RF register 0x00-2E -// 4. Bit Mask for BB/RF register -// 5. Other defintion for BB/RF R/W -// - - -// -// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -// 1. Page1(0x100) -// -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -// -// 2. Page2(0x200) -// -// The following two definition are only used for USB interface. -#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. -#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. - -// -// 3. Page8(0x800) -// -#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? - -#define rFPGA0_TxInfo 0x804 // Status report?? -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? - -#define rFPGA0_RFTiming1 0x810 // Useless now -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 // Useless now -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 // Useless now -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 // Useless now -#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now - -// -// 4. Page9(0x900) -// -#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? - -#define rFPGA1_TxBlock 0x904 // Useless now -#define rFPGA1_DebugSelect 0x908 // Useless now -#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? - -// -// 5. PageA(0xA00) -// -// Set Control channel to upper or lower. These settings are required only for 40MHz -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain - -#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series -#define rCCK0_RxAGC2 0xa10 //AGC & DAGC - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold -#define rCCK0_DSPParameter2 0xa1c //SQ threshold - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 //0xa57 -#define rCCK0_FACounterLower 0xa5c //0xa5b -#define rCCK0_FACounterUpper 0xa58 //0xa5c - -// -// 6. PageC(0xC00) -// -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI - -#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -#define rOFDM0_ECCAThreshold 0xc4c // energy CCA - -#define rOFDM0_XAAGCCore1 0xc50 // DIG -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -// -// 7. PageD(0xD00) -// -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 // No setting now -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 //cca, parity fail -#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail -#define rOFDM_PHYCounter3 0xda8 //MCS not support - -#define rOFDM_ShortCFOAB 0xdac // No setting now -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -// -// 8. PageE(0xE00) -// -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -// -// 7. RF Register 0x00-0x2E (RF 8256) -// RF-0222D 0x00-3F -// -//Zebra1 -#define rZebra1_HSSIEnable 0x0 // Useless now -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 // RF channel switch - -//#endif -#define rZebra1_TxGain 0x8 // Useless now -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -//Zebra4 -#define rGlobalCtrl 0 // Useless now -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -//RTL8258 -#define rRTL8258_TxLPF 0x11 // Useless now -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -// -// RL6052 Register definition -// -#define RF_AC 0x00 // - -#define RF_IQADJ_G1 0x01 // -#define RF_IQADJ_G2 0x02 // -#define RF_POW_TRSW 0x05 // - -#define RF_GAIN_RX 0x06 // -#define RF_GAIN_TX 0x07 // - -#define RF_TXM_IDAC 0x08 // -#define RF_BS_IQGEN 0x0F // - -#define RF_MODE1 0x10 // -#define RF_MODE2 0x11 // - -#define RF_RX_AGC_HP 0x12 // -#define RF_TX_AGC 0x13 // -#define RF_BIAS 0x14 // -#define RF_IPA 0x15 // -#define RF_POW_ABILITY 0x17 // -#define RF_MODE_AG 0x18 // -#define rRfChannel 0x18 // RF channel and BW switch -#define RF_CHNLBW 0x18 // RF channel and BW switch -#define RF_TOP 0x19 // - -#define RF_RX_G1 0x1A // -#define RF_RX_G2 0x1B // - -#define RF_RX_BB2 0x1C // -#define RF_RX_BB1 0x1D // - -#define RF_RCK1 0x1E // -#define RF_RCK2 0x1F // - -#define RF_TX_G1 0x20 // -#define RF_TX_G2 0x21 // -#define RF_TX_G3 0x22 // - -#define RF_TX_BB1 0x23 // - -#define RF_T_METER 0x24 // - -#define RF_SYN_G1 0x25 // RF TX Power control -#define RF_SYN_G2 0x26 // RF TX Power control -#define RF_SYN_G3 0x27 // RF TX Power control -#define RF_SYN_G4 0x28 // RF TX Power control -#define RF_SYN_G5 0x29 // RF TX Power control -#define RF_SYN_G6 0x2A // RF TX Power control -#define RF_SYN_G7 0x2B // RF TX Power control -#define RF_SYN_G8 0x2C // RF TX Power control - -#define RF_RCK_OS 0x30 // RF TX PA control - -#define RF_TXPA_G1 0x31 // RF TX PA control -#define RF_TXPA_G2 0x32 // RF TX PA control -#define RF_TXPA_G3 0x33 // RF TX PA control - -// -//Bit Mask -// -// 1. Page1(0x100) -#define bBBResetB 0x100 // Useless now? -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) - -// 2. Page8(0x800) -#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 // Useless now -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 // Useless now -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf //Reg0x814 -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 //T2R -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 //chane gain at continue Tx -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 // Useless now -//#define bHWSISelect 0x8 -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW - -#define bRFSI_TRSW 0x20 // Useless now -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 // T65 RF - -#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal - -#define bLSSIReadBackData 0xfffff // T65 RF - -#define bLSSIReadOKFlag 0x1000 // Useless now -#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ - -#define b80MClkDelay 0x18000000 // Useless -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 // Useless -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -// 3. Page9(0x900) -#define bOFDMTxSC 0x30000000 // Useless -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff //reset debug page and also HWord, LWord -#define bDebugItem 0xff //reset debug page and LWord -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -// 4. PageA(0xA00) -#define bCCKBBMode 0x3 // Useless -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch - -#define bCCKScramble 0x8 // Useless -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 //r_rx_clk -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f //AGCsamp_dly -#define bCCKFixedRxAGC 0x8000 -//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -// 5. PageC(0xC00) -#define bNumOfSTF 0x3 // Useless -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 //the threshold for high power -#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -//#define bRxMF_Hold 0x3800 -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -// 6. PageE(0xE00) -#define bSTBCEn 0x4 // Useless -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -//#define bRxPath1 0x01 -//#define bRxPath2 0x02 -//#define bRxPath3 0x04 -//#define bRxPath4 0x08 -//#define bTxPath1 0x10 -//#define bTxPath2 0x20 -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 //total -#define bShortCFOFLength 11 //fraction -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf // Useless -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 // Useless -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 // Useless -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -//Rx Pseduo noise -#define bRxPesudoNoiseOn 0x20000000 // Useless -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -//7. RF Register -//Zebra1 -#define bZebra1_HSSIEnable 0x8 // Useless -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -//Zebra4 -#define bRTL8256RegModeCtrl1 0x100 // Useless -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -//RTL8258 -#define bRTL8258_TxLPFBW 0xc // Useless -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -// -// Other Definition -// - -//byte endable for sb_write -#define bByte0 0x1 // Useless -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -//for PutRegsetting & GetRegSetting BitMask -#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - -//for PutRFRegsetting & GetRFRegSetting BitMask -//#define bMask12Bits 0xfffff // RF Reg mask bits -//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF -#define bRFRegOffsetMask 0xfffff - -#define bEnable 0x1 // Useless -#define bDisable 0x0 - -#define LeftAntenna 0x0 // Useless -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 //500ms // Useless -#define tUpdateRxCounter 100 //100ms - -#define rateCCK 0 // Useless -#define rateOFDM 1 -#define rateHT 2 - -//define Register-End -#define bPMAC_End 0x1ff // Useless -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -//define max debug item in each debug page -//#define bMaxItem_FPGA_PHY0 0x9 -//#define bMaxItem_FPGA_PHY1 0x3 -//#define bMaxItem_PHY_11B 0x16 -//#define bMaxItem_OFDM_PHY0 0x29 -//#define bMaxItem_OFDM_PHY1 0x0 - -#define bPMACControl 0x0 // Useless -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 // Useless -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -/*--------------------------Define Parameters-------------------------------*/ - - -#endif //__INC_HAL8192SPHYREG_H - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/***************************************************************************** + * + * Module: __INC_HAL8192CPHYREG_H + * + * + * Note: 1. Define PMAC/BB register map + * 2. Define RF register map + * 3. PMAC/BB register bit mask. + * 4. RF reg bit mask. + * 5. Other BB/RF relative definition. + * + * + * Export: Constants, macro, functions(API), global variables(None). + * + * Abbrev: + * + * History: + * Data Who Remark + * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. + * 2. Reorganize code architecture. + * 09/25/2008 MH 1. Add RL6052 register definition + * + *****************************************************************************/ +#ifndef __INC_HAL8192CPHYREG_H +#define __INC_HAL8192CPHYREG_H + + +/*--------------------------Define Parameters-------------------------------*/ + +//============================================================ +// 8192S Regsiter offset definition +//============================================================ + +// +// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF +// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 +// 3. RF register 0x00-2E +// 4. Bit Mask for BB/RF register +// 5. Other defintion for BB/RF R/W +// + + +// +// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +// 1. Page1(0x100) +// +#define rPMAC_Reset 0x100 +#define rPMAC_TxStart 0x104 +#define rPMAC_TxLegacySIG 0x108 +#define rPMAC_TxHTSIG1 0x10c +#define rPMAC_TxHTSIG2 0x110 +#define rPMAC_PHYDebug 0x114 +#define rPMAC_TxPacketNum 0x118 +#define rPMAC_TxIdle 0x11c +#define rPMAC_TxMACHeader0 0x120 +#define rPMAC_TxMACHeader1 0x124 +#define rPMAC_TxMACHeader2 0x128 +#define rPMAC_TxMACHeader3 0x12c +#define rPMAC_TxMACHeader4 0x130 +#define rPMAC_TxMACHeader5 0x134 +#define rPMAC_TxDataType 0x138 +#define rPMAC_TxRandomSeed 0x13c +#define rPMAC_CCKPLCPPreamble 0x140 +#define rPMAC_CCKPLCPHeader 0x144 +#define rPMAC_CCKCRC16 0x148 +#define rPMAC_OFDMRxCRC32OK 0x170 +#define rPMAC_OFDMRxCRC32Er 0x174 +#define rPMAC_OFDMRxParityEr 0x178 +#define rPMAC_OFDMRxCRC8Er 0x17c +#define rPMAC_CCKCRxRC16Er 0x180 +#define rPMAC_CCKCRxRC32Er 0x184 +#define rPMAC_CCKCRxRC32OK 0x188 +#define rPMAC_TxStatus 0x18c + +// +// 2. Page2(0x200) +// +// The following two definition are only used for USB interface. +#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. +#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. + +// +// 3. Page8(0x800) +// +#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? + +#define rFPGA0_TxInfo 0x804 // Status report?? +#define rFPGA0_PSDFunction 0x808 + +#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? + +#define rFPGA0_RFTiming1 0x810 // Useless now +#define rFPGA0_RFTiming2 0x814 + +#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register +#define rFPGA0_XA_HSSIParameter2 0x824 +#define rFPGA0_XB_HSSIParameter1 0x828 +#define rFPGA0_XB_HSSIParameter2 0x82c +#define rTxAGC_B_Rate18_06 0x830 +#define rTxAGC_B_Rate54_24 0x834 +#define rTxAGC_B_CCK1_55_Mcs32 0x838 +#define rTxAGC_B_Mcs03_Mcs00 0x83c + +#define rTxAGC_B_Mcs07_Mcs04 0x848 +#define rTxAGC_B_Mcs11_Mcs08 0x84c + +#define rFPGA0_XA_LSSIParameter 0x840 +#define rFPGA0_XB_LSSIParameter 0x844 + +#define rFPGA0_RFWakeUpParameter 0x850 // Useless now +#define rFPGA0_RFSleepUpParameter 0x854 + +#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch +#define rFPGA0_XCD_SwitchControl 0x85c + +#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch +#define rFPGA0_XB_RFInterfaceOE 0x864 + +#define rTxAGC_B_Mcs15_Mcs12 0x868 +#define rTxAGC_B_CCK11_A_CCK2_11 0x86c + +#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control +#define rFPGA0_XCD_RFInterfaceSW 0x874 + +#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter +#define rFPGA0_XCD_RFParameter 0x87c + +#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? +#define rFPGA0_AnalogParameter2 0x884 +#define rFPGA0_AnalogParameter3 0x888 // Useless now +#define rFPGA0_AnalogParameter4 0x88c + +#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback +#define rFPGA0_XB_LSSIReadBack 0x8a4 +#define rFPGA0_XC_LSSIReadBack 0x8a8 +#define rFPGA0_XD_LSSIReadBack 0x8ac + +#define rFPGA0_PSDReport 0x8b4 // Useless now +#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback +#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback +#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value +#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now + +// +// 4. Page9(0x900) +// +#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? + +#define rFPGA1_TxBlock 0x904 // Useless now +#define rFPGA1_DebugSelect 0x908 // Useless now +#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? + +// +// 5. PageA(0xA00) +// +// Set Control channel to upper or lower. These settings are required only for 40MHz +#define rCCK0_System 0xa00 + +#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI +#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain + +#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series +#define rCCK0_RxAGC2 0xa10 //AGC & DAGC + +#define rCCK0_RxHP 0xa14 + +#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold +#define rCCK0_DSPParameter2 0xa1c //SQ threshold + +#define rCCK0_TxFilter1 0xa20 +#define rCCK0_TxFilter2 0xa24 +#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 +#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report +#define rCCK0_TRSSIReport 0xa50 +#define rCCK0_RxReport 0xa54 //0xa57 +#define rCCK0_FACounterLower 0xa5c //0xa5b +#define rCCK0_FACounterUpper 0xa58 //0xa5c + +// +// 6. PageC(0xC00) +// +#define rOFDM0_LSTF 0xc00 + +#define rOFDM0_TRxPathEnable 0xc04 +#define rOFDM0_TRMuxPar 0xc08 +#define rOFDM0_TRSWIsolation 0xc0c + +#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter +#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix +#define rOFDM0_XBRxAFE 0xc18 +#define rOFDM0_XBRxIQImbalance 0xc1c +#define rOFDM0_XCRxAFE 0xc20 +#define rOFDM0_XCRxIQImbalance 0xc24 +#define rOFDM0_XDRxAFE 0xc28 +#define rOFDM0_XDRxIQImbalance 0xc2c + +#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain +#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. +#define rOFDM0_RxDetector3 0xc38 //Frame Sync. +#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI + +#define rOFDM0_RxDSP 0xc40 //Rx Sync Path +#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC +#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold +#define rOFDM0_ECCAThreshold 0xc4c // energy CCA + +#define rOFDM0_XAAGCCore1 0xc50 // DIG +#define rOFDM0_XAAGCCore2 0xc54 +#define rOFDM0_XBAGCCore1 0xc58 +#define rOFDM0_XBAGCCore2 0xc5c +#define rOFDM0_XCAGCCore1 0xc60 +#define rOFDM0_XCAGCCore2 0xc64 +#define rOFDM0_XDAGCCore1 0xc68 +#define rOFDM0_XDAGCCore2 0xc6c + +#define rOFDM0_AGCParameter1 0xc70 +#define rOFDM0_AGCParameter2 0xc74 +#define rOFDM0_AGCRSSITable 0xc78 +#define rOFDM0_HTSTFAGC 0xc7c + +#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG +#define rOFDM0_XATxAFE 0xc84 +#define rOFDM0_XBTxIQImbalance 0xc88 +#define rOFDM0_XBTxAFE 0xc8c +#define rOFDM0_XCTxIQImbalance 0xc90 +#define rOFDM0_XCTxAFE 0xc94 +#define rOFDM0_XDTxIQImbalance 0xc98 +#define rOFDM0_XDTxAFE 0xc9c + +#define rOFDM0_RxIQExtAnta 0xca0 +#define rOFDM0_TxCoeff1 0xca4 +#define rOFDM0_TxCoeff2 0xca8 +#define rOFDM0_TxCoeff3 0xcac +#define rOFDM0_TxCoeff4 0xcb0 +#define rOFDM0_TxCoeff5 0xcb4 +#define rOFDM0_TxCoeff6 0xcb8 +#define rOFDM0_RxHPParameter 0xce0 +#define rOFDM0_TxPseudoNoiseWgt 0xce4 +#define rOFDM0_FrameSync 0xcf0 +#define rOFDM0_DFSReport 0xcf4 + +// +// 7. PageD(0xD00) +// +#define rOFDM1_LSTF 0xd00 +#define rOFDM1_TRxPathEnable 0xd04 + +#define rOFDM1_CFO 0xd08 // No setting now +#define rOFDM1_CSI1 0xd10 +#define rOFDM1_SBD 0xd14 +#define rOFDM1_CSI2 0xd18 +#define rOFDM1_CFOTracking 0xd2c +#define rOFDM1_TRxMesaure1 0xd34 +#define rOFDM1_IntfDet 0xd3c +#define rOFDM1_PseudoNoiseStateAB 0xd50 +#define rOFDM1_PseudoNoiseStateCD 0xd54 +#define rOFDM1_RxPseudoNoiseWgt 0xd58 + +#define rOFDM_PHYCounter1 0xda0 //cca, parity fail +#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail +#define rOFDM_PHYCounter3 0xda8 //MCS not support + +#define rOFDM_ShortCFOAB 0xdac // No setting now +#define rOFDM_ShortCFOCD 0xdb0 +#define rOFDM_LongCFOAB 0xdb4 +#define rOFDM_LongCFOCD 0xdb8 +#define rOFDM_TailCFOAB 0xdbc +#define rOFDM_TailCFOCD 0xdc0 +#define rOFDM_PWMeasure1 0xdc4 +#define rOFDM_PWMeasure2 0xdc8 +#define rOFDM_BWReport 0xdcc +#define rOFDM_AGCReport 0xdd0 +#define rOFDM_RxSNR 0xdd4 +#define rOFDM_RxEVMCSI 0xdd8 +#define rOFDM_SIGReport 0xddc + + +// +// 8. PageE(0xE00) +// +#define rTxAGC_A_Rate18_06 0xe00 +#define rTxAGC_A_Rate54_24 0xe04 +#define rTxAGC_A_CCK1_Mcs32 0xe08 +#define rTxAGC_A_Mcs03_Mcs00 0xe10 +#define rTxAGC_A_Mcs07_Mcs04 0xe14 +#define rTxAGC_A_Mcs11_Mcs08 0xe18 +#define rTxAGC_A_Mcs15_Mcs12 0xe1c + +#define rFPGA0_IQK 0xe28 +#define rTx_IQK_Tone_A 0xe30 +#define rRx_IQK_Tone_A 0xe34 +#define rTx_IQK_PI_A 0xe38 +#define rRx_IQK_PI_A 0xe3c + +#define rTx_IQK 0xe40 +#define rRx_IQK 0xe44 +#define rIQK_AGC_Pts 0xe48 +#define rIQK_AGC_Rsp 0xe4c +#define rTx_IQK_Tone_B 0xe50 +#define rRx_IQK_Tone_B 0xe54 +#define rTx_IQK_PI_B 0xe58 +#define rRx_IQK_PI_B 0xe5c +#define rIQK_AGC_Cont 0xe60 + +#define rBlue_Tooth 0xe6c +#define rRx_Wait_CCA 0xe70 +#define rTx_CCK_RFON 0xe74 +#define rTx_CCK_BBON 0xe78 +#define rTx_OFDM_RFON 0xe7c +#define rTx_OFDM_BBON 0xe80 +#define rTx_To_Rx 0xe84 +#define rTx_To_Tx 0xe88 +#define rRx_CCK 0xe8c + +#define rTx_Power_Before_IQK_A 0xe94 +#define rTx_Power_After_IQK_A 0xe9c + +#define rRx_Power_Before_IQK_A 0xea0 +#define rRx_Power_Before_IQK_A_2 0xea4 +#define rRx_Power_After_IQK_A 0xea8 +#define rRx_Power_After_IQK_A_2 0xeac + +#define rTx_Power_Before_IQK_B 0xeb4 +#define rTx_Power_After_IQK_B 0xebc + +#define rRx_Power_Before_IQK_B 0xec0 +#define rRx_Power_Before_IQK_B_2 0xec4 +#define rRx_Power_After_IQK_B 0xec8 +#define rRx_Power_After_IQK_B_2 0xecc + +#define rRx_OFDM 0xed0 +#define rRx_Wait_RIFS 0xed4 +#define rRx_TO_Rx 0xed8 +#define rStandby 0xedc +#define rSleep 0xee0 +#define rPMPD_ANAEN 0xeec + +// +// 7. RF Register 0x00-0x2E (RF 8256) +// RF-0222D 0x00-3F +// +//Zebra1 +#define rZebra1_HSSIEnable 0x0 // Useless now +#define rZebra1_TRxEnable1 0x1 +#define rZebra1_TRxEnable2 0x2 +#define rZebra1_AGC 0x4 +#define rZebra1_ChargePump 0x5 +#define rZebra1_Channel 0x7 // RF channel switch + +//#endif +#define rZebra1_TxGain 0x8 // Useless now +#define rZebra1_TxLPF 0x9 +#define rZebra1_RxLPF 0xb +#define rZebra1_RxHPFCorner 0xc + +//Zebra4 +#define rGlobalCtrl 0 // Useless now +#define rRTL8256_TxLPF 19 +#define rRTL8256_RxLPF 11 + +//RTL8258 +#define rRTL8258_TxLPF 0x11 // Useless now +#define rRTL8258_RxLPF 0x13 +#define rRTL8258_RSSILPF 0xa + +// +// RL6052 Register definition +// +#define RF_AC 0x00 // + +#define RF_IQADJ_G1 0x01 // +#define RF_IQADJ_G2 0x02 // +#define RF_POW_TRSW 0x05 // + +#define RF_GAIN_RX 0x06 // +#define RF_GAIN_TX 0x07 // + +#define RF_TXM_IDAC 0x08 // +#define RF_BS_IQGEN 0x0F // + +#define RF_MODE1 0x10 // +#define RF_MODE2 0x11 // + +#define RF_RX_AGC_HP 0x12 // +#define RF_TX_AGC 0x13 // +#define RF_BIAS 0x14 // +#define RF_IPA 0x15 // +#define RF_POW_ABILITY 0x17 // +#define RF_MODE_AG 0x18 // +#define rRfChannel 0x18 // RF channel and BW switch +#define RF_CHNLBW 0x18 // RF channel and BW switch +#define RF_TOP 0x19 // + +#define RF_RX_G1 0x1A // +#define RF_RX_G2 0x1B // + +#define RF_RX_BB2 0x1C // +#define RF_RX_BB1 0x1D // + +#define RF_RCK1 0x1E // +#define RF_RCK2 0x1F // + +#define RF_TX_G1 0x20 // +#define RF_TX_G2 0x21 // +#define RF_TX_G3 0x22 // + +#define RF_TX_BB1 0x23 // + +#define RF_T_METER 0x24 // + +#define RF_SYN_G1 0x25 // RF TX Power control +#define RF_SYN_G2 0x26 // RF TX Power control +#define RF_SYN_G3 0x27 // RF TX Power control +#define RF_SYN_G4 0x28 // RF TX Power control +#define RF_SYN_G5 0x29 // RF TX Power control +#define RF_SYN_G6 0x2A // RF TX Power control +#define RF_SYN_G7 0x2B // RF TX Power control +#define RF_SYN_G8 0x2C // RF TX Power control + +#define RF_RCK_OS 0x30 // RF TX PA control + +#define RF_TXPA_G1 0x31 // RF TX PA control +#define RF_TXPA_G2 0x32 // RF TX PA control +#define RF_TXPA_G3 0x33 // RF TX PA control + +// +//Bit Mask +// +// 1. Page1(0x100) +#define bBBResetB 0x100 // Useless now? +#define bGlobalResetB 0x200 +#define bOFDMTxStart 0x4 +#define bCCKTxStart 0x8 +#define bCRC32Debug 0x100 +#define bPMACLoopback 0x10 +#define bTxLSIG 0xffffff +#define bOFDMTxRate 0xf +#define bOFDMTxReserved 0x10 +#define bOFDMTxLength 0x1ffe0 +#define bOFDMTxParity 0x20000 +#define bTxHTSIG1 0xffffff +#define bTxHTMCSRate 0x7f +#define bTxHTBW 0x80 +#define bTxHTLength 0xffff00 +#define bTxHTSIG2 0xffffff +#define bTxHTSmoothing 0x1 +#define bTxHTSounding 0x2 +#define bTxHTReserved 0x4 +#define bTxHTAggreation 0x8 +#define bTxHTSTBC 0x30 +#define bTxHTAdvanceCoding 0x40 +#define bTxHTShortGI 0x80 +#define bTxHTNumberHT_LTF 0x300 +#define bTxHTCRC8 0x3fc00 +#define bCounterReset 0x10000 +#define bNumOfOFDMTx 0xffff +#define bNumOfCCKTx 0xffff0000 +#define bTxIdleInterval 0xffff +#define bOFDMService 0xffff0000 +#define bTxMACHeader 0xffffffff +#define bTxDataInit 0xff +#define bTxHTMode 0x100 +#define bTxDataType 0x30000 +#define bTxRandomSeed 0xffffffff +#define bCCKTxPreamble 0x1 +#define bCCKTxSFD 0xffff0000 +#define bCCKTxSIG 0xff +#define bCCKTxService 0xff00 +#define bCCKLengthExt 0x8000 +#define bCCKTxLength 0xffff0000 +#define bCCKTxCRC16 0xffff +#define bCCKTxStatus 0x1 +#define bOFDMTxStatus 0x2 + +#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) + +// 2. Page8(0x800) +#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD +#define bJapanMode 0x2 +#define bCCKTxSC 0x30 +#define bCCKEn 0x1000000 +#define bOFDMEn 0x2000000 + +#define bOFDMRxADCPhase 0x10000 // Useless now +#define bOFDMTxDACPhase 0x40000 +#define bXATxAGC 0x3f + +#define bAntennaSelect 0x0300 + +#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage +#define bXCTxAGC 0xf000 +#define bXDTxAGC 0xf0000 + +#define bPAStart 0xf0000000 // Useless now +#define bTRStart 0x00f00000 +#define bRFStart 0x0000f000 +#define bBBStart 0x000000f0 +#define bBBCCKStart 0x0000000f +#define bPAEnd 0xf //Reg0x814 +#define bTREnd 0x0f000000 +#define bRFEnd 0x000f0000 +#define bCCAMask 0x000000f0 //T2R +#define bR2RCCAMask 0x00000f00 +#define bHSSI_R2TDelay 0xf8000000 +#define bHSSI_T2RDelay 0xf80000 +#define bContTxHSSI 0x400 //chane gain at continue Tx +#define bIGFromCCK 0x200 +#define bAGCAddress 0x3f +#define bRxHPTx 0x7000 +#define bRxHPT2R 0x38000 +#define bRxHPCCKIni 0xc0000 +#define bAGCTxCode 0xc00000 +#define bAGCRxCode 0x300000 + +#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 +#define b3WireAddressLength 0x400 + +#define b3WireRFPowerDown 0x1 // Useless now +//#define bHWSISelect 0x8 +#define b5GPAPEPolarity 0x40000000 +#define b2GPAPEPolarity 0x80000000 +#define bRFSW_TxDefaultAnt 0x3 +#define bRFSW_TxOptionAnt 0x30 +#define bRFSW_RxDefaultAnt 0x300 +#define bRFSW_RxOptionAnt 0x3000 +#define bRFSI_3WireData 0x1 +#define bRFSI_3WireClock 0x2 +#define bRFSI_3WireLoad 0x4 +#define bRFSI_3WireRW 0x8 +#define bRFSI_3Wire 0xf + +#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW + +#define bRFSI_TRSW 0x20 // Useless now +#define bRFSI_TRSWB 0x40 +#define bRFSI_ANTSW 0x100 +#define bRFSI_ANTSWB 0x200 +#define bRFSI_PAPE 0x400 +#define bRFSI_PAPE5G 0x800 +#define bBandSelect 0x1 +#define bHTSIG2_GI 0x80 +#define bHTSIG2_Smoothing 0x01 +#define bHTSIG2_Sounding 0x02 +#define bHTSIG2_Aggreaton 0x08 +#define bHTSIG2_STBC 0x30 +#define bHTSIG2_AdvCoding 0x40 +#define bHTSIG2_NumOfHTLTF 0x300 +#define bHTSIG2_CRC8 0x3fc +#define bHTSIG1_MCS 0x7f +#define bHTSIG1_BandWidth 0x80 +#define bHTSIG1_HTLength 0xffff +#define bLSIG_Rate 0xf +#define bLSIG_Reserved 0x10 +#define bLSIG_Length 0x1fffe +#define bLSIG_Parity 0x20 +#define bCCKRxPhase 0x4 + +#define bLSSIReadAddress 0x7f800000 // T65 RF + +#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal + +#define bLSSIReadBackData 0xfffff // T65 RF + +#define bLSSIReadOKFlag 0x1000 // Useless now +#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz +#define bRegulator0Standby 0x1 +#define bRegulatorPLLStandby 0x2 +#define bRegulator1Standby 0x4 +#define bPLLPowerUp 0x8 +#define bDPLLPowerUp 0x10 +#define bDA10PowerUp 0x20 +#define bAD7PowerUp 0x200 +#define bDA6PowerUp 0x2000 +#define bXtalPowerUp 0x4000 +#define b40MDClkPowerUP 0x8000 +#define bDA6DebugMode 0x20000 +#define bDA6Swing 0x380000 + +#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ + +#define b80MClkDelay 0x18000000 // Useless +#define bAFEWatchDogEnable 0x20000000 + +#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap +#define bXtalCap23 0x3 +#define bXtalCap92x 0x0f000000 +#define bXtalCap 0x0f000000 + +#define bIntDifClkEnable 0x400 // Useless +#define bExtSigClkEnable 0x800 +#define bBandgapMbiasPowerUp 0x10000 +#define bAD11SHGain 0xc0000 +#define bAD11InputRange 0x700000 +#define bAD11OPCurrent 0x3800000 +#define bIPathLoopback 0x4000000 +#define bQPathLoopback 0x8000000 +#define bAFELoopback 0x10000000 +#define bDA10Swing 0x7e0 +#define bDA10Reverse 0x800 +#define bDAClkSource 0x1000 +#define bAD7InputRange 0x6000 +#define bAD7Gain 0x38000 +#define bAD7OutputCMMode 0x40000 +#define bAD7InputCMMode 0x380000 +#define bAD7Current 0xc00000 +#define bRegulatorAdjust 0x7000000 +#define bAD11PowerUpAtTx 0x1 +#define bDA10PSAtTx 0x10 +#define bAD11PowerUpAtRx 0x100 +#define bDA10PSAtRx 0x1000 +#define bCCKRxAGCFormat 0x200 +#define bPSDFFTSamplepPoint 0xc000 +#define bPSDAverageNum 0x3000 +#define bIQPathControl 0xc00 +#define bPSDFreq 0x3ff +#define bPSDAntennaPath 0x30 +#define bPSDIQSwitch 0x40 +#define bPSDRxTrigger 0x400000 +#define bPSDTxTrigger 0x80000000 +#define bPSDSineToneScale 0x7f000000 +#define bPSDReport 0xffff + +// 3. Page9(0x900) +#define bOFDMTxSC 0x30000000 // Useless +#define bCCKTxOn 0x1 +#define bOFDMTxOn 0x2 +#define bDebugPage 0xfff //reset debug page and also HWord, LWord +#define bDebugItem 0xff //reset debug page and LWord +#define bAntL 0x10 +#define bAntNonHT 0x100 +#define bAntHT1 0x1000 +#define bAntHT2 0x10000 +#define bAntHT1S1 0x100000 +#define bAntNonHTS1 0x1000000 + +// 4. PageA(0xA00) +#define bCCKBBMode 0x3 // Useless +#define bCCKTxPowerSaving 0x80 +#define bCCKRxPowerSaving 0x40 + +#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch + +#define bCCKScramble 0x8 // Useless +#define bCCKAntDiversity 0x8000 +#define bCCKCarrierRecovery 0x4000 +#define bCCKTxRate 0x3000 +#define bCCKDCCancel 0x0800 +#define bCCKISICancel 0x0400 +#define bCCKMatchFilter 0x0200 +#define bCCKEqualizer 0x0100 +#define bCCKPreambleDetect 0x800000 +#define bCCKFastFalseCCA 0x400000 +#define bCCKChEstStart 0x300000 +#define bCCKCCACount 0x080000 +#define bCCKcs_lim 0x070000 +#define bCCKBistMode 0x80000000 +#define bCCKCCAMask 0x40000000 +#define bCCKTxDACPhase 0x4 +#define bCCKRxADCPhase 0x20000000 //r_rx_clk +#define bCCKr_cp_mode0 0x0100 +#define bCCKTxDCOffset 0xf0 +#define bCCKRxDCOffset 0xf +#define bCCKCCAMode 0xc000 +#define bCCKFalseCS_lim 0x3f00 +#define bCCKCS_ratio 0xc00000 +#define bCCKCorgBit_sel 0x300000 +#define bCCKPD_lim 0x0f0000 +#define bCCKNewCCA 0x80000000 +#define bCCKRxHPofIG 0x8000 +#define bCCKRxIG 0x7f00 +#define bCCKLNAPolarity 0x800000 +#define bCCKRx1stGain 0x7f0000 +#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity +#define bCCKRxAGCSatLevel 0x1f000000 +#define bCCKRxAGCSatCount 0xe0 +#define bCCKRxRFSettle 0x1f //AGCsamp_dly +#define bCCKFixedRxAGC 0x8000 +//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 +#define bCCKAntennaPolarity 0x2000 +#define bCCKTxFilterType 0x0c00 +#define bCCKRxAGCReportType 0x0300 +#define bCCKRxDAGCEn 0x80000000 +#define bCCKRxDAGCPeriod 0x20000000 +#define bCCKRxDAGCSatLevel 0x1f000000 +#define bCCKTimingRecovery 0x800000 +#define bCCKTxC0 0x3f0000 +#define bCCKTxC1 0x3f000000 +#define bCCKTxC2 0x3f +#define bCCKTxC3 0x3f00 +#define bCCKTxC4 0x3f0000 +#define bCCKTxC5 0x3f000000 +#define bCCKTxC6 0x3f +#define bCCKTxC7 0x3f00 +#define bCCKDebugPort 0xff0000 +#define bCCKDACDebug 0x0f000000 +#define bCCKFalseAlarmEnable 0x8000 +#define bCCKFalseAlarmRead 0x4000 +#define bCCKTRSSI 0x7f +#define bCCKRxAGCReport 0xfe +#define bCCKRxReport_AntSel 0x80000000 +#define bCCKRxReport_MFOff 0x40000000 +#define bCCKRxRxReport_SQLoss 0x20000000 +#define bCCKRxReport_Pktloss 0x10000000 +#define bCCKRxReport_Lockedbit 0x08000000 +#define bCCKRxReport_RateError 0x04000000 +#define bCCKRxReport_RxRate 0x03000000 +#define bCCKRxFACounterLower 0xff +#define bCCKRxFACounterUpper 0xff000000 +#define bCCKRxHPAGCStart 0xe000 +#define bCCKRxHPAGCFinal 0x1c00 +#define bCCKRxFalseAlarmEnable 0x8000 +#define bCCKFACounterFreeze 0x4000 +#define bCCKTxPathSel 0x10000000 +#define bCCKDefaultRxPath 0xc000000 +#define bCCKOptionRxPath 0x3000000 + +// 5. PageC(0xC00) +#define bNumOfSTF 0x3 // Useless +#define bShift_L 0xc0 +#define bGI_TH 0xc +#define bRxPathA 0x1 +#define bRxPathB 0x2 +#define bRxPathC 0x4 +#define bRxPathD 0x8 +#define bTxPathA 0x1 +#define bTxPathB 0x2 +#define bTxPathC 0x4 +#define bTxPathD 0x8 +#define bTRSSIFreq 0x200 +#define bADCBackoff 0x3000 +#define bDFIRBackoff 0xc000 +#define bTRSSILatchPhase 0x10000 +#define bRxIDCOffset 0xff +#define bRxQDCOffset 0xff00 +#define bRxDFIRMode 0x1800000 +#define bRxDCNFType 0xe000000 +#define bRXIQImb_A 0x3ff +#define bRXIQImb_B 0xfc00 +#define bRXIQImb_C 0x3f0000 +#define bRXIQImb_D 0xffc00000 +#define bDC_dc_Notch 0x60000 +#define bRxNBINotch 0x1f000000 +#define bPD_TH 0xf +#define bPD_TH_Opt2 0xc000 +#define bPWED_TH 0x700 +#define bIfMF_Win_L 0x800 +#define bPD_Option 0x1000 +#define bMF_Win_L 0xe000 +#define bBW_Search_L 0x30000 +#define bwin_enh_L 0xc0000 +#define bBW_TH 0x700000 +#define bED_TH2 0x3800000 +#define bBW_option 0x4000000 +#define bRatio_TH 0x18000000 +#define bWindow_L 0xe0000000 +#define bSBD_Option 0x1 +#define bFrame_TH 0x1c +#define bFS_Option 0x60 +#define bDC_Slope_check 0x80 +#define bFGuard_Counter_DC_L 0xe00 +#define bFrame_Weight_Short 0x7000 +#define bSub_Tune 0xe00000 +#define bFrame_DC_Length 0xe000000 +#define bSBD_start_offset 0x30000000 +#define bFrame_TH_2 0x7 +#define bFrame_GI2_TH 0x38 +#define bGI2_Sync_en 0x40 +#define bSarch_Short_Early 0x300 +#define bSarch_Short_Late 0xc00 +#define bSarch_GI2_Late 0x70000 +#define bCFOAntSum 0x1 +#define bCFOAcc 0x2 +#define bCFOStartOffset 0xc +#define bCFOLookBack 0x70 +#define bCFOSumWeight 0x80 +#define bDAGCEnable 0x10000 +#define bTXIQImb_A 0x3ff +#define bTXIQImb_B 0xfc00 +#define bTXIQImb_C 0x3f0000 +#define bTXIQImb_D 0xffc00000 +#define bTxIDCOffset 0xff +#define bTxQDCOffset 0xff00 +#define bTxDFIRMode 0x10000 +#define bTxPesudoNoiseOn 0x4000000 +#define bTxPesudoNoise_A 0xff +#define bTxPesudoNoise_B 0xff00 +#define bTxPesudoNoise_C 0xff0000 +#define bTxPesudoNoise_D 0xff000000 +#define bCCADropOption 0x20000 +#define bCCADropThres 0xfff00000 +#define bEDCCA_H 0xf +#define bEDCCA_L 0xf0 +#define bLambda_ED 0x300 +#define bRxInitialGain 0x7f +#define bRxAntDivEn 0x80 +#define bRxAGCAddressForLNA 0x7f00 +#define bRxHighPowerFlow 0x8000 +#define bRxAGCFreezeThres 0xc0000 +#define bRxFreezeStep_AGC1 0x300000 +#define bRxFreezeStep_AGC2 0xc00000 +#define bRxFreezeStep_AGC3 0x3000000 +#define bRxFreezeStep_AGC0 0xc000000 +#define bRxRssi_Cmp_En 0x10000000 +#define bRxQuickAGCEn 0x20000000 +#define bRxAGCFreezeThresMode 0x40000000 +#define bRxOverFlowCheckType 0x80000000 +#define bRxAGCShift 0x7f +#define bTRSW_Tri_Only 0x80 +#define bPowerThres 0x300 +#define bRxAGCEn 0x1 +#define bRxAGCTogetherEn 0x2 +#define bRxAGCMin 0x4 +#define bRxHP_Ini 0x7 +#define bRxHP_TRLNA 0x70 +#define bRxHP_RSSI 0x700 +#define bRxHP_BBP1 0x7000 +#define bRxHP_BBP2 0x70000 +#define bRxHP_BBP3 0x700000 +#define bRSSI_H 0x7f0000 //the threshold for high power +#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity +#define bRxSettle_TRSW 0x7 +#define bRxSettle_LNA 0x38 +#define bRxSettle_RSSI 0x1c0 +#define bRxSettle_BBP 0xe00 +#define bRxSettle_RxHP 0x7000 +#define bRxSettle_AntSW_RSSI 0x38000 +#define bRxSettle_AntSW 0xc0000 +#define bRxProcessTime_DAGC 0x300000 +#define bRxSettle_HSSI 0x400000 +#define bRxProcessTime_BBPPW 0x800000 +#define bRxAntennaPowerShift 0x3000000 +#define bRSSITableSelect 0xc000000 +#define bRxHP_Final 0x7000000 +#define bRxHTSettle_BBP 0x7 +#define bRxHTSettle_HSSI 0x8 +#define bRxHTSettle_RxHP 0x70 +#define bRxHTSettle_BBPPW 0x80 +#define bRxHTSettle_Idle 0x300 +#define bRxHTSettle_Reserved 0x1c00 +#define bRxHTRxHPEn 0x8000 +#define bRxHTAGCFreezeThres 0x30000 +#define bRxHTAGCTogetherEn 0x40000 +#define bRxHTAGCMin 0x80000 +#define bRxHTAGCEn 0x100000 +#define bRxHTDAGCEn 0x200000 +#define bRxHTRxHP_BBP 0x1c00000 +#define bRxHTRxHP_Final 0xe0000000 +#define bRxPWRatioTH 0x3 +#define bRxPWRatioEn 0x4 +#define bRxMFHold 0x3800 +#define bRxPD_Delay_TH1 0x38 +#define bRxPD_Delay_TH2 0x1c0 +#define bRxPD_DC_COUNT_MAX 0x600 +//#define bRxMF_Hold 0x3800 +#define bRxPD_Delay_TH 0x8000 +#define bRxProcess_Delay 0xf0000 +#define bRxSearchrange_GI2_Early 0x700000 +#define bRxFrame_Guard_Counter_L 0x3800000 +#define bRxSGI_Guard_L 0xc000000 +#define bRxSGI_Search_L 0x30000000 +#define bRxSGI_TH 0xc0000000 +#define bDFSCnt0 0xff +#define bDFSCnt1 0xff00 +#define bDFSFlag 0xf0000 +#define bMFWeightSum 0x300000 +#define bMinIdxTH 0x7f000000 +#define bDAFormat 0x40000 +#define bTxChEmuEnable 0x01000000 +#define bTRSWIsolation_A 0x7f +#define bTRSWIsolation_B 0x7f00 +#define bTRSWIsolation_C 0x7f0000 +#define bTRSWIsolation_D 0x7f000000 +#define bExtLNAGain 0x7c00 + +// 6. PageE(0xE00) +#define bSTBCEn 0x4 // Useless +#define bAntennaMapping 0x10 +#define bNss 0x20 +#define bCFOAntSumD 0x200 +#define bPHYCounterReset 0x8000000 +#define bCFOReportGet 0x4000000 +#define bOFDMContinueTx 0x10000000 +#define bOFDMSingleCarrier 0x20000000 +#define bOFDMSingleTone 0x40000000 +//#define bRxPath1 0x01 +//#define bRxPath2 0x02 +//#define bRxPath3 0x04 +//#define bRxPath4 0x08 +//#define bTxPath1 0x10 +//#define bTxPath2 0x20 +#define bHTDetect 0x100 +#define bCFOEn 0x10000 +#define bCFOValue 0xfff00000 +#define bSigTone_Re 0x3f +#define bSigTone_Im 0x7f00 +#define bCounter_CCA 0xffff +#define bCounter_ParityFail 0xffff0000 +#define bCounter_RateIllegal 0xffff +#define bCounter_CRC8Fail 0xffff0000 +#define bCounter_MCSNoSupport 0xffff +#define bCounter_FastSync 0xffff +#define bShortCFO 0xfff +#define bShortCFOTLength 12 //total +#define bShortCFOFLength 11 //fraction +#define bLongCFO 0x7ff +#define bLongCFOTLength 11 +#define bLongCFOFLength 11 +#define bTailCFO 0x1fff +#define bTailCFOTLength 13 +#define bTailCFOFLength 12 +#define bmax_en_pwdB 0xffff +#define bCC_power_dB 0xffff0000 +#define bnoise_pwdB 0xffff +#define bPowerMeasTLength 10 +#define bPowerMeasFLength 3 +#define bRx_HT_BW 0x1 +#define bRxSC 0x6 +#define bRx_HT 0x8 +#define bNB_intf_det_on 0x1 +#define bIntf_win_len_cfg 0x30 +#define bNB_Intf_TH_cfg 0x1c0 +#define bRFGain 0x3f +#define bTableSel 0x40 +#define bTRSW 0x80 +#define bRxSNR_A 0xff +#define bRxSNR_B 0xff00 +#define bRxSNR_C 0xff0000 +#define bRxSNR_D 0xff000000 +#define bSNREVMTLength 8 +#define bSNREVMFLength 1 +#define bCSI1st 0xff +#define bCSI2nd 0xff00 +#define bRxEVM1st 0xff0000 +#define bRxEVM2nd 0xff000000 +#define bSIGEVM 0xff +#define bPWDB 0xff00 +#define bSGIEN 0x10000 + +#define bSFactorQAM1 0xf // Useless +#define bSFactorQAM2 0xf0 +#define bSFactorQAM3 0xf00 +#define bSFactorQAM4 0xf000 +#define bSFactorQAM5 0xf0000 +#define bSFactorQAM6 0xf0000 +#define bSFactorQAM7 0xf00000 +#define bSFactorQAM8 0xf000000 +#define bSFactorQAM9 0xf0000000 +#define bCSIScheme 0x100000 + +#define bNoiseLvlTopSet 0x3 // Useless +#define bChSmooth 0x4 +#define bChSmoothCfg1 0x38 +#define bChSmoothCfg2 0x1c0 +#define bChSmoothCfg3 0xe00 +#define bChSmoothCfg4 0x7000 +#define bMRCMode 0x800000 +#define bTHEVMCfg 0x7000000 + +#define bLoopFitType 0x1 // Useless +#define bUpdCFO 0x40 +#define bUpdCFOOffData 0x80 +#define bAdvUpdCFO 0x100 +#define bAdvTimeCtrl 0x800 +#define bUpdClko 0x1000 +#define bFC 0x6000 +#define bTrackingMode 0x8000 +#define bPhCmpEnable 0x10000 +#define bUpdClkoLTF 0x20000 +#define bComChCFO 0x40000 +#define bCSIEstiMode 0x80000 +#define bAdvUpdEqz 0x100000 +#define bUChCfg 0x7000000 +#define bUpdEqz 0x8000000 + +//Rx Pseduo noise +#define bRxPesudoNoiseOn 0x20000000 // Useless +#define bRxPesudoNoise_A 0xff +#define bRxPesudoNoise_B 0xff00 +#define bRxPesudoNoise_C 0xff0000 +#define bRxPesudoNoise_D 0xff000000 +#define bPesudoNoiseState_A 0xffff +#define bPesudoNoiseState_B 0xffff0000 +#define bPesudoNoiseState_C 0xffff +#define bPesudoNoiseState_D 0xffff0000 + +//7. RF Register +//Zebra1 +#define bZebra1_HSSIEnable 0x8 // Useless +#define bZebra1_TRxControl 0xc00 +#define bZebra1_TRxGainSetting 0x07f +#define bZebra1_RxCorner 0xc00 +#define bZebra1_TxChargePump 0x38 +#define bZebra1_RxChargePump 0x7 +#define bZebra1_ChannelNum 0xf80 +#define bZebra1_TxLPFBW 0x400 +#define bZebra1_RxLPFBW 0x600 + +//Zebra4 +#define bRTL8256RegModeCtrl1 0x100 // Useless +#define bRTL8256RegModeCtrl0 0x40 +#define bRTL8256_TxLPFBW 0x18 +#define bRTL8256_RxLPFBW 0x600 + +//RTL8258 +#define bRTL8258_TxLPFBW 0xc // Useless +#define bRTL8258_RxLPFBW 0xc00 +#define bRTL8258_RSSILPFBW 0xc0 + + +// +// Other Definition +// + +//byte endable for sb_write +#define bByte0 0x1 // Useless +#define bByte1 0x2 +#define bByte2 0x4 +#define bByte3 0x8 +#define bWord0 0x3 +#define bWord1 0xc +#define bDWord 0xf + +//for PutRegsetting & GetRegSetting BitMask +#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f +#define bMaskByte1 0xff00 +#define bMaskByte2 0xff0000 +#define bMaskByte3 0xff000000 +#define bMaskHWord 0xffff0000 +#define bMaskLWord 0x0000ffff +#define bMaskDWord 0xffffffff +#define bMask12Bits 0xfff +#define bMaskH4Bits 0xf0000000 +#define bMaskOFDM_D 0xffc00000 +#define bMaskCCK 0x3f3f3f3f + +//for PutRFRegsetting & GetRFRegSetting BitMask +//#define bMask12Bits 0xfffff // RF Reg mask bits +//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF +#define bRFRegOffsetMask 0xfffff + +#define bEnable 0x1 // Useless +#define bDisable 0x0 + +#define LeftAntenna 0x0 // Useless +#define RightAntenna 0x1 + +#define tCheckTxStatus 500 //500ms // Useless +#define tUpdateRxCounter 100 //100ms + +#define rateCCK 0 // Useless +#define rateOFDM 1 +#define rateHT 2 + +//define Register-End +#define bPMAC_End 0x1ff // Useless +#define bFPGAPHY0_End 0x8ff +#define bFPGAPHY1_End 0x9ff +#define bCCKPHY0_End 0xaff +#define bOFDMPHY0_End 0xcff +#define bOFDMPHY1_End 0xdff + +//define max debug item in each debug page +//#define bMaxItem_FPGA_PHY0 0x9 +//#define bMaxItem_FPGA_PHY1 0x3 +//#define bMaxItem_PHY_11B 0x16 +//#define bMaxItem_OFDM_PHY0 0x29 +//#define bMaxItem_OFDM_PHY1 0x0 + +#define bPMACControl 0x0 // Useless +#define bWMACControl 0x1 +#define bWNICControl 0x2 + +#define PathA 0x0 // Useless +#define PathB 0x1 +#define PathC 0x2 +#define PathD 0x3 + +/*--------------------------Define Parameters-------------------------------*/ + + +#endif //__INC_HAL8192SPHYREG_H + diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg.h old mode 100755 new mode 100644 index 2aced693cc3b68..254a060942b1c9 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg.h @@ -1,99 +1,99 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192CU_FW_IMG_H -#define __INC_HAL8192CU_FW_IMG_H - -/*Created on 2011/12/14, 8:38*/ - -#ifdef CONFIG_BT_COEXISTENCE -#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06 -#else -#define TSMCImgArrayLength 16116 //v80 TSMC P2PPS 2011-12-14 -#endif -extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength]; - -#ifdef CONFIG_BT_COEXISTENCE -#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 -#else //#ifdef CONFIG_P2P -#define UMCACutImgArrayLength 16116 //v80 UMC A Cut P2PPS 2011-12-14 -#endif -extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength]; - -#ifdef CONFIG_BT_COEXISTENCE -#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06 -#else //#ifdef CONFIG_P2P -#define UMCBCutImgArrayLength 16096 //v80 UMC B Cut P2PPS 2011-12-14 -#endif -extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength]; - -#define UMC8723ImgArrayLength 16288 -extern u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength]; -#define PHY_REG_2TArrayLength 374 -extern u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength]; -#define PHY_REG_1TArrayLength 374 -extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength]; -#define PHY_ChangeTo_1T1RArrayLength 1 -extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; -#define PHY_ChangeTo_1T2RArrayLength 1 -extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; -#define PHY_ChangeTo_2T2RArrayLength 1 -extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; -#define PHY_REG_Array_PGLength 336 -extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength]; -#define PHY_REG_Array_PG_mCardLength 336 -extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength]; -#define PHY_REG_Array_MPLength 4 -extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength]; -#define PHY_REG_1T_HPArrayLength 378 -extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength]; -#define PHY_REG_1T_mCardArrayLength 374 -extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength]; -#define PHY_REG_2T_mCardArrayLength 374 -extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength]; -#define PHY_REG_Array_PG_HPLength 336 -extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength]; -#define RadioA_2TArrayLength 282 -extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength]; -#define RadioB_2TArrayLength 78 -extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength]; -#define RadioA_1TArrayLength 282 -extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength]; -#define RadioB_1TArrayLength 1 -extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength]; -#define RadioA_1T_mCardArrayLength 282 -extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength]; -#define RadioB_1T_mCardArrayLength 1 -extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength]; -#define RadioA_1T_HPArrayLength 282 -extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength]; -#define RadioB_GM_ArrayLength 1 -extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength]; -#define MAC_2T_ArrayLength 172 -extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength]; -#define MACPHY_Array_PGLength 1 -extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength]; -#define AGCTAB_2TArrayLength 320 -extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength]; -#define AGCTAB_1TArrayLength 320 -extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength]; -#define AGCTAB_1T_HPArrayLength 320 -extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength]; - -#endif //__INC_HAL8192CU_FW_IMG_H +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192CU_FW_IMG_H +#define __INC_HAL8192CU_FW_IMG_H + +/*Created on 2011/12/14, 8:38*/ + +#ifdef CONFIG_BT_COEXISTENCE +#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06 +#else +#define TSMCImgArrayLength 16116 //v80 TSMC P2PPS 2011-12-14 +#endif +extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength]; + +#ifdef CONFIG_BT_COEXISTENCE +#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 +#else //#ifdef CONFIG_P2P +#define UMCACutImgArrayLength 16116 //v80 UMC A Cut P2PPS 2011-12-14 +#endif +extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength]; + +#ifdef CONFIG_BT_COEXISTENCE +#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06 +#else //#ifdef CONFIG_P2P +#define UMCBCutImgArrayLength 16096 //v80 UMC B Cut P2PPS 2011-12-14 +#endif +extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength]; + +#define UMC8723ImgArrayLength 16288 +extern u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength]; +#define PHY_REG_2TArrayLength 374 +extern u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength]; +#define PHY_REG_1TArrayLength 374 +extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength]; +#define PHY_ChangeTo_1T1RArrayLength 1 +extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; +#define PHY_ChangeTo_1T2RArrayLength 1 +extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; +#define PHY_ChangeTo_2T2RArrayLength 1 +extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; +#define PHY_REG_Array_PGLength 336 +extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength]; +#define PHY_REG_Array_PG_mCardLength 336 +extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength]; +#define PHY_REG_Array_MPLength 4 +extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength]; +#define PHY_REG_1T_HPArrayLength 378 +extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength]; +#define PHY_REG_1T_mCardArrayLength 374 +extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength]; +#define PHY_REG_2T_mCardArrayLength 374 +extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength]; +#define PHY_REG_Array_PG_HPLength 336 +extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength]; +#define RadioA_2TArrayLength 282 +extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength]; +#define RadioB_2TArrayLength 78 +extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength]; +#define RadioA_1TArrayLength 282 +extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength]; +#define RadioB_1TArrayLength 1 +extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength]; +#define RadioA_1T_mCardArrayLength 282 +extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength]; +#define RadioB_1T_mCardArrayLength 1 +extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength]; +#define RadioA_1T_HPArrayLength 282 +extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength]; +#define RadioB_GM_ArrayLength 1 +extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength]; +#define MAC_2T_ArrayLength 172 +extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength]; +#define MACPHY_Array_PGLength 1 +extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength]; +#define AGCTAB_2TArrayLength 320 +extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength]; +#define AGCTAB_1TArrayLength 320 +extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength]; +#define AGCTAB_1T_HPArrayLength 320 +extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength]; + +#endif //__INC_HAL8192CU_FW_IMG_H diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg_wowlan.h b/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg_wowlan.h old mode 100755 new mode 100644 index ec52f45c6ea387..47d4d2fc427321 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg_wowlan.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg_wowlan.h @@ -1,34 +1,34 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192CU_FW_IMG_WOWLAN_H -#define __INC_HAL8192CU_FW_IMG_WOWLAN_H - -/*Created on 2011/11/ 8, 14:15*/ - - -#define TSMCWWImgArrayLength 13458 -extern u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength]; -#define UMCACutWWImgArrayLength 13458 -extern u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength]; -#define UMCBCutWWImgArrayLength 13446 -extern u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength]; - -#endif //__INC_HAL8192CU_FW_IMG_WOWLAN_H - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192CU_FW_IMG_WOWLAN_H +#define __INC_HAL8192CU_FW_IMG_WOWLAN_H + +/*Created on 2011/11/ 8, 14:15*/ + + +#define TSMCWWImgArrayLength 13458 +extern u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength]; +#define UMCACutWWImgArrayLength 13458 +extern u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength]; +#define UMCBCutWWImgArrayLength 13446 +extern u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength]; + +#endif //__INC_HAL8192CU_FW_IMG_WOWLAN_H + diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DEHWImg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DEHWImg.h old mode 100755 new mode 100644 index d99403c7c4f9ff..dc2bc1783ea612 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DEHWImg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DEHWImg.h @@ -1,66 +1,66 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192DU_FW_IMG_H -#define __INC_HAL8192DU_FW_IMG_H - -#include - -/*Created on 2011/ 8/ 8, 1:41*/ - -#define ImgArrayLength 29642 -extern u8 Rtl8192DEFwImgArray[ImgArrayLength]; -#define MainArrayLength 1 -extern u8 Rtl8192DEFwMainArray[MainArrayLength]; -#define DataArrayLength 1 -extern u8 Rtl8192DEFwDataArray[DataArrayLength]; -#define PHY_REG_2TArrayLength 380 -extern u32 Rtl8192DEPHY_REG_2TArray[PHY_REG_2TArrayLength]; -#define PHY_REG_1TArrayLength 1 -extern u32 Rtl8192DEPHY_REG_1TArray[PHY_REG_1TArrayLength]; -#define PHY_REG_Array_PGLength 624 -extern u32 Rtl8192DEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; -#define PHY_REG_Array_MPLength 10 -extern u32 Rtl8192DEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; -#define RadioA_2TArrayLength 378 -extern u32 Rtl8192DERadioA_2TArray[RadioA_2TArrayLength]; -#define RadioB_2TArrayLength 384 -extern u32 Rtl8192DERadioB_2TArray[RadioB_2TArrayLength]; -#define RadioA_1TArrayLength 1 -extern u32 Rtl8192DERadioA_1TArray[RadioA_1TArrayLength]; -#define RadioB_1TArrayLength 1 -extern u32 Rtl8192DERadioB_1TArray[RadioB_1TArrayLength]; -#define RadioA_2T_intPAArrayLength 378 -extern u32 Rtl8192DERadioA_2T_intPAArray[RadioA_2T_intPAArrayLength]; -#define RadioB_2T_intPAArrayLength 384 -extern u32 Rtl8192DERadioB_2T_intPAArray[RadioB_2T_intPAArrayLength]; -#define MAC_2TArrayLength 160 -extern u32 Rtl8192DEMAC_2TArray[MAC_2TArrayLength]; -#define AGCTAB_ArrayLength 386 -extern u32 Rtl8192DEAGCTAB_Array[AGCTAB_ArrayLength]; -#define AGCTAB_5GArrayLength 194 -extern u32 Rtl8192DEAGCTAB_5GArray[AGCTAB_5GArrayLength]; -#define AGCTAB_2GArrayLength 194 -extern u32 Rtl8192DEAGCTAB_2GArray[AGCTAB_2GArrayLength]; -#define AGCTAB_2TArrayLength 1 -extern u32 Rtl8192DEAGCTAB_2TArray[AGCTAB_2TArrayLength]; -#define AGCTAB_1TArrayLength 1 -extern u32 Rtl8192DEAGCTAB_1TArray[AGCTAB_1TArrayLength]; - -#endif //__INC_HAL8192CU_FW_IMG_H +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192DU_FW_IMG_H +#define __INC_HAL8192DU_FW_IMG_H + +#include + +/*Created on 2011/ 8/ 8, 1:41*/ + +#define ImgArrayLength 29642 +extern u8 Rtl8192DEFwImgArray[ImgArrayLength]; +#define MainArrayLength 1 +extern u8 Rtl8192DEFwMainArray[MainArrayLength]; +#define DataArrayLength 1 +extern u8 Rtl8192DEFwDataArray[DataArrayLength]; +#define PHY_REG_2TArrayLength 380 +extern u32 Rtl8192DEPHY_REG_2TArray[PHY_REG_2TArrayLength]; +#define PHY_REG_1TArrayLength 1 +extern u32 Rtl8192DEPHY_REG_1TArray[PHY_REG_1TArrayLength]; +#define PHY_REG_Array_PGLength 624 +extern u32 Rtl8192DEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; +#define PHY_REG_Array_MPLength 10 +extern u32 Rtl8192DEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; +#define RadioA_2TArrayLength 378 +extern u32 Rtl8192DERadioA_2TArray[RadioA_2TArrayLength]; +#define RadioB_2TArrayLength 384 +extern u32 Rtl8192DERadioB_2TArray[RadioB_2TArrayLength]; +#define RadioA_1TArrayLength 1 +extern u32 Rtl8192DERadioA_1TArray[RadioA_1TArrayLength]; +#define RadioB_1TArrayLength 1 +extern u32 Rtl8192DERadioB_1TArray[RadioB_1TArrayLength]; +#define RadioA_2T_intPAArrayLength 378 +extern u32 Rtl8192DERadioA_2T_intPAArray[RadioA_2T_intPAArrayLength]; +#define RadioB_2T_intPAArrayLength 384 +extern u32 Rtl8192DERadioB_2T_intPAArray[RadioB_2T_intPAArrayLength]; +#define MAC_2TArrayLength 160 +extern u32 Rtl8192DEMAC_2TArray[MAC_2TArrayLength]; +#define AGCTAB_ArrayLength 386 +extern u32 Rtl8192DEAGCTAB_Array[AGCTAB_ArrayLength]; +#define AGCTAB_5GArrayLength 194 +extern u32 Rtl8192DEAGCTAB_5GArray[AGCTAB_5GArrayLength]; +#define AGCTAB_2GArrayLength 194 +extern u32 Rtl8192DEAGCTAB_2GArray[AGCTAB_2GArrayLength]; +#define AGCTAB_2TArrayLength 1 +extern u32 Rtl8192DEAGCTAB_2TArray[AGCTAB_2TArrayLength]; +#define AGCTAB_1TArrayLength 1 +extern u32 Rtl8192DEAGCTAB_1TArray[AGCTAB_1TArrayLength]; + +#endif //__INC_HAL8192CU_FW_IMG_H diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DETestHWImg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DETestHWImg.h old mode 100755 new mode 100644 index 0cb96e51d648aa..2432bcdb7b28ae --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DETestHWImg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DETestHWImg.h @@ -1,54 +1,54 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192DETEST_FW_IMG_H -#define __INC_HAL8192DETEST_FW_IMG_H - -#include - -/*Created on 2010/ 5/27, 8: 6*/ - -#define Rtl8192DTestImgArrayLength 15054 -extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength]; -#define Rtl8192DTestMainArrayLength 1 -extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength]; -#define Rtl8192DTestDataArrayLength 1 -extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength]; -#define Rtl8192DTestPHY_REG_2TArrayLength 376 -extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength]; -#define Rtl8192DTestPHY_REG_1TArrayLength 1 -extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength]; -#define Rtl8192DTestPHY_REG_Array_PGLength 1 -extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength]; -#define Rtl8192DTestRadioA_2TArrayLength 340 -extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength]; -#define Rtl8192DTestRadioB_2TArrayLength 340 -extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength]; -#define Rtl8192DTestRadioA_1TArrayLength 1 -extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength]; -#define Rtl8192DTestRadioB_1TArrayLength 1 -extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength]; -#define Rtl8192DTestMAC_2TArrayLength 174 -extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength]; -#define Rtl8192DTestAGCTAB_5GArrayLength 514 -extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength]; -#define Rtl8192DTestAGCTAB_2GArrayLength 514 -extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength]; - -#endif //__INC_HAL8192CU_FW_IMG_H +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192DETEST_FW_IMG_H +#define __INC_HAL8192DETEST_FW_IMG_H + +#include + +/*Created on 2010/ 5/27, 8: 6*/ + +#define Rtl8192DTestImgArrayLength 15054 +extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength]; +#define Rtl8192DTestMainArrayLength 1 +extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength]; +#define Rtl8192DTestDataArrayLength 1 +extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength]; +#define Rtl8192DTestPHY_REG_2TArrayLength 376 +extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength]; +#define Rtl8192DTestPHY_REG_1TArrayLength 1 +extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength]; +#define Rtl8192DTestPHY_REG_Array_PGLength 1 +extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength]; +#define Rtl8192DTestRadioA_2TArrayLength 340 +extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength]; +#define Rtl8192DTestRadioB_2TArrayLength 340 +extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength]; +#define Rtl8192DTestRadioA_1TArrayLength 1 +extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength]; +#define Rtl8192DTestRadioB_1TArrayLength 1 +extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength]; +#define Rtl8192DTestMAC_2TArrayLength 174 +extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength]; +#define Rtl8192DTestAGCTAB_5GArrayLength 514 +extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength]; +#define Rtl8192DTestAGCTAB_2GArrayLength 514 +extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength]; + +#endif //__INC_HAL8192CU_FW_IMG_H diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyCfg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyCfg.h old mode 100755 new mode 100644 index 8e144173902391..475cf36e2677f6 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyCfg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyCfg.h @@ -1,528 +1,528 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/***************************************************************************** - * - * Module: __INC_HAL8192DPHYCFG_H - * - * - * Note: - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * Data Who Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * - *****************************************************************************/ - /* Check to see if the file has been included already. */ -#ifndef __INC_HAL8192DPHYCFG_H -#define __INC_HAL8192DPHYCFG_H - - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 //us -#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - - -#define IQK_MAC_REG_NUM 4 -#define IQK_ADDA_REG_NUM 16 -#define IQK_BB_REG_NUM 10 -#define IQK_BB_REG_NUM_92C 9 -#define IQK_BB_REG_NUM_92D 10 -#define IQK_BB_REG_NUM_test 6 -#define index_mapping_NUM 13 -#define Rx_index_mapping_NUM 15 -#define AVG_THERMAL_NUM 8 -#define IQK_Matrix_REG_NUM 8 -#define IQK_Matrix_Settings_NUM 1+24+21 - -#ifdef CONFIG_PCI_HCI -#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ -{ \ - u1Byte u1bTmp; \ - u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ - u1bTmp |= BIT0; \ - PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ - PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ - PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ - delay_us(100); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ - PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ - delay_us(10); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ - delay_us(10); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ - delay_us(10); \ - PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ -} -#endif - - -/*--------------------------Define Parameters-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ -typedef enum _SwChnlCmdID{ - CmdID_End, - CmdID_SetTxPowerLevel, - CmdID_BBRegWrite10, - CmdID_WritePortUlong, - CmdID_WritePortUshort, - CmdID_WritePortUchar, - CmdID_RF_WriteReg, -}SwChnlCmdID; - - -/* 1. Switch channel related */ -typedef struct _SwChnlCmd{ - SwChnlCmdID CmdID; - u32 Para1; - u32 Para2; - u32 msDelay; -}SwChnlCmd; - -typedef enum _HW90_BLOCK{ - HW90_BLOCK_MAC = 0, - HW90_BLOCK_PHY0 = 1, - HW90_BLOCK_PHY1 = 2, - HW90_BLOCK_RF = 3, - HW90_BLOCK_MAXIMUM = 4, // Never use this -}HW90_BLOCK_E, *PHW90_BLOCK_E; - -//vivi added this for read parameter from header, 20100908 -typedef enum _RF_CONTENT{ - radioa_txt = 0x1000, - radiob_txt = 0x1001, - radioc_txt = 0x1002, - radiod_txt = 0x1003 -} RF_CONTENT; - -#define RF_PATH_MAX 2 - -typedef enum _WIRELESS_MODE { - WIRELESS_MODE_UNKNOWN = 0x00, - WIRELESS_MODE_A = 0x01, - WIRELESS_MODE_B = 0x02, - WIRELESS_MODE_G = 0x04, - WIRELESS_MODE_AUTO = 0x08, - WIRELESS_MODE_N_24G = 0x10, - WIRELESS_MODE_N_5G = 0x20 -} WIRELESS_MODE; - - -#define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number -#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups -#define MAX_PG_GROUP 13 - -#define CHANNEL_GROUP_MAX_2G 3 -#define CHANNEL_GROUP_IDX_5GL 3 -#define CHANNEL_GROUP_IDX_5GM 6 -#define CHANNEL_GROUP_IDX_5GH 9 -#define CHANNEL_GROUP_MAX_5G 9 -#define CHANNEL_MAX_NUMBER_2G 14 - -typedef enum _BaseBand_Config_Type{ - BaseBand_Config_PHY_REG = 0, //Radio Path A - BaseBand_Config_AGC_TAB = 1, //Radio Path B -}BaseBand_Config_Type, *PBaseBand_Config_Type; - -typedef enum _MACPHY_MODE_8192D{ - SINGLEMAC_SINGLEPHY, - DUALMAC_DUALPHY, - DUALMAC_SINGLEPHY, -}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; - -typedef enum _BAND_TYPE{ - BAND_ON_2_4G = 0, - BAND_ON_5G, - BAND_ON_BOTH, - BANDMAX -}BAND_TYPE,*PBAND_TYPE; - -typedef enum _PHY_Rate_Tx_Power_Offset_Area{ - RA_OFFSET_LEGACY_OFDM1, - RA_OFFSET_LEGACY_OFDM2, - RA_OFFSET_HT_OFDM1, - RA_OFFSET_HT_OFDM2, - RA_OFFSET_HT_OFDM3, - RA_OFFSET_HT_OFDM4, - RA_OFFSET_HT_CCK, -}RA_OFFSET_AREA,*PRA_OFFSET_AREA; - - -/* BB/RF related */ -typedef enum _RF_TYPE_8190P{ - RF_TYPE_MIN, // 0 - RF_8225=1, // 1 11b/g RF for verification only - RF_8256=2, // 2 11b/g/n - RF_8258=3, // 3 11a/b/g/n RF - RF_6052=4, // 4 11b/g/n RF - //RF_6052=5, // 4 11b/g/n RF - // TODO: We sholud remove this psudo PHY RF after we get new RF. - RF_PSEUDO_11N=5, // 5, It is a temporality RF. -}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; - - -typedef enum _RATR_TABLE_MODE_8192C{ - RATR_INX_WIRELESS_NGB = 0, - RATR_INX_WIRELESS_NG = 1, - RATR_INX_WIRELESS_NB = 2, - RATR_INX_WIRELESS_N = 3, - RATR_INX_WIRELESS_GB = 4, - RATR_INX_WIRELESS_G = 5, - RATR_INX_WIRELESS_B = 6, - RATR_INX_WIRELESS_MC = 7, - RATR_INX_WIRELESS_A = 8, -}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C; - -typedef struct _BB_REGISTER_DEFINITION{ - u32 rfintfs; // set software control: - // 0x870~0x877[8 bytes] - - u32 rfintfi; // readback data: - // 0x8e0~0x8e7[8 bytes] - - u32 rfintfo; // output data: - // 0x860~0x86f [16 bytes] - - u32 rfintfe; // output enable: - // 0x860~0x86f [16 bytes] - - u32 rf3wireOffset; // LSSI data: - // 0x840~0x84f [16 bytes] - - u32 rfLSSI_Select; // BB Band Select: - // 0x878~0x87f [8 bytes] - - u32 rfTxGainStage; // Tx gain stage: - // 0x80c~0x80f [4 bytes] - - u32 rfHSSIPara1; // wire parameter control1 : - // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] - - u32 rfHSSIPara2; // wire parameter control2 : - // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] - - u32 rfSwitchControl; //Tx Rx antenna control : - // 0x858~0x85f [16 bytes] - - u32 rfAGCControl1; //AGC parameter control1 : - // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] - - u32 rfAGCControl2; //AGC parameter control2 : - // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] - - u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : - // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] - - u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : - // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] - - u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix - // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] - - u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type - // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] - - u32 rfLSSIReadBack; //LSSI RF readback data SI mode - // 0x8a0~0x8af [16 bytes] - - u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B - -}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; - -#ifdef CONFIG_MP_INCLUDED -typedef enum _ANTENNA_PATH{ - ANTENNA_NONE = 0x00, - ANTENNA_D , - ANTENNA_C , - ANTENNA_CD , - ANTENNA_B , - ANTENNA_BD , - ANTENNA_BC , - ANTENNA_BCD , - ANTENNA_A , - ANTENNA_AD , - ANTENNA_AC , - ANTENNA_ACD , - ANTENNA_AB , - ANTENNA_ABD , - ANTENNA_ABC , - ANTENNA_ABCD -} ANTENNA_PATH; -#endif - -typedef struct _R_ANTENNA_SELECT_OFDM{ - u32 r_tx_antenna:4; - u32 r_ant_l:4; - u32 r_ant_non_ht:4; - u32 r_ant_ht1:4; - u32 r_ant_ht2:4; - u32 r_ant_ht_s1:4; - u32 r_ant_non_ht_s1:4; - u32 OFDM_TXSC:2; - u32 Reserved:2; -}R_ANTENNA_SELECT_OFDM; - -typedef struct _R_ANTENNA_SELECT_CCK{ - u8 r_cckrx_enable_2:2; - u8 r_cckrx_enable:2; - u8 r_ccktx_enable:4; -}R_ANTENNA_SELECT_CCK; - -/*------------------------------Define structure----------------------------*/ - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - - -/*------------------------Export Marco Definition---------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ - -//Added for TX Power -//u8 GetRightChnlPlace(u8 chnl); -u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl); -u8 rtl8192d_getChnlGroupfromArray(u8 chnl); -/*--------------------------Exported Function prototype---------------------*/ -// -// BB and RF register read/write -// -void rtl8192d_PHY_SetBBReg1Byte( IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data ); -u32 rtl8192d_PHY_QueryBBReg( IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask ); -void rtl8192d_PHY_SetBBReg( IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data ); -u32 rtl8192d_PHY_QueryRFReg( IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask ); -void rtl8192d_PHY_SetRFReg( IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data ); - -// -// Initialization related function -// -/* MAC/BB/RF HAL config */ -extern int PHY_MACConfig8192D( IN PADAPTER Adapter ); -extern int PHY_BBConfig8192D( IN PADAPTER Adapter ); -extern int PHY_RFConfig8192D( IN PADAPTER Adapter ); -/* RF config */ -int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, - IN u8* pFileName, - IN RF_RADIO_PATH_E eRFPath); -int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, - IN RF_CONTENT Content, - IN RF_RADIO_PATH_E eRFPath); -/* BB/RF readback check for making sure init OK */ -int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, - IN HW90_BLOCK_E CheckBlock, - IN RF_RADIO_PATH_E eRFPath ); -/* Read initi reg value for tx power setting. */ -void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); - -// -// RF Power setting -// -//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, -// IN RT_RF_POWER_STATE eRFPowerState); - -// -// BB TX Power R/W -// -void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter, - OUT u32* powerlevel ); -void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter, - IN u8 channel ); -BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter, - IN int powerInDbm ); - -// -VOID -PHY_ScanOperationBackup8192D(IN PADAPTER Adapter, - IN u8 Operation ); - -// -// Switch bandwidth for 8192S -// -//void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); -void PHY_SetBWMode8192D( IN PADAPTER pAdapter, - IN HT_CHANNEL_WIDTH ChnlWidth, - IN unsigned char Offset ); - -// -// Set FW CMD IO for 8192S. -// -//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, -// IN IO_TYPE IOType); - -// -// Set A2 entry to fw for 8192S -// -extern void FillA2Entry8192C( IN PADAPTER Adapter, - IN u8 index, - IN u8* val); - - -// -// channel switch related funciton -// -//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); -void PHY_SwChnl8192D( IN PADAPTER pAdapter, - IN u8 channel ); - // Call after initialization -void PHY_SwChnlPhy8192D( IN PADAPTER pAdapter, - IN u8 channel ); - -extern void ChkFwCmdIoDone( IN PADAPTER Adapter); - -#ifdef USE_WORKITEM -//extern void SetIOWorkItemCallback( IN PVOID pContext ); -#else -//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); -#endif - -// -// BB/MAC/RF other monitor API -// -void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter, - IN BOOLEAN bEnableMonitorMode ); - -BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter, - IN u32 eRFPath ); - -// -// IQ calibrate -// -void rtl8192d_PHY_IQCalibrate( IN PADAPTER pAdapter); - - -// -// LC calibrate -// -void rtl8192d_PHY_LCCalibrate(IN PADAPTER pAdapter); - -// -// AP calibrate -// -void rtl8192d_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); - - -// -// Modify the value of the hw register when beacon interval be changed. -// -void -rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter, - IN u16 BeaconInterval ); - - -extern VOID -PHY_SwitchEphyParameter( - IN PADAPTER Adapter - ); - -extern VOID -PHY_EnableHostClkReq( - IN PADAPTER Adapter - ); - -BOOLEAN -SetAntennaConfig92C( - IN PADAPTER Adapter, - IN u8 DefaultAnt - ); - -VOID -PHY_StopTRXBeforeChangeBand8192D( - PADAPTER Adapter -); - -VOID -PHY_UpdateBBRFConfiguration8192D( - IN PADAPTER Adapter, - IN BOOLEAN bisBandSwitch -); - -VOID PHY_ReadMacPhyMode92D( - IN PADAPTER Adapter, - IN BOOLEAN AutoloadFail -); - -VOID PHY_ConfigMacPhyMode92D( - IN PADAPTER Adapter -); - -VOID PHY_ConfigMacPhyModeInfo92D( - IN PADAPTER Adapter -); - -VOID PHY_ConfigMacCoexist_RFPage92D( - IN PADAPTER Adapter -); - -VOID -rtl8192d_PHY_InitRxSetting( - IN PADAPTER Adapter -); - -VOID -rtl8192d_PHY_ResetIQKResult( - IN PADAPTER Adapter -); - - -VOID -rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); - -VOID -HalChangeCCKStatus8192D( - IN PADAPTER Adapter, - IN BOOLEAN bCCKDisable -); - -/*--------------------------Exported Function prototype---------------------*/ - -#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data)) -#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) -#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) -#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) -#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) - -#define PHY_SetMacReg PHY_SetBBReg - -#endif // __INC_HAL8192SPHYCFG_H - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/***************************************************************************** + * + * Module: __INC_HAL8192DPHYCFG_H + * + * + * Note: + * + * + * Export: Constants, macro, functions(API), global variables(None). + * + * Abbrev: + * + * History: + * Data Who Remark + * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. + * 2. Reorganize code architecture. + * + *****************************************************************************/ + /* Check to see if the file has been included already. */ +#ifndef __INC_HAL8192DPHYCFG_H +#define __INC_HAL8192DPHYCFG_H + + +/*--------------------------Define Parameters-------------------------------*/ +#define LOOP_LIMIT 5 +#define MAX_STALL_TIME 50 //us +#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) +#define MAX_TXPWR_IDX_NMODE_92S 63 +#define Reset_Cnt_Limit 3 + + +#define IQK_MAC_REG_NUM 4 +#define IQK_ADDA_REG_NUM 16 +#define IQK_BB_REG_NUM 10 +#define IQK_BB_REG_NUM_92C 9 +#define IQK_BB_REG_NUM_92D 10 +#define IQK_BB_REG_NUM_test 6 +#define index_mapping_NUM 13 +#define Rx_index_mapping_NUM 15 +#define AVG_THERMAL_NUM 8 +#define IQK_Matrix_REG_NUM 8 +#define IQK_Matrix_Settings_NUM 1+24+21 + +#ifdef CONFIG_PCI_HCI +#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ +{ \ + u1Byte u1bTmp; \ + u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ + u1bTmp |= BIT0; \ + PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ + PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ + PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ + delay_us(100); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ + PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ + delay_us(10); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ + delay_us(10); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ + delay_us(10); \ + PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ +} +#endif + + +/*--------------------------Define Parameters-------------------------------*/ + + +/*------------------------------Define structure----------------------------*/ +typedef enum _SwChnlCmdID{ + CmdID_End, + CmdID_SetTxPowerLevel, + CmdID_BBRegWrite10, + CmdID_WritePortUlong, + CmdID_WritePortUshort, + CmdID_WritePortUchar, + CmdID_RF_WriteReg, +}SwChnlCmdID; + + +/* 1. Switch channel related */ +typedef struct _SwChnlCmd{ + SwChnlCmdID CmdID; + u32 Para1; + u32 Para2; + u32 msDelay; +}SwChnlCmd; + +typedef enum _HW90_BLOCK{ + HW90_BLOCK_MAC = 0, + HW90_BLOCK_PHY0 = 1, + HW90_BLOCK_PHY1 = 2, + HW90_BLOCK_RF = 3, + HW90_BLOCK_MAXIMUM = 4, // Never use this +}HW90_BLOCK_E, *PHW90_BLOCK_E; + +//vivi added this for read parameter from header, 20100908 +typedef enum _RF_CONTENT{ + radioa_txt = 0x1000, + radiob_txt = 0x1001, + radioc_txt = 0x1002, + radiod_txt = 0x1003 +} RF_CONTENT; + +#define RF_PATH_MAX 2 + +typedef enum _WIRELESS_MODE { + WIRELESS_MODE_UNKNOWN = 0x00, + WIRELESS_MODE_A = 0x01, + WIRELESS_MODE_B = 0x02, + WIRELESS_MODE_G = 0x04, + WIRELESS_MODE_AUTO = 0x08, + WIRELESS_MODE_N_24G = 0x10, + WIRELESS_MODE_N_5G = 0x20 +} WIRELESS_MODE; + + +#define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number +#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups +#define MAX_PG_GROUP 13 + +#define CHANNEL_GROUP_MAX_2G 3 +#define CHANNEL_GROUP_IDX_5GL 3 +#define CHANNEL_GROUP_IDX_5GM 6 +#define CHANNEL_GROUP_IDX_5GH 9 +#define CHANNEL_GROUP_MAX_5G 9 +#define CHANNEL_MAX_NUMBER_2G 14 + +typedef enum _BaseBand_Config_Type{ + BaseBand_Config_PHY_REG = 0, //Radio Path A + BaseBand_Config_AGC_TAB = 1, //Radio Path B +}BaseBand_Config_Type, *PBaseBand_Config_Type; + +typedef enum _MACPHY_MODE_8192D{ + SINGLEMAC_SINGLEPHY, + DUALMAC_DUALPHY, + DUALMAC_SINGLEPHY, +}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; + +typedef enum _BAND_TYPE{ + BAND_ON_2_4G = 0, + BAND_ON_5G, + BAND_ON_BOTH, + BANDMAX +}BAND_TYPE,*PBAND_TYPE; + +typedef enum _PHY_Rate_Tx_Power_Offset_Area{ + RA_OFFSET_LEGACY_OFDM1, + RA_OFFSET_LEGACY_OFDM2, + RA_OFFSET_HT_OFDM1, + RA_OFFSET_HT_OFDM2, + RA_OFFSET_HT_OFDM3, + RA_OFFSET_HT_OFDM4, + RA_OFFSET_HT_CCK, +}RA_OFFSET_AREA,*PRA_OFFSET_AREA; + + +/* BB/RF related */ +typedef enum _RF_TYPE_8190P{ + RF_TYPE_MIN, // 0 + RF_8225=1, // 1 11b/g RF for verification only + RF_8256=2, // 2 11b/g/n + RF_8258=3, // 3 11a/b/g/n RF + RF_6052=4, // 4 11b/g/n RF + //RF_6052=5, // 4 11b/g/n RF + // TODO: We sholud remove this psudo PHY RF after we get new RF. + RF_PSEUDO_11N=5, // 5, It is a temporality RF. +}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; + + +typedef enum _RATR_TABLE_MODE_8192C{ + RATR_INX_WIRELESS_NGB = 0, + RATR_INX_WIRELESS_NG = 1, + RATR_INX_WIRELESS_NB = 2, + RATR_INX_WIRELESS_N = 3, + RATR_INX_WIRELESS_GB = 4, + RATR_INX_WIRELESS_G = 5, + RATR_INX_WIRELESS_B = 6, + RATR_INX_WIRELESS_MC = 7, + RATR_INX_WIRELESS_A = 8, +}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C; + +typedef struct _BB_REGISTER_DEFINITION{ + u32 rfintfs; // set software control: + // 0x870~0x877[8 bytes] + + u32 rfintfi; // readback data: + // 0x8e0~0x8e7[8 bytes] + + u32 rfintfo; // output data: + // 0x860~0x86f [16 bytes] + + u32 rfintfe; // output enable: + // 0x860~0x86f [16 bytes] + + u32 rf3wireOffset; // LSSI data: + // 0x840~0x84f [16 bytes] + + u32 rfLSSI_Select; // BB Band Select: + // 0x878~0x87f [8 bytes] + + u32 rfTxGainStage; // Tx gain stage: + // 0x80c~0x80f [4 bytes] + + u32 rfHSSIPara1; // wire parameter control1 : + // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] + + u32 rfHSSIPara2; // wire parameter control2 : + // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] + + u32 rfSwitchControl; //Tx Rx antenna control : + // 0x858~0x85f [16 bytes] + + u32 rfAGCControl1; //AGC parameter control1 : + // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] + + u32 rfAGCControl2; //AGC parameter control2 : + // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] + + u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : + // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] + + u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : + // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] + + u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix + // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] + + u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type + // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] + + u32 rfLSSIReadBack; //LSSI RF readback data SI mode + // 0x8a0~0x8af [16 bytes] + + u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B + +}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; + +#ifdef CONFIG_MP_INCLUDED +typedef enum _ANTENNA_PATH{ + ANTENNA_NONE = 0x00, + ANTENNA_D , + ANTENNA_C , + ANTENNA_CD , + ANTENNA_B , + ANTENNA_BD , + ANTENNA_BC , + ANTENNA_BCD , + ANTENNA_A , + ANTENNA_AD , + ANTENNA_AC , + ANTENNA_ACD , + ANTENNA_AB , + ANTENNA_ABD , + ANTENNA_ABC , + ANTENNA_ABCD +} ANTENNA_PATH; +#endif + +typedef struct _R_ANTENNA_SELECT_OFDM{ + u32 r_tx_antenna:4; + u32 r_ant_l:4; + u32 r_ant_non_ht:4; + u32 r_ant_ht1:4; + u32 r_ant_ht2:4; + u32 r_ant_ht_s1:4; + u32 r_ant_non_ht_s1:4; + u32 OFDM_TXSC:2; + u32 Reserved:2; +}R_ANTENNA_SELECT_OFDM; + +typedef struct _R_ANTENNA_SELECT_CCK{ + u8 r_cckrx_enable_2:2; + u8 r_cckrx_enable:2; + u8 r_ccktx_enable:4; +}R_ANTENNA_SELECT_CCK; + +/*------------------------------Define structure----------------------------*/ + + +/*------------------------Export global variable----------------------------*/ +/*------------------------Export global variable----------------------------*/ + + +/*------------------------Export Marco Definition---------------------------*/ +/*------------------------Export Marco Definition---------------------------*/ + +//Added for TX Power +//u8 GetRightChnlPlace(u8 chnl); +u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl); +u8 rtl8192d_getChnlGroupfromArray(u8 chnl); +/*--------------------------Exported Function prototype---------------------*/ +// +// BB and RF register read/write +// +void rtl8192d_PHY_SetBBReg1Byte( IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data ); +u32 rtl8192d_PHY_QueryBBReg( IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask ); +void rtl8192d_PHY_SetBBReg( IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data ); +u32 rtl8192d_PHY_QueryRFReg( IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask ); +void rtl8192d_PHY_SetRFReg( IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data ); + +// +// Initialization related function +// +/* MAC/BB/RF HAL config */ +extern int PHY_MACConfig8192D( IN PADAPTER Adapter ); +extern int PHY_BBConfig8192D( IN PADAPTER Adapter ); +extern int PHY_RFConfig8192D( IN PADAPTER Adapter ); +/* RF config */ +int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, + IN u8* pFileName, + IN RF_RADIO_PATH_E eRFPath); +int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, + IN RF_CONTENT Content, + IN RF_RADIO_PATH_E eRFPath); +/* BB/RF readback check for making sure init OK */ +int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, + IN HW90_BLOCK_E CheckBlock, + IN RF_RADIO_PATH_E eRFPath ); +/* Read initi reg value for tx power setting. */ +void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); + +// +// RF Power setting +// +//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, +// IN RT_RF_POWER_STATE eRFPowerState); + +// +// BB TX Power R/W +// +void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter, + OUT u32* powerlevel ); +void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter, + IN u8 channel ); +BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter, + IN int powerInDbm ); + +// +VOID +PHY_ScanOperationBackup8192D(IN PADAPTER Adapter, + IN u8 Operation ); + +// +// Switch bandwidth for 8192S +// +//void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); +void PHY_SetBWMode8192D( IN PADAPTER pAdapter, + IN HT_CHANNEL_WIDTH ChnlWidth, + IN unsigned char Offset ); + +// +// Set FW CMD IO for 8192S. +// +//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, +// IN IO_TYPE IOType); + +// +// Set A2 entry to fw for 8192S +// +extern void FillA2Entry8192C( IN PADAPTER Adapter, + IN u8 index, + IN u8* val); + + +// +// channel switch related funciton +// +//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); +void PHY_SwChnl8192D( IN PADAPTER pAdapter, + IN u8 channel ); + // Call after initialization +void PHY_SwChnlPhy8192D( IN PADAPTER pAdapter, + IN u8 channel ); + +extern void ChkFwCmdIoDone( IN PADAPTER Adapter); + +#ifdef USE_WORKITEM +//extern void SetIOWorkItemCallback( IN PVOID pContext ); +#else +//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); +#endif + +// +// BB/MAC/RF other monitor API +// +void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode ); + +BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter, + IN u32 eRFPath ); + +// +// IQ calibrate +// +void rtl8192d_PHY_IQCalibrate( IN PADAPTER pAdapter); + + +// +// LC calibrate +// +void rtl8192d_PHY_LCCalibrate(IN PADAPTER pAdapter); + +// +// AP calibrate +// +void rtl8192d_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); + + +// +// Modify the value of the hw register when beacon interval be changed. +// +void +rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter, + IN u16 BeaconInterval ); + + +extern VOID +PHY_SwitchEphyParameter( + IN PADAPTER Adapter + ); + +extern VOID +PHY_EnableHostClkReq( + IN PADAPTER Adapter + ); + +BOOLEAN +SetAntennaConfig92C( + IN PADAPTER Adapter, + IN u8 DefaultAnt + ); + +VOID +PHY_StopTRXBeforeChangeBand8192D( + PADAPTER Adapter +); + +VOID +PHY_UpdateBBRFConfiguration8192D( + IN PADAPTER Adapter, + IN BOOLEAN bisBandSwitch +); + +VOID PHY_ReadMacPhyMode92D( + IN PADAPTER Adapter, + IN BOOLEAN AutoloadFail +); + +VOID PHY_ConfigMacPhyMode92D( + IN PADAPTER Adapter +); + +VOID PHY_ConfigMacPhyModeInfo92D( + IN PADAPTER Adapter +); + +VOID PHY_ConfigMacCoexist_RFPage92D( + IN PADAPTER Adapter +); + +VOID +rtl8192d_PHY_InitRxSetting( + IN PADAPTER Adapter +); + +VOID +rtl8192d_PHY_ResetIQKResult( + IN PADAPTER Adapter +); + + +VOID +rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); + +VOID +HalChangeCCKStatus8192D( + IN PADAPTER Adapter, + IN BOOLEAN bCCKDisable +); + +/*--------------------------Exported Function prototype---------------------*/ + +#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data)) +#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) +#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) +#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) +#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) + +#define PHY_SetMacReg PHY_SetBBReg + +#endif // __INC_HAL8192SPHYCFG_H + diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyReg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyReg.h old mode 100755 new mode 100644 index bff455f555e621..f28aa033bbe03c --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyReg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyReg.h @@ -1,1171 +1,1171 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/***************************************************************************** - * - * Module: __INC_HAL8192DPHYREG_H - * - * - * Note: 1. Define PMAC/BB register map - * 2. Define RF register map - * 3. PMAC/BB register bit mask. - * 4. RF reg bit mask. - * 5. Other BB/RF relative definition. - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * Data Who Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * 09/25/2008 MH 1. Add RL6052 register definition - * - *****************************************************************************/ -#ifndef __INC_HAL8192DPHYREG_H -#define __INC_HAL8192DPHYREG_H - - -/*--------------------------Define Parameters-------------------------------*/ - -//============================================================ -// 8192S Regsiter offset definition -//============================================================ - -// -// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF -// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 -// 3. RF register 0x00-2E -// 4. Bit Mask for BB/RF register -// 5. Other defintion for BB/RF R/W -// - - -// -// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF -// 1. Page1(0x100) -// -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -// -// 2. Page2(0x200) -// -// The following two definition are only used for USB interface. -#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. -#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. - -// -// 3. Page8(0x800) -// -#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? - -#define rFPGA0_TxInfo 0x804 // Status report?? -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? - -#define rFPGA0_RFTiming1 0x810 // Useless now -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 // Useless now -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 -#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 // Useless now -#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback -#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now - -// -// 4. Page9(0x900) -// -#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? - -#define rFPGA1_TxBlock 0x904 // Useless now -#define rFPGA1_DebugSelect 0x908 // Useless now -#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? - -// -// 5. PageA(0xA00) -// -// Set Control channel to upper or lower. These settings are required only for 40MHz -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI -#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain - -#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series -#define rCCK0_RxAGC2 0xa10 //AGC & DAGC - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold -#define rCCK0_DSPParameter2 0xa1c //SQ threshold - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 -#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 //0xa57 -#define rCCK0_FACounterLower 0xa5c //0xa5b -#define rCCK0_FACounterUpper 0xa58 //0xa5c - -// -// PageB(0xB00) -// -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 - -// -// 6. PageC(0xC00) -// -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter -#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain -#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. -#define rOFDM0_RxDetector3 0xc38 //Frame Sync. -#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI - -#define rOFDM0_RxDSP 0xc40 //Rx Sync Path -#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC -#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold -#define rOFDM0_ECCAThreshold 0xc4c // energy CCA - -#define rOFDM0_XAAGCCore1 0xc50 // DIG -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -// -// 7. PageD(0xD00) -// -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 // No setting now -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 //cca, parity fail -#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail -#define rOFDM_PHYCounter3 0xda8 //MCS not support - -#define rOFDM_ShortCFOAB 0xdac // No setting now -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -// -// 8. PageE(0xE00) -// -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -// -// 7. RF Register 0x00-0x2E (RF 8256) -// RF-0222D 0x00-3F -// -//Zebra1 -#define rZebra1_HSSIEnable 0x0 // Useless now -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 // RF channel switch - -//#endif -#define rZebra1_TxGain 0x8 // Useless now -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -//Zebra4 -#define rGlobalCtrl 0 // Useless now -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -//RTL8258 -#define rRTL8258_TxLPF 0x11 // Useless now -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -// -// RL6052 Register definition -// -#define RF_AC 0x00 // - -#define RF_IQADJ_G1 0x01 // -#define RF_IQADJ_G2 0x02 // -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 // - -#define RF_GAIN_RX 0x06 // -#define RF_GAIN_TX 0x07 // - -#define RF_TXM_IDAC 0x08 // -#define RF_IPA_G 0x09 // -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C // -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F // - -#define RF_MODE1 0x10 // -#define RF_MODE2 0x11 // - -#define RF_RX_AGC_HP 0x12 // -#define RF_TX_AGC 0x13 // -#define RF_BIAS 0x14 // -#define RF_IPA 0x15 // -#define RF_POW_ABILITY 0x17 // -#define RF_MODE_AG 0x18 // -#define rRfChannel 0x18 // RF channel and BW switch -#define RF_CHNLBW 0x18 // RF channel and BW switch -#define RF_TOP 0x19 // - -#define RF_RX_G1 0x1A // -#define RF_RX_G2 0x1B // - -#define RF_RX_BB2 0x1C // -#define RF_RX_BB1 0x1D // - -#define RF_RCK1 0x1E // -#define RF_RCK2 0x1F // - -#define RF_TX_G1 0x20 // -#define RF_TX_G2 0x21 // -#define RF_TX_G3 0x22 // - -#define RF_TX_BB1 0x23 // - -#define RF_T_METER 0x42 // - -#define RF_SYN_G1 0x25 // RF TX Power control -#define RF_SYN_G2 0x26 // RF TX Power control -#define RF_SYN_G3 0x27 // RF TX Power control -#define RF_SYN_G4 0x28 // RF TX Power control -#define RF_SYN_G5 0x29 // RF TX Power control -#define RF_SYN_G6 0x2A // RF TX Power control -#define RF_SYN_G7 0x2B // RF TX Power control -#define RF_SYN_G8 0x2C // RF TX Power control - -#define RF_RCK_OS 0x30 // RF TX PA control - -#define RF_TXPA_G1 0x31 // RF TX PA control -#define RF_TXPA_G2 0x32 // RF TX PA control -#define RF_TXPA_G3 0x33 // RF TX PA control -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C // -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B - -// -//Bit Mask -// -// 1. Page1(0x100) -#define bBBResetB 0x100 // Useless now? -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) - -// 2. Page8(0x800) -#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 // Useless now -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 // Useless now -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf //Reg0x814 -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 //T2R -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 //chane gain at continue Tx -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 // Useless now -//#define bHWSISelect 0x8 -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW - -#define bRFSI_TRSW 0x20 // Useless now -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 // T65 RF - -#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal - -#define bLSSIReadBackData 0xfffff // T65 RF - -#define bLSSIReadOKFlag 0x1000 // Useless now -#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ - -#define b80MClkDelay 0x18000000 // Useless -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 // Useless -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -// 3. Page9(0x900) -#define bOFDMTxSC 0x30000000 // Useless -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff //reset debug page and also HWord, LWord -#define bDebugItem 0xff //reset debug page and LWord -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -// 4. PageA(0xA00) -#define bCCKBBMode 0x3 // Useless -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch - -#define bCCKScramble 0x8 // Useless -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 //r_rx_clk -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f //AGCsamp_dly -#define bCCKFixedRxAGC 0x8000 -//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -// 5. PageC(0xC00) -#define bNumOfSTF 0x3 // Useless -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 //the threshold for high power -#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -//#define bRxMF_Hold 0x3800 -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -// 6. PageE(0xE00) -#define bSTBCEn 0x4 // Useless -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -//#define bRxPath1 0x01 -//#define bRxPath2 0x02 -//#define bRxPath3 0x04 -//#define bRxPath4 0x08 -//#define bTxPath1 0x10 -//#define bTxPath2 0x20 -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 //total -#define bShortCFOFLength 11 //fraction -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf // Useless -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 // Useless -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 // Useless -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -//Rx Pseduo noise -#define bRxPesudoNoiseOn 0x20000000 // Useless -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -//7. RF Register -//Zebra1 -#define bZebra1_HSSIEnable 0x8 // Useless -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -//Zebra4 -#define bRTL8256RegModeCtrl1 0x100 // Useless -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -//RTL8258 -#define bRTL8258_TxLPFBW 0xc // Useless -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -// -// Other Definition -// - -//byte endable for sb_write -#define bByte0 0x1 // Useless -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -//for PutRegsetting & GetRegSetting BitMask -#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - -//for PutRFRegsetting & GetRFRegSetting BitMask -//#define bMask12Bits 0xfffff // RF Reg mask bits -//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF -#define bRFRegOffsetMask 0xfffff -//#define bRFRegOffsetMask 0xfff - -//MAC0 will wirte PHY1 -#define MAC0_ACCESS_PHY1 0x4000 -//MAC1 will wirte PHY0 -#define MAC1_ACCESS_PHY0 0x2000 - -#define bEnable 0x1 // Useless -#define bDisable 0x0 - -#define LeftAntenna 0x0 // Useless -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 //500ms // Useless -#define tUpdateRxCounter 100 //100ms - -#define rateCCK 0 // Useless -#define rateOFDM 1 -#define rateHT 2 - -//define Register-End -#define bPMAC_End 0x1ff // Useless -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -//define max debug item in each debug page -//#define bMaxItem_FPGA_PHY0 0x9 -//#define bMaxItem_FPGA_PHY1 0x3 -//#define bMaxItem_PHY_11B 0x16 -//#define bMaxItem_OFDM_PHY0 0x29 -//#define bMaxItem_OFDM_PHY1 0x0 - -#define bPMACControl 0x0 // Useless -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 // Useless -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -/*--------------------------Define Parameters-------------------------------*/ - - -#endif //__INC_HAL8192SPHYREG_H - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/***************************************************************************** + * + * Module: __INC_HAL8192DPHYREG_H + * + * + * Note: 1. Define PMAC/BB register map + * 2. Define RF register map + * 3. PMAC/BB register bit mask. + * 4. RF reg bit mask. + * 5. Other BB/RF relative definition. + * + * + * Export: Constants, macro, functions(API), global variables(None). + * + * Abbrev: + * + * History: + * Data Who Remark + * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. + * 2. Reorganize code architecture. + * 09/25/2008 MH 1. Add RL6052 register definition + * + *****************************************************************************/ +#ifndef __INC_HAL8192DPHYREG_H +#define __INC_HAL8192DPHYREG_H + + +/*--------------------------Define Parameters-------------------------------*/ + +//============================================================ +// 8192S Regsiter offset definition +//============================================================ + +// +// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF +// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 +// 3. RF register 0x00-2E +// 4. Bit Mask for BB/RF register +// 5. Other defintion for BB/RF R/W +// + + +// +// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF +// 1. Page1(0x100) +// +#define rPMAC_Reset 0x100 +#define rPMAC_TxStart 0x104 +#define rPMAC_TxLegacySIG 0x108 +#define rPMAC_TxHTSIG1 0x10c +#define rPMAC_TxHTSIG2 0x110 +#define rPMAC_PHYDebug 0x114 +#define rPMAC_TxPacketNum 0x118 +#define rPMAC_TxIdle 0x11c +#define rPMAC_TxMACHeader0 0x120 +#define rPMAC_TxMACHeader1 0x124 +#define rPMAC_TxMACHeader2 0x128 +#define rPMAC_TxMACHeader3 0x12c +#define rPMAC_TxMACHeader4 0x130 +#define rPMAC_TxMACHeader5 0x134 +#define rPMAC_TxDataType 0x138 +#define rPMAC_TxRandomSeed 0x13c +#define rPMAC_CCKPLCPPreamble 0x140 +#define rPMAC_CCKPLCPHeader 0x144 +#define rPMAC_CCKCRC16 0x148 +#define rPMAC_OFDMRxCRC32OK 0x170 +#define rPMAC_OFDMRxCRC32Er 0x174 +#define rPMAC_OFDMRxParityEr 0x178 +#define rPMAC_OFDMRxCRC8Er 0x17c +#define rPMAC_CCKCRxRC16Er 0x180 +#define rPMAC_CCKCRxRC32Er 0x184 +#define rPMAC_CCKCRxRC32OK 0x188 +#define rPMAC_TxStatus 0x18c + +// +// 2. Page2(0x200) +// +// The following two definition are only used for USB interface. +#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. +#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. + +// +// 3. Page8(0x800) +// +#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? + +#define rFPGA0_TxInfo 0x804 // Status report?? +#define rFPGA0_PSDFunction 0x808 + +#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? + +#define rFPGA0_RFTiming1 0x810 // Useless now +#define rFPGA0_RFTiming2 0x814 + +#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register +#define rFPGA0_XA_HSSIParameter2 0x824 +#define rFPGA0_XB_HSSIParameter1 0x828 +#define rFPGA0_XB_HSSIParameter2 0x82c + +#define rFPGA0_XA_LSSIParameter 0x840 +#define rFPGA0_XB_LSSIParameter 0x844 + +#define rFPGA0_RFWakeUpParameter 0x850 // Useless now +#define rFPGA0_RFSleepUpParameter 0x854 + +#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch +#define rFPGA0_XCD_SwitchControl 0x85c + +#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch +#define rFPGA0_XB_RFInterfaceOE 0x864 + +#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control +#define rFPGA0_XCD_RFInterfaceSW 0x874 + +#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter +#define rFPGA0_XCD_RFParameter 0x87c + +#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? +#define rFPGA0_AnalogParameter2 0x884 +#define rFPGA0_AnalogParameter3 0x888 +#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy +#define rFPGA0_AnalogParameter4 0x88c + +#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback +#define rFPGA0_XB_LSSIReadBack 0x8a4 +#define rFPGA0_XC_LSSIReadBack 0x8a8 +#define rFPGA0_XD_LSSIReadBack 0x8ac + +#define rFPGA0_PSDReport 0x8b4 // Useless now +#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback +#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback +#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value +#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now + +// +// 4. Page9(0x900) +// +#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? + +#define rFPGA1_TxBlock 0x904 // Useless now +#define rFPGA1_DebugSelect 0x908 // Useless now +#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? + +// +// 5. PageA(0xA00) +// +// Set Control channel to upper or lower. These settings are required only for 40MHz +#define rCCK0_System 0xa00 + +#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI +#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain + +#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series +#define rCCK0_RxAGC2 0xa10 //AGC & DAGC + +#define rCCK0_RxHP 0xa14 + +#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold +#define rCCK0_DSPParameter2 0xa1c //SQ threshold + +#define rCCK0_TxFilter1 0xa20 +#define rCCK0_TxFilter2 0xa24 +#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 +#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report +#define rCCK0_TRSSIReport 0xa50 +#define rCCK0_RxReport 0xa54 //0xa57 +#define rCCK0_FACounterLower 0xa5c //0xa5b +#define rCCK0_FACounterUpper 0xa58 //0xa5c + +// +// PageB(0xB00) +// +#define rPdp_AntA 0xb00 +#define rPdp_AntA_4 0xb04 +#define rPdp_AntA_8 0xb08 +#define rPdp_AntA_C 0xb0c +#define rPdp_AntA_10 0xb10 +#define rPdp_AntA_14 0xb14 +#define rPdp_AntA_18 0xb18 +#define rPdp_AntA_1C 0xb1c +#define rPdp_AntA_20 0xb20 +#define rPdp_AntA_24 0xb24 + +#define rConfig_Pmpd_AntA 0xb28 +#define rConfig_ram64x16 0xb2c + +#define rBndA 0xb30 +#define rHssiPar 0xb34 + +#define rConfig_AntA 0xb68 +#define rConfig_AntB 0xb6c + +#define rPdp_AntB 0xb70 +#define rPdp_AntB_4 0xb74 +#define rPdp_AntB_8 0xb78 +#define rPdp_AntB_C 0xb7c +#define rPdp_AntB_10 0xb80 +#define rPdp_AntB_14 0xb84 +#define rPdp_AntB_18 0xb88 +#define rPdp_AntB_1C 0xb8c +#define rPdp_AntB_20 0xb90 +#define rPdp_AntB_24 0xb94 + +#define rConfig_Pmpd_AntB 0xb98 + +#define rBndB 0xba0 + +#define rAPK 0xbd8 +#define rPm_Rx0_AntA 0xbdc +#define rPm_Rx1_AntA 0xbe0 +#define rPm_Rx2_AntA 0xbe4 +#define rPm_Rx3_AntA 0xbe8 +#define rPm_Rx0_AntB 0xbec +#define rPm_Rx1_AntB 0xbf0 +#define rPm_Rx2_AntB 0xbf4 +#define rPm_Rx3_AntB 0xbf8 + +// +// 6. PageC(0xC00) +// +#define rOFDM0_LSTF 0xc00 + +#define rOFDM0_TRxPathEnable 0xc04 +#define rOFDM0_TRMuxPar 0xc08 +#define rOFDM0_TRSWIsolation 0xc0c + +#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter +#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix +#define rOFDM0_XBRxAFE 0xc18 +#define rOFDM0_XBRxIQImbalance 0xc1c +#define rOFDM0_XCRxAFE 0xc20 +#define rOFDM0_XCRxIQImbalance 0xc24 +#define rOFDM0_XDRxAFE 0xc28 +#define rOFDM0_XDRxIQImbalance 0xc2c + +#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain +#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. +#define rOFDM0_RxDetector3 0xc38 //Frame Sync. +#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI + +#define rOFDM0_RxDSP 0xc40 //Rx Sync Path +#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC +#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold +#define rOFDM0_ECCAThreshold 0xc4c // energy CCA + +#define rOFDM0_XAAGCCore1 0xc50 // DIG +#define rOFDM0_XAAGCCore2 0xc54 +#define rOFDM0_XBAGCCore1 0xc58 +#define rOFDM0_XBAGCCore2 0xc5c +#define rOFDM0_XCAGCCore1 0xc60 +#define rOFDM0_XCAGCCore2 0xc64 +#define rOFDM0_XDAGCCore1 0xc68 +#define rOFDM0_XDAGCCore2 0xc6c + +#define rOFDM0_AGCParameter1 0xc70 +#define rOFDM0_AGCParameter2 0xc74 +#define rOFDM0_AGCRSSITable 0xc78 +#define rOFDM0_HTSTFAGC 0xc7c + +#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG +#define rOFDM0_XATxAFE 0xc84 +#define rOFDM0_XBTxIQImbalance 0xc88 +#define rOFDM0_XBTxAFE 0xc8c +#define rOFDM0_XCTxIQImbalance 0xc90 +#define rOFDM0_XCTxAFE 0xc94 +#define rOFDM0_XDTxIQImbalance 0xc98 +#define rOFDM0_XDTxAFE 0xc9c + +#define rOFDM0_RxIQExtAnta 0xca0 +#define rOFDM0_TxCoeff1 0xca4 +#define rOFDM0_TxCoeff2 0xca8 +#define rOFDM0_TxCoeff3 0xcac +#define rOFDM0_TxCoeff4 0xcb0 +#define rOFDM0_TxCoeff5 0xcb4 +#define rOFDM0_TxCoeff6 0xcb8 +#define rOFDM0_RxHPParameter 0xce0 +#define rOFDM0_TxPseudoNoiseWgt 0xce4 +#define rOFDM0_FrameSync 0xcf0 +#define rOFDM0_DFSReport 0xcf4 + +// +// 7. PageD(0xD00) +// +#define rOFDM1_LSTF 0xd00 +#define rOFDM1_TRxPathEnable 0xd04 + +#define rOFDM1_CFO 0xd08 // No setting now +#define rOFDM1_CSI1 0xd10 +#define rOFDM1_SBD 0xd14 +#define rOFDM1_CSI2 0xd18 +#define rOFDM1_CFOTracking 0xd2c +#define rOFDM1_TRxMesaure1 0xd34 +#define rOFDM1_IntfDet 0xd3c +#define rOFDM1_PseudoNoiseStateAB 0xd50 +#define rOFDM1_PseudoNoiseStateCD 0xd54 +#define rOFDM1_RxPseudoNoiseWgt 0xd58 + +#define rOFDM_PHYCounter1 0xda0 //cca, parity fail +#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail +#define rOFDM_PHYCounter3 0xda8 //MCS not support + +#define rOFDM_ShortCFOAB 0xdac // No setting now +#define rOFDM_ShortCFOCD 0xdb0 +#define rOFDM_LongCFOAB 0xdb4 +#define rOFDM_LongCFOCD 0xdb8 +#define rOFDM_TailCFOAB 0xdbc +#define rOFDM_TailCFOCD 0xdc0 +#define rOFDM_PWMeasure1 0xdc4 +#define rOFDM_PWMeasure2 0xdc8 +#define rOFDM_BWReport 0xdcc +#define rOFDM_AGCReport 0xdd0 +#define rOFDM_RxSNR 0xdd4 +#define rOFDM_RxEVMCSI 0xdd8 +#define rOFDM_SIGReport 0xddc + + +// +// 8. PageE(0xE00) +// +#define rTxAGC_A_Rate18_06 0xe00 +#define rTxAGC_A_Rate54_24 0xe04 +#define rTxAGC_A_CCK1_Mcs32 0xe08 +#define rTxAGC_A_Mcs03_Mcs00 0xe10 +#define rTxAGC_A_Mcs07_Mcs04 0xe14 +#define rTxAGC_A_Mcs11_Mcs08 0xe18 +#define rTxAGC_A_Mcs15_Mcs12 0xe1c + +#define rTxAGC_B_Rate18_06 0x830 +#define rTxAGC_B_Rate54_24 0x834 +#define rTxAGC_B_CCK1_55_Mcs32 0x838 +#define rTxAGC_B_Mcs03_Mcs00 0x83c +#define rTxAGC_B_Mcs07_Mcs04 0x848 +#define rTxAGC_B_Mcs11_Mcs08 0x84c +#define rTxAGC_B_Mcs15_Mcs12 0x868 +#define rTxAGC_B_CCK11_A_CCK2_11 0x86c + +#define rFPGA0_IQK 0xe28 +#define rTx_IQK_Tone_A 0xe30 +#define rRx_IQK_Tone_A 0xe34 +#define rTx_IQK_PI_A 0xe38 +#define rRx_IQK_PI_A 0xe3c + +#define rTx_IQK 0xe40 +#define rRx_IQK 0xe44 +#define rIQK_AGC_Pts 0xe48 +#define rIQK_AGC_Rsp 0xe4c +#define rTx_IQK_Tone_B 0xe50 +#define rRx_IQK_Tone_B 0xe54 +#define rTx_IQK_PI_B 0xe58 +#define rRx_IQK_PI_B 0xe5c +#define rIQK_AGC_Cont 0xe60 + +#define rBlue_Tooth 0xe6c +#define rRx_Wait_CCA 0xe70 +#define rTx_CCK_RFON 0xe74 +#define rTx_CCK_BBON 0xe78 +#define rTx_OFDM_RFON 0xe7c +#define rTx_OFDM_BBON 0xe80 +#define rTx_To_Rx 0xe84 +#define rTx_To_Tx 0xe88 +#define rRx_CCK 0xe8c + +#define rTx_Power_Before_IQK_A 0xe94 +#define rTx_Power_After_IQK_A 0xe9c + +#define rRx_Power_Before_IQK_A 0xea0 +#define rRx_Power_Before_IQK_A_2 0xea4 +#define rRx_Power_After_IQK_A 0xea8 +#define rRx_Power_After_IQK_A_2 0xeac + +#define rTx_Power_Before_IQK_B 0xeb4 +#define rTx_Power_After_IQK_B 0xebc + +#define rRx_Power_Before_IQK_B 0xec0 +#define rRx_Power_Before_IQK_B_2 0xec4 +#define rRx_Power_After_IQK_B 0xec8 +#define rRx_Power_After_IQK_B_2 0xecc + +#define rRx_OFDM 0xed0 +#define rRx_Wait_RIFS 0xed4 +#define rRx_TO_Rx 0xed8 +#define rStandby 0xedc +#define rSleep 0xee0 +#define rPMPD_ANAEN 0xeec + +// +// 7. RF Register 0x00-0x2E (RF 8256) +// RF-0222D 0x00-3F +// +//Zebra1 +#define rZebra1_HSSIEnable 0x0 // Useless now +#define rZebra1_TRxEnable1 0x1 +#define rZebra1_TRxEnable2 0x2 +#define rZebra1_AGC 0x4 +#define rZebra1_ChargePump 0x5 +#define rZebra1_Channel 0x7 // RF channel switch + +//#endif +#define rZebra1_TxGain 0x8 // Useless now +#define rZebra1_TxLPF 0x9 +#define rZebra1_RxLPF 0xb +#define rZebra1_RxHPFCorner 0xc + +//Zebra4 +#define rGlobalCtrl 0 // Useless now +#define rRTL8256_TxLPF 19 +#define rRTL8256_RxLPF 11 + +//RTL8258 +#define rRTL8258_TxLPF 0x11 // Useless now +#define rRTL8258_RxLPF 0x13 +#define rRTL8258_RSSILPF 0xa + +// +// RL6052 Register definition +// +#define RF_AC 0x00 // + +#define RF_IQADJ_G1 0x01 // +#define RF_IQADJ_G2 0x02 // +#define RF_BS_PA_APSET_G1_G4 0x03 +#define RF_BS_PA_APSET_G5_G8 0x04 +#define RF_POW_TRSW 0x05 // + +#define RF_GAIN_RX 0x06 // +#define RF_GAIN_TX 0x07 // + +#define RF_TXM_IDAC 0x08 // +#define RF_IPA_G 0x09 // +#define RF_TXBIAS_G 0x0A +#define RF_TXPA_AG 0x0B +#define RF_IPA_A 0x0C // +#define RF_TXBIAS_A 0x0D +#define RF_BS_PA_APSET_G9_G11 0x0E +#define RF_BS_IQGEN 0x0F // + +#define RF_MODE1 0x10 // +#define RF_MODE2 0x11 // + +#define RF_RX_AGC_HP 0x12 // +#define RF_TX_AGC 0x13 // +#define RF_BIAS 0x14 // +#define RF_IPA 0x15 // +#define RF_POW_ABILITY 0x17 // +#define RF_MODE_AG 0x18 // +#define rRfChannel 0x18 // RF channel and BW switch +#define RF_CHNLBW 0x18 // RF channel and BW switch +#define RF_TOP 0x19 // + +#define RF_RX_G1 0x1A // +#define RF_RX_G2 0x1B // + +#define RF_RX_BB2 0x1C // +#define RF_RX_BB1 0x1D // + +#define RF_RCK1 0x1E // +#define RF_RCK2 0x1F // + +#define RF_TX_G1 0x20 // +#define RF_TX_G2 0x21 // +#define RF_TX_G3 0x22 // + +#define RF_TX_BB1 0x23 // + +#define RF_T_METER 0x42 // + +#define RF_SYN_G1 0x25 // RF TX Power control +#define RF_SYN_G2 0x26 // RF TX Power control +#define RF_SYN_G3 0x27 // RF TX Power control +#define RF_SYN_G4 0x28 // RF TX Power control +#define RF_SYN_G5 0x29 // RF TX Power control +#define RF_SYN_G6 0x2A // RF TX Power control +#define RF_SYN_G7 0x2B // RF TX Power control +#define RF_SYN_G8 0x2C // RF TX Power control + +#define RF_RCK_OS 0x30 // RF TX PA control + +#define RF_TXPA_G1 0x31 // RF TX PA control +#define RF_TXPA_G2 0x32 // RF TX PA control +#define RF_TXPA_G3 0x33 // RF TX PA control +#define RF_LOBF_9 0x38 +#define RF_RXRF_A3 0x3C // +#define RF_TRSW 0x3F + +#define RF_TXRF_A2 0x41 +#define RF_TXPA_G4 0x46 +#define RF_TXPA_A4 0x4B + +// +//Bit Mask +// +// 1. Page1(0x100) +#define bBBResetB 0x100 // Useless now? +#define bGlobalResetB 0x200 +#define bOFDMTxStart 0x4 +#define bCCKTxStart 0x8 +#define bCRC32Debug 0x100 +#define bPMACLoopback 0x10 +#define bTxLSIG 0xffffff +#define bOFDMTxRate 0xf +#define bOFDMTxReserved 0x10 +#define bOFDMTxLength 0x1ffe0 +#define bOFDMTxParity 0x20000 +#define bTxHTSIG1 0xffffff +#define bTxHTMCSRate 0x7f +#define bTxHTBW 0x80 +#define bTxHTLength 0xffff00 +#define bTxHTSIG2 0xffffff +#define bTxHTSmoothing 0x1 +#define bTxHTSounding 0x2 +#define bTxHTReserved 0x4 +#define bTxHTAggreation 0x8 +#define bTxHTSTBC 0x30 +#define bTxHTAdvanceCoding 0x40 +#define bTxHTShortGI 0x80 +#define bTxHTNumberHT_LTF 0x300 +#define bTxHTCRC8 0x3fc00 +#define bCounterReset 0x10000 +#define bNumOfOFDMTx 0xffff +#define bNumOfCCKTx 0xffff0000 +#define bTxIdleInterval 0xffff +#define bOFDMService 0xffff0000 +#define bTxMACHeader 0xffffffff +#define bTxDataInit 0xff +#define bTxHTMode 0x100 +#define bTxDataType 0x30000 +#define bTxRandomSeed 0xffffffff +#define bCCKTxPreamble 0x1 +#define bCCKTxSFD 0xffff0000 +#define bCCKTxSIG 0xff +#define bCCKTxService 0xff00 +#define bCCKLengthExt 0x8000 +#define bCCKTxLength 0xffff0000 +#define bCCKTxCRC16 0xffff +#define bCCKTxStatus 0x1 +#define bOFDMTxStatus 0x2 + +#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) + +// 2. Page8(0x800) +#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD +#define bJapanMode 0x2 +#define bCCKTxSC 0x30 +#define bCCKEn 0x1000000 +#define bOFDMEn 0x2000000 + +#define bOFDMRxADCPhase 0x10000 // Useless now +#define bOFDMTxDACPhase 0x40000 +#define bXATxAGC 0x3f + +#define bAntennaSelect 0x0300 + +#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage +#define bXCTxAGC 0xf000 +#define bXDTxAGC 0xf0000 + +#define bPAStart 0xf0000000 // Useless now +#define bTRStart 0x00f00000 +#define bRFStart 0x0000f000 +#define bBBStart 0x000000f0 +#define bBBCCKStart 0x0000000f +#define bPAEnd 0xf //Reg0x814 +#define bTREnd 0x0f000000 +#define bRFEnd 0x000f0000 +#define bCCAMask 0x000000f0 //T2R +#define bR2RCCAMask 0x00000f00 +#define bHSSI_R2TDelay 0xf8000000 +#define bHSSI_T2RDelay 0xf80000 +#define bContTxHSSI 0x400 //chane gain at continue Tx +#define bIGFromCCK 0x200 +#define bAGCAddress 0x3f +#define bRxHPTx 0x7000 +#define bRxHPT2R 0x38000 +#define bRxHPCCKIni 0xc0000 +#define bAGCTxCode 0xc00000 +#define bAGCRxCode 0x300000 + +#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 +#define b3WireAddressLength 0x400 + +#define b3WireRFPowerDown 0x1 // Useless now +//#define bHWSISelect 0x8 +#define b5GPAPEPolarity 0x40000000 +#define b2GPAPEPolarity 0x80000000 +#define bRFSW_TxDefaultAnt 0x3 +#define bRFSW_TxOptionAnt 0x30 +#define bRFSW_RxDefaultAnt 0x300 +#define bRFSW_RxOptionAnt 0x3000 +#define bRFSI_3WireData 0x1 +#define bRFSI_3WireClock 0x2 +#define bRFSI_3WireLoad 0x4 +#define bRFSI_3WireRW 0x8 +#define bRFSI_3Wire 0xf + +#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW + +#define bRFSI_TRSW 0x20 // Useless now +#define bRFSI_TRSWB 0x40 +#define bRFSI_ANTSW 0x100 +#define bRFSI_ANTSWB 0x200 +#define bRFSI_PAPE 0x400 +#define bRFSI_PAPE5G 0x800 +#define bBandSelect 0x1 +#define bHTSIG2_GI 0x80 +#define bHTSIG2_Smoothing 0x01 +#define bHTSIG2_Sounding 0x02 +#define bHTSIG2_Aggreaton 0x08 +#define bHTSIG2_STBC 0x30 +#define bHTSIG2_AdvCoding 0x40 +#define bHTSIG2_NumOfHTLTF 0x300 +#define bHTSIG2_CRC8 0x3fc +#define bHTSIG1_MCS 0x7f +#define bHTSIG1_BandWidth 0x80 +#define bHTSIG1_HTLength 0xffff +#define bLSIG_Rate 0xf +#define bLSIG_Reserved 0x10 +#define bLSIG_Length 0x1fffe +#define bLSIG_Parity 0x20 +#define bCCKRxPhase 0x4 + +#define bLSSIReadAddress 0x7f800000 // T65 RF + +#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal + +#define bLSSIReadBackData 0xfffff // T65 RF + +#define bLSSIReadOKFlag 0x1000 // Useless now +#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz +#define bRegulator0Standby 0x1 +#define bRegulatorPLLStandby 0x2 +#define bRegulator1Standby 0x4 +#define bPLLPowerUp 0x8 +#define bDPLLPowerUp 0x10 +#define bDA10PowerUp 0x20 +#define bAD7PowerUp 0x200 +#define bDA6PowerUp 0x2000 +#define bXtalPowerUp 0x4000 +#define b40MDClkPowerUP 0x8000 +#define bDA6DebugMode 0x20000 +#define bDA6Swing 0x380000 + +#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ + +#define b80MClkDelay 0x18000000 // Useless +#define bAFEWatchDogEnable 0x20000000 + +#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap +#define bXtalCap23 0x3 +#define bXtalCap92x 0x0f000000 +#define bXtalCap 0x0f000000 + +#define bIntDifClkEnable 0x400 // Useless +#define bExtSigClkEnable 0x800 +#define bBandgapMbiasPowerUp 0x10000 +#define bAD11SHGain 0xc0000 +#define bAD11InputRange 0x700000 +#define bAD11OPCurrent 0x3800000 +#define bIPathLoopback 0x4000000 +#define bQPathLoopback 0x8000000 +#define bAFELoopback 0x10000000 +#define bDA10Swing 0x7e0 +#define bDA10Reverse 0x800 +#define bDAClkSource 0x1000 +#define bAD7InputRange 0x6000 +#define bAD7Gain 0x38000 +#define bAD7OutputCMMode 0x40000 +#define bAD7InputCMMode 0x380000 +#define bAD7Current 0xc00000 +#define bRegulatorAdjust 0x7000000 +#define bAD11PowerUpAtTx 0x1 +#define bDA10PSAtTx 0x10 +#define bAD11PowerUpAtRx 0x100 +#define bDA10PSAtRx 0x1000 +#define bCCKRxAGCFormat 0x200 +#define bPSDFFTSamplepPoint 0xc000 +#define bPSDAverageNum 0x3000 +#define bIQPathControl 0xc00 +#define bPSDFreq 0x3ff +#define bPSDAntennaPath 0x30 +#define bPSDIQSwitch 0x40 +#define bPSDRxTrigger 0x400000 +#define bPSDTxTrigger 0x80000000 +#define bPSDSineToneScale 0x7f000000 +#define bPSDReport 0xffff + +// 3. Page9(0x900) +#define bOFDMTxSC 0x30000000 // Useless +#define bCCKTxOn 0x1 +#define bOFDMTxOn 0x2 +#define bDebugPage 0xfff //reset debug page and also HWord, LWord +#define bDebugItem 0xff //reset debug page and LWord +#define bAntL 0x10 +#define bAntNonHT 0x100 +#define bAntHT1 0x1000 +#define bAntHT2 0x10000 +#define bAntHT1S1 0x100000 +#define bAntNonHTS1 0x1000000 + +// 4. PageA(0xA00) +#define bCCKBBMode 0x3 // Useless +#define bCCKTxPowerSaving 0x80 +#define bCCKRxPowerSaving 0x40 + +#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch + +#define bCCKScramble 0x8 // Useless +#define bCCKAntDiversity 0x8000 +#define bCCKCarrierRecovery 0x4000 +#define bCCKTxRate 0x3000 +#define bCCKDCCancel 0x0800 +#define bCCKISICancel 0x0400 +#define bCCKMatchFilter 0x0200 +#define bCCKEqualizer 0x0100 +#define bCCKPreambleDetect 0x800000 +#define bCCKFastFalseCCA 0x400000 +#define bCCKChEstStart 0x300000 +#define bCCKCCACount 0x080000 +#define bCCKcs_lim 0x070000 +#define bCCKBistMode 0x80000000 +#define bCCKCCAMask 0x40000000 +#define bCCKTxDACPhase 0x4 +#define bCCKRxADCPhase 0x20000000 //r_rx_clk +#define bCCKr_cp_mode0 0x0100 +#define bCCKTxDCOffset 0xf0 +#define bCCKRxDCOffset 0xf +#define bCCKCCAMode 0xc000 +#define bCCKFalseCS_lim 0x3f00 +#define bCCKCS_ratio 0xc00000 +#define bCCKCorgBit_sel 0x300000 +#define bCCKPD_lim 0x0f0000 +#define bCCKNewCCA 0x80000000 +#define bCCKRxHPofIG 0x8000 +#define bCCKRxIG 0x7f00 +#define bCCKLNAPolarity 0x800000 +#define bCCKRx1stGain 0x7f0000 +#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity +#define bCCKRxAGCSatLevel 0x1f000000 +#define bCCKRxAGCSatCount 0xe0 +#define bCCKRxRFSettle 0x1f //AGCsamp_dly +#define bCCKFixedRxAGC 0x8000 +//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 +#define bCCKAntennaPolarity 0x2000 +#define bCCKTxFilterType 0x0c00 +#define bCCKRxAGCReportType 0x0300 +#define bCCKRxDAGCEn 0x80000000 +#define bCCKRxDAGCPeriod 0x20000000 +#define bCCKRxDAGCSatLevel 0x1f000000 +#define bCCKTimingRecovery 0x800000 +#define bCCKTxC0 0x3f0000 +#define bCCKTxC1 0x3f000000 +#define bCCKTxC2 0x3f +#define bCCKTxC3 0x3f00 +#define bCCKTxC4 0x3f0000 +#define bCCKTxC5 0x3f000000 +#define bCCKTxC6 0x3f +#define bCCKTxC7 0x3f00 +#define bCCKDebugPort 0xff0000 +#define bCCKDACDebug 0x0f000000 +#define bCCKFalseAlarmEnable 0x8000 +#define bCCKFalseAlarmRead 0x4000 +#define bCCKTRSSI 0x7f +#define bCCKRxAGCReport 0xfe +#define bCCKRxReport_AntSel 0x80000000 +#define bCCKRxReport_MFOff 0x40000000 +#define bCCKRxRxReport_SQLoss 0x20000000 +#define bCCKRxReport_Pktloss 0x10000000 +#define bCCKRxReport_Lockedbit 0x08000000 +#define bCCKRxReport_RateError 0x04000000 +#define bCCKRxReport_RxRate 0x03000000 +#define bCCKRxFACounterLower 0xff +#define bCCKRxFACounterUpper 0xff000000 +#define bCCKRxHPAGCStart 0xe000 +#define bCCKRxHPAGCFinal 0x1c00 +#define bCCKRxFalseAlarmEnable 0x8000 +#define bCCKFACounterFreeze 0x4000 +#define bCCKTxPathSel 0x10000000 +#define bCCKDefaultRxPath 0xc000000 +#define bCCKOptionRxPath 0x3000000 + +// 5. PageC(0xC00) +#define bNumOfSTF 0x3 // Useless +#define bShift_L 0xc0 +#define bGI_TH 0xc +#define bRxPathA 0x1 +#define bRxPathB 0x2 +#define bRxPathC 0x4 +#define bRxPathD 0x8 +#define bTxPathA 0x1 +#define bTxPathB 0x2 +#define bTxPathC 0x4 +#define bTxPathD 0x8 +#define bTRSSIFreq 0x200 +#define bADCBackoff 0x3000 +#define bDFIRBackoff 0xc000 +#define bTRSSILatchPhase 0x10000 +#define bRxIDCOffset 0xff +#define bRxQDCOffset 0xff00 +#define bRxDFIRMode 0x1800000 +#define bRxDCNFType 0xe000000 +#define bRXIQImb_A 0x3ff +#define bRXIQImb_B 0xfc00 +#define bRXIQImb_C 0x3f0000 +#define bRXIQImb_D 0xffc00000 +#define bDC_dc_Notch 0x60000 +#define bRxNBINotch 0x1f000000 +#define bPD_TH 0xf +#define bPD_TH_Opt2 0xc000 +#define bPWED_TH 0x700 +#define bIfMF_Win_L 0x800 +#define bPD_Option 0x1000 +#define bMF_Win_L 0xe000 +#define bBW_Search_L 0x30000 +#define bwin_enh_L 0xc0000 +#define bBW_TH 0x700000 +#define bED_TH2 0x3800000 +#define bBW_option 0x4000000 +#define bRatio_TH 0x18000000 +#define bWindow_L 0xe0000000 +#define bSBD_Option 0x1 +#define bFrame_TH 0x1c +#define bFS_Option 0x60 +#define bDC_Slope_check 0x80 +#define bFGuard_Counter_DC_L 0xe00 +#define bFrame_Weight_Short 0x7000 +#define bSub_Tune 0xe00000 +#define bFrame_DC_Length 0xe000000 +#define bSBD_start_offset 0x30000000 +#define bFrame_TH_2 0x7 +#define bFrame_GI2_TH 0x38 +#define bGI2_Sync_en 0x40 +#define bSarch_Short_Early 0x300 +#define bSarch_Short_Late 0xc00 +#define bSarch_GI2_Late 0x70000 +#define bCFOAntSum 0x1 +#define bCFOAcc 0x2 +#define bCFOStartOffset 0xc +#define bCFOLookBack 0x70 +#define bCFOSumWeight 0x80 +#define bDAGCEnable 0x10000 +#define bTXIQImb_A 0x3ff +#define bTXIQImb_B 0xfc00 +#define bTXIQImb_C 0x3f0000 +#define bTXIQImb_D 0xffc00000 +#define bTxIDCOffset 0xff +#define bTxQDCOffset 0xff00 +#define bTxDFIRMode 0x10000 +#define bTxPesudoNoiseOn 0x4000000 +#define bTxPesudoNoise_A 0xff +#define bTxPesudoNoise_B 0xff00 +#define bTxPesudoNoise_C 0xff0000 +#define bTxPesudoNoise_D 0xff000000 +#define bCCADropOption 0x20000 +#define bCCADropThres 0xfff00000 +#define bEDCCA_H 0xf +#define bEDCCA_L 0xf0 +#define bLambda_ED 0x300 +#define bRxInitialGain 0x7f +#define bRxAntDivEn 0x80 +#define bRxAGCAddressForLNA 0x7f00 +#define bRxHighPowerFlow 0x8000 +#define bRxAGCFreezeThres 0xc0000 +#define bRxFreezeStep_AGC1 0x300000 +#define bRxFreezeStep_AGC2 0xc00000 +#define bRxFreezeStep_AGC3 0x3000000 +#define bRxFreezeStep_AGC0 0xc000000 +#define bRxRssi_Cmp_En 0x10000000 +#define bRxQuickAGCEn 0x20000000 +#define bRxAGCFreezeThresMode 0x40000000 +#define bRxOverFlowCheckType 0x80000000 +#define bRxAGCShift 0x7f +#define bTRSW_Tri_Only 0x80 +#define bPowerThres 0x300 +#define bRxAGCEn 0x1 +#define bRxAGCTogetherEn 0x2 +#define bRxAGCMin 0x4 +#define bRxHP_Ini 0x7 +#define bRxHP_TRLNA 0x70 +#define bRxHP_RSSI 0x700 +#define bRxHP_BBP1 0x7000 +#define bRxHP_BBP2 0x70000 +#define bRxHP_BBP3 0x700000 +#define bRSSI_H 0x7f0000 //the threshold for high power +#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity +#define bRxSettle_TRSW 0x7 +#define bRxSettle_LNA 0x38 +#define bRxSettle_RSSI 0x1c0 +#define bRxSettle_BBP 0xe00 +#define bRxSettle_RxHP 0x7000 +#define bRxSettle_AntSW_RSSI 0x38000 +#define bRxSettle_AntSW 0xc0000 +#define bRxProcessTime_DAGC 0x300000 +#define bRxSettle_HSSI 0x400000 +#define bRxProcessTime_BBPPW 0x800000 +#define bRxAntennaPowerShift 0x3000000 +#define bRSSITableSelect 0xc000000 +#define bRxHP_Final 0x7000000 +#define bRxHTSettle_BBP 0x7 +#define bRxHTSettle_HSSI 0x8 +#define bRxHTSettle_RxHP 0x70 +#define bRxHTSettle_BBPPW 0x80 +#define bRxHTSettle_Idle 0x300 +#define bRxHTSettle_Reserved 0x1c00 +#define bRxHTRxHPEn 0x8000 +#define bRxHTAGCFreezeThres 0x30000 +#define bRxHTAGCTogetherEn 0x40000 +#define bRxHTAGCMin 0x80000 +#define bRxHTAGCEn 0x100000 +#define bRxHTDAGCEn 0x200000 +#define bRxHTRxHP_BBP 0x1c00000 +#define bRxHTRxHP_Final 0xe0000000 +#define bRxPWRatioTH 0x3 +#define bRxPWRatioEn 0x4 +#define bRxMFHold 0x3800 +#define bRxPD_Delay_TH1 0x38 +#define bRxPD_Delay_TH2 0x1c0 +#define bRxPD_DC_COUNT_MAX 0x600 +//#define bRxMF_Hold 0x3800 +#define bRxPD_Delay_TH 0x8000 +#define bRxProcess_Delay 0xf0000 +#define bRxSearchrange_GI2_Early 0x700000 +#define bRxFrame_Guard_Counter_L 0x3800000 +#define bRxSGI_Guard_L 0xc000000 +#define bRxSGI_Search_L 0x30000000 +#define bRxSGI_TH 0xc0000000 +#define bDFSCnt0 0xff +#define bDFSCnt1 0xff00 +#define bDFSFlag 0xf0000 +#define bMFWeightSum 0x300000 +#define bMinIdxTH 0x7f000000 +#define bDAFormat 0x40000 +#define bTxChEmuEnable 0x01000000 +#define bTRSWIsolation_A 0x7f +#define bTRSWIsolation_B 0x7f00 +#define bTRSWIsolation_C 0x7f0000 +#define bTRSWIsolation_D 0x7f000000 +#define bExtLNAGain 0x7c00 + +// 6. PageE(0xE00) +#define bSTBCEn 0x4 // Useless +#define bAntennaMapping 0x10 +#define bNss 0x20 +#define bCFOAntSumD 0x200 +#define bPHYCounterReset 0x8000000 +#define bCFOReportGet 0x4000000 +#define bOFDMContinueTx 0x10000000 +#define bOFDMSingleCarrier 0x20000000 +#define bOFDMSingleTone 0x40000000 +//#define bRxPath1 0x01 +//#define bRxPath2 0x02 +//#define bRxPath3 0x04 +//#define bRxPath4 0x08 +//#define bTxPath1 0x10 +//#define bTxPath2 0x20 +#define bHTDetect 0x100 +#define bCFOEn 0x10000 +#define bCFOValue 0xfff00000 +#define bSigTone_Re 0x3f +#define bSigTone_Im 0x7f00 +#define bCounter_CCA 0xffff +#define bCounter_ParityFail 0xffff0000 +#define bCounter_RateIllegal 0xffff +#define bCounter_CRC8Fail 0xffff0000 +#define bCounter_MCSNoSupport 0xffff +#define bCounter_FastSync 0xffff +#define bShortCFO 0xfff +#define bShortCFOTLength 12 //total +#define bShortCFOFLength 11 //fraction +#define bLongCFO 0x7ff +#define bLongCFOTLength 11 +#define bLongCFOFLength 11 +#define bTailCFO 0x1fff +#define bTailCFOTLength 13 +#define bTailCFOFLength 12 +#define bmax_en_pwdB 0xffff +#define bCC_power_dB 0xffff0000 +#define bnoise_pwdB 0xffff +#define bPowerMeasTLength 10 +#define bPowerMeasFLength 3 +#define bRx_HT_BW 0x1 +#define bRxSC 0x6 +#define bRx_HT 0x8 +#define bNB_intf_det_on 0x1 +#define bIntf_win_len_cfg 0x30 +#define bNB_Intf_TH_cfg 0x1c0 +#define bRFGain 0x3f +#define bTableSel 0x40 +#define bTRSW 0x80 +#define bRxSNR_A 0xff +#define bRxSNR_B 0xff00 +#define bRxSNR_C 0xff0000 +#define bRxSNR_D 0xff000000 +#define bSNREVMTLength 8 +#define bSNREVMFLength 1 +#define bCSI1st 0xff +#define bCSI2nd 0xff00 +#define bRxEVM1st 0xff0000 +#define bRxEVM2nd 0xff000000 +#define bSIGEVM 0xff +#define bPWDB 0xff00 +#define bSGIEN 0x10000 + +#define bSFactorQAM1 0xf // Useless +#define bSFactorQAM2 0xf0 +#define bSFactorQAM3 0xf00 +#define bSFactorQAM4 0xf000 +#define bSFactorQAM5 0xf0000 +#define bSFactorQAM6 0xf0000 +#define bSFactorQAM7 0xf00000 +#define bSFactorQAM8 0xf000000 +#define bSFactorQAM9 0xf0000000 +#define bCSIScheme 0x100000 + +#define bNoiseLvlTopSet 0x3 // Useless +#define bChSmooth 0x4 +#define bChSmoothCfg1 0x38 +#define bChSmoothCfg2 0x1c0 +#define bChSmoothCfg3 0xe00 +#define bChSmoothCfg4 0x7000 +#define bMRCMode 0x800000 +#define bTHEVMCfg 0x7000000 + +#define bLoopFitType 0x1 // Useless +#define bUpdCFO 0x40 +#define bUpdCFOOffData 0x80 +#define bAdvUpdCFO 0x100 +#define bAdvTimeCtrl 0x800 +#define bUpdClko 0x1000 +#define bFC 0x6000 +#define bTrackingMode 0x8000 +#define bPhCmpEnable 0x10000 +#define bUpdClkoLTF 0x20000 +#define bComChCFO 0x40000 +#define bCSIEstiMode 0x80000 +#define bAdvUpdEqz 0x100000 +#define bUChCfg 0x7000000 +#define bUpdEqz 0x8000000 + +//Rx Pseduo noise +#define bRxPesudoNoiseOn 0x20000000 // Useless +#define bRxPesudoNoise_A 0xff +#define bRxPesudoNoise_B 0xff00 +#define bRxPesudoNoise_C 0xff0000 +#define bRxPesudoNoise_D 0xff000000 +#define bPesudoNoiseState_A 0xffff +#define bPesudoNoiseState_B 0xffff0000 +#define bPesudoNoiseState_C 0xffff +#define bPesudoNoiseState_D 0xffff0000 + +//7. RF Register +//Zebra1 +#define bZebra1_HSSIEnable 0x8 // Useless +#define bZebra1_TRxControl 0xc00 +#define bZebra1_TRxGainSetting 0x07f +#define bZebra1_RxCorner 0xc00 +#define bZebra1_TxChargePump 0x38 +#define bZebra1_RxChargePump 0x7 +#define bZebra1_ChannelNum 0xf80 +#define bZebra1_TxLPFBW 0x400 +#define bZebra1_RxLPFBW 0x600 + +//Zebra4 +#define bRTL8256RegModeCtrl1 0x100 // Useless +#define bRTL8256RegModeCtrl0 0x40 +#define bRTL8256_TxLPFBW 0x18 +#define bRTL8256_RxLPFBW 0x600 + +//RTL8258 +#define bRTL8258_TxLPFBW 0xc // Useless +#define bRTL8258_RxLPFBW 0xc00 +#define bRTL8258_RSSILPFBW 0xc0 + + +// +// Other Definition +// + +//byte endable for sb_write +#define bByte0 0x1 // Useless +#define bByte1 0x2 +#define bByte2 0x4 +#define bByte3 0x8 +#define bWord0 0x3 +#define bWord1 0xc +#define bDWord 0xf + +//for PutRegsetting & GetRegSetting BitMask +#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f +#define bMaskByte1 0xff00 +#define bMaskByte2 0xff0000 +#define bMaskByte3 0xff000000 +#define bMaskHWord 0xffff0000 +#define bMaskLWord 0x0000ffff +#define bMaskDWord 0xffffffff +#define bMask12Bits 0xfff +#define bMaskH4Bits 0xf0000000 +#define bMaskOFDM_D 0xffc00000 +#define bMaskCCK 0x3f3f3f3f + +//for PutRFRegsetting & GetRFRegSetting BitMask +//#define bMask12Bits 0xfffff // RF Reg mask bits +//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF +#define bRFRegOffsetMask 0xfffff +//#define bRFRegOffsetMask 0xfff + +//MAC0 will wirte PHY1 +#define MAC0_ACCESS_PHY1 0x4000 +//MAC1 will wirte PHY0 +#define MAC1_ACCESS_PHY0 0x2000 + +#define bEnable 0x1 // Useless +#define bDisable 0x0 + +#define LeftAntenna 0x0 // Useless +#define RightAntenna 0x1 + +#define tCheckTxStatus 500 //500ms // Useless +#define tUpdateRxCounter 100 //100ms + +#define rateCCK 0 // Useless +#define rateOFDM 1 +#define rateHT 2 + +//define Register-End +#define bPMAC_End 0x1ff // Useless +#define bFPGAPHY0_End 0x8ff +#define bFPGAPHY1_End 0x9ff +#define bCCKPHY0_End 0xaff +#define bOFDMPHY0_End 0xcff +#define bOFDMPHY1_End 0xdff + +//define max debug item in each debug page +//#define bMaxItem_FPGA_PHY0 0x9 +//#define bMaxItem_FPGA_PHY1 0x3 +//#define bMaxItem_PHY_11B 0x16 +//#define bMaxItem_OFDM_PHY0 0x29 +//#define bMaxItem_OFDM_PHY1 0x0 + +#define bPMACControl 0x0 // Useless +#define bWMACControl 0x1 +#define bWNICControl 0x2 + +#define PathA 0x0 // Useless +#define PathB 0x1 +#define PathC 0x2 +#define PathD 0x3 + +/*--------------------------Define Parameters-------------------------------*/ + + +#endif //__INC_HAL8192SPHYREG_H + diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg.h old mode 100755 new mode 100644 index f43e9d1c95a21c..d931001349ff86 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg.h @@ -1,66 +1,66 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192DU_FW_IMG_H -#define __INC_HAL8192DU_FW_IMG_H - -#include - -/*Created on 2011/11/11, 8: 8*/ - -#define Rtl8192DUImgArrayLength 32142 -extern const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength]; -#define Rtl8192DUMainArrayLength 1 -extern const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength]; -#define Rtl8192DUDataArrayLength 1 -extern const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength]; -#define Rtl8192DUPHY_REG_2TArrayLength 372 -extern const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength]; -#define Rtl8192DUPHY_REG_1TArrayLength 1 -extern const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength]; -#define Rtl8192DUPHY_REG_Array_PGLength 624 -extern const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength]; -#define Rtl8192DUPHY_REG_Array_MPLength 12 -extern const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength]; -#define Rtl8192DURadioA_2TArrayLength 378 -extern const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength]; -#define Rtl8192DURadioB_2TArrayLength 384 -extern const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength]; -#define Rtl8192DURadioA_1TArrayLength 1 -extern const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength]; -#define Rtl8192DURadioB_1TArrayLength 1 -extern const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength]; -#define Rtl8192DURadioA_2T_intPAArrayLength 378 -extern const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength]; -#define Rtl8192DURadioB_2T_intPAArrayLength 384 -extern const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength]; -#define Rtl8192DUMAC_2T_ArrayLength 192 -extern const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength]; -#define Rtl8192DUAGCTAB_ArrayLength 386 -extern const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength]; -#define Rtl8192DUAGCTAB_5GArrayLength 194 -extern const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength]; -#define Rtl8192DUAGCTAB_2GArrayLength 194 -extern const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength]; -#define Rtl8192DUAGCTAB_2TArrayLength 1 -extern const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength]; -#define Rtl8192DUAGCTAB_1TArrayLength 1 -extern const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength]; - -#endif //__INC_HAL8192CU_FW_IMG_H +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192DU_FW_IMG_H +#define __INC_HAL8192DU_FW_IMG_H + +#include + +/*Created on 2011/11/11, 8: 8*/ + +#define Rtl8192DUImgArrayLength 32142 +extern const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength]; +#define Rtl8192DUMainArrayLength 1 +extern const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength]; +#define Rtl8192DUDataArrayLength 1 +extern const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength]; +#define Rtl8192DUPHY_REG_2TArrayLength 372 +extern const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength]; +#define Rtl8192DUPHY_REG_1TArrayLength 1 +extern const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength]; +#define Rtl8192DUPHY_REG_Array_PGLength 624 +extern const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength]; +#define Rtl8192DUPHY_REG_Array_MPLength 12 +extern const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength]; +#define Rtl8192DURadioA_2TArrayLength 378 +extern const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength]; +#define Rtl8192DURadioB_2TArrayLength 384 +extern const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength]; +#define Rtl8192DURadioA_1TArrayLength 1 +extern const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength]; +#define Rtl8192DURadioB_1TArrayLength 1 +extern const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength]; +#define Rtl8192DURadioA_2T_intPAArrayLength 378 +extern const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength]; +#define Rtl8192DURadioB_2T_intPAArrayLength 384 +extern const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength]; +#define Rtl8192DUMAC_2T_ArrayLength 192 +extern const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength]; +#define Rtl8192DUAGCTAB_ArrayLength 386 +extern const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength]; +#define Rtl8192DUAGCTAB_5GArrayLength 194 +extern const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength]; +#define Rtl8192DUAGCTAB_2GArrayLength 194 +extern const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength]; +#define Rtl8192DUAGCTAB_2TArrayLength 1 +extern const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength]; +#define Rtl8192DUAGCTAB_1TArrayLength 1 +extern const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength]; + +#endif //__INC_HAL8192CU_FW_IMG_H diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg_wowlan.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg_wowlan.h old mode 100755 new mode 100644 index 75aafee5f4f8ad..a297e76e3c3b36 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg_wowlan.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg_wowlan.h @@ -1,30 +1,30 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192DU_FW_IMG_WOWLAN_H -#define __INC_HAL8192DU_FW_IMG_WOWLAN_H - -/*Created on 2011/11/ 8, 14:15*/ - - -#define DUWWImgArrayLength 16656 -extern u8 Rtl8192DUFwWWImgArray[DUWWImgArrayLength]; - -#endif //__INC_HAL8192DU_FW_IMG_WOWLAN_H - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192DU_FW_IMG_WOWLAN_H +#define __INC_HAL8192DU_FW_IMG_WOWLAN_H + +/*Created on 2011/11/ 8, 14:15*/ + + +#define DUWWImgArrayLength 16656 +extern u8 Rtl8192DUFwWWImgArray[DUWWImgArrayLength]; + +#endif //__INC_HAL8192DU_FW_IMG_WOWLAN_H + diff --git a/drivers/net/wireless/rtl8192cu/include/Hal8192DUTestHWImg.h b/drivers/net/wireless/rtl8192cu/include/Hal8192DUTestHWImg.h old mode 100755 new mode 100644 index 3ce7a3d809830c..e0491ff8360ff3 --- a/drivers/net/wireless/rtl8192cu/include/Hal8192DUTestHWImg.h +++ b/drivers/net/wireless/rtl8192cu/include/Hal8192DUTestHWImg.h @@ -1,54 +1,54 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __INC_HAL8192DUTEST_FW_IMG_H -#define __INC_HAL8192DUTEST_FW_IMG_H - -#include - -/*Created on 2010/ 5/27, 9:49*/ - -#define Rtl8192DTestImgArrayLength 15054 -extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength]; -#define Rtl8192DTestMainArrayLength 1 -extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength]; -#define Rtl8192DTestDataArrayLength 1 -extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength]; -#define Rtl8192DTestPHY_REG_2TArrayLength 376 -extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength]; -#define Rtl8192DTestPHY_REG_1TArrayLength 1 -extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength]; -#define Rtl8192DTestPHY_REG_Array_PGLength 1 -extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength]; -#define Rtl8192DTestRadioA_2TArrayLength 340 -extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength]; -#define Rtl8192DTestRadioB_2TArrayLength 340 -extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength]; -#define Rtl8192DTestRadioA_1TArrayLength 1 -extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength]; -#define Rtl8192DTestRadioB_1TArrayLength 1 -extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength]; -#define Rtl8192DTestMAC_2TArrayLength 174 -extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength]; -#define Rtl8192DTestAGCTAB_5GArrayLength 514 -extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength]; -#define Rtl8192DTestAGCTAB_2GArrayLength 514 -extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength]; - -#endif //__INC_HAL8192CU_FW_IMG_H +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_HAL8192DUTEST_FW_IMG_H +#define __INC_HAL8192DUTEST_FW_IMG_H + +#include + +/*Created on 2010/ 5/27, 9:49*/ + +#define Rtl8192DTestImgArrayLength 15054 +extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength]; +#define Rtl8192DTestMainArrayLength 1 +extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength]; +#define Rtl8192DTestDataArrayLength 1 +extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength]; +#define Rtl8192DTestPHY_REG_2TArrayLength 376 +extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength]; +#define Rtl8192DTestPHY_REG_1TArrayLength 1 +extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength]; +#define Rtl8192DTestPHY_REG_Array_PGLength 1 +extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength]; +#define Rtl8192DTestRadioA_2TArrayLength 340 +extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength]; +#define Rtl8192DTestRadioB_2TArrayLength 340 +extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength]; +#define Rtl8192DTestRadioA_1TArrayLength 1 +extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength]; +#define Rtl8192DTestRadioB_1TArrayLength 1 +extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength]; +#define Rtl8192DTestMAC_2TArrayLength 174 +extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength]; +#define Rtl8192DTestAGCTAB_5GArrayLength 514 +extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength]; +#define Rtl8192DTestAGCTAB_2GArrayLength 514 +extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength]; + +#endif //__INC_HAL8192CU_FW_IMG_H diff --git a/drivers/net/wireless/rtl8192cu/include/autoconf.h b/drivers/net/wireless/rtl8192cu/include/autoconf.h old mode 100755 new mode 100644 index 4a50f8b1171ddc..7d6db403d88aaa --- a/drivers/net/wireless/rtl8192cu/include/autoconf.h +++ b/drivers/net/wireless/rtl8192cu/include/autoconf.h @@ -174,7 +174,7 @@ /* * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now! */ -#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms. +//#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms. //#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 // For RX path /* @@ -246,6 +246,9 @@ #define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 #endif +//#define CONFIG_BEFORE_LINKED_DIG +//#define CONFIG_ENABLE_NOTCH_FILTER + /* * Debug Related Config diff --git a/drivers/net/wireless/rtl8192cu/include/basic_types.h b/drivers/net/wireless/rtl8192cu/include/basic_types.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/byteorder/big_endian.h b/drivers/net/wireless/rtl8192cu/include/byteorder/big_endian.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/byteorder/generic.h b/drivers/net/wireless/rtl8192cu/include/byteorder/generic.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/byteorder/little_endian.h b/drivers/net/wireless/rtl8192cu/include/byteorder/little_endian.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/byteorder/swab.h b/drivers/net/wireless/rtl8192cu/include/byteorder/swab.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/byteorder/swabb.h b/drivers/net/wireless/rtl8192cu/include/byteorder/swabb.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/circ_buf.h b/drivers/net/wireless/rtl8192cu/include/circ_buf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/cmd_osdep.h b/drivers/net/wireless/rtl8192cu/include/cmd_osdep.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/drv_conf.h b/drivers/net/wireless/rtl8192cu/include/drv_conf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/drv_types.h b/drivers/net/wireless/rtl8192cu/include/drv_types.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/drv_types_ce.h b/drivers/net/wireless/rtl8192cu/include/drv_types_ce.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/drv_types_linux.h b/drivers/net/wireless/rtl8192cu/include/drv_types_linux.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/drv_types_xp.h b/drivers/net/wireless/rtl8192cu/include/drv_types_xp.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/ethernet.h b/drivers/net/wireless/rtl8192cu/include/ethernet.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/farray.h b/drivers/net/wireless/rtl8192cu/include/farray.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/h2clbk.h b/drivers/net/wireless/rtl8192cu/include/h2clbk.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/hal_init.h b/drivers/net/wireless/rtl8192cu/include/hal_init.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/ieee80211.h b/drivers/net/wireless/rtl8192cu/include/ieee80211.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/ieee80211_ext.h b/drivers/net/wireless/rtl8192cu/include/ieee80211_ext.h old mode 100755 new mode 100644 index 0a966fa5d03aec..3e55305e1d9816 --- a/drivers/net/wireless/rtl8192cu/include/ieee80211_ext.h +++ b/drivers/net/wireless/rtl8192cu/include/ieee80211_ext.h @@ -1,477 +1,477 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __IEEE80211_EXT_H -#define __IEEE80211_EXT_H - -#include -#include -#include - -#define WMM_OUI_TYPE 2 -#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 -#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 -#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 -#define WMM_VERSION 1 - -#define WPA_PROTO_WPA BIT(0) -#define WPA_PROTO_RSN BIT(1) - -#define WPA_KEY_MGMT_IEEE8021X BIT(0) -#define WPA_KEY_MGMT_PSK BIT(1) -#define WPA_KEY_MGMT_NONE BIT(2) -#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) -#define WPA_KEY_MGMT_WPA_NONE BIT(4) - - -#define WPA_CAPABILITY_PREAUTH BIT(0) -#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) -#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) - - -#define PMKID_LEN 16 - - -#ifdef PLATFORM_LINUX -struct wpa_ie_hdr { - u8 elem_id; - u8 len; - u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ - u8 version[2]; /* little endian */ -}__attribute__ ((packed)); - -struct rsn_ie_hdr { - u8 elem_id; /* WLAN_EID_RSN */ - u8 len; - u8 version[2]; /* little endian */ -}__attribute__ ((packed)); - -struct wme_ac_parameter { -#if defined(CONFIG_LITTLE_ENDIAN) - /* byte 1 */ - u8 aifsn:4, - acm:1, - aci:2, - reserved:1; - - /* byte 2 */ - u8 eCWmin:4, - eCWmax:4; -#elif defined(CONFIG_BIG_ENDIAN) - /* byte 1 */ - u8 reserved:1, - aci:2, - acm:1, - aifsn:4; - - /* byte 2 */ - u8 eCWmax:4, - eCWmin:4; -#else -#error "Please fix " -#endif - - /* bytes 3 & 4 */ - u16 txopLimit; -} __attribute__ ((packed)); - -struct wme_parameter_element { - /* required fields for WME version 1 */ - u8 oui[3]; - u8 oui_type; - u8 oui_subtype; - u8 version; - u8 acInfo; - u8 reserved; - struct wme_ac_parameter ac[4]; - -} __attribute__ ((packed)); - -#endif - -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) - -struct wpa_ie_hdr { - u8 elem_id; - u8 len; - u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ - u8 version[2]; /* little endian */ -}; - -struct rsn_ie_hdr { - u8 elem_id; /* WLAN_EID_RSN */ - u8 len; - u8 version[2]; /* little endian */ -}; - -#pragma pack() - -#endif - -#define WPA_PUT_LE16(a, val) \ - do { \ - (a)[1] = ((u16) (val)) >> 8; \ - (a)[0] = ((u16) (val)) & 0xff; \ - } while (0) - -#define WPA_PUT_BE32(a, val) \ - do { \ - (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ - (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ - (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ - (a)[3] = (u8) (((u32) (val)) & 0xff); \ - } while (0) - -#define WPA_PUT_LE32(a, val) \ - do { \ - (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ - (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ - (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ - (a)[0] = (u8) (((u32) (val)) & 0xff); \ - } while (0) - -#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) -//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) - - - -/* Action category code */ -enum ieee80211_category { - WLAN_CATEGORY_SPECTRUM_MGMT = 0, - WLAN_CATEGORY_QOS = 1, - WLAN_CATEGORY_DLS = 2, - WLAN_CATEGORY_BACK = 3, - WLAN_CATEGORY_HT = 7, - WLAN_CATEGORY_WMM = 17, -}; - -/* SPECTRUM_MGMT action code */ -enum ieee80211_spectrum_mgmt_actioncode { - WLAN_ACTION_SPCT_MSR_REQ = 0, - WLAN_ACTION_SPCT_MSR_RPRT = 1, - WLAN_ACTION_SPCT_TPC_REQ = 2, - WLAN_ACTION_SPCT_TPC_RPRT = 3, - WLAN_ACTION_SPCT_CHL_SWITCH = 4, - WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, -}; - -/* BACK action code */ -enum ieee80211_back_actioncode { - WLAN_ACTION_ADDBA_REQ = 0, - WLAN_ACTION_ADDBA_RESP = 1, - WLAN_ACTION_DELBA = 2, -}; - -/* HT features action code */ -enum ieee80211_ht_actioncode { - WLAN_ACTION_NOTIFY_CH_WIDTH = 0, - WLAN_ACTION_SM_PS = 1, - WLAN_ACTION_PSPM = 2, - WLAN_ACTION_PCO_PHASE = 3, - WLAN_ACTION_MIMO_CSI_MX = 4, - WLAN_ACTION_MIMO_NONCP_BF = 5, - WLAN_ACTION_MIMP_CP_BF = 6, - WLAN_ACTION_ASEL_INDICATES_FB = 7, - WLAN_ACTION_HI_INFO_EXCHG = 8, -}; - -/* BACK (block-ack) parties */ -enum ieee80211_back_parties { - WLAN_BACK_RECIPIENT = 0, - WLAN_BACK_INITIATOR = 1, - WLAN_BACK_TIMER = 2, -}; - -#ifdef PLATFORM_LINUX - -struct ieee80211_mgmt { - u16 frame_control; - u16 duration; - u8 da[6]; - u8 sa[6]; - u8 bssid[6]; - u16 seq_ctrl; - union { - struct { - u16 auth_alg; - u16 auth_transaction; - u16 status_code; - /* possibly followed by Challenge text */ - u8 variable[0]; - } __attribute__ ((packed)) auth; - struct { - u16 reason_code; - } __attribute__ ((packed)) deauth; - struct { - u16 capab_info; - u16 listen_interval; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } __attribute__ ((packed)) assoc_req; - struct { - u16 capab_info; - u16 status_code; - u16 aid; - /* followed by Supported rates */ - u8 variable[0]; - } __attribute__ ((packed)) assoc_resp, reassoc_resp; - struct { - u16 capab_info; - u16 listen_interval; - u8 current_ap[6]; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } __attribute__ ((packed)) reassoc_req; - struct { - u16 reason_code; - } __attribute__ ((packed)) disassoc; - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params, TIM */ - u8 variable[0]; - } __attribute__ ((packed)) beacon; - struct { - /* only variable items: SSID, Supported rates */ - u8 variable[0]; - } __attribute__ ((packed)) probe_req; - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params */ - u8 variable[0]; - } __attribute__ ((packed)) probe_resp; - struct { - u8 category; - union { - struct { - u8 action_code; - u8 dialog_token; - u8 status_code; - u8 variable[0]; - } __attribute__ ((packed)) wme_action; -#if 0 - struct{ - u8 action_code; - u8 element_id; - u8 length; - struct ieee80211_channel_sw_ie sw_elem; - } __attribute__ ((packed)) chan_switch; - struct{ - u8 action_code; - u8 dialog_token; - u8 element_id; - u8 length; - struct ieee80211_msrment_ie msr_elem; - } __attribute__ ((packed)) measurement; -#endif - struct{ - u8 action_code; - u8 dialog_token; - u16 capab; - u16 timeout; - u16 start_seq_num; - } __attribute__ ((packed)) addba_req; - struct{ - u8 action_code; - u8 dialog_token; - u16 status; - u16 capab; - u16 timeout; - } __attribute__ ((packed)) addba_resp; - struct{ - u8 action_code; - u16 params; - u16 reason_code; - } __attribute__ ((packed)) delba; - struct{ - u8 action_code; - /* capab_info for open and confirm, - * reason for close - */ - u16 aux; - /* Followed in plink_confirm by status - * code, AID and supported rates, - * and directly by supported rates in - * plink_open and plink_close - */ - u8 variable[0]; - } __attribute__ ((packed)) plink_action; - struct{ - u8 action_code; - u8 variable[0]; - } __attribute__ ((packed)) mesh_action; - } __attribute__ ((packed)) u; - } __attribute__ ((packed)) action; - } __attribute__ ((packed)) u; -}__attribute__ ((packed)); - -#endif - - -#ifdef PLATFORM_WINDOWS - -#pragma pack(1) - -struct ieee80211_mgmt { - u16 frame_control; - u16 duration; - u8 da[6]; - u8 sa[6]; - u8 bssid[6]; - u16 seq_ctrl; - union { - struct { - u16 auth_alg; - u16 auth_transaction; - u16 status_code; - /* possibly followed by Challenge text */ - u8 variable[0]; - } auth; - struct { - u16 reason_code; - } deauth; - struct { - u16 capab_info; - u16 listen_interval; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } assoc_req; - struct { - u16 capab_info; - u16 status_code; - u16 aid; - /* followed by Supported rates */ - u8 variable[0]; - } assoc_resp, reassoc_resp; - struct { - u16 capab_info; - u16 listen_interval; - u8 current_ap[6]; - /* followed by SSID and Supported rates */ - u8 variable[0]; - } reassoc_req; - struct { - u16 reason_code; - } disassoc; -#if 0 - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params, TIM */ - u8 variable[0]; - } beacon; - struct { - /* only variable items: SSID, Supported rates */ - u8 variable[0]; - } probe_req; - - struct { - __le64 timestamp; - u16 beacon_int; - u16 capab_info; - /* followed by some of SSID, Supported rates, - * FH Params, DS Params, CF Params, IBSS Params */ - u8 variable[0]; - } probe_resp; -#endif - struct { - u8 category; - union { - struct { - u8 action_code; - u8 dialog_token; - u8 status_code; - u8 variable[0]; - } wme_action; -/* - struct{ - u8 action_code; - u8 element_id; - u8 length; - struct ieee80211_channel_sw_ie sw_elem; - } chan_switch; - struct{ - u8 action_code; - u8 dialog_token; - u8 element_id; - u8 length; - struct ieee80211_msrment_ie msr_elem; - } measurement; -*/ - struct{ - u8 action_code; - u8 dialog_token; - u16 capab; - u16 timeout; - u16 start_seq_num; - } addba_req; - struct{ - u8 action_code; - u8 dialog_token; - u16 status; - u16 capab; - u16 timeout; - } addba_resp; - struct{ - u8 action_code; - u16 params; - u16 reason_code; - } delba; - struct{ - u8 action_code; - /* capab_info for open and confirm, - * reason for close - */ - u16 aux; - /* Followed in plink_confirm by status - * code, AID and supported rates, - * and directly by supported rates in - * plink_open and plink_close - */ - u8 variable[0]; - } plink_action; - struct{ - u8 action_code; - u8 variable[0]; - } mesh_action; - } u; - } action; - } u; -} ; - -#pragma pack() - -#endif - -/* mgmt header + 1 byte category code */ -#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) - - - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __IEEE80211_EXT_H +#define __IEEE80211_EXT_H + +#include +#include +#include + +#define WMM_OUI_TYPE 2 +#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 +#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 +#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 +#define WMM_VERSION 1 + +#define WPA_PROTO_WPA BIT(0) +#define WPA_PROTO_RSN BIT(1) + +#define WPA_KEY_MGMT_IEEE8021X BIT(0) +#define WPA_KEY_MGMT_PSK BIT(1) +#define WPA_KEY_MGMT_NONE BIT(2) +#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) +#define WPA_KEY_MGMT_WPA_NONE BIT(4) + + +#define WPA_CAPABILITY_PREAUTH BIT(0) +#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) +#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) + + +#define PMKID_LEN 16 + + +#ifdef PLATFORM_LINUX +struct wpa_ie_hdr { + u8 elem_id; + u8 len; + u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ + u8 version[2]; /* little endian */ +}__attribute__ ((packed)); + +struct rsn_ie_hdr { + u8 elem_id; /* WLAN_EID_RSN */ + u8 len; + u8 version[2]; /* little endian */ +}__attribute__ ((packed)); + +struct wme_ac_parameter { +#if defined(CONFIG_LITTLE_ENDIAN) + /* byte 1 */ + u8 aifsn:4, + acm:1, + aci:2, + reserved:1; + + /* byte 2 */ + u8 eCWmin:4, + eCWmax:4; +#elif defined(CONFIG_BIG_ENDIAN) + /* byte 1 */ + u8 reserved:1, + aci:2, + acm:1, + aifsn:4; + + /* byte 2 */ + u8 eCWmax:4, + eCWmin:4; +#else +#error "Please fix " +#endif + + /* bytes 3 & 4 */ + u16 txopLimit; +} __attribute__ ((packed)); + +struct wme_parameter_element { + /* required fields for WME version 1 */ + u8 oui[3]; + u8 oui_type; + u8 oui_subtype; + u8 version; + u8 acInfo; + u8 reserved; + struct wme_ac_parameter ac[4]; + +} __attribute__ ((packed)); + +#endif + +#ifdef PLATFORM_WINDOWS + +#pragma pack(1) + +struct wpa_ie_hdr { + u8 elem_id; + u8 len; + u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ + u8 version[2]; /* little endian */ +}; + +struct rsn_ie_hdr { + u8 elem_id; /* WLAN_EID_RSN */ + u8 len; + u8 version[2]; /* little endian */ +}; + +#pragma pack() + +#endif + +#define WPA_PUT_LE16(a, val) \ + do { \ + (a)[1] = ((u16) (val)) >> 8; \ + (a)[0] = ((u16) (val)) & 0xff; \ + } while (0) + +#define WPA_PUT_BE32(a, val) \ + do { \ + (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ + (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ + (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ + (a)[3] = (u8) (((u32) (val)) & 0xff); \ + } while (0) + +#define WPA_PUT_LE32(a, val) \ + do { \ + (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ + (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ + (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ + (a)[0] = (u8) (((u32) (val)) & 0xff); \ + } while (0) + +#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) +//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) + + + +/* Action category code */ +enum ieee80211_category { + WLAN_CATEGORY_SPECTRUM_MGMT = 0, + WLAN_CATEGORY_QOS = 1, + WLAN_CATEGORY_DLS = 2, + WLAN_CATEGORY_BACK = 3, + WLAN_CATEGORY_HT = 7, + WLAN_CATEGORY_WMM = 17, +}; + +/* SPECTRUM_MGMT action code */ +enum ieee80211_spectrum_mgmt_actioncode { + WLAN_ACTION_SPCT_MSR_REQ = 0, + WLAN_ACTION_SPCT_MSR_RPRT = 1, + WLAN_ACTION_SPCT_TPC_REQ = 2, + WLAN_ACTION_SPCT_TPC_RPRT = 3, + WLAN_ACTION_SPCT_CHL_SWITCH = 4, + WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, +}; + +/* BACK action code */ +enum ieee80211_back_actioncode { + WLAN_ACTION_ADDBA_REQ = 0, + WLAN_ACTION_ADDBA_RESP = 1, + WLAN_ACTION_DELBA = 2, +}; + +/* HT features action code */ +enum ieee80211_ht_actioncode { + WLAN_ACTION_NOTIFY_CH_WIDTH = 0, + WLAN_ACTION_SM_PS = 1, + WLAN_ACTION_PSPM = 2, + WLAN_ACTION_PCO_PHASE = 3, + WLAN_ACTION_MIMO_CSI_MX = 4, + WLAN_ACTION_MIMO_NONCP_BF = 5, + WLAN_ACTION_MIMP_CP_BF = 6, + WLAN_ACTION_ASEL_INDICATES_FB = 7, + WLAN_ACTION_HI_INFO_EXCHG = 8, +}; + +/* BACK (block-ack) parties */ +enum ieee80211_back_parties { + WLAN_BACK_RECIPIENT = 0, + WLAN_BACK_INITIATOR = 1, + WLAN_BACK_TIMER = 2, +}; + +#ifdef PLATFORM_LINUX + +struct ieee80211_mgmt { + u16 frame_control; + u16 duration; + u8 da[6]; + u8 sa[6]; + u8 bssid[6]; + u16 seq_ctrl; + union { + struct { + u16 auth_alg; + u16 auth_transaction; + u16 status_code; + /* possibly followed by Challenge text */ + u8 variable[0]; + } __attribute__ ((packed)) auth; + struct { + u16 reason_code; + } __attribute__ ((packed)) deauth; + struct { + u16 capab_info; + u16 listen_interval; + /* followed by SSID and Supported rates */ + u8 variable[0]; + } __attribute__ ((packed)) assoc_req; + struct { + u16 capab_info; + u16 status_code; + u16 aid; + /* followed by Supported rates */ + u8 variable[0]; + } __attribute__ ((packed)) assoc_resp, reassoc_resp; + struct { + u16 capab_info; + u16 listen_interval; + u8 current_ap[6]; + /* followed by SSID and Supported rates */ + u8 variable[0]; + } __attribute__ ((packed)) reassoc_req; + struct { + u16 reason_code; + } __attribute__ ((packed)) disassoc; + struct { + __le64 timestamp; + u16 beacon_int; + u16 capab_info; + /* followed by some of SSID, Supported rates, + * FH Params, DS Params, CF Params, IBSS Params, TIM */ + u8 variable[0]; + } __attribute__ ((packed)) beacon; + struct { + /* only variable items: SSID, Supported rates */ + u8 variable[0]; + } __attribute__ ((packed)) probe_req; + struct { + __le64 timestamp; + u16 beacon_int; + u16 capab_info; + /* followed by some of SSID, Supported rates, + * FH Params, DS Params, CF Params, IBSS Params */ + u8 variable[0]; + } __attribute__ ((packed)) probe_resp; + struct { + u8 category; + union { + struct { + u8 action_code; + u8 dialog_token; + u8 status_code; + u8 variable[0]; + } __attribute__ ((packed)) wme_action; +#if 0 + struct{ + u8 action_code; + u8 element_id; + u8 length; + struct ieee80211_channel_sw_ie sw_elem; + } __attribute__ ((packed)) chan_switch; + struct{ + u8 action_code; + u8 dialog_token; + u8 element_id; + u8 length; + struct ieee80211_msrment_ie msr_elem; + } __attribute__ ((packed)) measurement; +#endif + struct{ + u8 action_code; + u8 dialog_token; + u16 capab; + u16 timeout; + u16 start_seq_num; + } __attribute__ ((packed)) addba_req; + struct{ + u8 action_code; + u8 dialog_token; + u16 status; + u16 capab; + u16 timeout; + } __attribute__ ((packed)) addba_resp; + struct{ + u8 action_code; + u16 params; + u16 reason_code; + } __attribute__ ((packed)) delba; + struct{ + u8 action_code; + /* capab_info for open and confirm, + * reason for close + */ + u16 aux; + /* Followed in plink_confirm by status + * code, AID and supported rates, + * and directly by supported rates in + * plink_open and plink_close + */ + u8 variable[0]; + } __attribute__ ((packed)) plink_action; + struct{ + u8 action_code; + u8 variable[0]; + } __attribute__ ((packed)) mesh_action; + } __attribute__ ((packed)) u; + } __attribute__ ((packed)) action; + } __attribute__ ((packed)) u; +}__attribute__ ((packed)); + +#endif + + +#ifdef PLATFORM_WINDOWS + +#pragma pack(1) + +struct ieee80211_mgmt { + u16 frame_control; + u16 duration; + u8 da[6]; + u8 sa[6]; + u8 bssid[6]; + u16 seq_ctrl; + union { + struct { + u16 auth_alg; + u16 auth_transaction; + u16 status_code; + /* possibly followed by Challenge text */ + u8 variable[0]; + } auth; + struct { + u16 reason_code; + } deauth; + struct { + u16 capab_info; + u16 listen_interval; + /* followed by SSID and Supported rates */ + u8 variable[0]; + } assoc_req; + struct { + u16 capab_info; + u16 status_code; + u16 aid; + /* followed by Supported rates */ + u8 variable[0]; + } assoc_resp, reassoc_resp; + struct { + u16 capab_info; + u16 listen_interval; + u8 current_ap[6]; + /* followed by SSID and Supported rates */ + u8 variable[0]; + } reassoc_req; + struct { + u16 reason_code; + } disassoc; +#if 0 + struct { + __le64 timestamp; + u16 beacon_int; + u16 capab_info; + /* followed by some of SSID, Supported rates, + * FH Params, DS Params, CF Params, IBSS Params, TIM */ + u8 variable[0]; + } beacon; + struct { + /* only variable items: SSID, Supported rates */ + u8 variable[0]; + } probe_req; + + struct { + __le64 timestamp; + u16 beacon_int; + u16 capab_info; + /* followed by some of SSID, Supported rates, + * FH Params, DS Params, CF Params, IBSS Params */ + u8 variable[0]; + } probe_resp; +#endif + struct { + u8 category; + union { + struct { + u8 action_code; + u8 dialog_token; + u8 status_code; + u8 variable[0]; + } wme_action; +/* + struct{ + u8 action_code; + u8 element_id; + u8 length; + struct ieee80211_channel_sw_ie sw_elem; + } chan_switch; + struct{ + u8 action_code; + u8 dialog_token; + u8 element_id; + u8 length; + struct ieee80211_msrment_ie msr_elem; + } measurement; +*/ + struct{ + u8 action_code; + u8 dialog_token; + u16 capab; + u16 timeout; + u16 start_seq_num; + } addba_req; + struct{ + u8 action_code; + u8 dialog_token; + u16 status; + u16 capab; + u16 timeout; + } addba_resp; + struct{ + u8 action_code; + u16 params; + u16 reason_code; + } delba; + struct{ + u8 action_code; + /* capab_info for open and confirm, + * reason for close + */ + u16 aux; + /* Followed in plink_confirm by status + * code, AID and supported rates, + * and directly by supported rates in + * plink_open and plink_close + */ + u8 variable[0]; + } plink_action; + struct{ + u8 action_code; + u8 variable[0]; + } mesh_action; + } u; + } action; + } u; +} ; + +#pragma pack() + +#endif + +/* mgmt header + 1 byte category code */ +#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) + + + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/if_ether.h b/drivers/net/wireless/rtl8192cu/include/if_ether.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/ioctl_cfg80211.h b/drivers/net/wireless/rtl8192cu/include/ioctl_cfg80211.h old mode 100755 new mode 100644 index 823e4a1867005a..7846927cab722e --- a/drivers/net/wireless/rtl8192cu/include/ioctl_cfg80211.h +++ b/drivers/net/wireless/rtl8192cu/include/ioctl_cfg80211.h @@ -1,81 +1,81 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __IOCTL_CFG80211_H__ -#define __IOCTL_CFG80211_H__ - -#if defined(CONFIG_IOCTL_CFG80211) && !defined(CONFIG_CFG80211) && !defined(CONFIG_CFG80211_MODULE) - #error "Can't define CONFIG_IOCTL_CFG80211 because neither CONFIG_CFG80211 nor CONFIG_CFG80211_MODULE is defined in kernel" -#endif -#if defined(CONFIG_IOCTL_CFG80211) && LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) - #error "We haven't verify our cfg80211 solution below kernel version 2.6.35" -#endif - -struct rtw_wdev_priv -{ - struct wireless_dev *rtw_wdev; - - _adapter *padapter; - - struct cfg80211_scan_request *scan_request; - _lock scan_req_lock; - - struct net_device *pmon_ndev;//for monitor interface - char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface - - u8 p2p_enabled; - - u8 provdisc_req_issued; - - bool block; - -}; - -#define wdev_to_priv(w) ((struct rtw_wdev_priv *)(wdev_priv(w))) - -#define wiphy_to_adapter(x) (_adapter *)(((struct rtw_wdev_priv*)wiphy_priv(x))->padapter) - -#define wiphy_to_wdev(x) (struct wireless_dev *)(((struct rtw_wdev_priv*)wiphy_priv(x))->rtw_wdev) - - - -int rtw_wdev_alloc(_adapter *padapter, struct device *dev); -void rtw_wdev_free(struct wireless_dev *wdev); - -void rtw_cfg80211_init_wiphy(_adapter *padapter); - -void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); - -void rtw_cfg80211_indicate_connect(_adapter *padapter); -void rtw_cfg80211_indicate_disconnect(_adapter *padapter); -void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted); - -#ifdef CONFIG_AP_MODE -void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); -#endif //CONFIG_AP_MODE - -void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); -void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); -void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); - -int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); - -#endif //__IOCTL_CFG80211_H__ - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __IOCTL_CFG80211_H__ +#define __IOCTL_CFG80211_H__ + +#if defined(CONFIG_IOCTL_CFG80211) && !defined(CONFIG_CFG80211) && !defined(CONFIG_CFG80211_MODULE) + #error "Can't define CONFIG_IOCTL_CFG80211 because neither CONFIG_CFG80211 nor CONFIG_CFG80211_MODULE is defined in kernel" +#endif +#if defined(CONFIG_IOCTL_CFG80211) && LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + #error "We haven't verify our cfg80211 solution below kernel version 2.6.35" +#endif + +struct rtw_wdev_priv +{ + struct wireless_dev *rtw_wdev; + + _adapter *padapter; + + struct cfg80211_scan_request *scan_request; + _lock scan_req_lock; + + struct net_device *pmon_ndev;//for monitor interface + char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface + + u8 p2p_enabled; + + u8 provdisc_req_issued; + + bool block; + +}; + +#define wdev_to_priv(w) ((struct rtw_wdev_priv *)(wdev_priv(w))) + +#define wiphy_to_adapter(x) (_adapter *)(((struct rtw_wdev_priv*)wiphy_priv(x))->padapter) + +#define wiphy_to_wdev(x) (struct wireless_dev *)(((struct rtw_wdev_priv*)wiphy_priv(x))->rtw_wdev) + + + +int rtw_wdev_alloc(_adapter *padapter, struct device *dev); +void rtw_wdev_free(struct wireless_dev *wdev); + +void rtw_cfg80211_init_wiphy(_adapter *padapter); + +void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); + +void rtw_cfg80211_indicate_connect(_adapter *padapter); +void rtw_cfg80211_indicate_disconnect(_adapter *padapter); +void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted); + +#ifdef CONFIG_AP_MODE +void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); +void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); +#endif //CONFIG_AP_MODE + +void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); +void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); +void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); + +int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); + +#endif //__IOCTL_CFG80211_H__ + diff --git a/drivers/net/wireless/rtl8192cu/include/ip.h b/drivers/net/wireless/rtl8192cu/include/ip.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/mlme_osdep.h b/drivers/net/wireless/rtl8192cu/include/mlme_osdep.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/mp_custom_oid.h b/drivers/net/wireless/rtl8192cu/include/mp_custom_oid.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/nic_spec.h b/drivers/net/wireless/rtl8192cu/include/nic_spec.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/osdep_ce_service.h b/drivers/net/wireless/rtl8192cu/include/osdep_ce_service.h old mode 100755 new mode 100644 index 5f7c3e65103a61..e374077fdb342c --- a/drivers/net/wireless/rtl8192cu/include/osdep_ce_service.h +++ b/drivers/net/wireless/rtl8192cu/include/osdep_ce_service.h @@ -1,171 +1,171 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#ifndef __OSDEP_CE_SERVICE_H_ -#define __OSDEP_CE_SERVICE_H_ - - -#include -#include - -#ifdef CONFIG_SDIO_HCI -#include "SDCardDDK.h" -#endif - -#ifdef CONFIG_USB_HCI -#include -#endif - -typedef HANDLE _sema; -typedef LIST_ENTRY _list; -typedef NDIS_STATUS _OS_STATUS; - -typedef NDIS_SPIN_LOCK _lock; - -typedef HANDLE _rwlock; //Mutex - -typedef u32 _irqL; - -typedef NDIS_HANDLE _nic_hdl; - - -typedef NDIS_MINIPORT_TIMER _timer; - -struct __queue { - LIST_ENTRY queue; - _lock lock; -}; - -typedef NDIS_PACKET _pkt; -typedef NDIS_BUFFER _buffer; -typedef struct __queue _queue; - -typedef HANDLE _thread_hdl_; -typedef DWORD thread_return; -typedef void* thread_context; -typedef NDIS_WORK_ITEM _workitem; - -#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; - - -#define SEMA_UPBND (0x7FFFFFFF) //8192 - -__inline static _list *get_prev(_list *list) -{ - return list->Blink; -} - -__inline static _list *get_next(_list *list) -{ - return list->Flink; -} - -__inline static _list *get_list_head(_queue *queue) -{ - return (&(queue->queue)); -} - -#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) - -__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -{ - NdisAcquireSpinLock(plock); -} - -__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -{ - NdisReleaseSpinLock(plock); -} - -__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -{ - NdisDprAcquireSpinLock(plock); -} - -__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -{ - NdisDprReleaseSpinLock(plock); -} - - -__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -{ - WaitForSingleObject(*prwlock, INFINITE ); - -} - -__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -{ - ReleaseMutex(*prwlock); -} - -__inline static void rtw_list_delete(_list *plist) -{ - RemoveEntryList(plist); - InitializeListHead(plist); -} - -__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) -{ - NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); -} - -__inline static void _set_timer(_timer *ptimer,u32 delay_time) -{ - NdisMSetTimer(ptimer,delay_time); -} - -__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -{ - NdisMCancelTimer(ptimer,bcancelled); -} - -__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -{ - - NdisInitializeWorkItem(pwork, pfunc, cntx); -} - -__inline static void _set_workitem(_workitem *pwork) -{ - NdisScheduleWorkItem(pwork); -} - -#define ATOMIC_INIT(i) { (i) } - -// -// Global Mutex: can only be used at PASSIVE level. -// - -#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ - { \ - NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ - NdisMSleep(10000); \ - } \ -} - -#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -} -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __OSDEP_CE_SERVICE_H_ +#define __OSDEP_CE_SERVICE_H_ + + +#include +#include + +#ifdef CONFIG_SDIO_HCI +#include "SDCardDDK.h" +#endif + +#ifdef CONFIG_USB_HCI +#include +#endif + +typedef HANDLE _sema; +typedef LIST_ENTRY _list; +typedef NDIS_STATUS _OS_STATUS; + +typedef NDIS_SPIN_LOCK _lock; + +typedef HANDLE _rwlock; //Mutex + +typedef u32 _irqL; + +typedef NDIS_HANDLE _nic_hdl; + + +typedef NDIS_MINIPORT_TIMER _timer; + +struct __queue { + LIST_ENTRY queue; + _lock lock; +}; + +typedef NDIS_PACKET _pkt; +typedef NDIS_BUFFER _buffer; +typedef struct __queue _queue; + +typedef HANDLE _thread_hdl_; +typedef DWORD thread_return; +typedef void* thread_context; +typedef NDIS_WORK_ITEM _workitem; + +#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; + + +#define SEMA_UPBND (0x7FFFFFFF) //8192 + +__inline static _list *get_prev(_list *list) +{ + return list->Blink; +} + +__inline static _list *get_next(_list *list) +{ + return list->Flink; +} + +__inline static _list *get_list_head(_queue *queue) +{ + return (&(queue->queue)); +} + +#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) + +__inline static void _enter_critical(_lock *plock, _irqL *pirqL) +{ + NdisAcquireSpinLock(plock); +} + +__inline static void _exit_critical(_lock *plock, _irqL *pirqL) +{ + NdisReleaseSpinLock(plock); +} + +__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) +{ + NdisDprAcquireSpinLock(plock); +} + +__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) +{ + NdisDprReleaseSpinLock(plock); +} + + +__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) +{ + WaitForSingleObject(*prwlock, INFINITE ); + +} + +__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) +{ + ReleaseMutex(*prwlock); +} + +__inline static void rtw_list_delete(_list *plist) +{ + RemoveEntryList(plist); + InitializeListHead(plist); +} + +__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) +{ + NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); +} + +__inline static void _set_timer(_timer *ptimer,u32 delay_time) +{ + NdisMSetTimer(ptimer,delay_time); +} + +__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) +{ + NdisMCancelTimer(ptimer,bcancelled); +} + +__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +{ + + NdisInitializeWorkItem(pwork, pfunc, cntx); +} + +__inline static void _set_workitem(_workitem *pwork) +{ + NdisScheduleWorkItem(pwork); +} + +#define ATOMIC_INIT(i) { (i) } + +// +// Global Mutex: can only be used at PASSIVE level. +// + +#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ + while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ + { \ + NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ + NdisMSleep(10000); \ + } \ +} + +#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ + NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +} +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/osdep_intf.h b/drivers/net/wireless/rtl8192cu/include/osdep_intf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/osdep_service.h b/drivers/net/wireless/rtl8192cu/include/osdep_service.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/pci_hal.h b/drivers/net/wireless/rtl8192cu/include/pci_hal.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/pci_ops.h b/drivers/net/wireless/rtl8192cu/include/pci_ops.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/pci_osintf.h b/drivers/net/wireless/rtl8192cu/include/pci_osintf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/recv_osdep.h b/drivers/net/wireless/rtl8192cu/include/recv_osdep.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_cmd.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_cmd.h old mode 100755 new mode 100644 index 57ecadffd2e8ed..1689c541406863 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_cmd.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_cmd.h @@ -1,153 +1,153 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTL8192C_CMD_H_ -#define __RTL8192C_CMD_H_ - - -enum cmd_msg_element_id -{ - NONE_CMDMSG_EID, - AP_OFFLOAD_EID=0, - SET_PWRMODE_EID=1, - JOINBSS_RPT_EID=2, - RSVD_PAGE_EID=3, - RSSI_4_EID = 4, - RSSI_SETTING_EID=5, - MACID_CONFIG_EID=6, - MACID_PS_MODE_EID=7, - P2P_PS_OFFLOAD_EID=8, - SELECTIVE_SUSPEND_ROF_CMD=9, - H2C_WO_WLAN_CMD = 26, // Wake on Wlan. - EXT_MACID_PERIOD_EID = 27, // support macid to 64 - MACID64_CONFIG_EID = 28, // support macid to 64 - P2P_PS_CTW_CMD_EID=32, - H2C_92C_IO_OFFLOAD=44, - KEEP_ALIVE_CONTROL_CMD=48, - DISCONNECT_DECISION_CTRL_CMD=49, - REMOTE_WAKE_CTRL_CMD=60, - H2C_92C_CMD_MAX}; - -struct cmd_msg_parm { - u8 eid; //element id - u8 sz; // sz - u8 buf[6]; -}; - -enum evt_msg_element_id -{ - EVT_DBG_EID=0, - EVT_TSF_EID=1, - EVT_AP_RPT_RSP_EID=2, - EVT_CCX_TXRPT_EID=3, - EVT_BT_RSSI_EID=4, - EVT_BT_OPMODE_EID=5, - EVT_EXT_RA_RPT_EID=6, - EVT_BT_TYPE_RPT_EID=7, - EVT_INIT_OFFLOAD_EID=8, - EVT_PSD_CONTROL_EID=9, - EVT_HW_INFO_EXCHGNGE_EID=10, - EVT_C2H_H2C_TEST_EID=11, - EVT_BT_INTO_EID=12, - EVT_BT_RPT_EID=13, - H2C_92C_EVT_MAX}; - - -typedef struct _SETPWRMODE_PARM{ - u8 Mode; - u8 SmartPS; - u8 BcnPassTime; // unit: 100ms -}SETPWRMODE_PARM, *PSETPWRMODE_PARM; - -typedef struct _SETWOWLAN_PARM{ - u8 mode; - u8 gpio_index; - u8 gpio_duration; - u8 second_mode; - u8 reserve; -}SETWOWLAN_PARM, *PSETWOWLAN_PARM; - -#define FW_WOWLAN_FUN_EN BIT(0) -#define FW_WOWLAN_PATTERN_MATCH BIT(1) -#define FW_WOWLAN_MAGIC_PKT BIT(2) -#define FW_WOWLAN_UNICAST BIT(3) -#define FW_WOWLAN_ALL_PKT_DROP BIT(4) -#define FW_WOWLAN_GPIO_ACTIVE BIT(5) -#define FW_WOWLAN_REKEY_WAKEUP BIT(6) -#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) - -#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) -#define FW_FW_PARSE_MAGIC_PKT BIT(1) - -struct H2C_SS_RFOFF_PARAM{ - u8 ROFOn; // 1: on, 0:off - u16 gpio_period; // unit: 1024 us -}__attribute__ ((packed)); - - -typedef struct JOINBSSRPT_PARM{ - u8 OpMode; // RT_MEDIA_STATUS -}JOINBSSRPT_PARM, *PJOINBSSRPT_PARM; - -typedef struct _RSVDPAGE_LOC{ - u8 LocProbeRsp; - u8 LocPsPoll; - u8 LocNullData; -}RSVDPAGE_LOC, *PRSVDPAGE_LOC; - -struct P2P_PS_Offload_t { - unsigned char Offload_En:1; - unsigned char role:1; // 1: Owner, 0: Client - unsigned char CTWindow_En:1; - unsigned char NoA0_En:1; - unsigned char NoA1_En:1; - unsigned char AllStaSleep:1; // Only valid in Owner - unsigned char discovery:1; - unsigned char rsvd:1; -}; - -struct P2P_PS_CTWPeriod_t { - unsigned char CTWPeriod; //TU -}; - -// host message to firmware cmd -void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); -void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); -u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param); -u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); -u8 rtl8192c_set_raid64_cmd(_adapter*padapter, u32 mask, u8 arg); -void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id); -u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period); -#ifdef CONFIG_P2P -void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); -#endif //CONFIG_P2P - -#ifdef CONFIG_IOL -typedef struct _IO_OFFLOAD_LOC{ - u8 LocCmd; -}IO_OFFLOAD_LOC, *PIO_OFFLOAD_LOC; -int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); -#endif //CONFIG_IOL - -#endif -#ifdef CONFIG_WOWLAN -void rtl8192c_set_wowlan_cmd(_adapter* padapter); -void SetFwRelatedForWoWLAN8192CU(_adapter* padapter,u8 bHostIsGoingtoSleep); -#endif // CONFIG_WOWLAN +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTL8192C_CMD_H_ +#define __RTL8192C_CMD_H_ + + +enum cmd_msg_element_id +{ + NONE_CMDMSG_EID, + AP_OFFLOAD_EID=0, + SET_PWRMODE_EID=1, + JOINBSS_RPT_EID=2, + RSVD_PAGE_EID=3, + RSSI_4_EID = 4, + RSSI_SETTING_EID=5, + MACID_CONFIG_EID=6, + MACID_PS_MODE_EID=7, + P2P_PS_OFFLOAD_EID=8, + SELECTIVE_SUSPEND_ROF_CMD=9, + H2C_WO_WLAN_CMD = 26, // Wake on Wlan. + EXT_MACID_PERIOD_EID = 27, // support macid to 64 + MACID64_CONFIG_EID = 28, // support macid to 64 + P2P_PS_CTW_CMD_EID=32, + H2C_92C_IO_OFFLOAD=44, + KEEP_ALIVE_CONTROL_CMD=48, + DISCONNECT_DECISION_CTRL_CMD=49, + REMOTE_WAKE_CTRL_CMD=60, + H2C_92C_CMD_MAX}; + +struct cmd_msg_parm { + u8 eid; //element id + u8 sz; // sz + u8 buf[6]; +}; + +enum evt_msg_element_id +{ + EVT_DBG_EID=0, + EVT_TSF_EID=1, + EVT_AP_RPT_RSP_EID=2, + EVT_CCX_TXRPT_EID=3, + EVT_BT_RSSI_EID=4, + EVT_BT_OPMODE_EID=5, + EVT_EXT_RA_RPT_EID=6, + EVT_BT_TYPE_RPT_EID=7, + EVT_INIT_OFFLOAD_EID=8, + EVT_PSD_CONTROL_EID=9, + EVT_HW_INFO_EXCHGNGE_EID=10, + EVT_C2H_H2C_TEST_EID=11, + EVT_BT_INTO_EID=12, + EVT_BT_RPT_EID=13, + H2C_92C_EVT_MAX}; + + +typedef struct _SETPWRMODE_PARM{ + u8 Mode; + u8 SmartPS; + u8 BcnPassTime; // unit: 100ms +}SETPWRMODE_PARM, *PSETPWRMODE_PARM; + +typedef struct _SETWOWLAN_PARM{ + u8 mode; + u8 gpio_index; + u8 gpio_duration; + u8 second_mode; + u8 reserve; +}SETWOWLAN_PARM, *PSETWOWLAN_PARM; + +#define FW_WOWLAN_FUN_EN BIT(0) +#define FW_WOWLAN_PATTERN_MATCH BIT(1) +#define FW_WOWLAN_MAGIC_PKT BIT(2) +#define FW_WOWLAN_UNICAST BIT(3) +#define FW_WOWLAN_ALL_PKT_DROP BIT(4) +#define FW_WOWLAN_GPIO_ACTIVE BIT(5) +#define FW_WOWLAN_REKEY_WAKEUP BIT(6) +#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) + +#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) +#define FW_FW_PARSE_MAGIC_PKT BIT(1) + +struct H2C_SS_RFOFF_PARAM{ + u8 ROFOn; // 1: on, 0:off + u16 gpio_period; // unit: 1024 us +}__attribute__ ((packed)); + + +typedef struct JOINBSSRPT_PARM{ + u8 OpMode; // RT_MEDIA_STATUS +}JOINBSSRPT_PARM, *PJOINBSSRPT_PARM; + +typedef struct _RSVDPAGE_LOC{ + u8 LocProbeRsp; + u8 LocPsPoll; + u8 LocNullData; +}RSVDPAGE_LOC, *PRSVDPAGE_LOC; + +struct P2P_PS_Offload_t { + unsigned char Offload_En:1; + unsigned char role:1; // 1: Owner, 0: Client + unsigned char CTWindow_En:1; + unsigned char NoA0_En:1; + unsigned char NoA1_En:1; + unsigned char AllStaSleep:1; // Only valid in Owner + unsigned char discovery:1; + unsigned char rsvd:1; +}; + +struct P2P_PS_CTWPeriod_t { + unsigned char CTWPeriod; //TU +}; + +// host message to firmware cmd +void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); +void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); +u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param); +u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); +u8 rtl8192c_set_raid64_cmd(_adapter*padapter, u32 mask, u8 arg); +void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id); +u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period); +#ifdef CONFIG_P2P +void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); +#endif //CONFIG_P2P + +#ifdef CONFIG_IOL +typedef struct _IO_OFFLOAD_LOC{ + u8 LocCmd; +}IO_OFFLOAD_LOC, *PIO_OFFLOAD_LOC; +int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); +#endif //CONFIG_IOL + +#endif +#ifdef CONFIG_WOWLAN +void rtl8192c_set_wowlan_cmd(_adapter* padapter); +void SetFwRelatedForWoWLAN8192CU(_adapter* padapter,u8 bHostIsGoingtoSleep); +#endif // CONFIG_WOWLAN diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_dm.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_dm.h old mode 100755 new mode 100644 index a13b5ff0caa8be..80b4a67ba3a1b7 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_dm.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_dm.h @@ -1,616 +1,616 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTL8192C_DM_H__ -#define __RTL8192C_DM_H__ -//============================================================ -// Description: -// -// This file is for 92CE/92CU dynamic mechanism only -// -// -//============================================================ - -#define RSSI_CCK 0 -#define RSSI_OFDM 1 -#define RSSI_DEFAULT 2 - -#define OFDM_TABLE_SIZE 37 -#define CCK_TABLE_SIZE 33 - -static u32 OFDMSwingTable[OFDM_TABLE_SIZE] = { - 0x7f8001fe, // 0, +6.0dB - 0x788001e2, // 1, +5.5dB - 0x71c001c7, // 2, +5.0dB - 0x6b8001ae, // 3, +4.5dB - 0x65400195, // 4, +4.0dB - 0x5fc0017f, // 5, +3.5dB - 0x5a400169, // 6, +3.0dB - 0x55400155, // 7, +2.5dB - 0x50800142, // 8, +2.0dB - 0x4c000130, // 9, +1.5dB - 0x47c0011f, // 10, +1.0dB - 0x43c0010f, // 11, +0.5dB - 0x40000100, // 12, +0dB - 0x3c8000f2, // 13, -0.5dB - 0x390000e4, // 14, -1.0dB - 0x35c000d7, // 15, -1.5dB - 0x32c000cb, // 16, -2.0dB - 0x300000c0, // 17, -2.5dB - 0x2d4000b5, // 18, -3.0dB - 0x2ac000ab, // 19, -3.5dB - 0x288000a2, // 20, -4.0dB - 0x26000098, // 21, -4.5dB - 0x24000090, // 22, -5.0dB - 0x22000088, // 23, -5.5dB - 0x20000080, // 24, -6.0dB - 0x1e400079, // 25, -6.5dB - 0x1c800072, // 26, -7.0dB - 0x1b00006c, // 27. -7.5dB - 0x19800066, // 28, -8.0dB - 0x18000060, // 29, -8.5dB - 0x16c0005b, // 30, -9.0dB - 0x15800056, // 31, -9.5dB - 0x14400051, // 32, -10.0dB - 0x1300004c, // 33, -10.5dB - 0x12000048, // 34, -11.0dB - 0x11000044, // 35, -11.5dB - 0x10000040, // 36, -12.0dB -}; - -static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { -{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB -{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB -{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB -{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB -{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB -{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB -{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB -{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB -{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB -{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB -{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB -{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB -{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB -{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB -{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB -{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB -{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB -{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB -{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB -{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB -{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB -{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB -{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB -{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB -{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB -{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB -{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB -{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB -{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB -{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB -{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB -{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB -{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB -}; - -static u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { -{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB -{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB -{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB -{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB -{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB -{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB -{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB -{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB -{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB -{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB -{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB -{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB -{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB -{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB -{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB -{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB -{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB -{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB -{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB -{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB -{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB -{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB -{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB -{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB -{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB -{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB -{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB -{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB -{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB -{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB -{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB -{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB -{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB -}; - -//============================================================ -// structure and define -//============================================================ - -typedef struct _FALSE_ALARM_STATISTICS{ - u32 Cnt_Parity_Fail; - u32 Cnt_Rate_Illegal; - u32 Cnt_Crc8_fail; - u32 Cnt_Mcs_fail; - u32 Cnt_Ofdm_fail; - u32 Cnt_Cck_fail; - u32 Cnt_all; - u32 Cnt_Fast_Fsync; - u32 Cnt_SB_Search_fail; -}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; - -typedef struct _Dynamic_Power_Saving_ -{ - u8 PreCCAState; - u8 CurCCAState; - - u8 PreRFState; - u8 CurRFState; - - s32 Rssi_val_min; - -}PS_T; - -typedef struct _Dynamic_Initial_Gain_Threshold_ -{ - u8 Dig_Enable_Flag; - u8 Dig_Ext_Port_Stage; - - int RssiLowThresh; - int RssiHighThresh; - - u32 FALowThresh; - u32 FAHighThresh; - - u8 CurSTAConnectState; - u8 PreSTAConnectState; - u8 CurMultiSTAConnectState; - - u8 PreIGValue; - u8 CurIGValue; - u8 BackupIGValue; - - char BackoffVal; - char BackoffVal_range_max; - char BackoffVal_range_min; - u8 rx_gain_range_max; - u8 rx_gain_range_min; - u8 Rssi_val_min; - - u8 PreCCKPDState; - u8 CurCCKPDState; - u8 PreCCKFAState; - u8 CurCCKFAState; - u8 PreCCAState; - u8 CurCCAState; - - u8 LargeFAHit; - u8 ForbiddenIGI; - u32 Recover_cnt; - -}DIG_T; - -typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition -{ - DIG_TYPE_THRESH_HIGH = 0, - DIG_TYPE_THRESH_LOW = 1, - DIG_TYPE_BACKOFF = 2, - DIG_TYPE_RX_GAIN_MIN = 3, - DIG_TYPE_RX_GAIN_MAX = 4, - DIG_TYPE_ENABLE = 5, - DIG_TYPE_DISABLE = 6, - DIG_OP_TYPE_MAX -}DM_DIG_OP_E; - -typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition -{ - CCK_PD_STAGE_LowRssi = 0, - CCK_PD_STAGE_HighRssi = 1, - CCK_PD_STAGE_MAX = 3, -}DM_CCK_PDTH_E; - -typedef enum tag_1R_CCA_Type_Definition -{ - CCA_1R =0, - CCA_2R = 1, - CCA_MAX = 2, -}DM_1R_CCA_E; - -typedef enum tag_RF_Type_Definition -{ - RF_Save =0, - RF_Normal = 1, - RF_MAX = 2, -}DM_RF_E; - -typedef enum tag_DIG_EXT_PORT_ALGO_Definition -{ - DIG_EXT_PORT_STAGE_0 = 0, - DIG_EXT_PORT_STAGE_1 = 1, - DIG_EXT_PORT_STAGE_2 = 2, - DIG_EXT_PORT_STAGE_3 = 3, - DIG_EXT_PORT_STAGE_MAX = 4, -}DM_DIG_EXT_PORT_ALG_E; - - -typedef enum tag_DIG_Connect_Definition -{ - DIG_STA_DISCONNECT = 0, - DIG_STA_CONNECT = 1, - DIG_STA_BEFORE_CONNECT = 2, - DIG_MultiSTA_DISCONNECT = 3, - DIG_MultiSTA_CONNECT = 4, - DIG_CONNECT_MAX -}DM_DIG_CONNECT_E; - - - -typedef enum _BT_Ant_NUM{ - Ant_x2 = 0, - Ant_x1 = 1 -} BT_Ant_NUM, *PBT_Ant_NUM; - -typedef enum _BT_CoType{ - BT_2Wire = 0, - BT_ISSC_3Wire = 1, - BT_Accel = 2, - BT_CSR_BC4 = 3, - BT_CSR_BC8 = 4, - BT_RTL8756 = 5, -} BT_CoType, *PBT_CoType; - -typedef enum _BT_CurState{ - BT_OFF = 0, - BT_ON = 1, -} BT_CurState, *PBT_CurState; - -typedef enum _BT_ServiceType{ - BT_SCO = 0, - BT_A2DP = 1, - BT_HID = 2, - BT_HID_Idle = 3, - BT_Scan = 4, - BT_Idle = 5, - BT_OtherAction = 6, - BT_Busy = 7, - BT_OtherBusy = 8, - BT_PAN = 9, -} BT_ServiceType, *PBT_ServiceType; - -typedef enum _BT_RadioShared{ - BT_Radio_Shared = 0, - BT_Radio_Individual = 1, -} BT_RadioShared, *PBT_RadioShared; - -struct btcoexist_priv { - u8 BT_Coexist; - u8 BT_Ant_Num; - u8 BT_CoexistType; - u8 BT_State; - u8 BT_CUR_State; //0:on, 1:off - u8 BT_Ant_isolation; //0:good, 1:bad - u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic - u8 BT_Service; - u8 BT_Ampdu; // 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. - u8 BT_RadioSharedType; - u32 Ratio_Tx; - u32 Ratio_PRI; - u8 BtRfRegOrigin1E; - u8 BtRfRegOrigin1F; - u8 BtRssiState; - u32 BtEdcaUL; - u32 BtEdcaDL; - u32 BT_EDCA[2]; - u8 bCOBT; - - u8 bInitSet; - u8 bBTBusyTraffic; - u8 bBTTrafficModeSet; - u8 bBTNonTrafficModeSet; - //BTTraffic BT21TrafficStatistics; - u32 CurrentState; - u32 PreviousState; - u8 BtPreRssiState; - u8 bFWCoexistAllOff; - u8 bSWCoexistAllOff; -}; - -#define BW_AUTO_SWITCH_HIGH_LOW 25 -#define BW_AUTO_SWITCH_LOW_HIGH 30 - -#define DM_DIG_THRESH_HIGH 40 -#define DM_DIG_THRESH_LOW 35 - -#define DM_FALSEALARM_THRESH_LOW 400 -#define DM_FALSEALARM_THRESH_HIGH 1000 - -#define DM_DIG_MAX 0x3e -#define DM_DIG_MIN 0x1e //0x22//0x1c - -#define DM_DIG_FA_UPPER 0x32 -#define DM_DIG_FA_LOWER 0x20 -#define DM_DIG_FA_TH0 0x20 -#define DM_DIG_FA_TH1 0x100 -#define DM_DIG_FA_TH2 0x200 - -#define DM_DIG_BACKOFF_MAX 12 -#define DM_DIG_BACKOFF_MIN (-4) -#define DM_DIG_BACKOFF_DEFAULT 10 - -#define RxPathSelection_SS_TH_low 30 -#define RxPathSelection_diff_TH 18 - -#define DM_RATR_STA_INIT 0 -#define DM_RATR_STA_HIGH 1 -#define DM_RATR_STA_MIDDLE 2 -#define DM_RATR_STA_LOW 3 - -#define CTSToSelfTHVal 30 -#define RegC38_TH 20 - -#define WAIotTHVal 25 - -//Dynamic Tx Power Control Threshold -#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 - -#define TxHighPwrLevel_Normal 0 -#define TxHighPwrLevel_Level1 1 -#define TxHighPwrLevel_Level2 2 -#define TxHighPwrLevel_BT1 3 -#define TxHighPwrLevel_BT2 4 +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTL8192C_DM_H__ +#define __RTL8192C_DM_H__ +//============================================================ +// Description: +// +// This file is for 92CE/92CU dynamic mechanism only +// +// +//============================================================ + +#define RSSI_CCK 0 +#define RSSI_OFDM 1 +#define RSSI_DEFAULT 2 + +#define OFDM_TABLE_SIZE 37 +#define CCK_TABLE_SIZE 33 + +static u32 OFDMSwingTable[OFDM_TABLE_SIZE] = { + 0x7f8001fe, // 0, +6.0dB + 0x788001e2, // 1, +5.5dB + 0x71c001c7, // 2, +5.0dB + 0x6b8001ae, // 3, +4.5dB + 0x65400195, // 4, +4.0dB + 0x5fc0017f, // 5, +3.5dB + 0x5a400169, // 6, +3.0dB + 0x55400155, // 7, +2.5dB + 0x50800142, // 8, +2.0dB + 0x4c000130, // 9, +1.5dB + 0x47c0011f, // 10, +1.0dB + 0x43c0010f, // 11, +0.5dB + 0x40000100, // 12, +0dB + 0x3c8000f2, // 13, -0.5dB + 0x390000e4, // 14, -1.0dB + 0x35c000d7, // 15, -1.5dB + 0x32c000cb, // 16, -2.0dB + 0x300000c0, // 17, -2.5dB + 0x2d4000b5, // 18, -3.0dB + 0x2ac000ab, // 19, -3.5dB + 0x288000a2, // 20, -4.0dB + 0x26000098, // 21, -4.5dB + 0x24000090, // 22, -5.0dB + 0x22000088, // 23, -5.5dB + 0x20000080, // 24, -6.0dB + 0x1e400079, // 25, -6.5dB + 0x1c800072, // 26, -7.0dB + 0x1b00006c, // 27. -7.5dB + 0x19800066, // 28, -8.0dB + 0x18000060, // 29, -8.5dB + 0x16c0005b, // 30, -9.0dB + 0x15800056, // 31, -9.5dB + 0x14400051, // 32, -10.0dB + 0x1300004c, // 33, -10.5dB + 0x12000048, // 34, -11.0dB + 0x11000044, // 35, -11.5dB + 0x10000040, // 36, -12.0dB +}; + +static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { +{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB +{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB +{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB +{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB +{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB +{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB +{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB +{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB +{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB +{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB +{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB +{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB +{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB +{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB +{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB +{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB +{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB +{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB +{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB +{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB +{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB +{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB +{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB +{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB +{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB +{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB +{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB +{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB +{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB +{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB +{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB +{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB +{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB +}; + +static u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { +{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB +{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB +{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB +{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB +{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB +{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB +{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB +{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB +{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB +{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB +{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB +{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB +{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB +{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB +{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB +{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB +{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB +{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB +{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB +{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB +{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB +{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB +{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB +{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB +{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB +{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB +{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB +{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB +{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB +{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB +{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB +{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB +{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB +}; + +//============================================================ +// structure and define +//============================================================ + +typedef struct _FALSE_ALARM_STATISTICS{ + u32 Cnt_Parity_Fail; + u32 Cnt_Rate_Illegal; + u32 Cnt_Crc8_fail; + u32 Cnt_Mcs_fail; + u32 Cnt_Ofdm_fail; + u32 Cnt_Cck_fail; + u32 Cnt_all; + u32 Cnt_Fast_Fsync; + u32 Cnt_SB_Search_fail; +}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; + +typedef struct _Dynamic_Power_Saving_ +{ + u8 PreCCAState; + u8 CurCCAState; + + u8 PreRFState; + u8 CurRFState; + + s32 Rssi_val_min; + +}PS_T; + +typedef struct _Dynamic_Initial_Gain_Threshold_ +{ + u8 Dig_Enable_Flag; + u8 Dig_Ext_Port_Stage; + + int RssiLowThresh; + int RssiHighThresh; + + u32 FALowThresh; + u32 FAHighThresh; + + u8 CurSTAConnectState; + u8 PreSTAConnectState; + u8 CurMultiSTAConnectState; + + u8 PreIGValue; + u8 CurIGValue; + u8 BackupIGValue; + + char BackoffVal; + char BackoffVal_range_max; + char BackoffVal_range_min; + u8 rx_gain_range_max; + u8 rx_gain_range_min; + u8 Rssi_val_min; + + u8 PreCCKPDState; + u8 CurCCKPDState; + u8 PreCCKFAState; + u8 CurCCKFAState; + u8 PreCCAState; + u8 CurCCAState; + + u8 LargeFAHit; + u8 ForbiddenIGI; + u32 Recover_cnt; + +}DIG_T; + +typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition +{ + DIG_TYPE_THRESH_HIGH = 0, + DIG_TYPE_THRESH_LOW = 1, + DIG_TYPE_BACKOFF = 2, + DIG_TYPE_RX_GAIN_MIN = 3, + DIG_TYPE_RX_GAIN_MAX = 4, + DIG_TYPE_ENABLE = 5, + DIG_TYPE_DISABLE = 6, + DIG_OP_TYPE_MAX +}DM_DIG_OP_E; + +typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition +{ + CCK_PD_STAGE_LowRssi = 0, + CCK_PD_STAGE_HighRssi = 1, + CCK_PD_STAGE_MAX = 3, +}DM_CCK_PDTH_E; + +typedef enum tag_1R_CCA_Type_Definition +{ + CCA_1R =0, + CCA_2R = 1, + CCA_MAX = 2, +}DM_1R_CCA_E; + +typedef enum tag_RF_Type_Definition +{ + RF_Save =0, + RF_Normal = 1, + RF_MAX = 2, +}DM_RF_E; + +typedef enum tag_DIG_EXT_PORT_ALGO_Definition +{ + DIG_EXT_PORT_STAGE_0 = 0, + DIG_EXT_PORT_STAGE_1 = 1, + DIG_EXT_PORT_STAGE_2 = 2, + DIG_EXT_PORT_STAGE_3 = 3, + DIG_EXT_PORT_STAGE_MAX = 4, +}DM_DIG_EXT_PORT_ALG_E; + + +typedef enum tag_DIG_Connect_Definition +{ + DIG_STA_DISCONNECT = 0, + DIG_STA_CONNECT = 1, + DIG_STA_BEFORE_CONNECT = 2, + DIG_MultiSTA_DISCONNECT = 3, + DIG_MultiSTA_CONNECT = 4, + DIG_CONNECT_MAX +}DM_DIG_CONNECT_E; + + + +typedef enum _BT_Ant_NUM{ + Ant_x2 = 0, + Ant_x1 = 1 +} BT_Ant_NUM, *PBT_Ant_NUM; + +typedef enum _BT_CoType{ + BT_2Wire = 0, + BT_ISSC_3Wire = 1, + BT_Accel = 2, + BT_CSR_BC4 = 3, + BT_CSR_BC8 = 4, + BT_RTL8756 = 5, +} BT_CoType, *PBT_CoType; + +typedef enum _BT_CurState{ + BT_OFF = 0, + BT_ON = 1, +} BT_CurState, *PBT_CurState; + +typedef enum _BT_ServiceType{ + BT_SCO = 0, + BT_A2DP = 1, + BT_HID = 2, + BT_HID_Idle = 3, + BT_Scan = 4, + BT_Idle = 5, + BT_OtherAction = 6, + BT_Busy = 7, + BT_OtherBusy = 8, + BT_PAN = 9, +} BT_ServiceType, *PBT_ServiceType; + +typedef enum _BT_RadioShared{ + BT_Radio_Shared = 0, + BT_Radio_Individual = 1, +} BT_RadioShared, *PBT_RadioShared; + +struct btcoexist_priv { + u8 BT_Coexist; + u8 BT_Ant_Num; + u8 BT_CoexistType; + u8 BT_State; + u8 BT_CUR_State; //0:on, 1:off + u8 BT_Ant_isolation; //0:good, 1:bad + u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic + u8 BT_Service; + u8 BT_Ampdu; // 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. + u8 BT_RadioSharedType; + u32 Ratio_Tx; + u32 Ratio_PRI; + u8 BtRfRegOrigin1E; + u8 BtRfRegOrigin1F; + u8 BtRssiState; + u32 BtEdcaUL; + u32 BtEdcaDL; + u32 BT_EDCA[2]; + u8 bCOBT; + + u8 bInitSet; + u8 bBTBusyTraffic; + u8 bBTTrafficModeSet; + u8 bBTNonTrafficModeSet; + //BTTraffic BT21TrafficStatistics; + u32 CurrentState; + u32 PreviousState; + u8 BtPreRssiState; + u8 bFWCoexistAllOff; + u8 bSWCoexistAllOff; +}; + +#define BW_AUTO_SWITCH_HIGH_LOW 25 +#define BW_AUTO_SWITCH_LOW_HIGH 30 + +#define DM_DIG_THRESH_HIGH 40 +#define DM_DIG_THRESH_LOW 35 + +#define DM_FALSEALARM_THRESH_LOW 400 +#define DM_FALSEALARM_THRESH_HIGH 1000 + +#define DM_DIG_MAX 0x3e +#define DM_DIG_MIN 0x1e //0x22//0x1c + +#define DM_DIG_FA_UPPER 0x32 +#define DM_DIG_FA_LOWER 0x20 +#define DM_DIG_FA_TH0 0x20 +#define DM_DIG_FA_TH1 0x100 +#define DM_DIG_FA_TH2 0x200 + +#define DM_DIG_BACKOFF_MAX 12 +#define DM_DIG_BACKOFF_MIN (-4) +#define DM_DIG_BACKOFF_DEFAULT 10 + +#define RxPathSelection_SS_TH_low 30 +#define RxPathSelection_diff_TH 18 + +#define DM_RATR_STA_INIT 0 +#define DM_RATR_STA_HIGH 1 +#define DM_RATR_STA_MIDDLE 2 +#define DM_RATR_STA_LOW 3 + +#define CTSToSelfTHVal 30 +#define RegC38_TH 20 + +#define WAIotTHVal 25 + +//Dynamic Tx Power Control Threshold +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 + +#define TxHighPwrLevel_Normal 0 +#define TxHighPwrLevel_Level1 1 +#define TxHighPwrLevel_Level2 2 +#define TxHighPwrLevel_BT1 3 +#define TxHighPwrLevel_BT2 4 #define TxHighPwrLevel_15 5 #define TxHighPwrLevel_35 6 #define TxHighPwrLevel_50 7 #define TxHighPwrLevel_70 8 #define TxHighPwrLevel_100 9 - -#define DM_Type_ByFW 0 -#define DM_Type_ByDriver 1 - - -typedef struct _RATE_ADAPTIVE -{ - u8 RateAdaptiveDisabled; - u8 RATRState; - u16 reserve; - - u32 HighRSSIThreshForRA; - u32 High2LowRSSIThreshForRA; - u8 Low2HighRSSIThreshForRA40M; - u32 LowRSSIThreshForRA40M; - u8 Low2HighRSSIThreshForRA20M; - u32 LowRSSIThreshForRA20M; - u32 UpperRSSIThresholdRATR; - u32 MiddleRSSIThresholdRATR; - u32 LowRSSIThresholdRATR; - u32 LowRSSIThresholdRATR40M; - u32 LowRSSIThresholdRATR20M; - u8 PingRSSIEnable; //cosa add for Netcore long range ping issue - u32 PingRSSIRATR; //cosa add for Netcore long range ping issue - u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue - u32 LastRATR; - u8 PreRATRState; - -} RATE_ADAPTIVE, *PRATE_ADAPTIVE; - -typedef enum tag_SW_Antenna_Switch_Definition -{ - Antenna_B = 1, - Antenna_A = 2, - Antenna_MAX = 3, -}DM_SWAS_E; - -#ifdef CONFIG_ANTENNA_DIVERSITY -// This indicates two different the steps. -// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. -// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK -// with original RSSI to determine if it is necessary to switch antenna. -#define SWAW_STEP_PEAK 0 -#define SWAW_STEP_DETERMINE 1 - -#define TP_MODE 0 -#define RSSI_MODE 1 -#define TRAFFIC_LOW 0 -#define TRAFFIC_HIGH 1 - -typedef struct _SW_Antenna_Switch_ -{ - u8 try_flag; - s32 PreRSSI; - u8 CurAntenna; - u8 PreAntenna; - u8 RSSI_Trying; - u8 TestMode; - u8 bTriggerAntennaSwitch; - u8 SelectAntennaMap; - // Before link Antenna Switch check - u8 SWAS_NoLink_State; - -}SWAT_T; - - -#endif - - -struct dm_priv -{ - u8 DM_Type; - u8 DMFlag, DMFlag_tmp; - - - //for DIG - u8 bDMInitialGainEnable; - u8 binitialized; // for dm_initial_gain_Multi_STA use. - DIG_T DM_DigTable; - - PS_T DM_PSTable; - - FALSE_ALARM_STATISTICS FalseAlmCnt; - - //for rate adaptive, in fact, 88c/92c fw will handle this - u8 bUseRAMask; - RATE_ADAPTIVE RateAdaptive; - - //* Upper and Lower Signal threshold for Rate Adaptive*/ - int UndecoratedSmoothedPWDB; - int UndecoratedSmoothedCCK; - int EntryMinUndecoratedSmoothedPWDB; - int EntryMaxUndecoratedSmoothedPWDB; - - - //for High Power - u8 bDynamicTxPowerEnable; - u8 LastDTPLvl; - u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 - - //for tx power tracking - //u8 bTXPowerTracking; - u8 TXPowercount; - u8 bTXPowerTrackingInit; - u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default - u8 TM_Trigger; - - u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 - u8 ThermalValue; - u8 ThermalValue_LCK; - u8 ThermalValue_IQK; - u8 ThermalValue_DPK; - - u8 bRfPiEnable; - - //for APK - u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a - u8 bAPKdone; - u8 bAPKThermalMeterIgnore; - u8 bDPdone; - u8 bDPPathAOK; - u8 bDPPathBOK; - - //for IQK - u32 RegC04; - u32 Reg874; - u32 RegC08; - u32 RegB68; - u32 RegB6C; - u32 Reg870; - u32 Reg860; - u32 Reg864; - u32 ADDA_backup[IQK_ADDA_REG_NUM]; - u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; - u32 IQK_BB_backup_recover[9]; - u32 IQK_BB_backup[IQK_BB_REG_NUM]; - u8 PowerIndex_backup[6]; - - u8 bCCKinCH14; - - char CCK_index; - char OFDM_index[2]; - - BOOLEAN bDoneTxpower; - char CCK_index_HP; - char OFDM_index_HP[2]; - u8 ThermalValue_HP[HP_THERMAL_NUM]; - u8 ThermalValue_HP_index; - - //for TxPwrTracking - int RegE94; - int RegE9C; - int RegEB4; - int RegEBC; - - u32 TXPowerTrackingCallbackCnt; //cosa add for debug - - u32 prv_traffic_idx; // edca turbo - - // for dm_RF_Saving - u8 initialize; - u32 rf_saving_Reg874; - u32 rf_saving_RegC70; - u32 rf_saving_Reg85C; - u32 rf_saving_RegA74; - - //for Antenna diversity -#ifdef CONFIG_ANTENNA_DIVERSITY - SWAT_T DM_SWAT_Table; -#endif -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - _timer SwAntennaSwitchTimer; - - u64 lastTxOkCnt; - u64 lastRxOkCnt; - u64 TXByteCnt_A; - u64 TXByteCnt_B; - u64 RXByteCnt_A; - u64 RXByteCnt_B; - u8 DoubleComfirm; - u8 TrafficLoad; -#endif - - s32 OFDM_Pkt_Cnt; - u8 RSSI_Select; - u8 DIG_Dynamic_MIN ; - - // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas - u8 INIDATA_RATE[32]; -}; - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ -//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} - - -//============================================================ -// function prototype -//============================================================ -void rtl8192c_init_dm_priv(IN PADAPTER Adapter); -void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8192c_InitHalDm(IN PADAPTER Adapter); -void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter); - -VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); - -void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); - -#ifdef CONFIG_BT_COEXIST -void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart); -void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir); -#endif - -#ifdef CONFIG_SW_ANTENNA_DIVERSITY -void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll); -void SwAntDivRestAfterLink8192C(IN PADAPTER Adapter); -#endif -#ifdef CONFIG_ANTENNA_DIVERSITY -void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); -u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter); -#endif - -#endif //__HAL8190PCIDM_H__ - + +#define DM_Type_ByFW 0 +#define DM_Type_ByDriver 1 + + +typedef struct _RATE_ADAPTIVE +{ + u8 RateAdaptiveDisabled; + u8 RATRState; + u16 reserve; + + u32 HighRSSIThreshForRA; + u32 High2LowRSSIThreshForRA; + u8 Low2HighRSSIThreshForRA40M; + u32 LowRSSIThreshForRA40M; + u8 Low2HighRSSIThreshForRA20M; + u32 LowRSSIThreshForRA20M; + u32 UpperRSSIThresholdRATR; + u32 MiddleRSSIThresholdRATR; + u32 LowRSSIThresholdRATR; + u32 LowRSSIThresholdRATR40M; + u32 LowRSSIThresholdRATR20M; + u8 PingRSSIEnable; //cosa add for Netcore long range ping issue + u32 PingRSSIRATR; //cosa add for Netcore long range ping issue + u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue + u32 LastRATR; + u8 PreRATRState; + +} RATE_ADAPTIVE, *PRATE_ADAPTIVE; + +typedef enum tag_SW_Antenna_Switch_Definition +{ + Antenna_B = 1, + Antenna_A = 2, + Antenna_MAX = 3, +}DM_SWAS_E; + +#ifdef CONFIG_ANTENNA_DIVERSITY +// This indicates two different the steps. +// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. +// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK +// with original RSSI to determine if it is necessary to switch antenna. +#define SWAW_STEP_PEAK 0 +#define SWAW_STEP_DETERMINE 1 + +#define TP_MODE 0 +#define RSSI_MODE 1 +#define TRAFFIC_LOW 0 +#define TRAFFIC_HIGH 1 + +typedef struct _SW_Antenna_Switch_ +{ + u8 try_flag; + s32 PreRSSI; + u8 CurAntenna; + u8 PreAntenna; + u8 RSSI_Trying; + u8 TestMode; + u8 bTriggerAntennaSwitch; + u8 SelectAntennaMap; + // Before link Antenna Switch check + u8 SWAS_NoLink_State; + +}SWAT_T; + + +#endif + + +struct dm_priv +{ + u8 DM_Type; + u8 DMFlag, DMFlag_tmp; + + + //for DIG + u8 bDMInitialGainEnable; + u8 binitialized; // for dm_initial_gain_Multi_STA use. + DIG_T DM_DigTable; + + PS_T DM_PSTable; + + FALSE_ALARM_STATISTICS FalseAlmCnt; + + //for rate adaptive, in fact, 88c/92c fw will handle this + u8 bUseRAMask; + RATE_ADAPTIVE RateAdaptive; + + //* Upper and Lower Signal threshold for Rate Adaptive*/ + int UndecoratedSmoothedPWDB; + int UndecoratedSmoothedCCK; + int EntryMinUndecoratedSmoothedPWDB; + int EntryMaxUndecoratedSmoothedPWDB; + + + //for High Power + u8 bDynamicTxPowerEnable; + u8 LastDTPLvl; + u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 + + //for tx power tracking + //u8 bTXPowerTracking; + u8 TXPowercount; + u8 bTXPowerTrackingInit; + u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default + u8 TM_Trigger; + + u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 + u8 ThermalValue; + u8 ThermalValue_LCK; + u8 ThermalValue_IQK; + u8 ThermalValue_DPK; + + u8 bRfPiEnable; + + //for APK + u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a + u8 bAPKdone; + u8 bAPKThermalMeterIgnore; + u8 bDPdone; + u8 bDPPathAOK; + u8 bDPPathBOK; + + //for IQK + u32 RegC04; + u32 Reg874; + u32 RegC08; + u32 RegB68; + u32 RegB6C; + u32 Reg870; + u32 Reg860; + u32 Reg864; + u32 ADDA_backup[IQK_ADDA_REG_NUM]; + u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; + u32 IQK_BB_backup_recover[9]; + u32 IQK_BB_backup[IQK_BB_REG_NUM]; + u8 PowerIndex_backup[6]; + + u8 bCCKinCH14; + + char CCK_index; + char OFDM_index[2]; + + BOOLEAN bDoneTxpower; + char CCK_index_HP; + char OFDM_index_HP[2]; + u8 ThermalValue_HP[HP_THERMAL_NUM]; + u8 ThermalValue_HP_index; + + //for TxPwrTracking + int RegE94; + int RegE9C; + int RegEB4; + int RegEBC; + + u32 TXPowerTrackingCallbackCnt; //cosa add for debug + + u32 prv_traffic_idx; // edca turbo + + // for dm_RF_Saving + u8 initialize; + u32 rf_saving_Reg874; + u32 rf_saving_RegC70; + u32 rf_saving_Reg85C; + u32 rf_saving_RegA74; + + //for Antenna diversity +#ifdef CONFIG_ANTENNA_DIVERSITY + SWAT_T DM_SWAT_Table; +#endif +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + _timer SwAntennaSwitchTimer; + + u64 lastTxOkCnt; + u64 lastRxOkCnt; + u64 TXByteCnt_A; + u64 TXByteCnt_B; + u64 RXByteCnt_A; + u64 RXByteCnt_B; + u8 DoubleComfirm; + u8 TrafficLoad; +#endif + + s32 OFDM_Pkt_Cnt; + u8 RSSI_Select; + u8 DIG_Dynamic_MIN ; + + // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas + u8 INIDATA_RATE[32]; +}; + + +/*------------------------Export global variable----------------------------*/ +/*------------------------Export global variable----------------------------*/ +/*------------------------Export Marco Definition---------------------------*/ +//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} + + +//============================================================ +// function prototype +//============================================================ +void rtl8192c_init_dm_priv(IN PADAPTER Adapter); +void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter); +void rtl8192c_InitHalDm(IN PADAPTER Adapter); +void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter); + +VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); + +void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); + +#ifdef CONFIG_BT_COEXIST +void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart); +void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir); +#endif + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY +void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll); +void SwAntDivRestAfterLink8192C(IN PADAPTER Adapter); +#endif +#ifdef CONFIG_ANTENNA_DIVERSITY +void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); +u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter); +#endif + +#endif //__HAL8190PCIDM_H__ + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_event.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_event.h old mode 100755 new mode 100644 index a43f99f2d2a954..131b6588504298 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_event.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_event.h @@ -1,29 +1,29 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef _RTL8192C_EVENT_H_ -#define _RTL8192C_EVENT_H_ - - - - -#endif - - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef _RTL8192C_EVENT_H_ +#define _RTL8192C_EVENT_H_ + + + + +#endif + + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_hal.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_hal.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_led.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_led.h old mode 100755 new mode 100644 index 4ddd9c855d58c5..b361ba524c69f4 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_led.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_led.h @@ -1,43 +1,43 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTL8192C_LED_H_ -#define __RTL8192C_LED_H_ - -#include -#include -#include - - -//================================================================================ -// Interface to manipulate LED objects. -//================================================================================ -#ifdef CONFIG_USB_HCI -void rtl8192cu_InitSwLeds(_adapter *padapter); -void rtl8192cu_DeInitSwLeds(_adapter *padapter); -#endif -#ifdef CONFIG_PCI_HCI -void rtl8192ce_gen_RefreshLedState(PADAPTER Adapter); -void rtl8192ce_InitSwLeds(_adapter *padapter); -void rtl8192ce_DeInitSwLeds(_adapter *padapter); -#endif - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTL8192C_LED_H_ +#define __RTL8192C_LED_H_ + +#include +#include +#include + + +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ +#ifdef CONFIG_USB_HCI +void rtl8192cu_InitSwLeds(_adapter *padapter); +void rtl8192cu_DeInitSwLeds(_adapter *padapter); +#endif +#ifdef CONFIG_PCI_HCI +void rtl8192ce_gen_RefreshLedState(PADAPTER Adapter); +void rtl8192ce_InitSwLeds(_adapter *padapter); +void rtl8192ce_DeInitSwLeds(_adapter *padapter); +#endif + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_recv.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_recv.h old mode 100755 new mode 100644 index 70a6d104dd055e..b532a59427dbcb --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_recv.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_recv.h @@ -1,180 +1,183 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef _RTL8192C_RECV_H_ -#define _RTL8192C_RECV_H_ - -#include -#include -#include - - -#ifdef PLATFORM_OS_XP - #define NR_RECVBUFF (16) -#elif defined(PLATFORM_OS_CE) - #define NR_RECVBUFF (4) -#else - - #define NR_RECVBUFF (4) - - #define NR_PREALLOC_RECV_SKB (8) -#endif - - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - -#ifdef PLATFORM_OS_CE -#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -#else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - //#define MAX_RECVBUF_SZ (32768) // 32k - //#define MAX_RECVBUF_SZ (16384) //16K - //#define MAX_RECVBUF_SZ (10240) //10K - #define MAX_RECVBUF_SZ (15360) // 15k < 16k - //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k - #else - #define MAX_RECVBUF_SZ (4000) // about 4K - #endif -#endif - -#elif defined(CONFIG_PCI_HCI) -#ifndef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (9100) -#else - #define MAX_RECVBUF_SZ (4000) // about 4K -#endif - -#define RX_MPDU_QUEUE 0 -#define RX_CMD_QUEUE 1 -#define RX_MAX_QUEUE 2 -#endif - - -#define RECV_BULK_IN_ADDR 0x80 -#define RECV_INT_IN_ADDR 0x81 - -#define PHY_RSSI_SLID_WIN_MAX 100 -#define PHY_LINKQUALITY_SLID_WIN_MAX 20 - - -struct phy_stat -{ - unsigned int phydw0; - - unsigned int phydw1; - - unsigned int phydw2; - - unsigned int phydw3; - - unsigned int phydw4; - - unsigned int phydw5; - - unsigned int phydw6; - - unsigned int phydw7; -}; - -typedef struct _Phy_OFDM_Rx_Status_Report_8192cd -{ - unsigned char trsw_gain_X[4]; - unsigned char pwdb_all; - unsigned char cfosho_X[4]; - unsigned char cfotail_X[4]; - unsigned char rxevm_X[2]; - unsigned char rxsnr_X[4]; - unsigned char pdsnr_X[2]; - unsigned char csi_current_X[2]; - unsigned char csi_target_X[2]; - unsigned char sigevm; - unsigned char max_ex_pwr; -//#ifdef RTL8192SE -#ifdef CONFIG_LITTLE_ENDIAN - unsigned char ex_intf_flg:1; - unsigned char sgi_en:1; - unsigned char rxsc:2; - //unsigned char rsvd:4; - unsigned char idle_long:1; - unsigned char r_ant_train_en:1; - unsigned char ANTSELB:1; - unsigned char ANTSEL:1; -#else // _BIG_ENDIAN_ - //unsigned char rsvd:4; - unsigned char ANTSEL:1; - unsigned char ANTSELB:1; - unsigned char r_ant_train_en:1; - unsigned char idle_long:1; - unsigned char rxsc:2; - unsigned char sgi_en:1; - unsigned char ex_intf_flg:1; -#endif -//#else // RTL8190, RTL8192E -// unsigned char sgi_en; -// unsigned char rxsc_sgien_exflg; -//#endif -} __attribute__ ((packed))PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; - -typedef struct _Phy_CCK_Rx_Status_Report_8192cd -{ - /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend - 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ - u8 adc_pwdb_X[4]; - u8 SQ_rpt; - u8 cck_agc_rpt; -} PHY_STS_CCK_8192CD_T; - - -// Rx smooth factor -#define Rx_Smooth_Factor (20) - - -#ifdef CONFIG_USB_HCI -typedef struct _INTERRUPT_MSG_FORMAT_EX{ - unsigned int C2H_MSG0; - unsigned int C2H_MSG1; - unsigned int C2H_MSG2; - unsigned int C2H_MSG3; - unsigned int HISR; // from HISR Reg0x124, read to clear - unsigned int HISRE;// from HISRE Reg0x12c, read to clear - unsigned int MSG_EX; -}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; - -void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -int rtl8192cu_init_recv_priv(_adapter * padapter); -void rtl8192cu_free_recv_priv(_adapter * padapter); -void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat); -#endif - -#ifdef CONFIG_PCI_HCI -int rtl8192ce_init_recv_priv(_adapter * padapter); -void rtl8192ce_free_recv_priv(_adapter * padapter); -void rtl8192ce_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat); -#endif - -void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); -void rtl8192c_process_phy_info(_adapter *padapter, void *prframe); - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef _RTL8192C_RECV_H_ +#define _RTL8192C_RECV_H_ + +#include +#include +#include + + +#ifdef PLATFORM_OS_XP + #define NR_RECVBUFF (16) +#elif defined(PLATFORM_OS_CE) + #define NR_RECVBUFF (4) +#else +#ifdef CONFIG_SINGLE_RECV_BUF + #define NR_RECVBUFF (1) +#else + #define NR_RECVBUFF (4) +#endif //CONFIG_SINGLE_RECV_BUF + + #define NR_PREALLOC_RECV_SKB (8) +#endif + + +#define RECV_BLK_SZ 512 +#define RECV_BLK_CNT 16 +#define RECV_BLK_TH RECV_BLK_CNT + +#if defined(CONFIG_USB_HCI) + +#ifdef PLATFORM_OS_CE +#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k +#else + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + //#define MAX_RECVBUF_SZ (32768) // 32k + //#define MAX_RECVBUF_SZ (16384) //16K + //#define MAX_RECVBUF_SZ (10240) //10K + #define MAX_RECVBUF_SZ (15360) // 15k < 16k + //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k + #else + #define MAX_RECVBUF_SZ (4000) // about 4K + #endif +#endif + +#elif defined(CONFIG_PCI_HCI) +#ifndef CONFIG_MINIMAL_MEMORY_USAGE + #define MAX_RECVBUF_SZ (9100) +#else + #define MAX_RECVBUF_SZ (4000) // about 4K +#endif + +#define RX_MPDU_QUEUE 0 +#define RX_CMD_QUEUE 1 +#define RX_MAX_QUEUE 2 +#endif + + +#define RECV_BULK_IN_ADDR 0x80 +#define RECV_INT_IN_ADDR 0x81 + +#define PHY_RSSI_SLID_WIN_MAX 100 +#define PHY_LINKQUALITY_SLID_WIN_MAX 20 + + +struct phy_stat +{ + unsigned int phydw0; + + unsigned int phydw1; + + unsigned int phydw2; + + unsigned int phydw3; + + unsigned int phydw4; + + unsigned int phydw5; + + unsigned int phydw6; + + unsigned int phydw7; +}; + +typedef struct _Phy_OFDM_Rx_Status_Report_8192cd +{ + unsigned char trsw_gain_X[4]; + unsigned char pwdb_all; + unsigned char cfosho_X[4]; + unsigned char cfotail_X[4]; + unsigned char rxevm_X[2]; + unsigned char rxsnr_X[4]; + unsigned char pdsnr_X[2]; + unsigned char csi_current_X[2]; + unsigned char csi_target_X[2]; + unsigned char sigevm; + unsigned char max_ex_pwr; +//#ifdef RTL8192SE +#ifdef CONFIG_LITTLE_ENDIAN + unsigned char ex_intf_flg:1; + unsigned char sgi_en:1; + unsigned char rxsc:2; + //unsigned char rsvd:4; + unsigned char idle_long:1; + unsigned char r_ant_train_en:1; + unsigned char ANTSELB:1; + unsigned char ANTSEL:1; +#else // _BIG_ENDIAN_ + //unsigned char rsvd:4; + unsigned char ANTSEL:1; + unsigned char ANTSELB:1; + unsigned char r_ant_train_en:1; + unsigned char idle_long:1; + unsigned char rxsc:2; + unsigned char sgi_en:1; + unsigned char ex_intf_flg:1; +#endif +//#else // RTL8190, RTL8192E +// unsigned char sgi_en; +// unsigned char rxsc_sgien_exflg; +//#endif +} __attribute__ ((packed))PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; + +typedef struct _Phy_CCK_Rx_Status_Report_8192cd +{ + /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend + 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ + u8 adc_pwdb_X[4]; + u8 SQ_rpt; + u8 cck_agc_rpt; +} PHY_STS_CCK_8192CD_T; + + +// Rx smooth factor +#define Rx_Smooth_Factor (20) + + +#ifdef CONFIG_USB_HCI +typedef struct _INTERRUPT_MSG_FORMAT_EX{ + unsigned int C2H_MSG0; + unsigned int C2H_MSG1; + unsigned int C2H_MSG2; + unsigned int C2H_MSG3; + unsigned int HISR; // from HISR Reg0x124, read to clear + unsigned int HISRE;// from HISRE Reg0x12c, read to clear + unsigned int MSG_EX; +}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; + +void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +int rtl8192cu_init_recv_priv(_adapter * padapter); +void rtl8192cu_free_recv_priv(_adapter * padapter); +void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat); +#endif + +#ifdef CONFIG_PCI_HCI +int rtl8192ce_init_recv_priv(_adapter * padapter); +void rtl8192ce_free_recv_priv(_adapter * padapter); +void rtl8192ce_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat); +#endif + +void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); +void rtl8192c_process_phy_info(_adapter *padapter, void *prframe); + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_rf.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_rf.h old mode 100755 new mode 100644 index 76c8a7880ac788..d3c4b67c92dcaa --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_rf.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_rf.h @@ -1,93 +1,93 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -/****************************************************************************** - * - * - * Module: rtl8192c_rf.h ( Header File) - * - * Note: Collect every HAL RF type exter API or constant. - * - * Function: - * - * Export: - * - * Abbrev: - * - * History: - * Data Who Remark - * - * 09/25/2008 MHC Create initial version. - * - * -******************************************************************************/ -#ifndef _RTL8192C_RF_H_ -#define _RTL8192C_RF_H_ -/* Check to see if the file has been included already. */ - - -/*--------------------------Define Parameters-------------------------------*/ - -// -// For RF 6052 Series -// -#define RF6052_MAX_TX_PWR 0x3F -#define RF6052_MAX_REG 0x3F -#define RF6052_MAX_PATH 2 -/*--------------------------Define Parameters-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure----------------------------*/ - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - -/*------------------------Export Marco Definition---------------------------*/ - -/*------------------------Export Marco Definition---------------------------*/ - - -/*--------------------------Exported Function prototype---------------------*/ - -// -// RF RL6052 Series API -// -void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, - IN u16 DataRate); -void rtl8192c_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN HT_CHANNEL_WIDTH Bandwidth); -VOID rtl8192c_PHY_RF6052SetCckTxPower( - IN PADAPTER Adapter, - IN u8* pPowerlevel); -VOID rtl8192c_PHY_RF6052SetOFDMTxPower( - IN PADAPTER Adapter, - IN u8* pPowerLevel, - IN u8 Channel); -int PHY_RF6052_Config8192C( IN PADAPTER Adapter ); - -/*--------------------------Exported Function prototype---------------------*/ - - -#endif/* End of HalRf.h */ - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +/****************************************************************************** + * + * + * Module: rtl8192c_rf.h ( Header File) + * + * Note: Collect every HAL RF type exter API or constant. + * + * Function: + * + * Export: + * + * Abbrev: + * + * History: + * Data Who Remark + * + * 09/25/2008 MHC Create initial version. + * + * +******************************************************************************/ +#ifndef _RTL8192C_RF_H_ +#define _RTL8192C_RF_H_ +/* Check to see if the file has been included already. */ + + +/*--------------------------Define Parameters-------------------------------*/ + +// +// For RF 6052 Series +// +#define RF6052_MAX_TX_PWR 0x3F +#define RF6052_MAX_REG 0x3F +#define RF6052_MAX_PATH 2 +/*--------------------------Define Parameters-------------------------------*/ + + +/*------------------------------Define structure----------------------------*/ + +/*------------------------------Define structure----------------------------*/ + + +/*------------------------Export global variable----------------------------*/ +/*------------------------Export global variable----------------------------*/ + +/*------------------------Export Marco Definition---------------------------*/ + +/*------------------------Export Marco Definition---------------------------*/ + + +/*--------------------------Exported Function prototype---------------------*/ + +// +// RF RL6052 Series API +// +void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, + IN u16 DataRate); +void rtl8192c_PHY_RF6052SetBandwidth( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth); +VOID rtl8192c_PHY_RF6052SetCckTxPower( + IN PADAPTER Adapter, + IN u8* pPowerlevel); +VOID rtl8192c_PHY_RF6052SetOFDMTxPower( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel); +int PHY_RF6052_Config8192C( IN PADAPTER Adapter ); + +/*--------------------------Exported Function prototype---------------------*/ + + +#endif/* End of HalRf.h */ + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_spec.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_spec.h old mode 100755 new mode 100644 index 1e97b01e0dc5a8..27e0f0e199d410 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_spec.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_spec.h @@ -1,1899 +1,1899 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTL8192C_SPEC_H__ -#define __RTL8192C_SPEC_H__ - -#include - -#ifndef BIT -#define BIT(x) (1 << (x)) -#endif - -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - - -//============================================================ -// 8192C Regsiter offset definition -//============================================================ - - -//============================================================ -// -//============================================================ - -//----------------------------------------------------- -// -// 0x0000h ~ 0x00FFh System Configuration -// -//----------------------------------------------------- -#define REG_SYS_ISO_CTRL 0x0000 -#define REG_SYS_FUNC_EN 0x0002 -#define REG_APS_FSMCO 0x0004 -#define REG_SYS_CLKR 0x0008 -#define REG_9346CR 0x000A -#define REG_EE_VPD 0x000C -#define REG_AFE_MISC 0x0010 -#define REG_SPS0_CTRL 0x0011 -#define REG_SPS_OCP_CFG 0x0018 -#define REG_RSV_CTRL 0x001C -#define REG_RF_CTRL 0x001F -#define REG_LDOA15_CTRL 0x0020 -#define REG_LDOV12D_CTRL 0x0021 -#define REG_LDOHCI12_CTRL 0x0022 -#define REG_LPLDO_CTRL 0x0023 -#define REG_AFE_XTAL_CTRL 0x0024 -#define REG_AFE_PLL_CTRL 0x0028 -#define REG_EFUSE_CTRL 0x0030 -#define REG_EFUSE_TEST 0x0034 -#define REG_PWR_DATA 0x0038 -#define REG_CAL_TIMER 0x003C -#define REG_ACLK_MON 0x003E -#define REG_GPIO_MUXCFG 0x0040 -#define REG_GPIO_IO_SEL 0x0042 -#define REG_MAC_PINMUX_CFG 0x0043 -#define REG_GPIO_PIN_CTRL 0x0044 -#define REG_GPIO_INTM 0x0048 -#define REG_LEDCFG0 0x004C -#define REG_LEDCFG1 0x004D -#define REG_LEDCFG2 0x004E -#define REG_LEDCFG3 0x004F -#define REG_LEDCFG REG_LEDCFG2 -#define REG_FSIMR 0x0050 -#define REG_FSISR 0x0054 -#define REG_HSIMR 0x0058 -#define REG_HSISR 0x005c -#define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. -#define REG_GPIO_IO_SEL_2 0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. -#define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source. -#define REG_MCUFWDL 0x0080 -#define REG_WOWLAN_REASON 0x0081 -#define REG_HMEBOX_EXT_0 0x0088 -#define REG_HMEBOX_EXT_1 0x008A -#define REG_HMEBOX_EXT_2 0x008C -#define REG_HMEBOX_EXT_3 0x008E -#define REG_HOST_SUSP_CNT 0x00BC // Host suspend counter on FPGA platform -#define REG_EFUSE_ACCESS 0x00CF // Efuse access protection for RTL8723 -#define REG_BIST_SCAN 0x00D0 -#define REG_BIST_RPT 0x00D4 -#define REG_BIST_ROM_RPT 0x00D8 -#define REG_USB_SIE_INTF 0x00E0 -#define REG_PCIE_MIO_INTF 0x00E4 -#define REG_PCIE_MIO_INTD 0x00E8 -#define REG_HPON_FSM 0x00EC -#define REG_SYS_CFG 0x00F0 -#define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only. - -//----------------------------------------------------- -// -// 0x0100h ~ 0x01FFh MACTOP General Configuration -// -//----------------------------------------------------- -#define REG_CR 0x0100 -#define REG_PBP 0x0104 -#define REG_TRXDMA_CTRL 0x010C -#define REG_TRXFF_BNDY 0x0114 -#define REG_TRXFF_STATUS 0x0118 -#define REG_RXFF_PTR 0x011C -#define REG_HIMR 0x0120 -#define REG_HISR 0x0124 -#define REG_HIMRE 0x0128 -#define REG_HISRE 0x012C -#define REG_CPWM 0x012F -#define REG_FWIMR 0x0130 -#define REG_FWISR 0x0134 -#define REG_PKTBUF_DBG_CTRL 0x0140 -#define REG_PKTBUF_DBG_DATA_L 0x0144 -#define REG_PKTBUF_DBG_DATA_H 0x0148 - -#define REG_TC0_CTRL 0x0150 -#define REG_TC1_CTRL 0x0154 -#define REG_TC2_CTRL 0x0158 -#define REG_TC3_CTRL 0x015C -#define REG_TC4_CTRL 0x0160 -#define REG_TCUNIT_BASE 0x0164 -#define REG_MBIST_START 0x0174 -#define REG_MBIST_DONE 0x0178 -#define REG_MBIST_FAIL 0x017C -#define REG_C2HEVT_MSG_NORMAL 0x01A0 -#define REG_C2HEVT_CLEAR 0x01AF -#define REG_C2HEVT_MSG_TEST 0x01B8 -#define REG_MCUTST_1 0x01c0 -#define REG_FMETHR 0x01C8 -#define REG_HMETFR 0x01CC -#define REG_HMEBOX_0 0x01D0 -#define REG_HMEBOX_1 0x01D4 -#define REG_HMEBOX_2 0x01D8 -#define REG_HMEBOX_3 0x01DC - -#define REG_LLT_INIT 0x01E0 -#define REG_BB_ACCEESS_CTRL 0x01E8 -#define REG_BB_ACCESS_DATA 0x01EC - - -//----------------------------------------------------- -// -// 0x0200h ~ 0x027Fh TXDMA Configuration -// -//----------------------------------------------------- -#define REG_RQPN 0x0200 -#define REG_FIFOPAGE 0x0204 -#define REG_TDECTRL 0x0208 -#define REG_TXDMA_OFFSET_CHK 0x020C -#define REG_TXDMA_STATUS 0x0210 -#define REG_RQPN_NPQ 0x0214 - -//----------------------------------------------------- -// -// 0x0280h ~ 0x02FFh RXDMA Configuration -// -//----------------------------------------------------- -#define REG_RXDMA_AGG_PG_TH 0x0280 -#define REG_RXPKT_NUM 0x0284 -#define REG_RXDMA_STATUS 0x0288 - - -//----------------------------------------------------- -// -// 0x0300h ~ 0x03FFh PCIe -// -//----------------------------------------------------- -#define REG_PCIE_CTRL_REG 0x0300 -#define REG_INT_MIG 0x0304 // Interrupt Migration -#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address -#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address -#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address -#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address -#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address -#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address -#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address -#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address -#define REG_DBI 0x0348 // Backdoor REG for Access Configuration -#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY -#define REG_DBG_SEL 0x0360 // Debug Selection Register -#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM -#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM -#define REG_UART_CTRL 0x0364 // UART Control -#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address -#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address - - -// spec version 11 -//----------------------------------------------------- -// -// 0x0400h ~ 0x047Fh Protocol Configuration -// -//----------------------------------------------------- -#define REG_VOQ_INFORMATION 0x0400 -#define REG_VIQ_INFORMATION 0x0404 -#define REG_BEQ_INFORMATION 0x0408 -#define REG_BKQ_INFORMATION 0x040C -#define REG_MGQ_INFORMATION 0x0410 -#define REG_HGQ_INFORMATION 0x0414 -#define REG_BCNQ_INFORMATION 0x0418 - - -#define REG_CPU_MGQ_INFORMATION 0x041C -#define REG_FWHW_TXQ_CTRL 0x0420 -#define REG_HWSEQ_CTRL 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY 0x0425 -#define REG_LIFETIME_EN 0x0426 -#define REG_MULTI_BCNQ_OFFSET 0x0427 -#define REG_SPEC_SIFS 0x0428 -#define REG_RL 0x042A -#define REG_DARFRC 0x0430 -#define REG_RARFRC 0x0438 -#define REG_RRSR 0x0440 -#define REG_ARFR0 0x0444 -#define REG_ARFR1 0x0448 -#define REG_ARFR2 0x044C -#define REG_ARFR3 0x0450 -#define REG_AGGLEN_LMT 0x0458 -#define REG_AMPDU_MIN_SPACE 0x045C -#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D -#define REG_FAST_EDCA_CTRL 0x0460 -#define REG_RD_RESP_PKT_TH 0x0463 -#define REG_INIRTS_RATE_SEL 0x0480 -#define REG_INIDATA_RATE_SEL 0x0484 -#define REG_POWER_STATUS 0x04A4 -#define REG_POWER_STAGE1 0x04B4 -#define REG_POWER_STAGE2 0x04B8 -#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 -#define REG_STBC_SETTING 0x04C4 -#define REG_PROT_MODE_CTRL 0x04C8 -#define REG_MAX_AGGR_NUM 0x04CA -#define REG_RTS_MAX_AGGR_NUM 0x04CB -#define REG_BAR_MODE_CTRL 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT 0x04CF -#define REG_NQOS_SEQ 0x04DC -#define REG_QOS_SEQ 0x04DE -#define REG_NEED_CPU_HANDLE 0x04E0 -#define REG_PKT_LOSE_RPT 0x04E1 -#define REG_PTCL_ERR_STATUS 0x04E2 -#define REG_DUMMY 0x04FC - - - -//----------------------------------------------------- -// -// 0x0500h ~ 0x05FFh EDCA Configuration -// -//----------------------------------------------------- -#define REG_EDCA_VO_PARAM 0x0500 -#define REG_EDCA_VI_PARAM 0x0504 -#define REG_EDCA_BE_PARAM 0x0508 -#define REG_EDCA_BK_PARAM 0x050C -#define REG_BCNTCFG 0x0510 -#define REG_PIFS 0x0512 -#define REG_RDG_PIFS 0x0513 -#define REG_SIFS_CCK 0x0514 -#define REG_SIFS_OFDM 0x0516 -#define REG_SIFS_CTX 0x0514 -#define REG_SIFS_TRX 0x0516 -#define REG_AGGR_BREAK_TIME 0x051A -#define REG_SLOT 0x051B -#define REG_TX_PTCL_CTRL 0x0520 -#define REG_TXPAUSE 0x0522 -#define REG_DIS_TXREQ_CLR 0x0523 -#define REG_RD_CTRL 0x0524 -#define REG_TBTT_PROHIBIT 0x0540 -#define REG_RD_NAV_NXT 0x0544 -#define REG_NAV_PROT_LEN 0x0546 -#define REG_BCN_CTRL 0x0550 -#define REG_BCN_CTRL_1 0x0551 -#define REG_MBID_NUM 0x0552 -#define REG_DUAL_TSF_RST 0x0553 -#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE -#define REG_MBSSID_BCN_SPACE 0x0554 -#define REG_DRVERLYINT 0x0558 -#define REG_BCNDMATIM 0x0559 -#define REG_ATIMWND 0x055A -#define REG_BCN_MAX_ERR 0x055D -#define REG_RXTSF_OFFSET_CCK 0x055E -#define REG_RXTSF_OFFSET_OFDM 0x055F -#define REG_TSFTR 0x0560 -#define REG_INIT_TSFTR 0x0564 -#define REG_PSTIMER 0x0580 -#define REG_TIMER0 0x0584 -#define REG_TIMER1 0x0588 -#define REG_ACMHWCTRL 0x05C0 -#define REG_ACMRSTCTRL 0x05C1 -#define REG_ACMAVG 0x05C2 -#define REG_VO_ADMTIME 0x05C4 -#define REG_VI_ADMTIME 0x05C6 -#define REG_BE_ADMTIME 0x05C8 -#define REG_EDCA_RANDOM_GEN 0x05CC -#define REG_SCH_TXCMD 0x05D0 - - -//----------------------------------------------------- -// -// 0x0600h ~ 0x07FFh WMAC Configuration -// -//----------------------------------------------------- -#define REG_APSD_CTRL 0x0600 -#define REG_BWOPMODE 0x0603 -#define REG_TCR 0x0604 -#define REG_RCR 0x0608 -#define REG_RX_PKT_LIMIT 0x060C -#define REG_RX_DLK_TIME 0x060D -#define REG_RX_DRVINFO_SZ 0x060F - -#define REG_MACID 0x0610 -#define REG_BSSID 0x0618 -#define REG_MAR 0x0620 -#define REG_MBIDCAMCFG 0x0628 - -#define REG_USTIME_EDCA 0x0638 -#define REG_MAC_SPEC_SIFS 0x063A - -// 20100719 Joseph: Hardware register definition change. (HW datasheet v54) -#define REG_R2T_SIFS 0x063C // [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK -#define REG_T2T_SIFS 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK -#define REG_ACKTO 0x0640 -#define REG_CTS2TO 0x0641 -#define REG_EIFS 0x0642 - -//WMA, BA, CCX -#define REG_NAV_CTRL 0x0650 -#define REG_BACAMCMD 0x0654 -#define REG_BACAMCONTENT 0x0658 -#define REG_LBDLY 0x0660 -#define REG_FWDLY 0x0661 -#define REG_RXERR_RPT 0x0664 -#define REG_WMAC_TRXPTCL_CTL 0x0668 - - -// Security -#define REG_CAMCMD 0x0670 -#define REG_CAMWRITE 0x0674 -#define REG_CAMREAD 0x0678 -#define REG_CAMDBG 0x067C -#define REG_SECCFG 0x0680 - -// Power -#define REG_WOW_CTRL 0x0690 -#define REG_PSSTATUS 0x0691 -#define REG_PS_RX_INFO 0x0692 -#define REG_LPNAV_CTRL 0x0694 -#define REG_WKFMCAM_CMD 0x0698 -#define REG_WKFMCAM_RWD 0x069C -#define REG_RXFLTMAP0 0x06A0 -#define REG_RXFLTMAP1 0x06A2 -#define REG_RXFLTMAP2 0x06A4 -#define REG_BCN_PSR_RPT 0x06A8 -#define REG_CALB32K_CTRL 0x06AC -#define REG_PKT_MON_CTRL 0x06B4 -#define REG_BT_COEX_TABLE 0x06C0 -#define REG_WMAC_RESP_TXINFO 0x06D8 - - -//----------------------------------------------------- -// -// 0xFE00h ~ 0xFE55h USB Configuration -// -//----------------------------------------------------- -#define REG_USB_INFO 0xFE17 -#define REG_USB_SPECIAL_OPTION 0xFE55 -#define REG_USB_DMA_AGG_TO 0xFE5B -#define REG_USB_AGG_TO 0xFE5C -#define REG_USB_AGG_TH 0xFE5D - -// For test chip -#define REG_TEST_USB_TXQS 0xFE48 -#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 -#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 -#define REG_TEST_SIE_OPTIONAL 0xFE64 -#define REG_TEST_SIE_CHIRP_K 0xFE65 -#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B -#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 -#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 - - -// For normal chip -#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 -#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 -#define REG_NORMAL_SIE_OPTIONAL 0xFE64 -#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 -#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B -#define REG_NORMAL_SIE_OPTIONAL2 0xFE6C -#define REG_NORMAL_SIE_GPS_EP 0xFE6D // 0xFE6D, for RTL8723 only. -#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 -#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF - - -//----------------------------------------------------- -// -// Redifine 8192C register definition for compatibility -// -//----------------------------------------------------- - -// TODO: use these definition when using REG_xxx naming rule. -// NOTE: DO NOT Remove these definition. Use later. - -#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. -#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. -#define SYS_CLK REG_SYS_CLKR -#define CR9346 REG_9346CR // 93C46/93C56 Command Register. -#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. -#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. -#define MSR (REG_CR + 2) // Media Status register -#define ISR REG_HISR -#define TSFR REG_TSFTR // Timing Sync Function Timer Register. - -#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 -#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 - -#define PBP REG_PBP - -// Redifine MACID register, to compatible prior ICs. -#define IDR0 MACIDR0 -#define IDR4 MACIDR4 - - -// -// 9. Security Control Registers (Offset: ) -// -#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd -#define WCAMI REG_CAMWRITE // Software write CAM input content -#define RCAMO REG_CAMREAD // Software read/write CAM config -#define CAMDBG REG_CAMDBG -#define SECR REG_SECCFG //Security Configuration Register - -// Unused register -#define UnusedRegister 0x1BF -#define DCAM UnusedRegister -#define PSR UnusedRegister -#define BBAddr UnusedRegister -#define PhyDataR UnusedRegister - -#define InvalidBBRFValue 0x12345678 - -// Min Spacing related settings. -#define MAX_MSS_DENSITY_2T 0x13 -#define MAX_MSS_DENSITY_1T 0x0A - -//---------------------------------------------------------------------------- -// 8192C Cmd9346CR bits (Offset 0xA, 16bit) -//---------------------------------------------------------------------------- -#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 -#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 -#define Cmd9346CR_9356SEL BIT4 -#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) -#define AutoLoadEFUSE CmdEEPROM_En - -//---------------------------------------------------------------------------- -// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) -//---------------------------------------------------------------------------- -#define GPIOSEL_GPIO 0 -#define GPIOSEL_ENBT BIT5 - -//---------------------------------------------------------------------------- -// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) -//---------------------------------------------------------------------------- -#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value -#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value -#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. -#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) - -//---------------------------------------------------------------------------- -// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) -//---------------------------------------------------------------------------- -/* -Network Type -00: No link -01: Link in ad hoc network -10: Link in infrastructure network -11: AP mode -Default: 00b. -*/ -#define MSR_NOLINK 0x00 -#define MSR_ADHOC 0x01 -#define MSR_INFRA 0x02 -#define MSR_AP 0x03 - -// -// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) -// -//---------------------------------------------------------------------------- -// 8192C Response Rate Set Register (offset 0x181, 24bits) -//---------------------------------------------------------------------------- -#define RRSR_RSC_OFFSET 21 -#define RRSR_SHORT_OFFSET 23 -#define RRSR_RSC_BW_40M 0x600000 -#define RRSR_RSC_UPSUBCHNL 0x400000 -#define RRSR_RSC_LOWSUBCHNL 0x200000 -#define RRSR_SHORT 0x800000 -#define RRSR_1M BIT0 -#define RRSR_2M BIT1 -#define RRSR_5_5M BIT2 -#define RRSR_11M BIT3 -#define RRSR_6M BIT4 -#define RRSR_9M BIT5 -#define RRSR_12M BIT6 -#define RRSR_18M BIT7 -#define RRSR_24M BIT8 -#define RRSR_36M BIT9 -#define RRSR_48M BIT10 -#define RRSR_54M BIT11 -#define RRSR_MCS0 BIT12 -#define RRSR_MCS1 BIT13 -#define RRSR_MCS2 BIT14 -#define RRSR_MCS3 BIT15 -#define RRSR_MCS4 BIT16 -#define RRSR_MCS5 BIT17 -#define RRSR_MCS6 BIT18 -#define RRSR_MCS7 BIT19 -#define BRSR_AckShortPmb BIT23 -// CCK ACK: use Short Preamble or not - - -//---------------------------------------------------------------------------- -// 8192C Rate Definition -//---------------------------------------------------------------------------- -//CCK -#define RATR_1M 0x00000001 -#define RATR_2M 0x00000002 -#define RATR_55M 0x00000004 -#define RATR_11M 0x00000008 -//OFDM -#define RATR_6M 0x00000010 -#define RATR_9M 0x00000020 -#define RATR_12M 0x00000040 -#define RATR_18M 0x00000080 -#define RATR_24M 0x00000100 -#define RATR_36M 0x00000200 -#define RATR_48M 0x00000400 -#define RATR_54M 0x00000800 -//MCS 1 Spatial Stream -#define RATR_MCS0 0x00001000 -#define RATR_MCS1 0x00002000 -#define RATR_MCS2 0x00004000 -#define RATR_MCS3 0x00008000 -#define RATR_MCS4 0x00010000 -#define RATR_MCS5 0x00020000 -#define RATR_MCS6 0x00040000 -#define RATR_MCS7 0x00080000 -//MCS 2 Spatial Stream -#define RATR_MCS8 0x00100000 -#define RATR_MCS9 0x00200000 -#define RATR_MCS10 0x00400000 -#define RATR_MCS11 0x00800000 -#define RATR_MCS12 0x01000000 -#define RATR_MCS13 0x02000000 -#define RATR_MCS14 0x04000000 -#define RATR_MCS15 0x08000000 - - -// NOTE: For 92CU - Ziv -//CCK -#define RATE_1M BIT(0) -#define RATE_2M BIT(1) -#define RATE_5_5M BIT(2) -#define RATE_11M BIT(3) -//OFDM -#define RATE_6M BIT(4) -#define RATE_9M BIT(5) -#define RATE_12M BIT(6) -#define RATE_18M BIT(7) -#define RATE_24M BIT(8) -#define RATE_36M BIT(9) -#define RATE_48M BIT(10) -#define RATE_54M BIT(11) -//MCS 1 Spatial Stream -#define RATE_MCS0 BIT(12) -#define RATE_MCS1 BIT(13) -#define RATE_MCS2 BIT(14) -#define RATE_MCS3 BIT(15) -#define RATE_MCS4 BIT(16) -#define RATE_MCS5 BIT(17) -#define RATE_MCS6 BIT(18) -#define RATE_MCS7 BIT(19) -//MCS 2 Spatial Stream -#define RATE_MCS8 BIT(20) -#define RATE_MCS9 BIT(21) -#define RATE_MCS10 BIT(22) -#define RATE_MCS11 BIT(23) -#define RATE_MCS12 BIT(24) -#define RATE_MCS13 BIT(25) -#define RATE_MCS14 BIT(26) -#define RATE_MCS15 BIT(27) - - - - -// ALL CCK Rate -#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M -#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ - RATR_36M|RATR_48M|RATR_54M -#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ - RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7 -#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\ - RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 - -//---------------------------------------------------------------------------- -// 8192C BW_OPMODE bits (Offset 0x203, 8bit) -//---------------------------------------------------------------------------- -#define BW_OPMODE_20MHZ BIT2 -#define BW_OPMODE_5G BIT1 -#define BW_OPMODE_11J BIT0 - - -//---------------------------------------------------------------------------- -// 8192C CAM Config Setting (offset 0x250, 1 byte) -//---------------------------------------------------------------------------- -#define CAM_VALID BIT15 -#define CAM_NOTVALID 0x0000 -#define CAM_USEDK BIT5 - -#define CAM_CONTENT_COUNT 8 - -#define CAM_NONE 0x0 -#define CAM_WEP40 0x01 -#define CAM_TKIP 0x02 -#define CAM_AES 0x04 -#define CAM_WEP104 0x05 - -#define TOTAL_CAM_ENTRY 32 -#define HALF_CAM_ENTRY 16 - -#define CAM_CONFIG_USEDK _TRUE -#define CAM_CONFIG_NO_USEDK _FALSE - -#define CAM_WRITE BIT16 -#define CAM_READ 0x00000000 -#define CAM_POLLINIG BIT31 - -#define SCR_UseDK 0x01 -#define SCR_TxSecEnable 0x02 -#define SCR_RxSecEnable 0x04 - - -// -// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) -// -//---------------------------------------------------------------------------- -// 8190 IMR/ISR bits (offset 0xfd, 8bits) -//---------------------------------------------------------------------------- -#define IMR8190_DISABLED 0x0 -// IMR DW0 Bit 0-31 -#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 -#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 -#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 -#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 -#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 -#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 -#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 -#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 -#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 -#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 -#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 -#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 -#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 -#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 -#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 -#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 -#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow -#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt -#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 -#define IMR_RXFOVW BIT12 // Receive FIFO Overflow -#define IMR_RDU BIT11 // Receive Descriptor Unavailable -#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt -#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup -#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt -#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup -#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt -#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt -#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt -#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt -#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt -#define IMR_VODOK BIT1 // AC_VO DMA Interrupt -#define IMR_ROK BIT0 // Receive DMA OK Interrupt - -#define IMR_RX_MASK (IMR_ROK|IMR_RDU|IMR_RXFOVW) -#define IMR_TX_MASK (IMR_VODOK|IMR_VIDOK|IMR_BEDOK|IMR_BKDOK|IMR_MGNTDOK|IMR_HIGHDOK|IMR_BDOK) - -// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) -#define IMR_TXERR BIT11 -#define IMR_RXERR BIT10 -#define IMR_C2HCMD BIT9 -#define IMR_CPWM BIT8 -//RSVD [2-7] -#define IMR_OCPINT BIT1 -#define IMR_WLANOFF BIT0 - - - -//---------------------------------------------------------------------------- -// 8192C EFUSE -//---------------------------------------------------------------------------- -#define HWSET_MAX_SIZE 128 - - -//---------------------------------------------------------------------------- -// 8192C EEPROM/EFUSE share register definition. -//---------------------------------------------------------------------------- - -// -// Default Value for EEPROM or EFUSE!!! -// -#define EEPROM_Default_TSSI 0x0 -#define EEPROM_Default_TxPowerDiff 0x0 -#define EEPROM_Default_CrystalCap 0x5 -#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) -#define EEPROM_Default_TxPower 0x1010 -#define EEPROM_Default_HT2T_TxPwr 0x10 - -#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -#define EEPROM_Default_ThermalMeter 0x12 - -#define EEPROM_Default_AntTxPowerDiff 0x0 -#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 -#define EEPROM_Default_TxPowerLevel 0x22 -#define EEPROM_Default_HT40_2SDiff 0x0 -#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference -#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 -#define EEPROM_Default_HT40_PwrMaxOffset 0 -#define EEPROM_Default_HT20_PwrMaxOffset 0 - -// For debug -#define EEPROM_Default_PID 0x1234 -#define EEPROM_Default_VID 0x5678 -#define EEPROM_Default_CustomerID 0xAB -#define EEPROM_Default_SubCustomerID 0xCD -#define EEPROM_Default_Version 0 - -#define EEPROM_CHANNEL_PLAN_FCC 0x0 -#define EEPROM_CHANNEL_PLAN_IC 0x1 -#define EEPROM_CHANNEL_PLAN_ETSI 0x2 -#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 -#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 -#define EEPROM_CHANNEL_PLAN_MKK 0x5 -#define EEPROM_CHANNEL_PLAN_MKK1 0x6 -#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 -#define EEPROM_CHANNEL_PLAN_TELEC 0x8 -#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 -#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA -#define EEPROM_CHANNEL_PLAN_NCC 0xB -#define EEPROM_USB_OPTIONAL1 0xE -#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 - - -#define EEPROM_CID_DEFAULT 0x0 -#define EEPROM_CID_TOSHIBA 0x4 -#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. -#define EEPROM_CID_QMI 0x0D -#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 - - -#define RTL_EEPROM_ID 0x8129 - - -#ifdef CONFIG_PCI_HCI -#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) -#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) -#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) - -// -// Interface type. -// -typedef enum _INTERFACE_SELECT_8192CPCIe{ - INTF_SEL0_SOLO_MINICARD = 0, // WiFi solo-mCard - INTF_SEL1_BT_COMBO_MINICARD = 1, // WiFi+BT combo-mCard - INTF_SEL2_PCIe = 2, // PCIe Card -} INTERFACE_SELECT_8192CPCIe, *PINTERFACE_SELECT_8192CPCIe; - -#define RTL8190_EEPROM_ID 0x8129 // 0-1 -#define EEPROM_HPON 0x02 // LDO settings.2-5 -#define EEPROM_CLK 0x06 // Clock settings.6-7 -#define EEPROM_TESTR 0x08 // SE Test mode.8 - -#define EEPROM_VID 0x0A // SE Vendor ID.A-B -#define EEPROM_DID 0x0C // SE Device ID. C-D -#define EEPROM_SVID 0x0E // SE Vendor ID.E-F -#define EEPROM_SMID 0x10 // SE PCI Subsystem ID. 10-11 - -#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 - -//---------------------------------------------------------------- -// Ziv - Let PCIe and USB use the same define. Modify address mapping later. -#define EEPROM_CCK_TX_PWR_INX 0x5A -#define EEPROM_HT40_1S_TX_PWR_INX 0x60 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 -#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 -#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C -#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F -#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 - -#define EEPROM_CHANNEL_PLAN 0x75 -#define EEPROM_TSSI_A 0x76 -#define EEPROM_TSSI_B 0x77 -#define EEPROM_THERMAL_METER 0x78 -#define EEPROM_RF_OPT1 0x79 -#define EEPROM_RF_OPT2 0x7A -#define EEPROM_RF_OPT3 0x7B -#define EEPROM_RF_OPT4 0x7C -#define EEPROM_VERSION 0x7E -#define EEPROM_CUSTOMER_ID 0x7F - -#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] - -#endif - -#ifdef CONFIG_USB_HCI - -//should be renamed and moved to another file -typedef enum _BOARD_TYPE_8192CUSB{ - BOARD_USB_DONGLE = 0, // USB dongle - BOARD_USB_High_PA = 1, // USB dongle with high power PA - BOARD_MINICARD = 2, // Minicard - BOARD_USB_SOLO = 3, // USB solo-Slim module - BOARD_USB_COMBO = 4, // USB Combo-Slim module -} BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB; - -#define SUPPORT_HW_RADIO_DETECT(pHalData) (pHalData->BoardType == BOARD_MINICARD||\ - pHalData->BoardType == BOARD_USB_SOLO||\ - pHalData->BoardType == BOARD_USB_COMBO) - -//--------------------------------------------------------------- -// EEPROM address for Test chip -//--------------------------------------------------------------- -#define EEPROM_TEST_USB_OPT 0x0E -#define EEPROM_TEST_CHIRP_K 0x0F -#define EEPROM_TEST_EP_SETTING 0x0E -#define EEPROM_TEST_USB_PHY 0x10 - - -//--------------------------------------------------------------- -// EEPROM address for Normal chip -//--------------------------------------------------------------- -#define EEPROM_NORMAL_USB_OPT 0x0E -#define EEPROM_NORMAL_CHIRP_K 0x0E // Changed -#define EEPROM_NORMAL_EP_SETTING 0x0F // Changed -#define EEPROM_NORMAL_USB_PHY 0x12 // Changed - - -// Test chip and normal chip common define -//--------------------------------------------------------------- -// EEPROM address for both -//--------------------------------------------------------------- -#define EEPROM_ID0 0x00 -#define EEPROM_ID1 0x01 -#define EEPROM_RTK_RSV1 0x02 -#define EEPROM_RTK_RSV2 0x03 -#define EEPROM_RTK_RSV3 0x04 -#define EEPROM_RTK_RSV4 0x05 -#define EEPROM_RTK_RSV5 0x06 -#define EEPROM_DBG_SEL 0x07 -#define EEPROM_RTK_RSV6 0x08 -#define EEPROM_VID 0x0A -#define EEPROM_PID 0x0C - -#define EEPROM_MAC_ADDR 0x16 -#define EEPROM_STRING 0x1C -#define EEPROM_SUBCUSTOMER_ID 0x59 -#define EEPROM_CCK_TX_PWR_INX 0x5A -#define EEPROM_HT40_1S_TX_PWR_INX 0x60 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 -#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 -#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C -#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F -#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 - -#define EEPROM_CHANNEL_PLAN 0x75 -#define EEPROM_TSSI_A 0x76 -#define EEPROM_TSSI_B 0x77 -#define EEPROM_THERMAL_METER 0x78 -#define EEPROM_RF_OPT1 0x79 -#define EEPROM_RF_OPT2 0x7A -#define EEPROM_RF_OPT3 0x7B -#define EEPROM_RF_OPT4 0x7C -#define EEPROM_VERSION 0x7E -#define EEPROM_CUSTOMER_ID 0x7F - -#define EEPROM_BoardType 0x54 //0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU -#define EEPROM_TxPwIndex 0x5C //0x5C-0x76, Tx Power index. -#define EEPROM_PwDiff 0x67 // Difference of gain index between legacy and high throughput OFDM. - -#define EEPROM_TxPowerCCK 0x5A // CCK Tx Power - -// 2009/02/09 Cosa Add for SD3 requirement -#define EEPROM_TX_PWR_HT20_DIFF 0x6e// HT20 Tx Power Index Difference -#define DEFAULT_HT20_TXPWR_DIFF 2 // HT20<->40 default Tx Power Index Difference -#define EEPROM_TX_PWR_OFDM_DIFF 0x71// OFDM Tx Power Index Difference - -#define EEPROM_TxPWRGroup 0x73// Power diff for channel group -#define EEPROM_Regulatory 0x79// Check if power safety is need - -#define EEPROM_BLUETOOTH_COEXIST 0x7E // 92cu, 0x7E[4] -#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] -#define BOARD_TYPE_NORMAL_MASK 0xE0 -#define BOARD_TYPE_TEST_MASK 0x0F -#define EEPROM_EASY_REPLACEMENT 0x50//BIT0 1 for build-in module, 0 for external dongle -//------------------------------------------------------------- -// EEPROM content definitions -//------------------------------------------------------------- -#define OS_LINK_SPEED BIT(5) - -#define BOARD_TYPE_MASK 0xF - -#define BT_COEXISTENCE BIT(4) -#define BT_CO_SHIFT 4 - -#define EP_NUMBER_MASK 0x30 //bit 4:5 0Eh -#define EP_NUMBER_SHIFT 4 - - -#define USB_PHY_PARA_SIZE 5 - - -//------------------------------------------------------------- -// EEPROM default value definitions -//------------------------------------------------------------- -// Use 0xABCD instead of 0x8192 for debug -#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 -#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 - -#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 -#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 -#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 - -#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A -#define EEPROM_DEF_VID_1 0x0B - -#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C -#define EEPROM_DEF_PID_1 0x81 - - -#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E -#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E - -#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F - -#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 -#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 -#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 -#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 - -#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 -#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 - - -#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A - -#define RF_OPTION1 0x79// Check if power safety spec is need -#define RF_OPTION2 0x7A -#define RF_OPTION3 0x7B -#define RF_OPTION4 0x7C - - -#define EEPROM_USB_SN BIT(0) -#define EEPROM_USB_REMOTE_WAKEUP BIT(1) -#define EEPROM_USB_DEVICE_PWR BIT(2) -#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) - -#if 0 -#define EEPROM_CHANNEL_PLAN_FCC 0x0 -#define EEPROM_CHANNEL_PLAN_IC 0x1 -#define EEPROM_CHANNEL_PLAN_ETSI 0x2 -#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 -#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 -#define EEPROM_CHANNEL_PLAN_MKK 0x5 -#define EEPROM_CHANNEL_PLAN_MKK1 0x6 -#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 -#define EEPROM_CHANNEL_PLAN_TELEC 0x8 -#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 -#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA -#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 - -#define EEPROM_CID_DEFAULT 0x0 - -#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 - - -#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. -#endif - -#endif - - -/*=================================================================== -===================================================================== -Here the register defines are for 92C. When the define is as same with 92C, -we will use the 92C's define for the consistency -So the following defines for 92C is not entire!!!!!! -===================================================================== -=====================================================================*/ -/* -Based on Datasheet V33---090401 -Register Summary -Current IOREG MAP -0x0000h ~ 0x00FFh System Configuration (256 Bytes) -0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) -0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) -0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) -0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) -0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) -0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) -0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) -0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) -*/ - -//---------------------------------------------------------------------------- -// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) -//---------------------------------------------------------------------------- -#define RCR_APPFCS BIT31 //WMAC append FCS after pauload -#define RCR_APP_MIC BIT30 // -#define RCR_APP_PHYSTS BIT28// -#define RCR_APP_ICV BIT29 // -#define RCR_APP_PHYST_RXFF BIT28 // -#define RCR_APP_BA_SSN BIT27 //Accept BA SSN -#define RCR_ENMBID BIT24 //Enable Multiple BssId. -#define RCR_LSIGEN BIT23 -#define RCR_MFBEN BIT22 -#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 -#define RCR_AMF BIT13 //Accept management type frame -#define RCR_ACF BIT12 //Accept control type frame -#define RCR_ADF BIT11 //Accept data type frame -#define RCR_AICV BIT9 //Accept ICV error packet -#define RCR_ACRC32 BIT8 //Accept CRC32 error packet -#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) -#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) -#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet -#define RCR_APWRMGT BIT5 //Accept power management packet -#define RCR_ADD3 BIT4 //Accept address 3 match packet -#define RCR_AB BIT3 //Accept broadcast packet -#define RCR_AM BIT2 //Accept multicast packet -#define RCR_APM BIT1 //Accept physical match packet -#define RCR_AAP BIT0 //Accept all unicast packet -#define RCR_MXDMA_OFFSET 8 -#define RCR_FIFO_OFFSET 13 - - - -//============================================================================ -// 8192c USB specific Regsiter Offset and Content definition, -// 2009.08.18, added by vivi. for merge 92c and 92C into one driver -//============================================================================ -//#define APS_FSMCO 0x0004 same with 92Ce -#define RSV_CTRL 0x001C -#define RD_CTRL 0x0524 - -//----------------------------------------------------- -// -// 0xFE00h ~ 0xFE55h USB Configuration -// -//----------------------------------------------------- -#define REG_USB_INFO 0xFE17 -#define REG_USB_SPECIAL_OPTION 0xFE55 -#define REG_USB_DMA_AGG_TO 0xFE5B -#define REG_USB_AGG_TO 0xFE5C -#define REG_USB_AGG_TH 0xFE5D - -#define REG_USB_VID 0xFE60 -#define REG_USB_PID 0xFE62 -#define REG_USB_OPTIONAL 0xFE64 -#define REG_USB_CHIRP_K 0xFE65 -#define REG_USB_PHY 0xFE66 -#define REG_USB_MAC_ADDR 0xFE70 - -#define REG_USB_HRPWM 0xFE58 -#define REG_USB_HCPWM 0xFE57 - -#define InvalidBBRFValue 0x12345678 - -//============================================================================ -// 8192C Regsiter Bit and Content definition -//============================================================================ -//----------------------------------------------------- -// -// 0x0000h ~ 0x00FFh System Configuration -// -//----------------------------------------------------- - -//2 SPS0_CTRL -#define SW18_FPWM BIT(3) - - -//2 SYS_ISO_CTRL -#define ISO_MD2PP BIT(0) -#define ISO_UA2USB BIT(1) -#define ISO_UD2CORE BIT(2) -#define ISO_PA2PCIE BIT(3) -#define ISO_PD2CORE BIT(4) -#define ISO_IP2MAC BIT(5) -#define ISO_DIOP BIT(6) -#define ISO_DIOE BIT(7) -#define ISO_EB2CORE BIT(8) -#define ISO_DIOR BIT(9) - -#define PWC_EV25V BIT(14) -#define PWC_EV12V BIT(15) - - -//2 SYS_FUNC_EN -#define FEN_BBRSTB BIT(0) -#define FEN_BB_GLB_RSTn BIT(1) -#define FEN_USBA BIT(2) -#define FEN_UPLL BIT(3) -#define FEN_USBD BIT(4) -#define FEN_DIO_PCIE BIT(5) -#define FEN_PCIEA BIT(6) -#define FEN_PPLL BIT(7) -#define FEN_PCIED BIT(8) -#define FEN_DIOE BIT(9) -#define FEN_CPUEN BIT(10) -#define FEN_DCORE BIT(11) -#define FEN_ELDR BIT(12) -#define FEN_DIO_RF BIT(13) -#define FEN_HWPDN BIT(14) -#define FEN_MREGEN BIT(15) - -//2 APS_FSMCO -#define PFM_LDALL BIT(0) -#define PFM_ALDN BIT(1) -#define PFM_LDKP BIT(2) -#define PFM_WOWL BIT(3) -#define EnPDN BIT(4) -#define PDN_PL BIT(5) -#define APFM_ONMAC BIT(8) -#define APFM_OFF BIT(9) -#define APFM_RSM BIT(10) -#define AFSM_HSUS BIT(11) -#define AFSM_PCIE BIT(12) -#define APDM_MAC BIT(13) -#define APDM_HOST BIT(14) -#define APDM_HPDN BIT(15) -#define RDY_MACON BIT(16) -#define SUS_HOST BIT(17) -#define ROP_ALD BIT(20) -#define ROP_PWR BIT(21) -#define ROP_SPS BIT(22) -#define SOP_MRST BIT(25) -#define SOP_FUSE BIT(26) -#define SOP_ABG BIT(27) -#define SOP_AMB BIT(28) -#define SOP_RCK BIT(29) -#define SOP_A8M BIT(30) -#define XOP_BTCK BIT(31) - -//2 SYS_CLKR -#define ANAD16V_EN BIT(0) -#define ANA8M BIT(1) -#define MACSLP BIT(4) -#define LOADER_CLK_EN BIT(5) -#define _80M_SSC_DIS BIT(7) -#define _80M_SSC_EN_HO BIT(8) -#define PHY_SSC_RSTB BIT(9) -#define SEC_CLK_EN BIT(10) -#define MAC_CLK_EN BIT(11) -#define SYS_CLK_EN BIT(12) -#define RING_CLK_EN BIT(13) - - -//2 9346CR - - -#define EEDO BIT(0) -#define EEDI BIT(1) -#define EESK BIT(2) -#define EECS BIT(3) -//#define EERPROMSEL BIT(4) -//#define EEPROM_EN BIT(5) -#define BOOT_FROM_EEPROM BIT(4) -#define EEPROM_EN BIT(5) -#define EEM0 BIT(6) -#define EEM1 BIT(7) - - -//2 AFE_MISC -#define AFE_BGEN BIT(0) -#define AFE_MBEN BIT(1) -#define MAC_ID_EN BIT(7) - - -//2 SPS0_CTRL - - -//2 SPS_OCP_CFG - - -//2 RSV_CTRL -#define WLOCK_ALL BIT(0) -#define WLOCK_00 BIT(1) -#define WLOCK_04 BIT(2) -#define WLOCK_08 BIT(3) -#define WLOCK_40 BIT(4) -#define R_DIS_PRST_0 BIT(5) -#define R_DIS_PRST_1 BIT(6) -#define LOCK_ALL_EN BIT(7) - -//2 RF_CTRL -#define RF_EN BIT(0) -#define RF_RSTB BIT(1) -#define RF_SDMRSTB BIT(2) - - - -//2 LDOA15_CTRL -#define LDA15_EN BIT(0) -#define LDA15_STBY BIT(1) -#define LDA15_OBUF BIT(2) -#define LDA15_REG_VOS BIT(3) -#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) - - - -//2 LDOV12D_CTRL -#define LDV12_EN BIT(0) -#define LDV12_SDBY BIT(1) -#define LPLDO_HSM BIT(2) -#define LPLDO_LSM_DIS BIT(3) -#define _LDV12_VADJ(x) (((x) & 0xF) << 4) - - -//2 AFE_XTAL_CTRL -#define XTAL_EN BIT(0) -#define XTAL_BSEL BIT(1) -#define _XTAL_BOSC(x) (((x) & 0x3) << 2) -#define _XTAL_CADJ(x) (((x) & 0xF) << 4) -#define XTAL_GATE_USB BIT(8) -#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) -#define XTAL_GATE_AFE BIT(11) -#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) -#define XTAL_RF_GATE BIT(14) -#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) -#define XTAL_GATE_DIG BIT(17) -#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) -#define XTAL_BT_GATE BIT(20) -#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) -#define _XTAL_GPIO(x) (((x) & 0x7) << 23) - - -#define CKDLY_AFE BIT(26) -#define CKDLY_USB BIT(27) -#define CKDLY_DIG BIT(28) -#define CKDLY_BT BIT(29) - - -//2 AFE_PLL_CTRL -#define APLL_EN BIT(0) -#define APLL_320_EN BIT(1) -#define APLL_FREF_SEL BIT(2) -#define APLL_EDGE_SEL BIT(3) -#define APLL_WDOGB BIT(4) -#define APLL_LPFEN BIT(5) - -#define APLL_REF_CLK_13MHZ 0x1 -#define APLL_REF_CLK_19_2MHZ 0x2 -#define APLL_REF_CLK_20MHZ 0x3 -#define APLL_REF_CLK_25MHZ 0x4 -#define APLL_REF_CLK_26MHZ 0x5 -#define APLL_REF_CLK_38_4MHZ 0x6 -#define APLL_REF_CLK_40MHZ 0x7 - -#define APLL_320EN BIT(14) -#define APLL_80EN BIT(15) -#define APLL_1MEN BIT(24) - - -//2 EFUSE_CTRL -#define ALD_EN BIT(18) -#define EF_PD BIT(19) -#define EF_FLAG BIT(31) - -//2 EFUSE_TEST (For RTL8723 partially) -#define EF_TRPT BIT(7) -#define EF_CELL_SEL (BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 -#define LDOE25_EN BIT(31) -#define EFUSE_SEL(x) (((x) & 0x3) << 8) -#define EFUSE_SEL_MASK 0x300 -#define EFUSE_WIFI_SEL_0 0x0 -#define EFUSE_BT_SEL_0 0x1 -#define EFUSE_BT_SEL_1 0x2 -#define EFUSE_BT_SEL_2 0x3 - -#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. -#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. - -//2 PWR_DATA - -//2 CAL_TIMER - -//2 ACLK_MON -#define RSM_EN BIT(0) -#define Timer_EN BIT(4) - - -//2 GPIO_MUXCFG -#define TRSW0EN BIT(2) -#define TRSW1EN BIT(3) -#define EROM_EN BIT(4) -#define EnBT BIT(5) -#define EnUart BIT(8) -#define Uart_910 BIT(9) -#define EnPMAC BIT(10) -#define SIC_SWRST BIT(11) -#define EnSIC BIT(12) -#define SIC_23 BIT(13) -#define EnHDP BIT(14) -#define SIC_LBK BIT(15) - -//2 GPIO_PIN_CTRL - -// GPIO BIT -#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2) - -//2 GPIO_INTM - -//2 LEDCFG -#define LED0PL BIT(4) -#define LED0DIS BIT(7) -#define LED1DIS BIT(15) -#define LED1PL BIT(12) - -#define SECCAM_CLR BIT(30) - - -//2 FSIMR - -//2 FSISR - - -//2 8051FWDL -//2 MCUFWDL -#define MCUFWDL_EN BIT(0) -#define MCUFWDL_RDY BIT(1) -#define FWDL_ChkSum_rpt BIT(2) -#define MACINI_RDY BIT(3) -#define BBINI_RDY BIT(4) -#define RFINI_RDY BIT(5) -#define WINTINI_RDY BIT(6) -#define CPRST BIT(23) - -//2REG_HPON_FSM -#define BOND92CE_1T2R_CFG BIT(22) - - -//2 REG_SYS_CFG -#define XCLK_VLD BIT(0) -#define ACLK_VLD BIT(1) -#define UCLK_VLD BIT(2) -#define PCLK_VLD BIT(3) -#define PCIRSTB BIT(4) -#define V15_VLD BIT(5) -#define TRP_B15V_EN BIT(7) -#define SIC_IDLE BIT(8) -#define BD_MAC2 BIT(9) -#define BD_MAC1 BIT(10) -#define IC_MACPHY_MODE BIT(11) -#define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) -#define BT_FUNC BIT(16) -#define VENDOR_ID BIT(19) -#define PAD_HWPD_IDN BIT(22) -#define TRP_VAUX_EN BIT(23) -#define TRP_BT_EN BIT(24) -#define BD_PKG_SEL BIT(25) -#define BD_HCI_SEL BIT(26) -#define TYPE_ID BIT(27) - -#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 -#define CHIP_VER_RTL_SHIFT 12 - -//2REG_GPIO_OUTSTS (For RTL8723 only) -#define EFS_HCI_SEL (BIT(0)|BIT(1)) -#define PAD_HCI_SEL (BIT(2)|BIT(3)) -#define HCI_SEL (BIT(4)|BIT(5)) -#define PKG_SEL_HCI BIT(6) -#define FEN_GPS BIT(7) -#define FEN_BT BIT(8) -#define FEN_WL BIT(9) -#define FEN_PCI BIT(10) -#define FEN_USB BIT(11) -#define BTRF_HWPDN_N BIT(12) -#define WLRF_HWPDN_N BIT(13) -#define PDN_BT_N BIT(14) -#define PDN_GPS_N BIT(15) -#define BT_CTL_HWPDN BIT(16) -#define GPS_CTL_HWPDN BIT(17) -#define PPHY_SUSB BIT(20) -#define UPHY_SUSB BIT(21) -#define PCI_SUSEN BIT(22) -#define USB_SUSEN BIT(23) -#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28)) - -//----------------------------------------------------- -// -// 0x0100h ~ 0x01FFh MACTOP General Configuration -// -//----------------------------------------------------- - - -//2 Function Enable Registers -//2 CR - -#define REG_LBMODE (REG_CR + 3) - - -#define HCI_TXDMA_EN BIT(0) -#define HCI_RXDMA_EN BIT(1) -#define TXDMA_EN BIT(2) -#define RXDMA_EN BIT(3) -#define PROTOCOL_EN BIT(4) -#define SCHEDULE_EN BIT(5) -#define MACTXEN BIT(6) -#define MACRXEN BIT(7) -#define ENSWBCN BIT(8) -#define ENSEC BIT(9) - -// Network type -#define _NETTYPE(x) (((x) & 0x3) << 16) -#define MASK_NETTYPE 0x30000 -#define NT_NO_LINK 0x0 -#define NT_LINK_AD_HOC 0x1 -#define NT_LINK_AP 0x2 -#define NT_AS_AP 0x3 - -#define _LBMODE(x) (((x) & 0xF) << 24) -#define MASK_LBMODE 0xF000000 -#define LOOPBACK_NORMAL 0x0 -#define LOOPBACK_IMMEDIATELY 0xB -#define LOOPBACK_MAC_DELAY 0x3 -#define LOOPBACK_PHY 0x1 -#define LOOPBACK_DMA 0x7 - - -//2 PBP - Page Size Register -#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) -#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) -#define _PSRX_MASK 0xF -#define _PSTX_MASK 0xF0 -#define _PSRX(x) (x) -#define _PSTX(x) ((x) << 4) - -#define PBP_64 0x0 -#define PBP_128 0x1 -#define PBP_256 0x2 -#define PBP_512 0x3 -#define PBP_1024 0x4 - - -//2 TX/RXDMA -#define RXDMA_ARBBW_EN BIT(0) -#define RXSHFT_EN BIT(1) -#define RXDMA_AGG_EN BIT(2) -#define QS_VO_QUEUE BIT(8) -#define QS_VI_QUEUE BIT(9) -#define QS_BE_QUEUE BIT(10) -#define QS_BK_QUEUE BIT(11) -#define QS_MANAGER_QUEUE BIT(12) -#define QS_HIGH_QUEUE BIT(13) - -#define HQSEL_VOQ BIT(0) -#define HQSEL_VIQ BIT(1) -#define HQSEL_BEQ BIT(2) -#define HQSEL_BKQ BIT(3) -#define HQSEL_MGTQ BIT(4) -#define HQSEL_HIQ BIT(5) - -// For normal driver, 0x10C -#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) -#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) -#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) -#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) -#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) -#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) - -#define QUEUE_LOW 1 -#define QUEUE_NORMAL 2 -#define QUEUE_HIGH 3 - - - -//2 TRXFF_BNDY - - -//2 LLT_INIT -#define _LLT_NO_ACTIVE 0x0 -#define _LLT_WRITE_ACCESS 0x1 -#define _LLT_READ_ACCESS 0x2 - -#define _LLT_INIT_DATA(x) ((x) & 0xFF) -#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) -#define _LLT_OP(x) (((x) & 0x3) << 30) -#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) - - -//2 BB_ACCESS_CTRL -#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) -#define BB_WRITE_EN BIT(30) -#define BB_READ_EN BIT(31) -//#define BB_ADDR_MASK 0xFFF -//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) - -//----------------------------------------------------- -// -// 0x0200h ~ 0x027Fh TXDMA Configuration -// -//----------------------------------------------------- -//2 RQPN -#define _HPQ(x) ((x) & 0xFF) -#define _LPQ(x) (((x) & 0xFF) << 8) -#define _PUBQ(x) (((x) & 0xFF) << 16) -#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register - - -#define HPQ_PUBLIC_DIS BIT(24) -#define LPQ_PUBLIC_DIS BIT(25) -#define LD_RQPN BIT(31) - - -//2 TDECTRL -#define BCN_VALID BIT(16) -#define BCN_HEAD(x) (((x) & 0xFF) << 8) -#define BCN_HEAD_MASK 0xFF00 - -//2 TDECTL -#define BLK_DESC_NUM_SHIFT 4 -#define BLK_DESC_NUM_MASK 0xF - - -//2 TXDMA_OFFSET_CHK -#define DROP_DATA_EN BIT(9) - -//----------------------------------------------------- -// -// 0x0400h ~ 0x047Fh Protocol Configuration -// -//----------------------------------------------------- -//2 FWHW_TXQ_CTRL -#define EN_AMPDU_RTY_NEW BIT(7) - -//2 INIRTSMCS_SEL -#define _INIRTSMCS_SEL(x) ((x) & 0x3F) - - -//2 SPEC SIFS -#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) -#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) - - -//2 RRSR - -#define RATE_REG_BITMAP_ALL 0xFFFFF - -#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) - -#define _RRSR_RSC(x) (((x) & 0x3) << 21) -#define RRSR_RSC_RESERVED 0x0 -#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 -#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 -#define RRSR_RSC_DUPLICATE_MODE 0x3 - - -//2 ARFR -#define USE_SHORT_G1 BIT(20) - -//2 AGGLEN_LMT_L -#define _AGGLMT_MCS0(x) ((x) & 0xF) -#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) -#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) -#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) -#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) -#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) -#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) -#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) - - -//2 RL -#define RETRY_LIMIT_SHORT_SHIFT 8 -#define RETRY_LIMIT_LONG_SHIFT 0 - - -//2 DARFRC -#define _DARF_RC1(x) ((x) & 0x1F) -#define _DARF_RC2(x) (((x) & 0x1F) << 8) -#define _DARF_RC3(x) (((x) & 0x1F) << 16) -#define _DARF_RC4(x) (((x) & 0x1F) << 24) -// NOTE: shift starting from address (DARFRC + 4) -#define _DARF_RC5(x) ((x) & 0x1F) -#define _DARF_RC6(x) (((x) & 0x1F) << 8) -#define _DARF_RC7(x) (((x) & 0x1F) << 16) -#define _DARF_RC8(x) (((x) & 0x1F) << 24) - - -//2 RARFRC -#define _RARF_RC1(x) ((x) & 0x1F) -#define _RARF_RC2(x) (((x) & 0x1F) << 8) -#define _RARF_RC3(x) (((x) & 0x1F) << 16) -#define _RARF_RC4(x) (((x) & 0x1F) << 24) -// NOTE: shift starting from address (RARFRC + 4) -#define _RARF_RC5(x) ((x) & 0x1F) -#define _RARF_RC6(x) (((x) & 0x1F) << 8) -#define _RARF_RC7(x) (((x) & 0x1F) << 16) -#define _RARF_RC8(x) (((x) & 0x1F) << 24) - - - - -//----------------------------------------------------- -// -// 0x0500h ~ 0x05FFh EDCA Configuration -// -//----------------------------------------------------- - - - -//2 EDCA setting -#define AC_PARAM_TXOP_LIMIT_OFFSET 16 -#define AC_PARAM_ECW_MAX_OFFSET 12 -#define AC_PARAM_ECW_MIN_OFFSET 8 -#define AC_PARAM_AIFS_OFFSET 0 - - -//2 EDCA_VO_PARAM -#define _AIFS(x) (x) -#define _ECW_MAX_MIN(x) ((x) << 8) -#define _TXOP_LIMIT(x) ((x) << 16) - - -#define _BCNIFS(x) ((x) & 0xFF) -#define _BCNECW(x) (((x) & 0xF))<< 8) - - -#define _LRL(x) ((x) & 0x3F) -#define _SRL(x) (((x) & 0x3F) << 8) - - -//2 SIFS_CCK -#define _SIFS_CCK_CTX(x) ((x) & 0xFF) -#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); - - -//2 SIFS_OFDM -#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) -#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); - - -//2 TBTT PROHIBIT -#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) - - -//2 REG_RD_CTRL -#define DIS_EDCA_CNT_DWN BIT(11) - - -//2 BCN_CTRL -#define EN_MBSSID BIT(1) -#define EN_TXBCN_RPT BIT(2) -#define EN_BCN_FUNCTION BIT(3) - -// The same function but different bit field. -#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) -#define DIS_TSF_UDT0_TEST_CHIP BIT(5) - -//2 ACMHWCTRL -#define AcmHw_HwEn BIT(0) -#define AcmHw_BeqEn BIT(1) -#define AcmHw_ViqEn BIT(2) -#define AcmHw_VoqEn BIT(3) -#define AcmHw_BeqStatus BIT(4) -#define AcmHw_ViqStatus BIT(5) -#define AcmHw_VoqStatus BIT(6) - - - -//----------------------------------------------------- -// -// 0x0600h ~ 0x07FFh WMAC Configuration -// -//----------------------------------------------------- - -//2 APSD_CTRL -#define APSDOFF BIT(6) -#define APSDOFF_STATUS BIT(7) - - -//2 BWOPMODE -#define BW_20MHZ BIT(2) -//#define BW_OPMODE_20MHZ BIT(2) // For compability - - -#define RATE_BITMAP_ALL 0xFFFFF - -// Only use CCK 1M rate for ACK -#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 - -//2 TCR -#define TSFRST BIT(0) -#define DIS_GCLK BIT(1) -#define PAD_SEL BIT(2) -#define PWR_ST BIT(6) -#define PWRBIT_OW_EN BIT(7) -#define ACRC BIT(8) -#define CFENDFORM BIT(9) -#define ICV BIT(10) - - - -//2 RCR -#define AAP BIT(0) -#define APM BIT(1) -#define AM BIT(2) -#define AB BIT(3) -#define ADD3 BIT(4) -#define APWRMGT BIT(5) -#define CBSSID BIT(6) -#define CBSSID_BCN BIT(7) -#define ACRC32 BIT(8) -#define AICV BIT(9) -#define ADF BIT(11) -#define ACF BIT(12) -#define AMF BIT(13) -#define HTC_LOC_CTRL BIT(14) -#define UC_DATA_EN BIT(16) -#define BM_DATA_EN BIT(17) -#define MFBEN BIT(22) -#define LSIGEN BIT(23) -#define EnMBID BIT(24) -#define APP_BASSN BIT(27) -#define APP_PHYSTS BIT(28) -#define APP_ICV BIT(29) -#define APP_MIC BIT(30) -#define APP_FCS BIT(31) - -//2 RX_PKT_LIMIT - -//2 RX_DLK_TIME - -//2 MBIDCAMCFG - - - -//2 AMPDU_MIN_SPACE -#define _MIN_SPACE(x) ((x) & 0x7) -#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) - - -//2 RXERR_RPT -#define RXERR_TYPE_OFDM_PPDU 0 -#define RXERR_TYPE_OFDM_FALSE_ALARM 1 -#define RXERR_TYPE_OFDM_MPDU_OK 2 -#define RXERR_TYPE_OFDM_MPDU_FAIL 3 -#define RXERR_TYPE_CCK_PPDU 4 -#define RXERR_TYPE_CCK_FALSE_ALARM 5 -#define RXERR_TYPE_CCK_MPDU_OK 6 -#define RXERR_TYPE_CCK_MPDU_FAIL 7 -#define RXERR_TYPE_HT_PPDU 8 -#define RXERR_TYPE_HT_FALSE_ALARM 9 -#define RXERR_TYPE_HT_MPDU_TOTAL 10 -#define RXERR_TYPE_HT_MPDU_OK 11 -#define RXERR_TYPE_HT_MPDU_FAIL 12 -#define RXERR_TYPE_RX_FULL_DROP 15 - -#define RXERR_COUNTER_MASK 0xFFFFF -#define RXERR_RPT_RST BIT(27) -#define _RXERR_RPT_SEL(type) ((type) << 28) - - -//2 SECCFG -#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key -#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key -#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption -#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption -#define SCR_SKByA2 BIT(4) //Search kEY BY A2 -#define SCR_NoSKMC BIT(5) //No Key Search Multicast - - - -//----------------------------------------------------- -// -// 0xFE00h ~ 0xFE55h USB Configuration -// -//----------------------------------------------------- - -//2 USB Information (0xFE17) -#define USB_IS_HIGH_SPEED 0 -#define USB_IS_FULL_SPEED 1 -#define USB_SPEED_MASK BIT(5) - -#define USB_NORMAL_SIE_EP_MASK 0xF -#define USB_NORMAL_SIE_EP_SHIFT 4 - -#define USB_TEST_EP_MASK 0x30 -#define USB_TEST_EP_SHIFT 4 - -//2 Special Option -#define USB_AGG_EN BIT(3) - - -//2REG_C2HEVT_CLEAR -#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message -#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. - - -//2REG_MULTI_FUNC_CTRL(For RTL8723 Only) -#define WL_HWPDN_EN BIT0 // Enable GPIO[9] as WiFi HW PDn source -#define WL_HWPDN_SL BIT1 // WiFi HW PDn polarity control -#define WL_FUNC_EN BIT2 // WiFi function enable -#define WL_HWROF_EN BIT3 // Enable GPIO[9] as WiFi RF HW PDn source -#define BT_HWPDN_EN BIT16 // Enable GPIO[11] as BT HW PDn source -#define BT_HWPDN_SL BIT17 // BT HW PDn polarity control -#define BT_FUNC_EN BIT18 // BT function enable -#define BT_HWROF_EN BIT19 // Enable GPIO[11] as BT/GPS RF HW PDn source -#define GPS_HWPDN_EN BIT20 // Enable GPIO[10] as GPS HW PDn source -#define GPS_HWPDN_SL BIT21 // GPS HW PDn polarity control -#define GPS_FUNC_EN BIT22 // GPS function enable - -//3 REG_LIFECTRL_CTRL -#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 -#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 -#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 -#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 - -#define HAL92C_MSDU_LIFE_TIME_UNIT 128 // in us, said by Tim. - -//======================================================== -// General definitions -//======================================================== - -#define MAC_ADDR_LEN 6 -#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 - -#define POLLING_LLT_THRESHOLD 20 -#define POLLING_READY_TIMEOUT_COUNT 1000 - -// Min Spacing related settings. -#define MAX_MSS_DENSITY_2T 0x13 -#define MAX_MSS_DENSITY_1T 0x0A - -//---------------------------------------------------------------------------- -// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) -//---------------------------------------------------------------------------- -#define GPIOSEL_GPIO 0 -#define GPIOSEL_ENBT BIT5 - -//---------------------------------------------------------------------------- -// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) -//---------------------------------------------------------------------------- -#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value -#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value -#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. -#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) - - - -#include "basic_types.h" - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTL8192C_SPEC_H__ +#define __RTL8192C_SPEC_H__ + +#include + +#ifndef BIT +#define BIT(x) (1 << (x)) +#endif + +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + + +//============================================================ +// 8192C Regsiter offset definition +//============================================================ + + +//============================================================ +// +//============================================================ + +//----------------------------------------------------- +// +// 0x0000h ~ 0x00FFh System Configuration +// +//----------------------------------------------------- +#define REG_SYS_ISO_CTRL 0x0000 +#define REG_SYS_FUNC_EN 0x0002 +#define REG_APS_FSMCO 0x0004 +#define REG_SYS_CLKR 0x0008 +#define REG_9346CR 0x000A +#define REG_EE_VPD 0x000C +#define REG_AFE_MISC 0x0010 +#define REG_SPS0_CTRL 0x0011 +#define REG_SPS_OCP_CFG 0x0018 +#define REG_RSV_CTRL 0x001C +#define REG_RF_CTRL 0x001F +#define REG_LDOA15_CTRL 0x0020 +#define REG_LDOV12D_CTRL 0x0021 +#define REG_LDOHCI12_CTRL 0x0022 +#define REG_LPLDO_CTRL 0x0023 +#define REG_AFE_XTAL_CTRL 0x0024 +#define REG_AFE_PLL_CTRL 0x0028 +#define REG_EFUSE_CTRL 0x0030 +#define REG_EFUSE_TEST 0x0034 +#define REG_PWR_DATA 0x0038 +#define REG_CAL_TIMER 0x003C +#define REG_ACLK_MON 0x003E +#define REG_GPIO_MUXCFG 0x0040 +#define REG_GPIO_IO_SEL 0x0042 +#define REG_MAC_PINMUX_CFG 0x0043 +#define REG_GPIO_PIN_CTRL 0x0044 +#define REG_GPIO_INTM 0x0048 +#define REG_LEDCFG0 0x004C +#define REG_LEDCFG1 0x004D +#define REG_LEDCFG2 0x004E +#define REG_LEDCFG3 0x004F +#define REG_LEDCFG REG_LEDCFG2 +#define REG_FSIMR 0x0050 +#define REG_FSISR 0x0054 +#define REG_HSIMR 0x0058 +#define REG_HSISR 0x005c +#define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. +#define REG_GPIO_IO_SEL_2 0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. +#define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source. +#define REG_MCUFWDL 0x0080 +#define REG_WOWLAN_REASON 0x0081 +#define REG_HMEBOX_EXT_0 0x0088 +#define REG_HMEBOX_EXT_1 0x008A +#define REG_HMEBOX_EXT_2 0x008C +#define REG_HMEBOX_EXT_3 0x008E +#define REG_HOST_SUSP_CNT 0x00BC // Host suspend counter on FPGA platform +#define REG_EFUSE_ACCESS 0x00CF // Efuse access protection for RTL8723 +#define REG_BIST_SCAN 0x00D0 +#define REG_BIST_RPT 0x00D4 +#define REG_BIST_ROM_RPT 0x00D8 +#define REG_USB_SIE_INTF 0x00E0 +#define REG_PCIE_MIO_INTF 0x00E4 +#define REG_PCIE_MIO_INTD 0x00E8 +#define REG_HPON_FSM 0x00EC +#define REG_SYS_CFG 0x00F0 +#define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only. + +//----------------------------------------------------- +// +// 0x0100h ~ 0x01FFh MACTOP General Configuration +// +//----------------------------------------------------- +#define REG_CR 0x0100 +#define REG_PBP 0x0104 +#define REG_TRXDMA_CTRL 0x010C +#define REG_TRXFF_BNDY 0x0114 +#define REG_TRXFF_STATUS 0x0118 +#define REG_RXFF_PTR 0x011C +#define REG_HIMR 0x0120 +#define REG_HISR 0x0124 +#define REG_HIMRE 0x0128 +#define REG_HISRE 0x012C +#define REG_CPWM 0x012F +#define REG_FWIMR 0x0130 +#define REG_FWISR 0x0134 +#define REG_PKTBUF_DBG_CTRL 0x0140 +#define REG_PKTBUF_DBG_DATA_L 0x0144 +#define REG_PKTBUF_DBG_DATA_H 0x0148 + +#define REG_TC0_CTRL 0x0150 +#define REG_TC1_CTRL 0x0154 +#define REG_TC2_CTRL 0x0158 +#define REG_TC3_CTRL 0x015C +#define REG_TC4_CTRL 0x0160 +#define REG_TCUNIT_BASE 0x0164 +#define REG_MBIST_START 0x0174 +#define REG_MBIST_DONE 0x0178 +#define REG_MBIST_FAIL 0x017C +#define REG_C2HEVT_MSG_NORMAL 0x01A0 +#define REG_C2HEVT_CLEAR 0x01AF +#define REG_C2HEVT_MSG_TEST 0x01B8 +#define REG_MCUTST_1 0x01c0 +#define REG_FMETHR 0x01C8 +#define REG_HMETFR 0x01CC +#define REG_HMEBOX_0 0x01D0 +#define REG_HMEBOX_1 0x01D4 +#define REG_HMEBOX_2 0x01D8 +#define REG_HMEBOX_3 0x01DC + +#define REG_LLT_INIT 0x01E0 +#define REG_BB_ACCEESS_CTRL 0x01E8 +#define REG_BB_ACCESS_DATA 0x01EC + + +//----------------------------------------------------- +// +// 0x0200h ~ 0x027Fh TXDMA Configuration +// +//----------------------------------------------------- +#define REG_RQPN 0x0200 +#define REG_FIFOPAGE 0x0204 +#define REG_TDECTRL 0x0208 +#define REG_TXDMA_OFFSET_CHK 0x020C +#define REG_TXDMA_STATUS 0x0210 +#define REG_RQPN_NPQ 0x0214 + +//----------------------------------------------------- +// +// 0x0280h ~ 0x02FFh RXDMA Configuration +// +//----------------------------------------------------- +#define REG_RXDMA_AGG_PG_TH 0x0280 +#define REG_RXPKT_NUM 0x0284 +#define REG_RXDMA_STATUS 0x0288 + + +//----------------------------------------------------- +// +// 0x0300h ~ 0x03FFh PCIe +// +//----------------------------------------------------- +#define REG_PCIE_CTRL_REG 0x0300 +#define REG_INT_MIG 0x0304 // Interrupt Migration +#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address +#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address +#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address +#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address +#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address +#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address +#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address +#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address +#define REG_DBI 0x0348 // Backdoor REG for Access Configuration +#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY +#define REG_DBG_SEL 0x0360 // Debug Selection Register +#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM +#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM +#define REG_UART_CTRL 0x0364 // UART Control +#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address +#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address + + +// spec version 11 +//----------------------------------------------------- +// +// 0x0400h ~ 0x047Fh Protocol Configuration +// +//----------------------------------------------------- +#define REG_VOQ_INFORMATION 0x0400 +#define REG_VIQ_INFORMATION 0x0404 +#define REG_BEQ_INFORMATION 0x0408 +#define REG_BKQ_INFORMATION 0x040C +#define REG_MGQ_INFORMATION 0x0410 +#define REG_HGQ_INFORMATION 0x0414 +#define REG_BCNQ_INFORMATION 0x0418 + + +#define REG_CPU_MGQ_INFORMATION 0x041C +#define REG_FWHW_TXQ_CTRL 0x0420 +#define REG_HWSEQ_CTRL 0x0423 +#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 +#define REG_TXPKTBUF_MGQ_BDNY 0x0425 +#define REG_LIFETIME_EN 0x0426 +#define REG_MULTI_BCNQ_OFFSET 0x0427 +#define REG_SPEC_SIFS 0x0428 +#define REG_RL 0x042A +#define REG_DARFRC 0x0430 +#define REG_RARFRC 0x0438 +#define REG_RRSR 0x0440 +#define REG_ARFR0 0x0444 +#define REG_ARFR1 0x0448 +#define REG_ARFR2 0x044C +#define REG_ARFR3 0x0450 +#define REG_AGGLEN_LMT 0x0458 +#define REG_AMPDU_MIN_SPACE 0x045C +#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D +#define REG_FAST_EDCA_CTRL 0x0460 +#define REG_RD_RESP_PKT_TH 0x0463 +#define REG_INIRTS_RATE_SEL 0x0480 +#define REG_INIDATA_RATE_SEL 0x0484 +#define REG_POWER_STATUS 0x04A4 +#define REG_POWER_STAGE1 0x04B4 +#define REG_POWER_STAGE2 0x04B8 +#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 +#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 +#define REG_STBC_SETTING 0x04C4 +#define REG_PROT_MODE_CTRL 0x04C8 +#define REG_MAX_AGGR_NUM 0x04CA +#define REG_RTS_MAX_AGGR_NUM 0x04CB +#define REG_BAR_MODE_CTRL 0x04CC +#define REG_RA_TRY_RATE_AGG_LMT 0x04CF +#define REG_NQOS_SEQ 0x04DC +#define REG_QOS_SEQ 0x04DE +#define REG_NEED_CPU_HANDLE 0x04E0 +#define REG_PKT_LOSE_RPT 0x04E1 +#define REG_PTCL_ERR_STATUS 0x04E2 +#define REG_DUMMY 0x04FC + + + +//----------------------------------------------------- +// +// 0x0500h ~ 0x05FFh EDCA Configuration +// +//----------------------------------------------------- +#define REG_EDCA_VO_PARAM 0x0500 +#define REG_EDCA_VI_PARAM 0x0504 +#define REG_EDCA_BE_PARAM 0x0508 +#define REG_EDCA_BK_PARAM 0x050C +#define REG_BCNTCFG 0x0510 +#define REG_PIFS 0x0512 +#define REG_RDG_PIFS 0x0513 +#define REG_SIFS_CCK 0x0514 +#define REG_SIFS_OFDM 0x0516 +#define REG_SIFS_CTX 0x0514 +#define REG_SIFS_TRX 0x0516 +#define REG_AGGR_BREAK_TIME 0x051A +#define REG_SLOT 0x051B +#define REG_TX_PTCL_CTRL 0x0520 +#define REG_TXPAUSE 0x0522 +#define REG_DIS_TXREQ_CLR 0x0523 +#define REG_RD_CTRL 0x0524 +#define REG_TBTT_PROHIBIT 0x0540 +#define REG_RD_NAV_NXT 0x0544 +#define REG_NAV_PROT_LEN 0x0546 +#define REG_BCN_CTRL 0x0550 +#define REG_BCN_CTRL_1 0x0551 +#define REG_MBID_NUM 0x0552 +#define REG_DUAL_TSF_RST 0x0553 +#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE +#define REG_MBSSID_BCN_SPACE 0x0554 +#define REG_DRVERLYINT 0x0558 +#define REG_BCNDMATIM 0x0559 +#define REG_ATIMWND 0x055A +#define REG_BCN_MAX_ERR 0x055D +#define REG_RXTSF_OFFSET_CCK 0x055E +#define REG_RXTSF_OFFSET_OFDM 0x055F +#define REG_TSFTR 0x0560 +#define REG_INIT_TSFTR 0x0564 +#define REG_PSTIMER 0x0580 +#define REG_TIMER0 0x0584 +#define REG_TIMER1 0x0588 +#define REG_ACMHWCTRL 0x05C0 +#define REG_ACMRSTCTRL 0x05C1 +#define REG_ACMAVG 0x05C2 +#define REG_VO_ADMTIME 0x05C4 +#define REG_VI_ADMTIME 0x05C6 +#define REG_BE_ADMTIME 0x05C8 +#define REG_EDCA_RANDOM_GEN 0x05CC +#define REG_SCH_TXCMD 0x05D0 + + +//----------------------------------------------------- +// +// 0x0600h ~ 0x07FFh WMAC Configuration +// +//----------------------------------------------------- +#define REG_APSD_CTRL 0x0600 +#define REG_BWOPMODE 0x0603 +#define REG_TCR 0x0604 +#define REG_RCR 0x0608 +#define REG_RX_PKT_LIMIT 0x060C +#define REG_RX_DLK_TIME 0x060D +#define REG_RX_DRVINFO_SZ 0x060F + +#define REG_MACID 0x0610 +#define REG_BSSID 0x0618 +#define REG_MAR 0x0620 +#define REG_MBIDCAMCFG 0x0628 + +#define REG_USTIME_EDCA 0x0638 +#define REG_MAC_SPEC_SIFS 0x063A + +// 20100719 Joseph: Hardware register definition change. (HW datasheet v54) +#define REG_R2T_SIFS 0x063C // [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK +#define REG_T2T_SIFS 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK +#define REG_ACKTO 0x0640 +#define REG_CTS2TO 0x0641 +#define REG_EIFS 0x0642 + +//WMA, BA, CCX +#define REG_NAV_CTRL 0x0650 +#define REG_BACAMCMD 0x0654 +#define REG_BACAMCONTENT 0x0658 +#define REG_LBDLY 0x0660 +#define REG_FWDLY 0x0661 +#define REG_RXERR_RPT 0x0664 +#define REG_WMAC_TRXPTCL_CTL 0x0668 + + +// Security +#define REG_CAMCMD 0x0670 +#define REG_CAMWRITE 0x0674 +#define REG_CAMREAD 0x0678 +#define REG_CAMDBG 0x067C +#define REG_SECCFG 0x0680 + +// Power +#define REG_WOW_CTRL 0x0690 +#define REG_PSSTATUS 0x0691 +#define REG_PS_RX_INFO 0x0692 +#define REG_LPNAV_CTRL 0x0694 +#define REG_WKFMCAM_CMD 0x0698 +#define REG_WKFMCAM_RWD 0x069C +#define REG_RXFLTMAP0 0x06A0 +#define REG_RXFLTMAP1 0x06A2 +#define REG_RXFLTMAP2 0x06A4 +#define REG_BCN_PSR_RPT 0x06A8 +#define REG_CALB32K_CTRL 0x06AC +#define REG_PKT_MON_CTRL 0x06B4 +#define REG_BT_COEX_TABLE 0x06C0 +#define REG_WMAC_RESP_TXINFO 0x06D8 + + +//----------------------------------------------------- +// +// 0xFE00h ~ 0xFE55h USB Configuration +// +//----------------------------------------------------- +#define REG_USB_INFO 0xFE17 +#define REG_USB_SPECIAL_OPTION 0xFE55 +#define REG_USB_DMA_AGG_TO 0xFE5B +#define REG_USB_AGG_TO 0xFE5C +#define REG_USB_AGG_TH 0xFE5D + +// For test chip +#define REG_TEST_USB_TXQS 0xFE48 +#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 +#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 +#define REG_TEST_SIE_OPTIONAL 0xFE64 +#define REG_TEST_SIE_CHIRP_K 0xFE65 +#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B +#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 +#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 + + +// For normal chip +#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 +#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 +#define REG_NORMAL_SIE_OPTIONAL 0xFE64 +#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 +#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B +#define REG_NORMAL_SIE_OPTIONAL2 0xFE6C +#define REG_NORMAL_SIE_GPS_EP 0xFE6D // 0xFE6D, for RTL8723 only. +#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 +#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF + + +//----------------------------------------------------- +// +// Redifine 8192C register definition for compatibility +// +//----------------------------------------------------- + +// TODO: use these definition when using REG_xxx naming rule. +// NOTE: DO NOT Remove these definition. Use later. + +#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. +#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. +#define SYS_CLK REG_SYS_CLKR +#define CR9346 REG_9346CR // 93C46/93C56 Command Register. +#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. +#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. +#define MSR (REG_CR + 2) // Media Status register +#define ISR REG_HISR +#define TSFR REG_TSFTR // Timing Sync Function Timer Register. + +#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 +#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 + +#define PBP REG_PBP + +// Redifine MACID register, to compatible prior ICs. +#define IDR0 MACIDR0 +#define IDR4 MACIDR4 + + +// +// 9. Security Control Registers (Offset: ) +// +#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd +#define WCAMI REG_CAMWRITE // Software write CAM input content +#define RCAMO REG_CAMREAD // Software read/write CAM config +#define CAMDBG REG_CAMDBG +#define SECR REG_SECCFG //Security Configuration Register + +// Unused register +#define UnusedRegister 0x1BF +#define DCAM UnusedRegister +#define PSR UnusedRegister +#define BBAddr UnusedRegister +#define PhyDataR UnusedRegister + +#define InvalidBBRFValue 0x12345678 + +// Min Spacing related settings. +#define MAX_MSS_DENSITY_2T 0x13 +#define MAX_MSS_DENSITY_1T 0x0A + +//---------------------------------------------------------------------------- +// 8192C Cmd9346CR bits (Offset 0xA, 16bit) +//---------------------------------------------------------------------------- +#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 +#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 +#define Cmd9346CR_9356SEL BIT4 +#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) +#define AutoLoadEFUSE CmdEEPROM_En + +//---------------------------------------------------------------------------- +// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) +//---------------------------------------------------------------------------- +#define GPIOSEL_GPIO 0 +#define GPIOSEL_ENBT BIT5 + +//---------------------------------------------------------------------------- +// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) +//---------------------------------------------------------------------------- +#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value +#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value +#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. +#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) + +//---------------------------------------------------------------------------- +// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) +//---------------------------------------------------------------------------- +/* +Network Type +00: No link +01: Link in ad hoc network +10: Link in infrastructure network +11: AP mode +Default: 00b. +*/ +#define MSR_NOLINK 0x00 +#define MSR_ADHOC 0x01 +#define MSR_INFRA 0x02 +#define MSR_AP 0x03 + +// +// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) +// +//---------------------------------------------------------------------------- +// 8192C Response Rate Set Register (offset 0x181, 24bits) +//---------------------------------------------------------------------------- +#define RRSR_RSC_OFFSET 21 +#define RRSR_SHORT_OFFSET 23 +#define RRSR_RSC_BW_40M 0x600000 +#define RRSR_RSC_UPSUBCHNL 0x400000 +#define RRSR_RSC_LOWSUBCHNL 0x200000 +#define RRSR_SHORT 0x800000 +#define RRSR_1M BIT0 +#define RRSR_2M BIT1 +#define RRSR_5_5M BIT2 +#define RRSR_11M BIT3 +#define RRSR_6M BIT4 +#define RRSR_9M BIT5 +#define RRSR_12M BIT6 +#define RRSR_18M BIT7 +#define RRSR_24M BIT8 +#define RRSR_36M BIT9 +#define RRSR_48M BIT10 +#define RRSR_54M BIT11 +#define RRSR_MCS0 BIT12 +#define RRSR_MCS1 BIT13 +#define RRSR_MCS2 BIT14 +#define RRSR_MCS3 BIT15 +#define RRSR_MCS4 BIT16 +#define RRSR_MCS5 BIT17 +#define RRSR_MCS6 BIT18 +#define RRSR_MCS7 BIT19 +#define BRSR_AckShortPmb BIT23 +// CCK ACK: use Short Preamble or not + + +//---------------------------------------------------------------------------- +// 8192C Rate Definition +//---------------------------------------------------------------------------- +//CCK +#define RATR_1M 0x00000001 +#define RATR_2M 0x00000002 +#define RATR_55M 0x00000004 +#define RATR_11M 0x00000008 +//OFDM +#define RATR_6M 0x00000010 +#define RATR_9M 0x00000020 +#define RATR_12M 0x00000040 +#define RATR_18M 0x00000080 +#define RATR_24M 0x00000100 +#define RATR_36M 0x00000200 +#define RATR_48M 0x00000400 +#define RATR_54M 0x00000800 +//MCS 1 Spatial Stream +#define RATR_MCS0 0x00001000 +#define RATR_MCS1 0x00002000 +#define RATR_MCS2 0x00004000 +#define RATR_MCS3 0x00008000 +#define RATR_MCS4 0x00010000 +#define RATR_MCS5 0x00020000 +#define RATR_MCS6 0x00040000 +#define RATR_MCS7 0x00080000 +//MCS 2 Spatial Stream +#define RATR_MCS8 0x00100000 +#define RATR_MCS9 0x00200000 +#define RATR_MCS10 0x00400000 +#define RATR_MCS11 0x00800000 +#define RATR_MCS12 0x01000000 +#define RATR_MCS13 0x02000000 +#define RATR_MCS14 0x04000000 +#define RATR_MCS15 0x08000000 + + +// NOTE: For 92CU - Ziv +//CCK +#define RATE_1M BIT(0) +#define RATE_2M BIT(1) +#define RATE_5_5M BIT(2) +#define RATE_11M BIT(3) +//OFDM +#define RATE_6M BIT(4) +#define RATE_9M BIT(5) +#define RATE_12M BIT(6) +#define RATE_18M BIT(7) +#define RATE_24M BIT(8) +#define RATE_36M BIT(9) +#define RATE_48M BIT(10) +#define RATE_54M BIT(11) +//MCS 1 Spatial Stream +#define RATE_MCS0 BIT(12) +#define RATE_MCS1 BIT(13) +#define RATE_MCS2 BIT(14) +#define RATE_MCS3 BIT(15) +#define RATE_MCS4 BIT(16) +#define RATE_MCS5 BIT(17) +#define RATE_MCS6 BIT(18) +#define RATE_MCS7 BIT(19) +//MCS 2 Spatial Stream +#define RATE_MCS8 BIT(20) +#define RATE_MCS9 BIT(21) +#define RATE_MCS10 BIT(22) +#define RATE_MCS11 BIT(23) +#define RATE_MCS12 BIT(24) +#define RATE_MCS13 BIT(25) +#define RATE_MCS14 BIT(26) +#define RATE_MCS15 BIT(27) + + + + +// ALL CCK Rate +#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M +#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ + RATR_36M|RATR_48M|RATR_54M +#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ + RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7 +#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\ + RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 + +//---------------------------------------------------------------------------- +// 8192C BW_OPMODE bits (Offset 0x203, 8bit) +//---------------------------------------------------------------------------- +#define BW_OPMODE_20MHZ BIT2 +#define BW_OPMODE_5G BIT1 +#define BW_OPMODE_11J BIT0 + + +//---------------------------------------------------------------------------- +// 8192C CAM Config Setting (offset 0x250, 1 byte) +//---------------------------------------------------------------------------- +#define CAM_VALID BIT15 +#define CAM_NOTVALID 0x0000 +#define CAM_USEDK BIT5 + +#define CAM_CONTENT_COUNT 8 + +#define CAM_NONE 0x0 +#define CAM_WEP40 0x01 +#define CAM_TKIP 0x02 +#define CAM_AES 0x04 +#define CAM_WEP104 0x05 + +#define TOTAL_CAM_ENTRY 32 +#define HALF_CAM_ENTRY 16 + +#define CAM_CONFIG_USEDK _TRUE +#define CAM_CONFIG_NO_USEDK _FALSE + +#define CAM_WRITE BIT16 +#define CAM_READ 0x00000000 +#define CAM_POLLINIG BIT31 + +#define SCR_UseDK 0x01 +#define SCR_TxSecEnable 0x02 +#define SCR_RxSecEnable 0x04 + + +// +// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) +// +//---------------------------------------------------------------------------- +// 8190 IMR/ISR bits (offset 0xfd, 8bits) +//---------------------------------------------------------------------------- +#define IMR8190_DISABLED 0x0 +// IMR DW0 Bit 0-31 +#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 +#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 +#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 +#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 +#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 +#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 +#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 +#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 +#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 +#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 +#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 +#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 +#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 +#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 +#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 +#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 +#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow +#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt +#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 +#define IMR_RXFOVW BIT12 // Receive FIFO Overflow +#define IMR_RDU BIT11 // Receive Descriptor Unavailable +#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt +#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup +#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt +#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup +#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt +#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt +#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt +#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt +#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt +#define IMR_VODOK BIT1 // AC_VO DMA Interrupt +#define IMR_ROK BIT0 // Receive DMA OK Interrupt + +#define IMR_RX_MASK (IMR_ROK|IMR_RDU|IMR_RXFOVW) +#define IMR_TX_MASK (IMR_VODOK|IMR_VIDOK|IMR_BEDOK|IMR_BKDOK|IMR_MGNTDOK|IMR_HIGHDOK|IMR_BDOK) + +// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) +#define IMR_TXERR BIT11 +#define IMR_RXERR BIT10 +#define IMR_C2HCMD BIT9 +#define IMR_CPWM BIT8 +//RSVD [2-7] +#define IMR_OCPINT BIT1 +#define IMR_WLANOFF BIT0 + + + +//---------------------------------------------------------------------------- +// 8192C EFUSE +//---------------------------------------------------------------------------- +#define HWSET_MAX_SIZE 128 + + +//---------------------------------------------------------------------------- +// 8192C EEPROM/EFUSE share register definition. +//---------------------------------------------------------------------------- + +// +// Default Value for EEPROM or EFUSE!!! +// +#define EEPROM_Default_TSSI 0x0 +#define EEPROM_Default_TxPowerDiff 0x0 +#define EEPROM_Default_CrystalCap 0x5 +#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) +#define EEPROM_Default_TxPower 0x1010 +#define EEPROM_Default_HT2T_TxPwr 0x10 + +#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 +#define EEPROM_Default_ThermalMeter 0x12 + +#define EEPROM_Default_AntTxPowerDiff 0x0 +#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 +#define EEPROM_Default_TxPowerLevel 0x22 +#define EEPROM_Default_HT40_2SDiff 0x0 +#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference +#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 +#define EEPROM_Default_HT40_PwrMaxOffset 0 +#define EEPROM_Default_HT20_PwrMaxOffset 0 + +// For debug +#define EEPROM_Default_PID 0x1234 +#define EEPROM_Default_VID 0x5678 +#define EEPROM_Default_CustomerID 0xAB +#define EEPROM_Default_SubCustomerID 0xCD +#define EEPROM_Default_Version 0 + +#define EEPROM_CHANNEL_PLAN_FCC 0x0 +#define EEPROM_CHANNEL_PLAN_IC 0x1 +#define EEPROM_CHANNEL_PLAN_ETSI 0x2 +#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 +#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 +#define EEPROM_CHANNEL_PLAN_MKK 0x5 +#define EEPROM_CHANNEL_PLAN_MKK1 0x6 +#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 +#define EEPROM_CHANNEL_PLAN_TELEC 0x8 +#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 +#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA +#define EEPROM_CHANNEL_PLAN_NCC 0xB +#define EEPROM_USB_OPTIONAL1 0xE +#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 + + +#define EEPROM_CID_DEFAULT 0x0 +#define EEPROM_CID_TOSHIBA 0x4 +#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. +#define EEPROM_CID_QMI 0x0D +#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 + + +#define RTL_EEPROM_ID 0x8129 + + +#ifdef CONFIG_PCI_HCI +#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) +#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) +#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) + +// +// Interface type. +// +typedef enum _INTERFACE_SELECT_8192CPCIe{ + INTF_SEL0_SOLO_MINICARD = 0, // WiFi solo-mCard + INTF_SEL1_BT_COMBO_MINICARD = 1, // WiFi+BT combo-mCard + INTF_SEL2_PCIe = 2, // PCIe Card +} INTERFACE_SELECT_8192CPCIe, *PINTERFACE_SELECT_8192CPCIe; + +#define RTL8190_EEPROM_ID 0x8129 // 0-1 +#define EEPROM_HPON 0x02 // LDO settings.2-5 +#define EEPROM_CLK 0x06 // Clock settings.6-7 +#define EEPROM_TESTR 0x08 // SE Test mode.8 + +#define EEPROM_VID 0x0A // SE Vendor ID.A-B +#define EEPROM_DID 0x0C // SE Device ID. C-D +#define EEPROM_SVID 0x0E // SE Vendor ID.E-F +#define EEPROM_SMID 0x10 // SE PCI Subsystem ID. 10-11 + +#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 + +//---------------------------------------------------------------- +// Ziv - Let PCIe and USB use the same define. Modify address mapping later. +#define EEPROM_CCK_TX_PWR_INX 0x5A +#define EEPROM_HT40_1S_TX_PWR_INX 0x60 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 +#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 +#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C +#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F +#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 + +#define EEPROM_CHANNEL_PLAN 0x75 +#define EEPROM_TSSI_A 0x76 +#define EEPROM_TSSI_B 0x77 +#define EEPROM_THERMAL_METER 0x78 +#define EEPROM_RF_OPT1 0x79 +#define EEPROM_RF_OPT2 0x7A +#define EEPROM_RF_OPT3 0x7B +#define EEPROM_RF_OPT4 0x7C +#define EEPROM_VERSION 0x7E +#define EEPROM_CUSTOMER_ID 0x7F + +#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] + +#endif + +#ifdef CONFIG_USB_HCI + +//should be renamed and moved to another file +typedef enum _BOARD_TYPE_8192CUSB{ + BOARD_USB_DONGLE = 0, // USB dongle + BOARD_USB_High_PA = 1, // USB dongle with high power PA + BOARD_MINICARD = 2, // Minicard + BOARD_USB_SOLO = 3, // USB solo-Slim module + BOARD_USB_COMBO = 4, // USB Combo-Slim module +} BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB; + +#define SUPPORT_HW_RADIO_DETECT(pHalData) (pHalData->BoardType == BOARD_MINICARD||\ + pHalData->BoardType == BOARD_USB_SOLO||\ + pHalData->BoardType == BOARD_USB_COMBO) + +//--------------------------------------------------------------- +// EEPROM address for Test chip +//--------------------------------------------------------------- +#define EEPROM_TEST_USB_OPT 0x0E +#define EEPROM_TEST_CHIRP_K 0x0F +#define EEPROM_TEST_EP_SETTING 0x0E +#define EEPROM_TEST_USB_PHY 0x10 + + +//--------------------------------------------------------------- +// EEPROM address for Normal chip +//--------------------------------------------------------------- +#define EEPROM_NORMAL_USB_OPT 0x0E +#define EEPROM_NORMAL_CHIRP_K 0x0E // Changed +#define EEPROM_NORMAL_EP_SETTING 0x0F // Changed +#define EEPROM_NORMAL_USB_PHY 0x12 // Changed + + +// Test chip and normal chip common define +//--------------------------------------------------------------- +// EEPROM address for both +//--------------------------------------------------------------- +#define EEPROM_ID0 0x00 +#define EEPROM_ID1 0x01 +#define EEPROM_RTK_RSV1 0x02 +#define EEPROM_RTK_RSV2 0x03 +#define EEPROM_RTK_RSV3 0x04 +#define EEPROM_RTK_RSV4 0x05 +#define EEPROM_RTK_RSV5 0x06 +#define EEPROM_DBG_SEL 0x07 +#define EEPROM_RTK_RSV6 0x08 +#define EEPROM_VID 0x0A +#define EEPROM_PID 0x0C + +#define EEPROM_MAC_ADDR 0x16 +#define EEPROM_STRING 0x1C +#define EEPROM_SUBCUSTOMER_ID 0x59 +#define EEPROM_CCK_TX_PWR_INX 0x5A +#define EEPROM_HT40_1S_TX_PWR_INX 0x60 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 +#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 +#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C +#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F +#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 + +#define EEPROM_CHANNEL_PLAN 0x75 +#define EEPROM_TSSI_A 0x76 +#define EEPROM_TSSI_B 0x77 +#define EEPROM_THERMAL_METER 0x78 +#define EEPROM_RF_OPT1 0x79 +#define EEPROM_RF_OPT2 0x7A +#define EEPROM_RF_OPT3 0x7B +#define EEPROM_RF_OPT4 0x7C +#define EEPROM_VERSION 0x7E +#define EEPROM_CUSTOMER_ID 0x7F + +#define EEPROM_BoardType 0x54 //0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU +#define EEPROM_TxPwIndex 0x5C //0x5C-0x76, Tx Power index. +#define EEPROM_PwDiff 0x67 // Difference of gain index between legacy and high throughput OFDM. + +#define EEPROM_TxPowerCCK 0x5A // CCK Tx Power + +// 2009/02/09 Cosa Add for SD3 requirement +#define EEPROM_TX_PWR_HT20_DIFF 0x6e// HT20 Tx Power Index Difference +#define DEFAULT_HT20_TXPWR_DIFF 2 // HT20<->40 default Tx Power Index Difference +#define EEPROM_TX_PWR_OFDM_DIFF 0x71// OFDM Tx Power Index Difference + +#define EEPROM_TxPWRGroup 0x73// Power diff for channel group +#define EEPROM_Regulatory 0x79// Check if power safety is need + +#define EEPROM_BLUETOOTH_COEXIST 0x7E // 92cu, 0x7E[4] +#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] +#define BOARD_TYPE_NORMAL_MASK 0xE0 +#define BOARD_TYPE_TEST_MASK 0x0F +#define EEPROM_EASY_REPLACEMENT 0x50//BIT0 1 for build-in module, 0 for external dongle +//------------------------------------------------------------- +// EEPROM content definitions +//------------------------------------------------------------- +#define OS_LINK_SPEED BIT(5) + +#define BOARD_TYPE_MASK 0xF + +#define BT_COEXISTENCE BIT(4) +#define BT_CO_SHIFT 4 + +#define EP_NUMBER_MASK 0x30 //bit 4:5 0Eh +#define EP_NUMBER_SHIFT 4 + + +#define USB_PHY_PARA_SIZE 5 + + +//------------------------------------------------------------- +// EEPROM default value definitions +//------------------------------------------------------------- +// Use 0xABCD instead of 0x8192 for debug +#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 +#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 + +#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 +#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 +#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 + +#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A +#define EEPROM_DEF_VID_1 0x0B + +#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C +#define EEPROM_DEF_PID_1 0x81 + + +#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E +#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E + +#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F + +#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 +#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 +#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 +#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 + +#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 +#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 + + +#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A + +#define RF_OPTION1 0x79// Check if power safety spec is need +#define RF_OPTION2 0x7A +#define RF_OPTION3 0x7B +#define RF_OPTION4 0x7C + + +#define EEPROM_USB_SN BIT(0) +#define EEPROM_USB_REMOTE_WAKEUP BIT(1) +#define EEPROM_USB_DEVICE_PWR BIT(2) +#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) + +#if 0 +#define EEPROM_CHANNEL_PLAN_FCC 0x0 +#define EEPROM_CHANNEL_PLAN_IC 0x1 +#define EEPROM_CHANNEL_PLAN_ETSI 0x2 +#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 +#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 +#define EEPROM_CHANNEL_PLAN_MKK 0x5 +#define EEPROM_CHANNEL_PLAN_MKK1 0x6 +#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 +#define EEPROM_CHANNEL_PLAN_TELEC 0x8 +#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 +#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA +#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 + +#define EEPROM_CID_DEFAULT 0x0 + +#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 + + +#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. +#endif + +#endif + + +/*=================================================================== +===================================================================== +Here the register defines are for 92C. When the define is as same with 92C, +we will use the 92C's define for the consistency +So the following defines for 92C is not entire!!!!!! +===================================================================== +=====================================================================*/ +/* +Based on Datasheet V33---090401 +Register Summary +Current IOREG MAP +0x0000h ~ 0x00FFh System Configuration (256 Bytes) +0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) +0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) +0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) +0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) +0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) +0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) +0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) +0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) +*/ + +//---------------------------------------------------------------------------- +// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) +//---------------------------------------------------------------------------- +#define RCR_APPFCS BIT31 //WMAC append FCS after pauload +#define RCR_APP_MIC BIT30 // +#define RCR_APP_PHYSTS BIT28// +#define RCR_APP_ICV BIT29 // +#define RCR_APP_PHYST_RXFF BIT28 // +#define RCR_APP_BA_SSN BIT27 //Accept BA SSN +#define RCR_ENMBID BIT24 //Enable Multiple BssId. +#define RCR_LSIGEN BIT23 +#define RCR_MFBEN BIT22 +#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 +#define RCR_AMF BIT13 //Accept management type frame +#define RCR_ACF BIT12 //Accept control type frame +#define RCR_ADF BIT11 //Accept data type frame +#define RCR_AICV BIT9 //Accept ICV error packet +#define RCR_ACRC32 BIT8 //Accept CRC32 error packet +#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) +#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) +#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet +#define RCR_APWRMGT BIT5 //Accept power management packet +#define RCR_ADD3 BIT4 //Accept address 3 match packet +#define RCR_AB BIT3 //Accept broadcast packet +#define RCR_AM BIT2 //Accept multicast packet +#define RCR_APM BIT1 //Accept physical match packet +#define RCR_AAP BIT0 //Accept all unicast packet +#define RCR_MXDMA_OFFSET 8 +#define RCR_FIFO_OFFSET 13 + + + +//============================================================================ +// 8192c USB specific Regsiter Offset and Content definition, +// 2009.08.18, added by vivi. for merge 92c and 92C into one driver +//============================================================================ +//#define APS_FSMCO 0x0004 same with 92Ce +#define RSV_CTRL 0x001C +#define RD_CTRL 0x0524 + +//----------------------------------------------------- +// +// 0xFE00h ~ 0xFE55h USB Configuration +// +//----------------------------------------------------- +#define REG_USB_INFO 0xFE17 +#define REG_USB_SPECIAL_OPTION 0xFE55 +#define REG_USB_DMA_AGG_TO 0xFE5B +#define REG_USB_AGG_TO 0xFE5C +#define REG_USB_AGG_TH 0xFE5D + +#define REG_USB_VID 0xFE60 +#define REG_USB_PID 0xFE62 +#define REG_USB_OPTIONAL 0xFE64 +#define REG_USB_CHIRP_K 0xFE65 +#define REG_USB_PHY 0xFE66 +#define REG_USB_MAC_ADDR 0xFE70 + +#define REG_USB_HRPWM 0xFE58 +#define REG_USB_HCPWM 0xFE57 + +#define InvalidBBRFValue 0x12345678 + +//============================================================================ +// 8192C Regsiter Bit and Content definition +//============================================================================ +//----------------------------------------------------- +// +// 0x0000h ~ 0x00FFh System Configuration +// +//----------------------------------------------------- + +//2 SPS0_CTRL +#define SW18_FPWM BIT(3) + + +//2 SYS_ISO_CTRL +#define ISO_MD2PP BIT(0) +#define ISO_UA2USB BIT(1) +#define ISO_UD2CORE BIT(2) +#define ISO_PA2PCIE BIT(3) +#define ISO_PD2CORE BIT(4) +#define ISO_IP2MAC BIT(5) +#define ISO_DIOP BIT(6) +#define ISO_DIOE BIT(7) +#define ISO_EB2CORE BIT(8) +#define ISO_DIOR BIT(9) + +#define PWC_EV25V BIT(14) +#define PWC_EV12V BIT(15) + + +//2 SYS_FUNC_EN +#define FEN_BBRSTB BIT(0) +#define FEN_BB_GLB_RSTn BIT(1) +#define FEN_USBA BIT(2) +#define FEN_UPLL BIT(3) +#define FEN_USBD BIT(4) +#define FEN_DIO_PCIE BIT(5) +#define FEN_PCIEA BIT(6) +#define FEN_PPLL BIT(7) +#define FEN_PCIED BIT(8) +#define FEN_DIOE BIT(9) +#define FEN_CPUEN BIT(10) +#define FEN_DCORE BIT(11) +#define FEN_ELDR BIT(12) +#define FEN_DIO_RF BIT(13) +#define FEN_HWPDN BIT(14) +#define FEN_MREGEN BIT(15) + +//2 APS_FSMCO +#define PFM_LDALL BIT(0) +#define PFM_ALDN BIT(1) +#define PFM_LDKP BIT(2) +#define PFM_WOWL BIT(3) +#define EnPDN BIT(4) +#define PDN_PL BIT(5) +#define APFM_ONMAC BIT(8) +#define APFM_OFF BIT(9) +#define APFM_RSM BIT(10) +#define AFSM_HSUS BIT(11) +#define AFSM_PCIE BIT(12) +#define APDM_MAC BIT(13) +#define APDM_HOST BIT(14) +#define APDM_HPDN BIT(15) +#define RDY_MACON BIT(16) +#define SUS_HOST BIT(17) +#define ROP_ALD BIT(20) +#define ROP_PWR BIT(21) +#define ROP_SPS BIT(22) +#define SOP_MRST BIT(25) +#define SOP_FUSE BIT(26) +#define SOP_ABG BIT(27) +#define SOP_AMB BIT(28) +#define SOP_RCK BIT(29) +#define SOP_A8M BIT(30) +#define XOP_BTCK BIT(31) + +//2 SYS_CLKR +#define ANAD16V_EN BIT(0) +#define ANA8M BIT(1) +#define MACSLP BIT(4) +#define LOADER_CLK_EN BIT(5) +#define _80M_SSC_DIS BIT(7) +#define _80M_SSC_EN_HO BIT(8) +#define PHY_SSC_RSTB BIT(9) +#define SEC_CLK_EN BIT(10) +#define MAC_CLK_EN BIT(11) +#define SYS_CLK_EN BIT(12) +#define RING_CLK_EN BIT(13) + + +//2 9346CR + + +#define EEDO BIT(0) +#define EEDI BIT(1) +#define EESK BIT(2) +#define EECS BIT(3) +//#define EERPROMSEL BIT(4) +//#define EEPROM_EN BIT(5) +#define BOOT_FROM_EEPROM BIT(4) +#define EEPROM_EN BIT(5) +#define EEM0 BIT(6) +#define EEM1 BIT(7) + + +//2 AFE_MISC +#define AFE_BGEN BIT(0) +#define AFE_MBEN BIT(1) +#define MAC_ID_EN BIT(7) + + +//2 SPS0_CTRL + + +//2 SPS_OCP_CFG + + +//2 RSV_CTRL +#define WLOCK_ALL BIT(0) +#define WLOCK_00 BIT(1) +#define WLOCK_04 BIT(2) +#define WLOCK_08 BIT(3) +#define WLOCK_40 BIT(4) +#define R_DIS_PRST_0 BIT(5) +#define R_DIS_PRST_1 BIT(6) +#define LOCK_ALL_EN BIT(7) + +//2 RF_CTRL +#define RF_EN BIT(0) +#define RF_RSTB BIT(1) +#define RF_SDMRSTB BIT(2) + + + +//2 LDOA15_CTRL +#define LDA15_EN BIT(0) +#define LDA15_STBY BIT(1) +#define LDA15_OBUF BIT(2) +#define LDA15_REG_VOS BIT(3) +#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) + + + +//2 LDOV12D_CTRL +#define LDV12_EN BIT(0) +#define LDV12_SDBY BIT(1) +#define LPLDO_HSM BIT(2) +#define LPLDO_LSM_DIS BIT(3) +#define _LDV12_VADJ(x) (((x) & 0xF) << 4) + + +//2 AFE_XTAL_CTRL +#define XTAL_EN BIT(0) +#define XTAL_BSEL BIT(1) +#define _XTAL_BOSC(x) (((x) & 0x3) << 2) +#define _XTAL_CADJ(x) (((x) & 0xF) << 4) +#define XTAL_GATE_USB BIT(8) +#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) +#define XTAL_GATE_AFE BIT(11) +#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) +#define XTAL_RF_GATE BIT(14) +#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) +#define XTAL_GATE_DIG BIT(17) +#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) +#define XTAL_BT_GATE BIT(20) +#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) +#define _XTAL_GPIO(x) (((x) & 0x7) << 23) + + +#define CKDLY_AFE BIT(26) +#define CKDLY_USB BIT(27) +#define CKDLY_DIG BIT(28) +#define CKDLY_BT BIT(29) + + +//2 AFE_PLL_CTRL +#define APLL_EN BIT(0) +#define APLL_320_EN BIT(1) +#define APLL_FREF_SEL BIT(2) +#define APLL_EDGE_SEL BIT(3) +#define APLL_WDOGB BIT(4) +#define APLL_LPFEN BIT(5) + +#define APLL_REF_CLK_13MHZ 0x1 +#define APLL_REF_CLK_19_2MHZ 0x2 +#define APLL_REF_CLK_20MHZ 0x3 +#define APLL_REF_CLK_25MHZ 0x4 +#define APLL_REF_CLK_26MHZ 0x5 +#define APLL_REF_CLK_38_4MHZ 0x6 +#define APLL_REF_CLK_40MHZ 0x7 + +#define APLL_320EN BIT(14) +#define APLL_80EN BIT(15) +#define APLL_1MEN BIT(24) + + +//2 EFUSE_CTRL +#define ALD_EN BIT(18) +#define EF_PD BIT(19) +#define EF_FLAG BIT(31) + +//2 EFUSE_TEST (For RTL8723 partially) +#define EF_TRPT BIT(7) +#define EF_CELL_SEL (BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 +#define LDOE25_EN BIT(31) +#define EFUSE_SEL(x) (((x) & 0x3) << 8) +#define EFUSE_SEL_MASK 0x300 +#define EFUSE_WIFI_SEL_0 0x0 +#define EFUSE_BT_SEL_0 0x1 +#define EFUSE_BT_SEL_1 0x2 +#define EFUSE_BT_SEL_2 0x3 + +#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. +#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. + +//2 PWR_DATA + +//2 CAL_TIMER + +//2 ACLK_MON +#define RSM_EN BIT(0) +#define Timer_EN BIT(4) + + +//2 GPIO_MUXCFG +#define TRSW0EN BIT(2) +#define TRSW1EN BIT(3) +#define EROM_EN BIT(4) +#define EnBT BIT(5) +#define EnUart BIT(8) +#define Uart_910 BIT(9) +#define EnPMAC BIT(10) +#define SIC_SWRST BIT(11) +#define EnSIC BIT(12) +#define SIC_23 BIT(13) +#define EnHDP BIT(14) +#define SIC_LBK BIT(15) + +//2 GPIO_PIN_CTRL + +// GPIO BIT +#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2) + +//2 GPIO_INTM + +//2 LEDCFG +#define LED0PL BIT(4) +#define LED0DIS BIT(7) +#define LED1DIS BIT(15) +#define LED1PL BIT(12) + +#define SECCAM_CLR BIT(30) + + +//2 FSIMR + +//2 FSISR + + +//2 8051FWDL +//2 MCUFWDL +#define MCUFWDL_EN BIT(0) +#define MCUFWDL_RDY BIT(1) +#define FWDL_ChkSum_rpt BIT(2) +#define MACINI_RDY BIT(3) +#define BBINI_RDY BIT(4) +#define RFINI_RDY BIT(5) +#define WINTINI_RDY BIT(6) +#define CPRST BIT(23) + +//2REG_HPON_FSM +#define BOND92CE_1T2R_CFG BIT(22) + + +//2 REG_SYS_CFG +#define XCLK_VLD BIT(0) +#define ACLK_VLD BIT(1) +#define UCLK_VLD BIT(2) +#define PCLK_VLD BIT(3) +#define PCIRSTB BIT(4) +#define V15_VLD BIT(5) +#define TRP_B15V_EN BIT(7) +#define SIC_IDLE BIT(8) +#define BD_MAC2 BIT(9) +#define BD_MAC1 BIT(10) +#define IC_MACPHY_MODE BIT(11) +#define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) +#define BT_FUNC BIT(16) +#define VENDOR_ID BIT(19) +#define PAD_HWPD_IDN BIT(22) +#define TRP_VAUX_EN BIT(23) +#define TRP_BT_EN BIT(24) +#define BD_PKG_SEL BIT(25) +#define BD_HCI_SEL BIT(26) +#define TYPE_ID BIT(27) + +#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 +#define CHIP_VER_RTL_SHIFT 12 + +//2REG_GPIO_OUTSTS (For RTL8723 only) +#define EFS_HCI_SEL (BIT(0)|BIT(1)) +#define PAD_HCI_SEL (BIT(2)|BIT(3)) +#define HCI_SEL (BIT(4)|BIT(5)) +#define PKG_SEL_HCI BIT(6) +#define FEN_GPS BIT(7) +#define FEN_BT BIT(8) +#define FEN_WL BIT(9) +#define FEN_PCI BIT(10) +#define FEN_USB BIT(11) +#define BTRF_HWPDN_N BIT(12) +#define WLRF_HWPDN_N BIT(13) +#define PDN_BT_N BIT(14) +#define PDN_GPS_N BIT(15) +#define BT_CTL_HWPDN BIT(16) +#define GPS_CTL_HWPDN BIT(17) +#define PPHY_SUSB BIT(20) +#define UPHY_SUSB BIT(21) +#define PCI_SUSEN BIT(22) +#define USB_SUSEN BIT(23) +#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28)) + +//----------------------------------------------------- +// +// 0x0100h ~ 0x01FFh MACTOP General Configuration +// +//----------------------------------------------------- + + +//2 Function Enable Registers +//2 CR + +#define REG_LBMODE (REG_CR + 3) + + +#define HCI_TXDMA_EN BIT(0) +#define HCI_RXDMA_EN BIT(1) +#define TXDMA_EN BIT(2) +#define RXDMA_EN BIT(3) +#define PROTOCOL_EN BIT(4) +#define SCHEDULE_EN BIT(5) +#define MACTXEN BIT(6) +#define MACRXEN BIT(7) +#define ENSWBCN BIT(8) +#define ENSEC BIT(9) + +// Network type +#define _NETTYPE(x) (((x) & 0x3) << 16) +#define MASK_NETTYPE 0x30000 +#define NT_NO_LINK 0x0 +#define NT_LINK_AD_HOC 0x1 +#define NT_LINK_AP 0x2 +#define NT_AS_AP 0x3 + +#define _LBMODE(x) (((x) & 0xF) << 24) +#define MASK_LBMODE 0xF000000 +#define LOOPBACK_NORMAL 0x0 +#define LOOPBACK_IMMEDIATELY 0xB +#define LOOPBACK_MAC_DELAY 0x3 +#define LOOPBACK_PHY 0x1 +#define LOOPBACK_DMA 0x7 + + +//2 PBP - Page Size Register +#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) +#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) +#define _PSRX_MASK 0xF +#define _PSTX_MASK 0xF0 +#define _PSRX(x) (x) +#define _PSTX(x) ((x) << 4) + +#define PBP_64 0x0 +#define PBP_128 0x1 +#define PBP_256 0x2 +#define PBP_512 0x3 +#define PBP_1024 0x4 + + +//2 TX/RXDMA +#define RXDMA_ARBBW_EN BIT(0) +#define RXSHFT_EN BIT(1) +#define RXDMA_AGG_EN BIT(2) +#define QS_VO_QUEUE BIT(8) +#define QS_VI_QUEUE BIT(9) +#define QS_BE_QUEUE BIT(10) +#define QS_BK_QUEUE BIT(11) +#define QS_MANAGER_QUEUE BIT(12) +#define QS_HIGH_QUEUE BIT(13) + +#define HQSEL_VOQ BIT(0) +#define HQSEL_VIQ BIT(1) +#define HQSEL_BEQ BIT(2) +#define HQSEL_BKQ BIT(3) +#define HQSEL_MGTQ BIT(4) +#define HQSEL_HIQ BIT(5) + +// For normal driver, 0x10C +#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) +#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) +#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) +#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) +#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) +#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) + +#define QUEUE_LOW 1 +#define QUEUE_NORMAL 2 +#define QUEUE_HIGH 3 + + + +//2 TRXFF_BNDY + + +//2 LLT_INIT +#define _LLT_NO_ACTIVE 0x0 +#define _LLT_WRITE_ACCESS 0x1 +#define _LLT_READ_ACCESS 0x2 + +#define _LLT_INIT_DATA(x) ((x) & 0xFF) +#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) +#define _LLT_OP(x) (((x) & 0x3) << 30) +#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) + + +//2 BB_ACCESS_CTRL +#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) +#define BB_WRITE_EN BIT(30) +#define BB_READ_EN BIT(31) +//#define BB_ADDR_MASK 0xFFF +//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) + +//----------------------------------------------------- +// +// 0x0200h ~ 0x027Fh TXDMA Configuration +// +//----------------------------------------------------- +//2 RQPN +#define _HPQ(x) ((x) & 0xFF) +#define _LPQ(x) (((x) & 0xFF) << 8) +#define _PUBQ(x) (((x) & 0xFF) << 16) +#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register + + +#define HPQ_PUBLIC_DIS BIT(24) +#define LPQ_PUBLIC_DIS BIT(25) +#define LD_RQPN BIT(31) + + +//2 TDECTRL +#define BCN_VALID BIT(16) +#define BCN_HEAD(x) (((x) & 0xFF) << 8) +#define BCN_HEAD_MASK 0xFF00 + +//2 TDECTL +#define BLK_DESC_NUM_SHIFT 4 +#define BLK_DESC_NUM_MASK 0xF + + +//2 TXDMA_OFFSET_CHK +#define DROP_DATA_EN BIT(9) + +//----------------------------------------------------- +// +// 0x0400h ~ 0x047Fh Protocol Configuration +// +//----------------------------------------------------- +//2 FWHW_TXQ_CTRL +#define EN_AMPDU_RTY_NEW BIT(7) + +//2 INIRTSMCS_SEL +#define _INIRTSMCS_SEL(x) ((x) & 0x3F) + + +//2 SPEC SIFS +#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) +#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) + + +//2 RRSR + +#define RATE_REG_BITMAP_ALL 0xFFFFF + +#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) + +#define _RRSR_RSC(x) (((x) & 0x3) << 21) +#define RRSR_RSC_RESERVED 0x0 +#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 +#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 +#define RRSR_RSC_DUPLICATE_MODE 0x3 + + +//2 ARFR +#define USE_SHORT_G1 BIT(20) + +//2 AGGLEN_LMT_L +#define _AGGLMT_MCS0(x) ((x) & 0xF) +#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) +#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) +#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) +#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) +#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) +#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) +#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) + + +//2 RL +#define RETRY_LIMIT_SHORT_SHIFT 8 +#define RETRY_LIMIT_LONG_SHIFT 0 + + +//2 DARFRC +#define _DARF_RC1(x) ((x) & 0x1F) +#define _DARF_RC2(x) (((x) & 0x1F) << 8) +#define _DARF_RC3(x) (((x) & 0x1F) << 16) +#define _DARF_RC4(x) (((x) & 0x1F) << 24) +// NOTE: shift starting from address (DARFRC + 4) +#define _DARF_RC5(x) ((x) & 0x1F) +#define _DARF_RC6(x) (((x) & 0x1F) << 8) +#define _DARF_RC7(x) (((x) & 0x1F) << 16) +#define _DARF_RC8(x) (((x) & 0x1F) << 24) + + +//2 RARFRC +#define _RARF_RC1(x) ((x) & 0x1F) +#define _RARF_RC2(x) (((x) & 0x1F) << 8) +#define _RARF_RC3(x) (((x) & 0x1F) << 16) +#define _RARF_RC4(x) (((x) & 0x1F) << 24) +// NOTE: shift starting from address (RARFRC + 4) +#define _RARF_RC5(x) ((x) & 0x1F) +#define _RARF_RC6(x) (((x) & 0x1F) << 8) +#define _RARF_RC7(x) (((x) & 0x1F) << 16) +#define _RARF_RC8(x) (((x) & 0x1F) << 24) + + + + +//----------------------------------------------------- +// +// 0x0500h ~ 0x05FFh EDCA Configuration +// +//----------------------------------------------------- + + + +//2 EDCA setting +#define AC_PARAM_TXOP_LIMIT_OFFSET 16 +#define AC_PARAM_ECW_MAX_OFFSET 12 +#define AC_PARAM_ECW_MIN_OFFSET 8 +#define AC_PARAM_AIFS_OFFSET 0 + + +//2 EDCA_VO_PARAM +#define _AIFS(x) (x) +#define _ECW_MAX_MIN(x) ((x) << 8) +#define _TXOP_LIMIT(x) ((x) << 16) + + +#define _BCNIFS(x) ((x) & 0xFF) +#define _BCNECW(x) (((x) & 0xF))<< 8) + + +#define _LRL(x) ((x) & 0x3F) +#define _SRL(x) (((x) & 0x3F) << 8) + + +//2 SIFS_CCK +#define _SIFS_CCK_CTX(x) ((x) & 0xFF) +#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); + + +//2 SIFS_OFDM +#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) +#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); + + +//2 TBTT PROHIBIT +#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) + + +//2 REG_RD_CTRL +#define DIS_EDCA_CNT_DWN BIT(11) + + +//2 BCN_CTRL +#define EN_MBSSID BIT(1) +#define EN_TXBCN_RPT BIT(2) +#define EN_BCN_FUNCTION BIT(3) + +// The same function but different bit field. +#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) +#define DIS_TSF_UDT0_TEST_CHIP BIT(5) + +//2 ACMHWCTRL +#define AcmHw_HwEn BIT(0) +#define AcmHw_BeqEn BIT(1) +#define AcmHw_ViqEn BIT(2) +#define AcmHw_VoqEn BIT(3) +#define AcmHw_BeqStatus BIT(4) +#define AcmHw_ViqStatus BIT(5) +#define AcmHw_VoqStatus BIT(6) + + + +//----------------------------------------------------- +// +// 0x0600h ~ 0x07FFh WMAC Configuration +// +//----------------------------------------------------- + +//2 APSD_CTRL +#define APSDOFF BIT(6) +#define APSDOFF_STATUS BIT(7) + + +//2 BWOPMODE +#define BW_20MHZ BIT(2) +//#define BW_OPMODE_20MHZ BIT(2) // For compability + + +#define RATE_BITMAP_ALL 0xFFFFF + +// Only use CCK 1M rate for ACK +#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 + +//2 TCR +#define TSFRST BIT(0) +#define DIS_GCLK BIT(1) +#define PAD_SEL BIT(2) +#define PWR_ST BIT(6) +#define PWRBIT_OW_EN BIT(7) +#define ACRC BIT(8) +#define CFENDFORM BIT(9) +#define ICV BIT(10) + + + +//2 RCR +#define AAP BIT(0) +#define APM BIT(1) +#define AM BIT(2) +#define AB BIT(3) +#define ADD3 BIT(4) +#define APWRMGT BIT(5) +#define CBSSID BIT(6) +#define CBSSID_BCN BIT(7) +#define ACRC32 BIT(8) +#define AICV BIT(9) +#define ADF BIT(11) +#define ACF BIT(12) +#define AMF BIT(13) +#define HTC_LOC_CTRL BIT(14) +#define UC_DATA_EN BIT(16) +#define BM_DATA_EN BIT(17) +#define MFBEN BIT(22) +#define LSIGEN BIT(23) +#define EnMBID BIT(24) +#define APP_BASSN BIT(27) +#define APP_PHYSTS BIT(28) +#define APP_ICV BIT(29) +#define APP_MIC BIT(30) +#define APP_FCS BIT(31) + +//2 RX_PKT_LIMIT + +//2 RX_DLK_TIME + +//2 MBIDCAMCFG + + + +//2 AMPDU_MIN_SPACE +#define _MIN_SPACE(x) ((x) & 0x7) +#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) + + +//2 RXERR_RPT +#define RXERR_TYPE_OFDM_PPDU 0 +#define RXERR_TYPE_OFDM_FALSE_ALARM 1 +#define RXERR_TYPE_OFDM_MPDU_OK 2 +#define RXERR_TYPE_OFDM_MPDU_FAIL 3 +#define RXERR_TYPE_CCK_PPDU 4 +#define RXERR_TYPE_CCK_FALSE_ALARM 5 +#define RXERR_TYPE_CCK_MPDU_OK 6 +#define RXERR_TYPE_CCK_MPDU_FAIL 7 +#define RXERR_TYPE_HT_PPDU 8 +#define RXERR_TYPE_HT_FALSE_ALARM 9 +#define RXERR_TYPE_HT_MPDU_TOTAL 10 +#define RXERR_TYPE_HT_MPDU_OK 11 +#define RXERR_TYPE_HT_MPDU_FAIL 12 +#define RXERR_TYPE_RX_FULL_DROP 15 + +#define RXERR_COUNTER_MASK 0xFFFFF +#define RXERR_RPT_RST BIT(27) +#define _RXERR_RPT_SEL(type) ((type) << 28) + + +//2 SECCFG +#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key +#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key +#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption +#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption +#define SCR_SKByA2 BIT(4) //Search kEY BY A2 +#define SCR_NoSKMC BIT(5) //No Key Search Multicast + + + +//----------------------------------------------------- +// +// 0xFE00h ~ 0xFE55h USB Configuration +// +//----------------------------------------------------- + +//2 USB Information (0xFE17) +#define USB_IS_HIGH_SPEED 0 +#define USB_IS_FULL_SPEED 1 +#define USB_SPEED_MASK BIT(5) + +#define USB_NORMAL_SIE_EP_MASK 0xF +#define USB_NORMAL_SIE_EP_SHIFT 4 + +#define USB_TEST_EP_MASK 0x30 +#define USB_TEST_EP_SHIFT 4 + +//2 Special Option +#define USB_AGG_EN BIT(3) + + +//2REG_C2HEVT_CLEAR +#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message +#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. + + +//2REG_MULTI_FUNC_CTRL(For RTL8723 Only) +#define WL_HWPDN_EN BIT0 // Enable GPIO[9] as WiFi HW PDn source +#define WL_HWPDN_SL BIT1 // WiFi HW PDn polarity control +#define WL_FUNC_EN BIT2 // WiFi function enable +#define WL_HWROF_EN BIT3 // Enable GPIO[9] as WiFi RF HW PDn source +#define BT_HWPDN_EN BIT16 // Enable GPIO[11] as BT HW PDn source +#define BT_HWPDN_SL BIT17 // BT HW PDn polarity control +#define BT_FUNC_EN BIT18 // BT function enable +#define BT_HWROF_EN BIT19 // Enable GPIO[11] as BT/GPS RF HW PDn source +#define GPS_HWPDN_EN BIT20 // Enable GPIO[10] as GPS HW PDn source +#define GPS_HWPDN_SL BIT21 // GPS HW PDn polarity control +#define GPS_FUNC_EN BIT22 // GPS function enable + +//3 REG_LIFECTRL_CTRL +#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 +#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 +#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 +#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 + +#define HAL92C_MSDU_LIFE_TIME_UNIT 128 // in us, said by Tim. + +//======================================================== +// General definitions +//======================================================== + +#define MAC_ADDR_LEN 6 +#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 + +#define POLLING_LLT_THRESHOLD 20 +#define POLLING_READY_TIMEOUT_COUNT 1000 + +// Min Spacing related settings. +#define MAX_MSS_DENSITY_2T 0x13 +#define MAX_MSS_DENSITY_1T 0x0A + +//---------------------------------------------------------------------------- +// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) +//---------------------------------------------------------------------------- +#define GPIOSEL_GPIO 0 +#define GPIOSEL_ENBT BIT5 + +//---------------------------------------------------------------------------- +// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) +//---------------------------------------------------------------------------- +#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value +#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value +#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. +#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) + + + +#include "basic_types.h" + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_sreset.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_sreset.h old mode 100755 new mode 100644 index bd521c49ad3fcc..dace4133ae1d54 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_sreset.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_sreset.h @@ -1,54 +1,54 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef _RTL8192C_SRESET_C_ -#define _RTL8192C_SRESET_C_ - -#include -#include -#include - -#ifdef DBG_CONFIG_ERROR_DETECT -#define WIFI_STATUS_SUCCESS 0 -#define USB_VEN_REQ_CMD_FAIL BIT0 -#define USB_READ_PORT_FAIL BIT1 -#define USB_WRITE_PORT_FAIL BIT2 -#define WIFI_MAC_TXDMA_ERROR BIT3 -#define WIFI_TX_HANG BIT4 -#define WIFI_RX_HANG BIT5 -#define WIFI_IF_NOT_EXIST BIT6 - -struct sreset_priv { - _mutex silentreset_mutex; - u8 silent_reset_inprogress; - u8 Wifi_Error_Status; - unsigned long last_tx_time; - unsigned long last_tx_complete_time; -}; - - -extern void rtl8192c_sreset_init_value(_adapter *padapter); -extern void rtl8192c_sreset_reset_value(_adapter *padapter); -extern void rtl8192c_silentreset_for_specific_platform(_adapter *padapter); -extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter); -extern void rtl8192c_sreset_linked_status_check(_adapter *padapter); -extern u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter); -#endif -#endif +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef _RTL8192C_SRESET_C_ +#define _RTL8192C_SRESET_C_ + +#include +#include +#include + +#ifdef DBG_CONFIG_ERROR_DETECT +#define WIFI_STATUS_SUCCESS 0 +#define USB_VEN_REQ_CMD_FAIL BIT0 +#define USB_READ_PORT_FAIL BIT1 +#define USB_WRITE_PORT_FAIL BIT2 +#define WIFI_MAC_TXDMA_ERROR BIT3 +#define WIFI_TX_HANG BIT4 +#define WIFI_RX_HANG BIT5 +#define WIFI_IF_NOT_EXIST BIT6 + +struct sreset_priv { + _mutex silentreset_mutex; + u8 silent_reset_inprogress; + u8 Wifi_Error_Status; + unsigned long last_tx_time; + unsigned long last_tx_complete_time; +}; + + +extern void rtl8192c_sreset_init_value(_adapter *padapter); +extern void rtl8192c_sreset_reset_value(_adapter *padapter); +extern void rtl8192c_silentreset_for_specific_platform(_adapter *padapter); +extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter); +extern void rtl8192c_sreset_linked_status_check(_adapter *padapter); +extern u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter); +#endif +#endif diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192c_xmit.h b/drivers/net/wireless/rtl8192cu/include/rtl8192c_xmit.h old mode 100755 new mode 100644 index f4428afd636a50..efb5f99771b990 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192c_xmit.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192c_xmit.h @@ -1,91 +1,91 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef _RTL8192C_XMIT_H_ -#define _RTL8192C_XMIT_H_ - -#define VO_QUEUE_INX 0 -#define VI_QUEUE_INX 1 -#define BE_QUEUE_INX 2 -#define BK_QUEUE_INX 3 -#define BCN_QUEUE_INX 4 -#define MGT_QUEUE_INX 5 -#define HIGH_QUEUE_INX 6 -#define TXCMD_QUEUE_INX 7 - -#define HW_QUEUE_ENTRY 8 - -// -// Queue Select Value in TxDesc -// -#define QSLT_BK 0x2//0x01 -#define QSLT_BE 0x0 -#define QSLT_VI 0x5//0x4 -#define QSLT_VO 0x7//0x6 -#define QSLT_BEACON 0x10 -#define QSLT_HIGH 0x11 -#define QSLT_MGNT 0x12 -#define QSLT_CMD 0x13 - -#ifdef CONFIG_USB_HCI - -#ifdef CONFIG_USB_TX_AGGREGATION -#define MAX_TX_AGG_PACKET_NUMBER 0xFF -#endif - -s32 rtl8192cu_init_xmit_priv(_adapter * padapter); - -void rtl8192cu_free_xmit_priv(_adapter * padapter); - -void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc); - -s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - -void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); - -s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); - -#ifdef CONFIG_HOSTAPD_MLME -s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); -#endif - -#endif - -#ifdef CONFIG_PCI_HCI -s32 rtl8192ce_init_xmit_priv(_adapter * padapter); -void rtl8192ce_free_xmit_priv(_adapter * padapter); - -s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); -struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring); - -void rtl8192ce_xmitframe_resume(_adapter *padapter); - -void rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); - -s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); - -#ifdef CONFIG_HOSTAPD_MLME -s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); -#endif - -#endif - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef _RTL8192C_XMIT_H_ +#define _RTL8192C_XMIT_H_ + +#define VO_QUEUE_INX 0 +#define VI_QUEUE_INX 1 +#define BE_QUEUE_INX 2 +#define BK_QUEUE_INX 3 +#define BCN_QUEUE_INX 4 +#define MGT_QUEUE_INX 5 +#define HIGH_QUEUE_INX 6 +#define TXCMD_QUEUE_INX 7 + +#define HW_QUEUE_ENTRY 8 + +// +// Queue Select Value in TxDesc +// +#define QSLT_BK 0x2//0x01 +#define QSLT_BE 0x0 +#define QSLT_VI 0x5//0x4 +#define QSLT_VO 0x7//0x6 +#define QSLT_BEACON 0x10 +#define QSLT_HIGH 0x11 +#define QSLT_MGNT 0x12 +#define QSLT_CMD 0x13 + +#ifdef CONFIG_USB_HCI + +#ifdef CONFIG_USB_TX_AGGREGATION +#define MAX_TX_AGG_PACKET_NUMBER 0xFF +#endif + +s32 rtl8192cu_init_xmit_priv(_adapter * padapter); + +void rtl8192cu_free_xmit_priv(_adapter * padapter); + +void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc); + +s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); + +void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); + +s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); + +#ifdef CONFIG_HOSTAPD_MLME +s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); +#endif + +#endif + +#ifdef CONFIG_PCI_HCI +s32 rtl8192ce_init_xmit_priv(_adapter * padapter); +void rtl8192ce_free_xmit_priv(_adapter * padapter); + +s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); +struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring); + +void rtl8192ce_xmitframe_resume(_adapter *padapter); + +void rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); + +s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); + +#ifdef CONFIG_HOSTAPD_MLME +s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); +#endif + +#endif + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_cmd.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_cmd.h old mode 100755 new mode 100644 index f07a2bddaecc93..cb414a1a59864a --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_cmd.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_cmd.h @@ -1,133 +1,133 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTL8192D_CMD_H_ -#define __RTL8192D_CMD_H_ - - -//-------------------------------------------- -//3 Host Message Box -//-------------------------------------------- - -// User Define Message [31:8] - -//_SETPWRMODE_PARM -#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) - -//JOINBSSRPT_PARM -#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -//_RSVDPAGE_LOC -#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) - -//P2P_PS_OFFLOAD - -struct P2P_PS_Offload_t { - unsigned char Offload_En:1; - unsigned char role:1; // 1: Owner, 0: Client - unsigned char CTWindow_En:1; - unsigned char NoA0_En:1; - unsigned char NoA1_En:1; - unsigned char AllStaSleep:1; // Only valid in Owner - unsigned char discovery:1; - unsigned char rsvd:1; -}; - -#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) - -// Description: Determine the types of H2C commands that are the same in driver and Fw. -// Fisrt constructed by tynli. 2009.10.09. -typedef enum _RTL8192D_H2C_CMD -{ - H2C_AP_OFFLOAD = 0, /*0*/ - H2C_SETPWRMODE = 1, /*1*/ - H2C_JOINBSSRPT = 2, /*2*/ - H2C_RSVDPAGE = 3, - H2C_RSSI_REPORT = 5, - H2C_RA_MASK = 6, - H2C_P2P_PS_OFFLOAD = 8, - H2C_MAC_MODE_SEL = 9, - H2C_PWRM=15, - H2C_WO_WLAN_CMD = 20, // Wake on Wlan. - H2C_P2P_PS_CTW_CMD = 24, - H2C_PathDiv = 26, //PathDiv--NeilChen--2011.07.15 - KEEP_ALIVE_CONTROL_CMD=31, //keep alive for wake on wlan - DISCONNECT_DECISION_CTRL_CMD=32, - REMOTE_WAKE_CTRL_CMD=34, - H2C_CMD_MAX -}RTL8192D_H2C_CMD; - -struct cmd_msg_parm { - u8 eid; //element id - u8 sz; // sz - u8 buf[6]; -}; - - -void FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer); - -// host message to firmware cmd -void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); -void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); -u8 rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param); -u8 rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); -void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id); -#ifdef CONFIG_P2P -void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); -#endif //CONFIG_P2P - -#endif - -#ifdef CONFIG_WOWLAN -typedef struct _SETWOWLAN_PARM{ - u8 mode; - u8 gpio_index; - u8 gpio_duration; - u8 second_mode; - u8 reserve; -}SETWOWLAN_PARM, *PSETWOWLAN_PARM; - -#define FW_WOWLAN_FUN_EN BIT(0) -#define FW_WOWLAN_PATTERN_MATCH BIT(1) -#define FW_WOWLAN_MAGIC_PKT BIT(2) -#define FW_WOWLAN_UNICAST BIT(3) -#define FW_WOWLAN_ALL_PKT_DROP BIT(4) -#define FW_WOWLAN_GPIO_ACTIVE BIT(5) -#define FW_WOWLAN_REKEY_WAKEUP BIT(6) -#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) - -#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) -#define FW_FW_PARSE_MAGIC_PKT BIT(1) - -void rtl8192d_set_wowlan_cmd(_adapter* padapter); -void SetFwRelatedForWoWLAN8192DU(_adapter* padapter,u8 bHostIsGoingtoSleep); -#endif // CONFIG_WOWLAN - - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTL8192D_CMD_H_ +#define __RTL8192D_CMD_H_ + + +//-------------------------------------------- +//3 Host Message Box +//-------------------------------------------- + +// User Define Message [31:8] + +//_SETPWRMODE_PARM +#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) + +//JOINBSSRPT_PARM +#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) + +//_RSVDPAGE_LOC +#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) +#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) + +//P2P_PS_OFFLOAD + +struct P2P_PS_Offload_t { + unsigned char Offload_En:1; + unsigned char role:1; // 1: Owner, 0: Client + unsigned char CTWindow_En:1; + unsigned char NoA0_En:1; + unsigned char NoA1_En:1; + unsigned char AllStaSleep:1; // Only valid in Owner + unsigned char discovery:1; + unsigned char rsvd:1; +}; + +#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) +#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) +#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) +#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) +#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) +#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) +#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) + +// Description: Determine the types of H2C commands that are the same in driver and Fw. +// Fisrt constructed by tynli. 2009.10.09. +typedef enum _RTL8192D_H2C_CMD +{ + H2C_AP_OFFLOAD = 0, /*0*/ + H2C_SETPWRMODE = 1, /*1*/ + H2C_JOINBSSRPT = 2, /*2*/ + H2C_RSVDPAGE = 3, + H2C_RSSI_REPORT = 5, + H2C_RA_MASK = 6, + H2C_P2P_PS_OFFLOAD = 8, + H2C_MAC_MODE_SEL = 9, + H2C_PWRM=15, + H2C_WO_WLAN_CMD = 20, // Wake on Wlan. + H2C_P2P_PS_CTW_CMD = 24, + H2C_PathDiv = 26, //PathDiv--NeilChen--2011.07.15 + KEEP_ALIVE_CONTROL_CMD=31, //keep alive for wake on wlan + DISCONNECT_DECISION_CTRL_CMD=32, + REMOTE_WAKE_CTRL_CMD=34, + H2C_CMD_MAX +}RTL8192D_H2C_CMD; + +struct cmd_msg_parm { + u8 eid; //element id + u8 sz; // sz + u8 buf[6]; +}; + + +void FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer); + +// host message to firmware cmd +void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); +void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); +u8 rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param); +u8 rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); +void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id); +#ifdef CONFIG_P2P +void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); +#endif //CONFIG_P2P + +#endif + +#ifdef CONFIG_WOWLAN +typedef struct _SETWOWLAN_PARM{ + u8 mode; + u8 gpio_index; + u8 gpio_duration; + u8 second_mode; + u8 reserve; +}SETWOWLAN_PARM, *PSETWOWLAN_PARM; + +#define FW_WOWLAN_FUN_EN BIT(0) +#define FW_WOWLAN_PATTERN_MATCH BIT(1) +#define FW_WOWLAN_MAGIC_PKT BIT(2) +#define FW_WOWLAN_UNICAST BIT(3) +#define FW_WOWLAN_ALL_PKT_DROP BIT(4) +#define FW_WOWLAN_GPIO_ACTIVE BIT(5) +#define FW_WOWLAN_REKEY_WAKEUP BIT(6) +#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) + +#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) +#define FW_FW_PARSE_MAGIC_PKT BIT(1) + +void rtl8192d_set_wowlan_cmd(_adapter* padapter); +void SetFwRelatedForWoWLAN8192DU(_adapter* padapter,u8 bHostIsGoingtoSleep); +#endif // CONFIG_WOWLAN + + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_dm.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_dm.h old mode 100755 new mode 100644 index 994d3e58815007..ce674f8eb68074 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_dm.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_dm.h @@ -1,414 +1,414 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * -******************************************************************************/ -#ifndef __RTL8192D_DM_H__ -#define __RTL8192D_DM_H__ -//============================================================ -// Description: -// -// This file is for 92CE/92CU dynamic mechanism only -// -// -//============================================================ -//============================================================ -// Global var -//============================================================ - -extern u32 EDCAParam[maxAP][3] ; - -#define OFDM_TABLE_SIZE 37 -#define OFDM_TABLE_SIZE_92D 43 -#define CCK_TABLE_SIZE 33 -extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] ; - -extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; - -extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; - -//============================================================ -// structure and define -//============================================================ - -typedef struct _FALSE_ALARM_STATISTICS{ - u32 Cnt_Parity_Fail; - u32 Cnt_Rate_Illegal; - u32 Cnt_Crc8_fail; - u32 Cnt_Mcs_fail; - u32 Cnt_Ofdm_fail; - u32 Cnt_Cck_fail; - u32 Cnt_all; - u32 Cnt_Fast_Fsync; - u32 Cnt_SB_Search_fail; -}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; - -typedef struct _Dynamic_Power_Saving_ -{ - u8 PreCCAState; - u8 CurCCAState; - - u8 PreRFState; - u8 CurRFState; - - //int Rssi_val_min; - -}PS_T,*pPS_T; - -typedef struct _Dynamic_Initial_Gain_Threshold_ -{ - u8 Dig_Enable_Flag; - u8 Dig_Ext_Port_Stage; - - int RssiLowThresh; - int RssiHighThresh; - - u32 FALowThresh; - u32 FAHighThresh; - - u8 CurSTAConnectState; - u8 PreSTAConnectState; - u8 CurMultiSTAConnectState; - - u8 PreIGValue; - u8 CurIGValue; - u8 BackupIGValue; - - char BackoffVal; - char BackoffVal_range_max; - char BackoffVal_range_min; - u8 rx_gain_range_max; - u8 rx_gain_range_min; - u8 Rssi_val_min; - - u8 PreCCKPDState; - u8 CurCCKPDState; - - u8 LargeFAHit; - u8 ForbiddenIGI; - u32 Recover_cnt; -}DIG_T,*pDIG_T; -typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition -{ - DIG_TYPE_THRESH_HIGH = 0, - DIG_TYPE_THRESH_LOW = 1, - DIG_TYPE_BACKOFF = 2, - DIG_TYPE_RX_GAIN_MIN = 3, - DIG_TYPE_RX_GAIN_MAX = 4, - DIG_TYPE_ENABLE = 5, - DIG_TYPE_DISABLE = 6, - DIG_OP_TYPE_MAX -}DM_DIG_OP_E; - -typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition -{ - CCK_PD_STAGE_LowRssi = 0, - CCK_PD_STAGE_HighRssi = 1, - CCK_PD_STAGE_MAX = 3, -}DM_CCK_PDTH_E; - -typedef enum tag_1R_CCA_Type_Definition -{ - CCA_MIN = 0, - CCA_1R =1, - CCA_2R = 2, - CCA_MAX = 3, -}DM_1R_CCA_E; - -typedef enum tag_RF_Type_Definition -{ - RF_Save =0, - RF_Normal = 1, - RF_MAX = 2, -}DM_RF_E; - -typedef enum tag_DIG_EXT_PORT_ALGO_Definition -{ - DIG_EXT_PORT_STAGE_0 = 0, - DIG_EXT_PORT_STAGE_1 = 1, - DIG_EXT_PORT_STAGE_2 = 2, - DIG_EXT_PORT_STAGE_3 = 3, - DIG_EXT_PORT_STAGE_MAX = 4, -}DM_DIG_EXT_PORT_ALG_E; - - -typedef enum tag_DIG_Connect_Definition -{ - DIG_STA_DISCONNECT = 0, - DIG_STA_CONNECT = 1, - DIG_STA_BEFORE_CONNECT = 2, - DIG_MultiSTA_DISCONNECT = 3, - DIG_MultiSTA_CONNECT = 4, - DIG_CONNECT_MAX -}DM_DIG_CONNECT_E; - - -#define DM_DIG_THRESH_HIGH 40 -#define DM_DIG_THRESH_LOW 35 - -#define DM_FALSEALARM_THRESH_LOW 400 -#define DM_FALSEALARM_THRESH_HIGH 1000 - -#define DM_DIG_MAX 0x3e -#define DM_DIG_MIN 0x1e //0x22//0x1c - -#define DM_DIG_FA_UPPER 0x32 -#define DM_DIG_FA_LOWER 0x20 - -//vivi 92c&92d has different definition, 20110504 -//this is for 92c -#define DM_DIG_FA_TH0 0x200//0x20 -#define DM_DIG_FA_TH1 0x300//0x100 -#define DM_DIG_FA_TH2 0x400//0x200 -//this is for 92d -#define DM_DIG_FA_TH0_92D 0x100 -#define DM_DIG_FA_TH1_92D 0x400 -#define DM_DIG_FA_TH2_92D 0x600 - -#define DM_DIG_BACKOFF_MAX 12 -#define DM_DIG_BACKOFF_MIN (-4) -#define DM_DIG_BACKOFF_DEFAULT 10 - -#define RxPathSelection_SS_TH_low 30 -#define RxPathSelection_diff_TH 18 - -#define DM_RATR_STA_INIT 0 -#define DM_RATR_STA_HIGH 1 -#define DM_RATR_STA_MIDDLE 2 -#define DM_RATR_STA_LOW 3 - -#define CTSToSelfTHVal 30 -#define RegC38_TH 20 - -#define WAIotTHVal 25 - -//Dynamic Tx Power Control Threshold -#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 - -#define TxHighPwrLevel_Normal 0 -#define TxHighPwrLevel_Level1 1 -#define TxHighPwrLevel_Level2 2 -#define TxHighPwrLevel_BT1 3 -#define TxHighPwrLevel_BT2 4 -#define TxHighPwrLevel_15 5 -#define TxHighPwrLevel_35 6 -#define TxHighPwrLevel_50 7 -#define TxHighPwrLevel_70 8 -#define TxHighPwrLevel_100 9 - -#define DM_Type_ByFW 0 -#define DM_Type_ByDriver 1 - -typedef struct _RATE_ADAPTIVE -{ - u8 RateAdaptiveDisabled; - u8 RATRState; - u16 reserve; - - u32 HighRSSIThreshForRA; - u32 High2LowRSSIThreshForRA; - u8 Low2HighRSSIThreshForRA40M; - u32 LowRSSIThreshForRA40M; - u8 Low2HighRSSIThreshForRA20M; - u32 LowRSSIThreshForRA20M; - u32 UpperRSSIThresholdRATR; - u32 MiddleRSSIThresholdRATR; - u32 LowRSSIThresholdRATR; - u32 LowRSSIThresholdRATR40M; - u32 LowRSSIThresholdRATR20M; - u8 PingRSSIEnable; //cosa add for Netcore long range ping issue - u32 PingRSSIRATR; //cosa add for Netcore long range ping issue - u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue - u32 LastRATR; - u8 PreRATRState; - -} RATE_ADAPTIVE, *PRATE_ADAPTIVE; - -typedef enum tag_SW_Antenna_Switch_Definition -{ - Antenna_B = 1, - Antenna_A = 2, - Antenna_MAX = 3, -}DM_SWAS_E; - -// 20100514 Joseph: Add definition for antenna switching test after link. -// This indicates two different the steps. -// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. -// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK -// with original RSSI to determine if it is necessary to switch antenna. -#define SWAW_STEP_PEAK 0 -#define SWAW_STEP_DETERMINE 1 - -#define TP_MODE 0 -#define RSSI_MODE 1 -#define TRAFFIC_LOW 0 -#define TRAFFIC_HIGH 1 - -//============================= -//Neil Chen---2011--06--15-- -//============================== -//3 PathDiv -typedef struct _SW_Antenna_Switch_ -{ - u8 try_flag; - s32 PreRSSI; - u8 CurAntenna; - u8 PreAntenna; - u8 RSSI_Trying; - u8 TestMode; - u8 bTriggerAntennaSwitch; - u8 SelectAntennaMap; - - // Before link Antenna Switch check - u8 SWAS_NoLink_State; - u32 SWAS_NoLink_BK_Reg860; -}SWAT_T, *pSWAT_T; -//======================================== - -struct dm_priv -{ - u8 DM_Type; - u8 DMFlag, DMFlag_tmp; - - //for DIG - u8 bDMInitialGainEnable; - //u8 binitialized; // for dm_initial_gain_Multi_STA use. - DIG_T DM_DigTable; - - PS_T DM_PSTable; - - FALSE_ALARM_STATISTICS FalseAlmCnt; - - //for rate adaptive, in fact, 88c/92c fw will handle this - u8 bUseRAMask; - RATE_ADAPTIVE RateAdaptive; - - //* Upper and Lower Signal threshold for Rate Adaptive*/ - int UndecoratedSmoothedPWDB; - int EntryMinUndecoratedSmoothedPWDB; - int EntryMaxUndecoratedSmoothedPWDB; - int MinUndecoratedPWDBForDM; - int LastMinUndecoratedPWDBForDM; - - //for High Power - u8 bDynamicTxPowerEnable; - u8 LastDTPLvl; - u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 - - //for tx power tracking - u8 bTXPowerTracking; - u8 TXPowercount; - u8 bTXPowerTrackingInit; - u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default - u8 TM_Trigger; - - u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 - u8 ThermalValue; - u8 ThermalValue_LCK; - u8 ThermalValue_IQK; - u8 ThermalValue_AVG[AVG_THERMAL_NUM]; - u8 ThermalValue_AVG_index; - u8 ThermalValue_RxGain; - u8 ThermalValue_Crystal; - u8 Delta_IQK; - u8 Delta_LCK; - u8 bRfPiEnable; - u8 bReloadtxpowerindex; - u8 bDoneTxpower; - - //for APK - u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a - u8 bAPKdone; - u8 bAPKThermalMeterIgnore; - BOOLEAN bDPKdone[2]; - BOOLEAN bDPKstore; - BOOLEAN bDPKworking; - u8 OFDM_min_index_internalPA_DPK[2]; - u8 TxPowerLevelDPK[2]; - - u32 RegA24; - - //for IQK - u32 Reg874; - u32 RegC08; - u32 Reg88C; - u8 Reg522; - u8 Reg550; - u8 Reg551; - u32 Reg870; - u32 ADDA_backup[IQK_ADDA_REG_NUM]; - u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; - u32 IQK_BB_backup[IQK_BB_REG_NUM]; - - u8 bCCKinCH14; - - char CCK_index; - //u8 Record_CCK_20Mindex; - //u8 Record_CCK_40Mindex; - char OFDM_index[2]; - - SWAT_T DM_SWAT_Table; - - //Neil Chen----2011--06--23----- - //3 Path Diversity - BOOLEAN bPathDiv_Enable; //For 92D Non-interrupt Antenna Diversity by Neil ,add by wl.2011.07.19 - BOOLEAN RSSI_test; - s32 RSSI_sum_A; - s32 RSSI_cnt_A; - s32 RSSI_sum_B; - s32 RSSI_cnt_B; - struct sta_info *RSSI_target; - _timer PathDivSwitchTimer; - - //for TxPwrTracking - int RegE94; - int RegE9C; - int RegEB4; - int RegEBC; -#if MP_DRIVER == 1 - u8 RegC04_MP; - u32 RegD04_MP; -#endif - u32 TXPowerTrackingCallbackCnt; //cosa add for debug - - u32 prv_traffic_idx; // edca turbo - - u32 RegRF3C[2]; //pathA / pathB - - // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas - u8 INIDATA_RATE[32]; -}; - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ -//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} - - -//============================================================ -// function prototype -//============================================================ -void rtl8192d_init_dm_priv(IN PADAPTER Adapter); -void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8192d_InitHalDm(IN PADAPTER Adapter); -void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter); - -VOID rtl8192d_dm_CheckTXPowerTracking(IN PADAPTER Adapter); - -#endif //__HAL8190PCIDM_H__ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +******************************************************************************/ +#ifndef __RTL8192D_DM_H__ +#define __RTL8192D_DM_H__ +//============================================================ +// Description: +// +// This file is for 92CE/92CU dynamic mechanism only +// +// +//============================================================ +//============================================================ +// Global var +//============================================================ + +extern u32 EDCAParam[maxAP][3] ; + +#define OFDM_TABLE_SIZE 37 +#define OFDM_TABLE_SIZE_92D 43 +#define CCK_TABLE_SIZE 33 +extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] ; + +extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; + +extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; + +//============================================================ +// structure and define +//============================================================ + +typedef struct _FALSE_ALARM_STATISTICS{ + u32 Cnt_Parity_Fail; + u32 Cnt_Rate_Illegal; + u32 Cnt_Crc8_fail; + u32 Cnt_Mcs_fail; + u32 Cnt_Ofdm_fail; + u32 Cnt_Cck_fail; + u32 Cnt_all; + u32 Cnt_Fast_Fsync; + u32 Cnt_SB_Search_fail; +}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; + +typedef struct _Dynamic_Power_Saving_ +{ + u8 PreCCAState; + u8 CurCCAState; + + u8 PreRFState; + u8 CurRFState; + + //int Rssi_val_min; + +}PS_T,*pPS_T; + +typedef struct _Dynamic_Initial_Gain_Threshold_ +{ + u8 Dig_Enable_Flag; + u8 Dig_Ext_Port_Stage; + + int RssiLowThresh; + int RssiHighThresh; + + u32 FALowThresh; + u32 FAHighThresh; + + u8 CurSTAConnectState; + u8 PreSTAConnectState; + u8 CurMultiSTAConnectState; + + u8 PreIGValue; + u8 CurIGValue; + u8 BackupIGValue; + + char BackoffVal; + char BackoffVal_range_max; + char BackoffVal_range_min; + u8 rx_gain_range_max; + u8 rx_gain_range_min; + u8 Rssi_val_min; + + u8 PreCCKPDState; + u8 CurCCKPDState; + + u8 LargeFAHit; + u8 ForbiddenIGI; + u32 Recover_cnt; +}DIG_T,*pDIG_T; +typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition +{ + DIG_TYPE_THRESH_HIGH = 0, + DIG_TYPE_THRESH_LOW = 1, + DIG_TYPE_BACKOFF = 2, + DIG_TYPE_RX_GAIN_MIN = 3, + DIG_TYPE_RX_GAIN_MAX = 4, + DIG_TYPE_ENABLE = 5, + DIG_TYPE_DISABLE = 6, + DIG_OP_TYPE_MAX +}DM_DIG_OP_E; + +typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition +{ + CCK_PD_STAGE_LowRssi = 0, + CCK_PD_STAGE_HighRssi = 1, + CCK_PD_STAGE_MAX = 3, +}DM_CCK_PDTH_E; + +typedef enum tag_1R_CCA_Type_Definition +{ + CCA_MIN = 0, + CCA_1R =1, + CCA_2R = 2, + CCA_MAX = 3, +}DM_1R_CCA_E; + +typedef enum tag_RF_Type_Definition +{ + RF_Save =0, + RF_Normal = 1, + RF_MAX = 2, +}DM_RF_E; + +typedef enum tag_DIG_EXT_PORT_ALGO_Definition +{ + DIG_EXT_PORT_STAGE_0 = 0, + DIG_EXT_PORT_STAGE_1 = 1, + DIG_EXT_PORT_STAGE_2 = 2, + DIG_EXT_PORT_STAGE_3 = 3, + DIG_EXT_PORT_STAGE_MAX = 4, +}DM_DIG_EXT_PORT_ALG_E; + + +typedef enum tag_DIG_Connect_Definition +{ + DIG_STA_DISCONNECT = 0, + DIG_STA_CONNECT = 1, + DIG_STA_BEFORE_CONNECT = 2, + DIG_MultiSTA_DISCONNECT = 3, + DIG_MultiSTA_CONNECT = 4, + DIG_CONNECT_MAX +}DM_DIG_CONNECT_E; + + +#define DM_DIG_THRESH_HIGH 40 +#define DM_DIG_THRESH_LOW 35 + +#define DM_FALSEALARM_THRESH_LOW 400 +#define DM_FALSEALARM_THRESH_HIGH 1000 + +#define DM_DIG_MAX 0x3e +#define DM_DIG_MIN 0x1e //0x22//0x1c + +#define DM_DIG_FA_UPPER 0x32 +#define DM_DIG_FA_LOWER 0x20 + +//vivi 92c&92d has different definition, 20110504 +//this is for 92c +#define DM_DIG_FA_TH0 0x200//0x20 +#define DM_DIG_FA_TH1 0x300//0x100 +#define DM_DIG_FA_TH2 0x400//0x200 +//this is for 92d +#define DM_DIG_FA_TH0_92D 0x100 +#define DM_DIG_FA_TH1_92D 0x400 +#define DM_DIG_FA_TH2_92D 0x600 + +#define DM_DIG_BACKOFF_MAX 12 +#define DM_DIG_BACKOFF_MIN (-4) +#define DM_DIG_BACKOFF_DEFAULT 10 + +#define RxPathSelection_SS_TH_low 30 +#define RxPathSelection_diff_TH 18 + +#define DM_RATR_STA_INIT 0 +#define DM_RATR_STA_HIGH 1 +#define DM_RATR_STA_MIDDLE 2 +#define DM_RATR_STA_LOW 3 + +#define CTSToSelfTHVal 30 +#define RegC38_TH 20 + +#define WAIotTHVal 25 + +//Dynamic Tx Power Control Threshold +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 + +#define TxHighPwrLevel_Normal 0 +#define TxHighPwrLevel_Level1 1 +#define TxHighPwrLevel_Level2 2 +#define TxHighPwrLevel_BT1 3 +#define TxHighPwrLevel_BT2 4 +#define TxHighPwrLevel_15 5 +#define TxHighPwrLevel_35 6 +#define TxHighPwrLevel_50 7 +#define TxHighPwrLevel_70 8 +#define TxHighPwrLevel_100 9 + +#define DM_Type_ByFW 0 +#define DM_Type_ByDriver 1 + +typedef struct _RATE_ADAPTIVE +{ + u8 RateAdaptiveDisabled; + u8 RATRState; + u16 reserve; + + u32 HighRSSIThreshForRA; + u32 High2LowRSSIThreshForRA; + u8 Low2HighRSSIThreshForRA40M; + u32 LowRSSIThreshForRA40M; + u8 Low2HighRSSIThreshForRA20M; + u32 LowRSSIThreshForRA20M; + u32 UpperRSSIThresholdRATR; + u32 MiddleRSSIThresholdRATR; + u32 LowRSSIThresholdRATR; + u32 LowRSSIThresholdRATR40M; + u32 LowRSSIThresholdRATR20M; + u8 PingRSSIEnable; //cosa add for Netcore long range ping issue + u32 PingRSSIRATR; //cosa add for Netcore long range ping issue + u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue + u32 LastRATR; + u8 PreRATRState; + +} RATE_ADAPTIVE, *PRATE_ADAPTIVE; + +typedef enum tag_SW_Antenna_Switch_Definition +{ + Antenna_B = 1, + Antenna_A = 2, + Antenna_MAX = 3, +}DM_SWAS_E; + +// 20100514 Joseph: Add definition for antenna switching test after link. +// This indicates two different the steps. +// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. +// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK +// with original RSSI to determine if it is necessary to switch antenna. +#define SWAW_STEP_PEAK 0 +#define SWAW_STEP_DETERMINE 1 + +#define TP_MODE 0 +#define RSSI_MODE 1 +#define TRAFFIC_LOW 0 +#define TRAFFIC_HIGH 1 + +//============================= +//Neil Chen---2011--06--15-- +//============================== +//3 PathDiv +typedef struct _SW_Antenna_Switch_ +{ + u8 try_flag; + s32 PreRSSI; + u8 CurAntenna; + u8 PreAntenna; + u8 RSSI_Trying; + u8 TestMode; + u8 bTriggerAntennaSwitch; + u8 SelectAntennaMap; + + // Before link Antenna Switch check + u8 SWAS_NoLink_State; + u32 SWAS_NoLink_BK_Reg860; +}SWAT_T, *pSWAT_T; +//======================================== + +struct dm_priv +{ + u8 DM_Type; + u8 DMFlag, DMFlag_tmp; + + //for DIG + u8 bDMInitialGainEnable; + //u8 binitialized; // for dm_initial_gain_Multi_STA use. + DIG_T DM_DigTable; + + PS_T DM_PSTable; + + FALSE_ALARM_STATISTICS FalseAlmCnt; + + //for rate adaptive, in fact, 88c/92c fw will handle this + u8 bUseRAMask; + RATE_ADAPTIVE RateAdaptive; + + //* Upper and Lower Signal threshold for Rate Adaptive*/ + int UndecoratedSmoothedPWDB; + int EntryMinUndecoratedSmoothedPWDB; + int EntryMaxUndecoratedSmoothedPWDB; + int MinUndecoratedPWDBForDM; + int LastMinUndecoratedPWDBForDM; + + //for High Power + u8 bDynamicTxPowerEnable; + u8 LastDTPLvl; + u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 + + //for tx power tracking + u8 bTXPowerTracking; + u8 TXPowercount; + u8 bTXPowerTrackingInit; + u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default + u8 TM_Trigger; + + u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 + u8 ThermalValue; + u8 ThermalValue_LCK; + u8 ThermalValue_IQK; + u8 ThermalValue_AVG[AVG_THERMAL_NUM]; + u8 ThermalValue_AVG_index; + u8 ThermalValue_RxGain; + u8 ThermalValue_Crystal; + u8 Delta_IQK; + u8 Delta_LCK; + u8 bRfPiEnable; + u8 bReloadtxpowerindex; + u8 bDoneTxpower; + + //for APK + u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a + u8 bAPKdone; + u8 bAPKThermalMeterIgnore; + BOOLEAN bDPKdone[2]; + BOOLEAN bDPKstore; + BOOLEAN bDPKworking; + u8 OFDM_min_index_internalPA_DPK[2]; + u8 TxPowerLevelDPK[2]; + + u32 RegA24; + + //for IQK + u32 Reg874; + u32 RegC08; + u32 Reg88C; + u8 Reg522; + u8 Reg550; + u8 Reg551; + u32 Reg870; + u32 ADDA_backup[IQK_ADDA_REG_NUM]; + u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; + u32 IQK_BB_backup[IQK_BB_REG_NUM]; + + u8 bCCKinCH14; + + char CCK_index; + //u8 Record_CCK_20Mindex; + //u8 Record_CCK_40Mindex; + char OFDM_index[2]; + + SWAT_T DM_SWAT_Table; + + //Neil Chen----2011--06--23----- + //3 Path Diversity + BOOLEAN bPathDiv_Enable; //For 92D Non-interrupt Antenna Diversity by Neil ,add by wl.2011.07.19 + BOOLEAN RSSI_test; + s32 RSSI_sum_A; + s32 RSSI_cnt_A; + s32 RSSI_sum_B; + s32 RSSI_cnt_B; + struct sta_info *RSSI_target; + _timer PathDivSwitchTimer; + + //for TxPwrTracking + int RegE94; + int RegE9C; + int RegEB4; + int RegEBC; +#if MP_DRIVER == 1 + u8 RegC04_MP; + u32 RegD04_MP; +#endif + u32 TXPowerTrackingCallbackCnt; //cosa add for debug + + u32 prv_traffic_idx; // edca turbo + + u32 RegRF3C[2]; //pathA / pathB + + // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas + u8 INIDATA_RATE[32]; +}; + + +/*------------------------Export global variable----------------------------*/ +/*------------------------Export global variable----------------------------*/ +/*------------------------Export Marco Definition---------------------------*/ +//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} + + +//============================================================ +// function prototype +//============================================================ +void rtl8192d_init_dm_priv(IN PADAPTER Adapter); +void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter); +void rtl8192d_InitHalDm(IN PADAPTER Adapter); +void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter); + +VOID rtl8192d_dm_CheckTXPowerTracking(IN PADAPTER Adapter); + +#endif //__HAL8190PCIDM_H__ diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_hal.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_hal.h old mode 100755 new mode 100644 index 52be16bcc95e54..30f2955001655e --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_hal.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_hal.h @@ -1,983 +1,983 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __RTL8192D_HAL_H__ -#define __RTL8192D_HAL_H__ - -#include "rtl8192d_spec.h" -#include "Hal8192DPhyReg.h" -#include "Hal8192DPhyCfg.h" -#include "rtl8192d_rf.h" -#include "rtl8192d_dm.h" -#include "rtl8192d_recv.h" -#include "rtl8192d_xmit.h" -#include "rtl8192d_cmd.h" - -#ifdef CONFIG_PCI_HCI - #include - #include "Hal8192DEHWImg.h" - - #define RTL819X_DEFAULT_RF_TYPE RF_2T2R - -//--------------------------------------------------------------------- -// RTL8192DE From file -//--------------------------------------------------------------------- - #define RTL8192D_FW_IMG "rtl8192DE\\rtl8192dfw.bin" - - #define RTL8192D_PHY_REG "rtl8192DE\\PHY_REG.txt" - #define RTL8192D_PHY_REG_PG "rtl8192DE\\PHY_REG_PG.txt" - #define RTL8192D_PHY_REG_MP "rtl8192DE\\PHY_REG_MP.txt" - - #define RTL8192D_AGC_TAB "rtl8192DE\\AGC_TAB.txt" - #define RTL8192D_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G.txt" - #define RTL8192D_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G.txt" - #define RTL8192D_PHY_RADIO_A "rtl8192DE\\radio_a.txt" - #define RTL8192D_PHY_RADIO_B "rtl8192DE\\radio_b.txt" - #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DE\\radio_a_intPA.txt" - #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DE\\radio_b_intPA.txt" - #define RTL8192D_PHY_MACREG "rtl8192DE\\MAC_REG.txt" - -//--------------------------------------------------------------------- -// RTL8192DE From header -//--------------------------------------------------------------------- - - // Fw Array - #define Rtl8192D_FwImageArray Rtl8192DEFwImgArray - - // MAC/BB/PHY Array - #define Rtl8192D_MAC_Array Rtl8192DEMAC_2T_Array - #define Rtl8192D_AGCTAB_Array Rtl8192DEAGCTAB_Array - #define Rtl8192D_AGCTAB_5GArray Rtl8192DEAGCTAB_5GArray - #define Rtl8192D_AGCTAB_2GArray Rtl8192DEAGCTAB_2GArray - #define Rtl8192D_AGCTAB_2TArray Rtl8192DEAGCTAB_2TArray - #define Rtl8192D_AGCTAB_1TArray Rtl8192DEAGCTAB_1TArray - #define Rtl8192D_PHY_REG_2TArray Rtl8192DEPHY_REG_2TArray - #define Rtl8192D_PHY_REG_1TArray Rtl8192DEPHY_REG_1TArray - #define Rtl8192D_PHY_REG_Array_PG Rtl8192DEPHY_REG_Array_PG - #define Rtl8192D_PHY_REG_Array_MP Rtl8192DEPHY_REG_Array_MP - #define Rtl8192D_RadioA_2TArray Rtl8192DERadioA_2TArray - #define Rtl8192D_RadioA_1TArray Rtl8192DERadioA_1TArray - #define Rtl8192D_RadioB_2TArray Rtl8192DERadioB_2TArray - #define Rtl8192D_RadioB_1TArray Rtl8192DERadioB_1TArray - #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DERadioA_2T_intPAArray - #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DERadioB_2T_intPAArray - - // Array length - #define Rtl8192D_FwImageArrayLength Rtl8192DEImgArrayLength - #define Rtl8192D_MAC_ArrayLength Rtl8192DEMAC_2T_ArrayLength - #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DEAGCTAB_5GArrayLength - #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DEAGCTAB_2GArrayLength - #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DEAGCTAB_2TArrayLength - #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DEAGCTAB_1TArrayLength - #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DEAGCTAB_ArrayLength - #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DEPHY_REG_2TArrayLength - #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DEPHY_REG_1TArrayLength - #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DEPHY_REG_Array_PGLength - #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DEPHY_REG_Array_MPLength - #define Rtl8192D_RadioA_2TArrayLength Rtl8192DERadioA_2TArrayLength - #define Rtl8192D_RadioB_2TArrayLength Rtl8192DERadioB_2TArrayLength - #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DERadioA_2T_intPAArrayLength - #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DERadioB_2T_intPAArrayLength - -#elif defined(CONFIG_USB_HCI) - - #include "Hal8192DUHWImg.h" -#ifdef CONFIG_WOWLAN - #include "Hal8192DUHWImg_wowlan.h" -#endif //CONFIG_WOWLAN - #define RTL819X_DEFAULT_RF_TYPE RF_1T2R - -//--------------------------------------------------------------------- -// RTL8192DU From file -//--------------------------------------------------------------------- - #define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin" - - #define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt" - #define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt" - #define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt" - - #define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt" - #define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt" - #define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt" - #define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt" - #define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt" - #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt" - #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt" - #define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt" - -//--------------------------------------------------------------------- -// RTL8192DU From header -//--------------------------------------------------------------------- - - // Fw Array - #define Rtl8192D_FwImageArray Rtl8192DUFwImgArray -#ifdef CONFIG_WOWLAN - #define Rtl8192D_FwWWImageArray Rtl8192DUFwWWImgArray -#endif //CONFIG_WOWLAN - // MAC/BB/PHY Array - #define Rtl8192D_MAC_Array Rtl8192DUMAC_2T_Array - #define Rtl8192D_AGCTAB_Array Rtl8192DUAGCTAB_Array - #define Rtl8192D_AGCTAB_5GArray Rtl8192DUAGCTAB_5GArray - #define Rtl8192D_AGCTAB_2GArray Rtl8192DUAGCTAB_2GArray - #define Rtl8192D_AGCTAB_2TArray Rtl8192DUAGCTAB_2TArray - #define Rtl8192D_AGCTAB_1TArray Rtl8192DUAGCTAB_1TArray - #define Rtl8192D_PHY_REG_2TArray Rtl8192DUPHY_REG_2TArray - #define Rtl8192D_PHY_REG_1TArray Rtl8192DUPHY_REG_1TArray - #define Rtl8192D_PHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG - #define Rtl8192D_PHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP - #define Rtl8192D_RadioA_2TArray Rtl8192DURadioA_2TArray - #define Rtl8192D_RadioA_1TArray Rtl8192DURadioA_1TArray - #define Rtl8192D_RadioB_2TArray Rtl8192DURadioB_2TArray - #define Rtl8192D_RadioB_1TArray Rtl8192DURadioB_1TArray - #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray - #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray - - // Array length - #define Rtl8192D_FwImageArrayLength Rtl8192DUImgArrayLength - #define Rtl8192D_MAC_ArrayLength Rtl8192DUMAC_2T_ArrayLength - #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DUAGCTAB_5GArrayLength - #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DUAGCTAB_2GArrayLength - #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DUAGCTAB_2TArrayLength - #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DUAGCTAB_1TArrayLength - #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DUAGCTAB_ArrayLength - #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DUPHY_REG_2TArrayLength - #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DUPHY_REG_1TArrayLength - #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DUPHY_REG_Array_PGLength - #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DUPHY_REG_Array_MPLength - #define Rtl8192D_RadioA_2TArrayLength Rtl8192DURadioA_2TArrayLength - #define Rtl8192D_RadioB_2TArrayLength Rtl8192DURadioB_2TArrayLength - #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DURadioA_2T_intPAArrayLength - #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DURadioB_2T_intPAArrayLength - - // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. -/* #define Rtl819XFwImageArray Rtl8192DUFwImgArray - #define Rtl819XMAC_Array Rtl8192DUMAC_2TArray - #define Rtl819XAGCTAB_Array Rtl8192DUAGCTAB_Array - #define Rtl819XAGCTAB_5GArray Rtl8192DUAGCTAB_5GArray - #define Rtl819XAGCTAB_2GArray Rtl8192DUAGCTAB_2GArray - #define Rtl819XPHY_REG_2TArray Rtl8192DUPHY_REG_2TArray - #define Rtl819XPHY_REG_1TArray Rtl8192DUPHY_REG_1TArray - #define Rtl819XRadioA_2TArray Rtl8192DURadioA_2TArray - #define Rtl819XRadioA_1TArray Rtl8192DURadioA_1TArray - #define Rtl819XRadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray - #define Rtl819XRadioB_2TArray Rtl8192DURadioB_2TArray - #define Rtl819XRadioB_1TArray Rtl8192DURadioB_1TArray - #define Rtl819XRadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray - #define Rtl819XPHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG - #define Rtl819XPHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP - - #define Rtl819XAGCTAB_2TArray Rtl8192DUAGCTAB_2TArray - #define Rtl819XAGCTAB_1TArray Rtl8192DUAGCTAB_1TArray*/ - -#endif - -#define DRVINFO_SZ 4 // unit is 8bytes -#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) - -// -// Check if FW header exists. We do not consider the lower 4 bits in this case. -// By tynli. 2009.12.04. -// -#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ - (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ - (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\ - (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\ - (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\ - (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 ) - -#define FW_8192D_SIZE 0x8000 -#define FW_8192D_START_ADDRESS 0x1000 - -#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes - -typedef enum _FIRMWARE_SOURCE{ - FW_SOURCE_IMG_FILE = 0, - FW_SOURCE_HEADER_FILE = 1, //from header file -}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; - -typedef struct _RT_FIRMWARE{ - FIRMWARE_SOURCE eFWSource; - u8* szFwBuffer; - u32 ulFwLength; -#ifdef CONFIG_WOWLAN - u8* szWoWLANFwBuffer; - u32 ulWoWLANFwLength; -#endif //CONFIG_WOWLAN -}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D; - -// -// This structure must be cared byte-ordering -// -// Added by tynli. 2009.12.04. -typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required - - //--- LONG WORD 0 ---- - u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut - u8 Category; // AP/NIC and USB/PCI - u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions - u16 Version; // FW Version - u8 Subversion; // FW Subversion, default 0x00 - u8 Rsvd1; - - - //--- LONG WORD 1 ---- - u8 Month; // Release time Month field - u8 Date; // Release time Date field - u8 Hour; // Release time Hour field - u8 Minute; // Release time Minute field - u16 RamCodeSize; // The size of RAM code - u16 Rsvd2; - - //--- LONG WORD 2 ---- - u32 SvnIdx; // The SVN entry index - u32 Rsvd3; - - //--- LONG WORD 3 ---- - u32 Rsvd4; - u32 Rsvd5; - -}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR; - -#define DRIVER_EARLY_INT_TIME 0x05 -#define BCN_DMA_ATIME_INT_TIME 0x02 - -typedef enum _BT_CoType{ - BT_2Wire = 0, - BT_ISSC_3Wire = 1, - BT_Accel = 2, - BT_CSR = 3, - BT_CSR_ENHAN = 4, - BT_RTL8756 = 5, -} BT_CoType, *PBT_CoType; - -typedef enum _BT_CurState{ - BT_OFF = 0, - BT_ON = 1, -} BT_CurState, *PBT_CurState; - -typedef enum _BT_ServiceType{ - BT_SCO = 0, - BT_A2DP = 1, - BT_HID = 2, - BT_HID_Idle = 3, - BT_Scan = 4, - BT_Idle = 5, - BT_OtherAction = 6, - BT_Busy = 7, - BT_OtherBusy = 8, -} BT_ServiceType, *PBT_ServiceType; - -typedef enum _BT_RadioShared{ - BT_Radio_Shared = 0, - BT_Radio_Individual = 1, -} BT_RadioShared, *PBT_RadioShared; - -typedef struct _BT_COEXIST_STR{ - u8 BluetoothCoexist; - u8 BT_Ant_Num; - u8 BT_CoexistType; - u8 BT_State; - u8 BT_CUR_State; //0:on, 1:off - u8 BT_Ant_isolation; //0:good, 1:bad - u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic - u8 BT_Service; - u8 BT_RadioSharedType; - u8 Ratio_Tx; - u8 Ratio_PRI; -}BT_COEXIST_STR, *PBT_COEXIST_STR; - -//Added for 92D IQK setting. -typedef struct _IQK_MATRIX_REGS_SETTING{ - BOOLEAN bIQKDone; -#if 1 - int Value[1][IQK_Matrix_REG_NUM]; -#else - u32 Mark[IQK_Matrix_REG_NUM]; - u32 Value[IQK_Matrix_REG_NUM]; -#endif -}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; - -#ifdef CONFIG_USB_RX_AGGREGATION - -typedef enum _USB_RX_AGG_MODE{ - USB_RX_AGG_DISABLE, - USB_RX_AGG_DMA, - USB_RX_AGG_USB, - USB_RX_AGG_DMA_USB -}USB_RX_AGG_MODE; - -#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer - -#endif - - -#define TX_SELE_HQ BIT(0) // High Queue -#define TX_SELE_LQ BIT(1) // Low Queue -#define TX_SELE_NQ BIT(2) // Normal Queue - - -// Note: We will divide number of page equally for each queue other than public queue! - -#define TX_TOTAL_PAGE_NUMBER 0xF8 -#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) - -// For Normal Chip Setting -// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER -#define NORMAL_PAGE_NUM_PUBQ 0x56 - - -// For Test Chip Setting -// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER -#define TEST_PAGE_NUM_PUBQ 0x89 -#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A -#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A -#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10 -#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10 -#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0 - -#define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1) - -// For Test Chip Setting -#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 -#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 - -#define WMM_TEST_PAGE_NUM_PUBQ 0xA3 -#define WMM_TEST_PAGE_NUM_HPQ 0x29 -#define WMM_TEST_PAGE_NUM_LPQ 0x29 - - -//Note: For Normal Chip Setting ,modify later -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 -#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 - -#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0 -#define WMM_NORMAL_PAGE_NUM_HPQ 0x29 -#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C -#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C - -#define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82 -#define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29 -#define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30 -#define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30 - -//------------------------------------------------------------------------- -// Chip specific -//------------------------------------------------------------------------- - -#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) -#define CHIP_BONDING_92C_1T2R 0x1 -#define CHIP_BONDING_88C_USB_MCARD 0x2 -#define CHIP_BONDING_88C_USB_HP 0x1 - -// -// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli. -// -/* - | BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 | - |-------------+-----------+-----------+-------+-----------+-------| - | IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type | - | | | TSMC/UMC | | TEST/NORMAL| | -*/ -// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 -// [7] Manufacturer: TSMC=0, UMC=1 -// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 -// [3] Chip type: TEST=0, NORMAL=1 -// [2:0] IC type: 81xxC=0, 8723=1, 92D=2 - -#define CHIP_8723 BIT(0) -#define CHIP_92D BIT(1) -#define NORMAL_CHIP BIT(3) -#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6))) -#define RF_TYPE_1T2R BIT(4) -#define RF_TYPE_2T2R BIT(5) -#define CHIP_VENDOR_UMC BIT(7) -#define B_CUT_VERSION BIT(12) -#define C_CUT_VERSION BIT(13) -#define D_CUT_VERSION ((BIT(12)|BIT(13))) -#define E_CUT_VERSION BIT(14) - - -// MASK -#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2)) -#define CHIP_TYPE_MASK BIT(3) -#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6)) -#define MANUFACTUER_MASK BIT(7) -#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8)) -#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12)) - -// Get element -#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK) -#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK) -#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK) -#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK) -#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK) -#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK) - -#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE) -#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE) -#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE) -#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE) -#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE) -#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE) -#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE) - -#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE) -#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) -#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) -// 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. -#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE) -#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE) - -#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) -#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) -#define IS_92D_E_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) -#define IS_NORMAL_CHIP92D(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE) - -typedef enum _VERSION_8192D{ - VERSION_TEST_CHIP_88C = 0x0000, - VERSION_TEST_CHIP_92C = 0x0020, - VERSION_TEST_UMC_CHIP_8723 = 0x0081, - VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, - VERSION_NORMAL_TSMC_CHIP_92C = 0x0028, - VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018, - VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088, - VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8, - VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098, - VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089, - VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089, - VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, - VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, - VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, - VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022, - VERSION_TEST_CHIP_92D_DUALPHY = 0x0002, - VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a, - VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a, - VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a, - VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a, - VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a, - VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a, - VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x402a, - VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x400a, -}VERSION_8192D,*PVERSION_8192D; - - -//------------------------------------------------------------------------- -// Channel Plan -//------------------------------------------------------------------------- -enum ChannelPlan{ - CHPL_FCC = 0, - CHPL_IC = 1, - CHPL_ETSI = 2, - CHPL_SPAIN = 3, - CHPL_FRANCE = 4, - CHPL_MKK = 5, - CHPL_MKK1 = 6, - CHPL_ISRAEL = 7, - CHPL_TELEC = 8, - CHPL_GLOBAL = 9, - CHPL_WORLD = 10, -}; - -typedef struct _TxPowerInfo{ - u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; - u8 TSSI_A[3]; - u8 TSSI_B[3]; - u8 TSSI_A_5G[3]; //5GL/5GM/5GH - u8 TSSI_B_5G[3]; -}TxPowerInfo, *PTxPowerInfo; - -#define EFUSE_REAL_CONTENT_LEN 1024 -#define EFUSE_MAP_LEN 256 -#define EFUSE_MAX_SECTION 32 -#define EFUSE_MAX_SECTION_BASE 16 -// To prevent out of boundary programming case, leave 1byte and program full section -// 9bytes + 1byt + 5bytes and pre 1byte. -// For worst case: -// | 2byte|----8bytes----|1byte|--7bytes--| //92D -#define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. - -typedef enum _PA_MODE { - PA_MODE_EXTERNAL = 0x00, - PA_MODE_INTERNAL_SP3T = 0x01, - PA_MODE_INTERNAL_SPDT = 0x02 -} PA_MODE; - -#ifdef CONFIG_PCI_HCI -struct hal_data_8192de -{ - VERSION_8192D VersionID; - - // add for 92D Phy mode/mac/Band mode - MACPHY_MODE_8192D MacPhyMode92D; - BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G - BAND_TYPE BandSet92D; - BOOLEAN bIsVS; - BOOLEAN bSupportRemoteWakeUp; - u8 AutoLoadStatusFor8192D; - - BOOLEAN bNOPG; - - BOOLEAN bMasterOfDMSP; - BOOLEAN bSlaveOfDMSP; - - u16 CustomerID; - - u16 FirmwareVersion; - u16 FirmwareVersionRev; - u16 FirmwareSubVersion; - - u32 IntrMask[2]; - u32 IntrMaskToSet[2]; - - u32 DisabledFunctions; - - //current WIFI_PHY values - u32 ReceiveConfig; - u32 TransmitConfig; - WIRELESS_MODE CurrentWirelessMode; - HT_CHANNEL_WIDTH CurrentChannelBW; - u8 CurrentChannel; - u8 nCur40MhzPrimeSC;// Control channel sub-carrier - u16 BasicRateSet; - - //rf_ctrl - u8 rf_chip; - u8 rf_type; - u8 NumTotalRFPath; - - // - // EEPROM setting. - // - u16 EEPROMVID; - u16 EEPROMDID; - u16 EEPROMSVID; - u16 EEPROMSMID; - u16 EEPROMChannelPlan; - u16 EEPROMVersion; - - u8 EEPROMCustomerID; - u8 EEPROMBoardType; - u8 EEPROMRegulatory; - - u8 EEPROMThermalMeter; - - u8 EEPROMC9; - u8 EEPROMCC; - u8 PAMode; - - u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; - u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr - u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr - s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff - u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff - // For power group - u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - - u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff - - u8 CrystalCap; // CrystalCap. - -#ifdef CONFIG_BT_COEXIST - struct btcoexist_priv bt_coexist; -#endif - - // Read/write are allow for following hardware information variables - u8 framesync; - u32 framesyncC34; - u8 framesyncMonitor; - u8 DefaultInitialGain[4]; - u8 pwrGroupCnt; - u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; - u32 CCKTxPowerLevelOriginalOffset; - - u32 AntennaTxPath; // Antenna path Tx - u32 AntennaRxPath; // Antenna path Rx - u8 BluetoothCoexist; - u8 ExternalPA; - u8 InternalPA5G[2]; //pathA / pathB - - //u32 LedControlNum; - //u32 LedControlMode; - //u32 TxPowerTrackControl; - u8 b1x1RecvCombine; // for 1T1R receive combining - - u8 bCurrentTurboEDCA; - u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. - - //vivi, for tx power tracking, 20080407 - //u16 TSSI_13dBm; - //u32 Pwr_Track; - // The current Tx Power Level - u8 CurrentCckTxPwrIdx; - u8 CurrentOfdm24GTxPwrIdx; - - BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D - - BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. - - u32 RfRegChnlVal[2]; - - u8 bCckHighPower; - - BOOLEAN bPhyValueInitReady; - - BOOLEAN bTXPowerDataReadFromEEPORM; - - BOOLEAN bInSetPower; - - //RDG enable - BOOLEAN bRDGEnable; - - BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress - BOOLEAN bNeedIQK; - - BOOLEAN bLCKInProgress; - - BOOLEAN bEarlyModeEnable; - - ATOMIC_T IQKRdyForXmit;// Tx must wait for IQK done - -#if 1 - IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; -#else - //regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78 - u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; - IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. -#endif - - //for host message to fw - u8 LastHMEBoxNum; - - u8 fw_ractrl; - // Beacon function related global variable. - u32 RegBcnCtrlVal; - u8 RegTxPause; - u8 RegFwHwTxQCtrl; - u8 RegReg542; - u8 RegCR_1; - - struct dm_priv dmpriv; - - u8 bInterruptMigration; - - u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. - - // Add for dual MAC 0--Mac0 1--Mac1 - u32 interfaceIndex; - - u16 RegRRSR; - - u16 EfuseUsedBytes; - u8 RTSInitRate; // 2010.11.24.by tynli. -#ifdef CONFIG_P2P - struct P2P_PS_Offload_t p2p_ps_offload; -#endif //CONFIG_P2P -}; - -typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE; - -// -// Function disabled. -// -#define DF_TX_BIT BIT0 -#define DF_RX_BIT BIT1 -#define DF_IO_BIT BIT2 -#define DF_IO_D3_BIT BIT3 - -#define RT_DF_TYPE u32 -#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) -#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) -#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) - -void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); -VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR); -#endif - -#ifdef CONFIG_USB_HCI - -//should be renamed and moved to another file -typedef enum _INTERFACE_SELECT_8192DUSB{ - INTF_SEL0_USB = 0, // USB - INTF_SEL1_MINICARD = 1, // Minicard - INTF_SEL2_EKB_PRO = 2, // Eee keyboard proprietary - INTF_SEL3_PRO = 3, // Customized proprietary -} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB; - -typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB; - -struct hal_data_8192du -{ - VERSION_8192D VersionID; - - // add for 92D Phy mode/mac/Band mode - MACPHY_MODE_8192D MacPhyMode92D; - BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G - BAND_TYPE BandSet92D; - BOOLEAN bIsVS; - - BOOLEAN bNOPG; - - BOOLEAN bSupportRemoteWakeUp; - BOOLEAN bMasterOfDMSP; - BOOLEAN bSlaveOfDMSP; -#ifdef CONFIG_DUALMAC_CONCURRENT - BOOLEAN bInModeSwitchProcess; -#endif - - u16 CustomerID; - - u16 FirmwareVersion; - u16 FirmwareVersionRev; - u16 FirmwareSubVersion; - - //current WIFI_PHY values - u32 ReceiveConfig; - WIRELESS_MODE CurrentWirelessMode; - HT_CHANNEL_WIDTH CurrentChannelBW; - u8 CurrentChannel; - u8 nCur40MhzPrimeSC;// Control channel sub-carrier - u16 BasicRateSet; - - INTERFACE_SELECT_8192DUSB InterfaceSel; - - //rf_ctrl - u8 rf_chip; - u8 rf_type; - u8 NumTotalRFPath; - - // - // EEPROM setting. - // - u8 EEPROMVersion; - u16 EEPROMVID; - u16 EEPROMPID; - u16 EEPROMSVID; - u16 EEPROMSDID; - u8 EEPROMCustomerID; - u8 EEPROMSubCustomerID; - u8 EEPROMRegulatory; - - u8 EEPROMThermalMeter; - - u8 EEPROMC9; - u8 EEPROMCC; - u8 PAMode; - - u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; - u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr - u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr - s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff - u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff - // For power group - u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; - - u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff - - u8 CrystalCap; // CrystalCap. - -#ifdef CONFIG_BT_COEXIST - struct btcoexist_priv bt_coexist; -#endif - - // Read/write are allow for following hardware information variables - u8 framesync; - u32 framesyncC34; - u8 framesyncMonitor; - u8 DefaultInitialGain[4]; - u8 pwrGroupCnt; - u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; - u32 CCKTxPowerLevelOriginalOffset; - - u32 AntennaTxPath; // Antenna path Tx - u32 AntennaRxPath; // Antenna path Rx - u8 BluetoothCoexist; - u8 ExternalPA; - u8 InternalPA5G[2]; //pathA / pathB - - //u32 LedControlNum; - //u32 LedControlMode; - //u32 TxPowerTrackControl; - u8 b1x1RecvCombine; // for 1T1R receive combining - - u8 bCurrentTurboEDCA; - u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. - - //vivi, for tx power tracking, 20080407 - //u16 TSSI_13dBm; - //u32 Pwr_Track; - // The current Tx Power Level - u8 CurrentCckTxPwrIdx; - u8 CurrentOfdm24GTxPwrIdx; - - BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D - - BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. - - u32 RfRegChnlVal[2]; - - u8 bCckHighPower; - - BOOLEAN bPhyValueInitReady; - - BOOLEAN bTXPowerDataReadFromEEPORM; - - BOOLEAN bInSetPower; - - //RDG enable - BOOLEAN bRDGEnable; - - BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress - BOOLEAN bNeedIQK; - - BOOLEAN bLCKInProgress; - - BOOLEAN bEarlyModeEnable; - - ATOMIC_T IQKRdyForXmit;// Tx must wait for IQK done - -#if 1 - IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; -#else - //regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78 - u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; - IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. -#endif - - //for host message to fw - u8 LastHMEBoxNum; - - u8 fw_ractrl; - // Beacon function related global variable. - u32 RegBcnCtrlVal; - u8 RegTxPause; - u8 RegFwHwTxQCtrl; - u8 RegReg542; - u8 RegCR_1; - - struct dm_priv dmpriv; - - u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. - - //Query RF by FW - BOOLEAN bReadRFbyFW; - - // For 92C USB endpoint setting - // - - u32 UsbBulkOutSize; - - int RtBulkOutPipe[3]; - int RtBulkInPipe; - int RtIntInPipe; - - // Add for dual MAC 0--Mac0 1--Mac1 - u32 interfaceIndex; - - u8 OutEpQueueSel; - u8 OutEpNumber; - - u8 Queue2EPNum[8];//for out endpoint number mapping - -#ifdef CONFIG_USB_TX_AGGREGATION - u8 UsbTxAggMode; - u8 UsbTxAggDescNum; -#endif -#ifdef CONFIG_USB_RX_AGGREGATION - u16 HwRxPageSize; // Hardware setting - u32 MaxUsbRxAggBlock; - - USB_RX_AGG_MODE UsbRxAggMode; - u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed - u8 UsbRxAggBlockTimeout; - u8 UsbRxAggPageCount; // 8192C DMA page count - u8 UsbRxAggPageTimeout; -#endif - - u16 RegRRSR; - - u16 EfuseUsedBytes; - u8 RTSInitRate; // 2010.11.24.by tynli. -#ifdef CONFIG_P2P - struct P2P_PS_Offload_t p2p_ps_offload; -#endif //CONFIG_P2P -}; - -typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE; -#endif - -#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) -#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) - -int FirmwareDownload92D(IN PADAPTER Adapter,IN BOOLEAN bUsedWoWLANFw); -VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter); -void rtl8192d_ReadChipVersion(IN PADAPTER Adapter); -VOID rtl8192d_ReadChannelPlan(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); -VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); -VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter); -u8 GetEEPROMSize8192D(PADAPTER Adapter); -void rtl8192d_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg); -BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter); -VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter); -//void PHY_ConfigMacPhyMode92D(PADAPTER Adapter); -void rtl8192d_free_hal_data(_adapter * padapter); -void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc); - -#endif - -#ifdef CONFIG_MP_INCLUDED - - -extern void Hal_SetAntenna(PADAPTER pAdapter); -extern void Hal_SetBandwidth(PADAPTER pAdapter); - -extern void Hal_SetTxPower(PADAPTER pAdapter); -extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); -extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); -extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); -extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); -extern void Hal_SetBandwidth(PADAPTER pAdapter); - -extern void Hal_SetDataRate(PADAPTER pAdapter); -extern void Hal_SetChannel(PADAPTER pAdapter); -extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); -extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); -extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); -extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); -extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); -extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); -extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); -extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); -extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); -extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); -extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); -extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); -extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); -extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); - - -#endif //end CONFIG_MP_INCLUDED - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __RTL8192D_HAL_H__ +#define __RTL8192D_HAL_H__ + +#include "rtl8192d_spec.h" +#include "Hal8192DPhyReg.h" +#include "Hal8192DPhyCfg.h" +#include "rtl8192d_rf.h" +#include "rtl8192d_dm.h" +#include "rtl8192d_recv.h" +#include "rtl8192d_xmit.h" +#include "rtl8192d_cmd.h" + +#ifdef CONFIG_PCI_HCI + #include + #include "Hal8192DEHWImg.h" + + #define RTL819X_DEFAULT_RF_TYPE RF_2T2R + +//--------------------------------------------------------------------- +// RTL8192DE From file +//--------------------------------------------------------------------- + #define RTL8192D_FW_IMG "rtl8192DE\\rtl8192dfw.bin" + + #define RTL8192D_PHY_REG "rtl8192DE\\PHY_REG.txt" + #define RTL8192D_PHY_REG_PG "rtl8192DE\\PHY_REG_PG.txt" + #define RTL8192D_PHY_REG_MP "rtl8192DE\\PHY_REG_MP.txt" + + #define RTL8192D_AGC_TAB "rtl8192DE\\AGC_TAB.txt" + #define RTL8192D_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G.txt" + #define RTL8192D_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G.txt" + #define RTL8192D_PHY_RADIO_A "rtl8192DE\\radio_a.txt" + #define RTL8192D_PHY_RADIO_B "rtl8192DE\\radio_b.txt" + #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DE\\radio_a_intPA.txt" + #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DE\\radio_b_intPA.txt" + #define RTL8192D_PHY_MACREG "rtl8192DE\\MAC_REG.txt" + +//--------------------------------------------------------------------- +// RTL8192DE From header +//--------------------------------------------------------------------- + + // Fw Array + #define Rtl8192D_FwImageArray Rtl8192DEFwImgArray + + // MAC/BB/PHY Array + #define Rtl8192D_MAC_Array Rtl8192DEMAC_2T_Array + #define Rtl8192D_AGCTAB_Array Rtl8192DEAGCTAB_Array + #define Rtl8192D_AGCTAB_5GArray Rtl8192DEAGCTAB_5GArray + #define Rtl8192D_AGCTAB_2GArray Rtl8192DEAGCTAB_2GArray + #define Rtl8192D_AGCTAB_2TArray Rtl8192DEAGCTAB_2TArray + #define Rtl8192D_AGCTAB_1TArray Rtl8192DEAGCTAB_1TArray + #define Rtl8192D_PHY_REG_2TArray Rtl8192DEPHY_REG_2TArray + #define Rtl8192D_PHY_REG_1TArray Rtl8192DEPHY_REG_1TArray + #define Rtl8192D_PHY_REG_Array_PG Rtl8192DEPHY_REG_Array_PG + #define Rtl8192D_PHY_REG_Array_MP Rtl8192DEPHY_REG_Array_MP + #define Rtl8192D_RadioA_2TArray Rtl8192DERadioA_2TArray + #define Rtl8192D_RadioA_1TArray Rtl8192DERadioA_1TArray + #define Rtl8192D_RadioB_2TArray Rtl8192DERadioB_2TArray + #define Rtl8192D_RadioB_1TArray Rtl8192DERadioB_1TArray + #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DERadioA_2T_intPAArray + #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DERadioB_2T_intPAArray + + // Array length + #define Rtl8192D_FwImageArrayLength Rtl8192DEImgArrayLength + #define Rtl8192D_MAC_ArrayLength Rtl8192DEMAC_2T_ArrayLength + #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DEAGCTAB_5GArrayLength + #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DEAGCTAB_2GArrayLength + #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DEAGCTAB_2TArrayLength + #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DEAGCTAB_1TArrayLength + #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DEAGCTAB_ArrayLength + #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DEPHY_REG_2TArrayLength + #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DEPHY_REG_1TArrayLength + #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DEPHY_REG_Array_PGLength + #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DEPHY_REG_Array_MPLength + #define Rtl8192D_RadioA_2TArrayLength Rtl8192DERadioA_2TArrayLength + #define Rtl8192D_RadioB_2TArrayLength Rtl8192DERadioB_2TArrayLength + #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DERadioA_2T_intPAArrayLength + #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DERadioB_2T_intPAArrayLength + +#elif defined(CONFIG_USB_HCI) + + #include "Hal8192DUHWImg.h" +#ifdef CONFIG_WOWLAN + #include "Hal8192DUHWImg_wowlan.h" +#endif //CONFIG_WOWLAN + #define RTL819X_DEFAULT_RF_TYPE RF_1T2R + +//--------------------------------------------------------------------- +// RTL8192DU From file +//--------------------------------------------------------------------- + #define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin" + + #define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt" + #define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt" + #define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt" + + #define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt" + #define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt" + #define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt" + #define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt" + #define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt" + #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt" + #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt" + #define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt" + +//--------------------------------------------------------------------- +// RTL8192DU From header +//--------------------------------------------------------------------- + + // Fw Array + #define Rtl8192D_FwImageArray Rtl8192DUFwImgArray +#ifdef CONFIG_WOWLAN + #define Rtl8192D_FwWWImageArray Rtl8192DUFwWWImgArray +#endif //CONFIG_WOWLAN + // MAC/BB/PHY Array + #define Rtl8192D_MAC_Array Rtl8192DUMAC_2T_Array + #define Rtl8192D_AGCTAB_Array Rtl8192DUAGCTAB_Array + #define Rtl8192D_AGCTAB_5GArray Rtl8192DUAGCTAB_5GArray + #define Rtl8192D_AGCTAB_2GArray Rtl8192DUAGCTAB_2GArray + #define Rtl8192D_AGCTAB_2TArray Rtl8192DUAGCTAB_2TArray + #define Rtl8192D_AGCTAB_1TArray Rtl8192DUAGCTAB_1TArray + #define Rtl8192D_PHY_REG_2TArray Rtl8192DUPHY_REG_2TArray + #define Rtl8192D_PHY_REG_1TArray Rtl8192DUPHY_REG_1TArray + #define Rtl8192D_PHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG + #define Rtl8192D_PHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP + #define Rtl8192D_RadioA_2TArray Rtl8192DURadioA_2TArray + #define Rtl8192D_RadioA_1TArray Rtl8192DURadioA_1TArray + #define Rtl8192D_RadioB_2TArray Rtl8192DURadioB_2TArray + #define Rtl8192D_RadioB_1TArray Rtl8192DURadioB_1TArray + #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray + #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray + + // Array length + #define Rtl8192D_FwImageArrayLength Rtl8192DUImgArrayLength + #define Rtl8192D_MAC_ArrayLength Rtl8192DUMAC_2T_ArrayLength + #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DUAGCTAB_5GArrayLength + #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DUAGCTAB_2GArrayLength + #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DUAGCTAB_2TArrayLength + #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DUAGCTAB_1TArrayLength + #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DUAGCTAB_ArrayLength + #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DUPHY_REG_2TArrayLength + #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DUPHY_REG_1TArrayLength + #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DUPHY_REG_Array_PGLength + #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DUPHY_REG_Array_MPLength + #define Rtl8192D_RadioA_2TArrayLength Rtl8192DURadioA_2TArrayLength + #define Rtl8192D_RadioB_2TArrayLength Rtl8192DURadioB_2TArrayLength + #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DURadioA_2T_intPAArrayLength + #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DURadioB_2T_intPAArrayLength + + // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. +/* #define Rtl819XFwImageArray Rtl8192DUFwImgArray + #define Rtl819XMAC_Array Rtl8192DUMAC_2TArray + #define Rtl819XAGCTAB_Array Rtl8192DUAGCTAB_Array + #define Rtl819XAGCTAB_5GArray Rtl8192DUAGCTAB_5GArray + #define Rtl819XAGCTAB_2GArray Rtl8192DUAGCTAB_2GArray + #define Rtl819XPHY_REG_2TArray Rtl8192DUPHY_REG_2TArray + #define Rtl819XPHY_REG_1TArray Rtl8192DUPHY_REG_1TArray + #define Rtl819XRadioA_2TArray Rtl8192DURadioA_2TArray + #define Rtl819XRadioA_1TArray Rtl8192DURadioA_1TArray + #define Rtl819XRadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray + #define Rtl819XRadioB_2TArray Rtl8192DURadioB_2TArray + #define Rtl819XRadioB_1TArray Rtl8192DURadioB_1TArray + #define Rtl819XRadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray + #define Rtl819XPHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG + #define Rtl819XPHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP + + #define Rtl819XAGCTAB_2TArray Rtl8192DUAGCTAB_2TArray + #define Rtl819XAGCTAB_1TArray Rtl8192DUAGCTAB_1TArray*/ + +#endif + +#define DRVINFO_SZ 4 // unit is 8bytes +#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) + +// +// Check if FW header exists. We do not consider the lower 4 bits in this case. +// By tynli. 2009.12.04. +// +#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ + (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ + (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\ + (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\ + (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\ + (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 ) + +#define FW_8192D_SIZE 0x8000 +#define FW_8192D_START_ADDRESS 0x1000 + +#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes + +typedef enum _FIRMWARE_SOURCE{ + FW_SOURCE_IMG_FILE = 0, + FW_SOURCE_HEADER_FILE = 1, //from header file +}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; + +typedef struct _RT_FIRMWARE{ + FIRMWARE_SOURCE eFWSource; + u8* szFwBuffer; + u32 ulFwLength; +#ifdef CONFIG_WOWLAN + u8* szWoWLANFwBuffer; + u32 ulWoWLANFwLength; +#endif //CONFIG_WOWLAN +}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D; + +// +// This structure must be cared byte-ordering +// +// Added by tynli. 2009.12.04. +typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required + + //--- LONG WORD 0 ---- + u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut + u8 Category; // AP/NIC and USB/PCI + u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions + u16 Version; // FW Version + u8 Subversion; // FW Subversion, default 0x00 + u8 Rsvd1; + + + //--- LONG WORD 1 ---- + u8 Month; // Release time Month field + u8 Date; // Release time Date field + u8 Hour; // Release time Hour field + u8 Minute; // Release time Minute field + u16 RamCodeSize; // The size of RAM code + u16 Rsvd2; + + //--- LONG WORD 2 ---- + u32 SvnIdx; // The SVN entry index + u32 Rsvd3; + + //--- LONG WORD 3 ---- + u32 Rsvd4; + u32 Rsvd5; + +}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR; + +#define DRIVER_EARLY_INT_TIME 0x05 +#define BCN_DMA_ATIME_INT_TIME 0x02 + +typedef enum _BT_CoType{ + BT_2Wire = 0, + BT_ISSC_3Wire = 1, + BT_Accel = 2, + BT_CSR = 3, + BT_CSR_ENHAN = 4, + BT_RTL8756 = 5, +} BT_CoType, *PBT_CoType; + +typedef enum _BT_CurState{ + BT_OFF = 0, + BT_ON = 1, +} BT_CurState, *PBT_CurState; + +typedef enum _BT_ServiceType{ + BT_SCO = 0, + BT_A2DP = 1, + BT_HID = 2, + BT_HID_Idle = 3, + BT_Scan = 4, + BT_Idle = 5, + BT_OtherAction = 6, + BT_Busy = 7, + BT_OtherBusy = 8, +} BT_ServiceType, *PBT_ServiceType; + +typedef enum _BT_RadioShared{ + BT_Radio_Shared = 0, + BT_Radio_Individual = 1, +} BT_RadioShared, *PBT_RadioShared; + +typedef struct _BT_COEXIST_STR{ + u8 BluetoothCoexist; + u8 BT_Ant_Num; + u8 BT_CoexistType; + u8 BT_State; + u8 BT_CUR_State; //0:on, 1:off + u8 BT_Ant_isolation; //0:good, 1:bad + u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic + u8 BT_Service; + u8 BT_RadioSharedType; + u8 Ratio_Tx; + u8 Ratio_PRI; +}BT_COEXIST_STR, *PBT_COEXIST_STR; + +//Added for 92D IQK setting. +typedef struct _IQK_MATRIX_REGS_SETTING{ + BOOLEAN bIQKDone; +#if 1 + int Value[1][IQK_Matrix_REG_NUM]; +#else + u32 Mark[IQK_Matrix_REG_NUM]; + u32 Value[IQK_Matrix_REG_NUM]; +#endif +}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; + +#ifdef CONFIG_USB_RX_AGGREGATION + +typedef enum _USB_RX_AGG_MODE{ + USB_RX_AGG_DISABLE, + USB_RX_AGG_DMA, + USB_RX_AGG_USB, + USB_RX_AGG_DMA_USB +}USB_RX_AGG_MODE; + +#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer + +#endif + + +#define TX_SELE_HQ BIT(0) // High Queue +#define TX_SELE_LQ BIT(1) // Low Queue +#define TX_SELE_NQ BIT(2) // Normal Queue + + +// Note: We will divide number of page equally for each queue other than public queue! + +#define TX_TOTAL_PAGE_NUMBER 0xF8 +#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) + +// For Normal Chip Setting +// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER +#define NORMAL_PAGE_NUM_PUBQ 0x56 + + +// For Test Chip Setting +// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER +#define TEST_PAGE_NUM_PUBQ 0x89 +#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A +#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A +#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10 +#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10 +#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0 + +#define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1) + +// For Test Chip Setting +#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 +#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 + +#define WMM_TEST_PAGE_NUM_PUBQ 0xA3 +#define WMM_TEST_PAGE_NUM_HPQ 0x29 +#define WMM_TEST_PAGE_NUM_LPQ 0x29 + + +//Note: For Normal Chip Setting ,modify later +#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 +#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 + +#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0 +#define WMM_NORMAL_PAGE_NUM_HPQ 0x29 +#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C +#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C + +#define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82 +#define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29 +#define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30 +#define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30 + +//------------------------------------------------------------------------- +// Chip specific +//------------------------------------------------------------------------- + +#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) +#define CHIP_BONDING_92C_1T2R 0x1 +#define CHIP_BONDING_88C_USB_MCARD 0x2 +#define CHIP_BONDING_88C_USB_HP 0x1 + +// +// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli. +// +/* + | BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 | + |-------------+-----------+-----------+-------+-----------+-------| + | IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type | + | | | TSMC/UMC | | TEST/NORMAL| | +*/ +// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 +// [7] Manufacturer: TSMC=0, UMC=1 +// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 +// [3] Chip type: TEST=0, NORMAL=1 +// [2:0] IC type: 81xxC=0, 8723=1, 92D=2 + +#define CHIP_8723 BIT(0) +#define CHIP_92D BIT(1) +#define NORMAL_CHIP BIT(3) +#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6))) +#define RF_TYPE_1T2R BIT(4) +#define RF_TYPE_2T2R BIT(5) +#define CHIP_VENDOR_UMC BIT(7) +#define B_CUT_VERSION BIT(12) +#define C_CUT_VERSION BIT(13) +#define D_CUT_VERSION ((BIT(12)|BIT(13))) +#define E_CUT_VERSION BIT(14) + + +// MASK +#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2)) +#define CHIP_TYPE_MASK BIT(3) +#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6)) +#define MANUFACTUER_MASK BIT(7) +#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8)) +#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12)) + +// Get element +#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK) +#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK) +#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK) +#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK) +#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK) +#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK) + +#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE) +#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE) +#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE) +#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE) +#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE) +#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE) +#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE) + +#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE) +#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) +#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) +// 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. +#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE) +#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE) + +#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) +#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) +#define IS_92D_E_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) +#define IS_NORMAL_CHIP92D(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE) + +typedef enum _VERSION_8192D{ + VERSION_TEST_CHIP_88C = 0x0000, + VERSION_TEST_CHIP_92C = 0x0020, + VERSION_TEST_UMC_CHIP_8723 = 0x0081, + VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, + VERSION_NORMAL_TSMC_CHIP_92C = 0x0028, + VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018, + VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088, + VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8, + VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098, + VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089, + VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089, + VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, + VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, + VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, + VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022, + VERSION_TEST_CHIP_92D_DUALPHY = 0x0002, + VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a, + VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a, + VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a, + VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a, + VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a, + VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a, + VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x402a, + VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x400a, +}VERSION_8192D,*PVERSION_8192D; + + +//------------------------------------------------------------------------- +// Channel Plan +//------------------------------------------------------------------------- +enum ChannelPlan{ + CHPL_FCC = 0, + CHPL_IC = 1, + CHPL_ETSI = 2, + CHPL_SPAIN = 3, + CHPL_FRANCE = 4, + CHPL_MKK = 5, + CHPL_MKK1 = 6, + CHPL_ISRAEL = 7, + CHPL_TELEC = 8, + CHPL_GLOBAL = 9, + CHPL_WORLD = 10, +}; + +typedef struct _TxPowerInfo{ + u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; + u8 TSSI_A[3]; + u8 TSSI_B[3]; + u8 TSSI_A_5G[3]; //5GL/5GM/5GH + u8 TSSI_B_5G[3]; +}TxPowerInfo, *PTxPowerInfo; + +#define EFUSE_REAL_CONTENT_LEN 1024 +#define EFUSE_MAP_LEN 256 +#define EFUSE_MAX_SECTION 32 +#define EFUSE_MAX_SECTION_BASE 16 +// To prevent out of boundary programming case, leave 1byte and program full section +// 9bytes + 1byt + 5bytes and pre 1byte. +// For worst case: +// | 2byte|----8bytes----|1byte|--7bytes--| //92D +#define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. + +typedef enum _PA_MODE { + PA_MODE_EXTERNAL = 0x00, + PA_MODE_INTERNAL_SP3T = 0x01, + PA_MODE_INTERNAL_SPDT = 0x02 +} PA_MODE; + +#ifdef CONFIG_PCI_HCI +struct hal_data_8192de +{ + VERSION_8192D VersionID; + + // add for 92D Phy mode/mac/Band mode + MACPHY_MODE_8192D MacPhyMode92D; + BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G + BAND_TYPE BandSet92D; + BOOLEAN bIsVS; + BOOLEAN bSupportRemoteWakeUp; + u8 AutoLoadStatusFor8192D; + + BOOLEAN bNOPG; + + BOOLEAN bMasterOfDMSP; + BOOLEAN bSlaveOfDMSP; + + u16 CustomerID; + + u16 FirmwareVersion; + u16 FirmwareVersionRev; + u16 FirmwareSubVersion; + + u32 IntrMask[2]; + u32 IntrMaskToSet[2]; + + u32 DisabledFunctions; + + //current WIFI_PHY values + u32 ReceiveConfig; + u32 TransmitConfig; + WIRELESS_MODE CurrentWirelessMode; + HT_CHANNEL_WIDTH CurrentChannelBW; + u8 CurrentChannel; + u8 nCur40MhzPrimeSC;// Control channel sub-carrier + u16 BasicRateSet; + + //rf_ctrl + u8 rf_chip; + u8 rf_type; + u8 NumTotalRFPath; + + // + // EEPROM setting. + // + u16 EEPROMVID; + u16 EEPROMDID; + u16 EEPROMSVID; + u16 EEPROMSMID; + u16 EEPROMChannelPlan; + u16 EEPROMVersion; + + u8 EEPROMCustomerID; + u8 EEPROMBoardType; + u8 EEPROMRegulatory; + + u8 EEPROMThermalMeter; + + u8 EEPROMC9; + u8 EEPROMCC; + u8 PAMode; + + u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; + u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr + u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr + s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff + u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff + // For power group + u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; + u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; + + u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff + + u8 CrystalCap; // CrystalCap. + +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv bt_coexist; +#endif + + // Read/write are allow for following hardware information variables + u8 framesync; + u32 framesyncC34; + u8 framesyncMonitor; + u8 DefaultInitialGain[4]; + u8 pwrGroupCnt; + u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; + u32 CCKTxPowerLevelOriginalOffset; + + u32 AntennaTxPath; // Antenna path Tx + u32 AntennaRxPath; // Antenna path Rx + u8 BluetoothCoexist; + u8 ExternalPA; + u8 InternalPA5G[2]; //pathA / pathB + + //u32 LedControlNum; + //u32 LedControlMode; + //u32 TxPowerTrackControl; + u8 b1x1RecvCombine; // for 1T1R receive combining + + u8 bCurrentTurboEDCA; + u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. + + //vivi, for tx power tracking, 20080407 + //u16 TSSI_13dBm; + //u32 Pwr_Track; + // The current Tx Power Level + u8 CurrentCckTxPwrIdx; + u8 CurrentOfdm24GTxPwrIdx; + + BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D + + BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. + + u32 RfRegChnlVal[2]; + + u8 bCckHighPower; + + BOOLEAN bPhyValueInitReady; + + BOOLEAN bTXPowerDataReadFromEEPORM; + + BOOLEAN bInSetPower; + + //RDG enable + BOOLEAN bRDGEnable; + + BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress + BOOLEAN bNeedIQK; + + BOOLEAN bLCKInProgress; + + BOOLEAN bEarlyModeEnable; + + ATOMIC_T IQKRdyForXmit;// Tx must wait for IQK done + +#if 1 + IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; +#else + //regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78 + u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; + IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. +#endif + + //for host message to fw + u8 LastHMEBoxNum; + + u8 fw_ractrl; + // Beacon function related global variable. + u32 RegBcnCtrlVal; + u8 RegTxPause; + u8 RegFwHwTxQCtrl; + u8 RegReg542; + u8 RegCR_1; + + struct dm_priv dmpriv; + + u8 bInterruptMigration; + + u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. + + // Add for dual MAC 0--Mac0 1--Mac1 + u32 interfaceIndex; + + u16 RegRRSR; + + u16 EfuseUsedBytes; + u8 RTSInitRate; // 2010.11.24.by tynli. +#ifdef CONFIG_P2P + struct P2P_PS_Offload_t p2p_ps_offload; +#endif //CONFIG_P2P +}; + +typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE; + +// +// Function disabled. +// +#define DF_TX_BIT BIT0 +#define DF_RX_BIT BIT1 +#define DF_IO_BIT BIT2 +#define DF_IO_D3_BIT BIT3 + +#define RT_DF_TYPE u32 +#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) +#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) +#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) + +void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); +VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR); +#endif + +#ifdef CONFIG_USB_HCI + +//should be renamed and moved to another file +typedef enum _INTERFACE_SELECT_8192DUSB{ + INTF_SEL0_USB = 0, // USB + INTF_SEL1_MINICARD = 1, // Minicard + INTF_SEL2_EKB_PRO = 2, // Eee keyboard proprietary + INTF_SEL3_PRO = 3, // Customized proprietary +} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB; + +typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB; + +struct hal_data_8192du +{ + VERSION_8192D VersionID; + + // add for 92D Phy mode/mac/Band mode + MACPHY_MODE_8192D MacPhyMode92D; + BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G + BAND_TYPE BandSet92D; + BOOLEAN bIsVS; + + BOOLEAN bNOPG; + + BOOLEAN bSupportRemoteWakeUp; + BOOLEAN bMasterOfDMSP; + BOOLEAN bSlaveOfDMSP; +#ifdef CONFIG_DUALMAC_CONCURRENT + BOOLEAN bInModeSwitchProcess; +#endif + + u16 CustomerID; + + u16 FirmwareVersion; + u16 FirmwareVersionRev; + u16 FirmwareSubVersion; + + //current WIFI_PHY values + u32 ReceiveConfig; + WIRELESS_MODE CurrentWirelessMode; + HT_CHANNEL_WIDTH CurrentChannelBW; + u8 CurrentChannel; + u8 nCur40MhzPrimeSC;// Control channel sub-carrier + u16 BasicRateSet; + + INTERFACE_SELECT_8192DUSB InterfaceSel; + + //rf_ctrl + u8 rf_chip; + u8 rf_type; + u8 NumTotalRFPath; + + // + // EEPROM setting. + // + u8 EEPROMVersion; + u16 EEPROMVID; + u16 EEPROMPID; + u16 EEPROMSVID; + u16 EEPROMSDID; + u8 EEPROMCustomerID; + u8 EEPROMSubCustomerID; + u8 EEPROMRegulatory; + + u8 EEPROMThermalMeter; + + u8 EEPROMC9; + u8 EEPROMCC; + u8 PAMode; + + u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; + u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr + u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr + s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff + u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff + // For power group + u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; + u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; + + u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff + + u8 CrystalCap; // CrystalCap. + +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv bt_coexist; +#endif + + // Read/write are allow for following hardware information variables + u8 framesync; + u32 framesyncC34; + u8 framesyncMonitor; + u8 DefaultInitialGain[4]; + u8 pwrGroupCnt; + u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; + u32 CCKTxPowerLevelOriginalOffset; + + u32 AntennaTxPath; // Antenna path Tx + u32 AntennaRxPath; // Antenna path Rx + u8 BluetoothCoexist; + u8 ExternalPA; + u8 InternalPA5G[2]; //pathA / pathB + + //u32 LedControlNum; + //u32 LedControlMode; + //u32 TxPowerTrackControl; + u8 b1x1RecvCombine; // for 1T1R receive combining + + u8 bCurrentTurboEDCA; + u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. + + //vivi, for tx power tracking, 20080407 + //u16 TSSI_13dBm; + //u32 Pwr_Track; + // The current Tx Power Level + u8 CurrentCckTxPwrIdx; + u8 CurrentOfdm24GTxPwrIdx; + + BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D + + BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. + + u32 RfRegChnlVal[2]; + + u8 bCckHighPower; + + BOOLEAN bPhyValueInitReady; + + BOOLEAN bTXPowerDataReadFromEEPORM; + + BOOLEAN bInSetPower; + + //RDG enable + BOOLEAN bRDGEnable; + + BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress + BOOLEAN bNeedIQK; + + BOOLEAN bLCKInProgress; + + BOOLEAN bEarlyModeEnable; + + ATOMIC_T IQKRdyForXmit;// Tx must wait for IQK done + +#if 1 + IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; +#else + //regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78 + u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; + IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. +#endif + + //for host message to fw + u8 LastHMEBoxNum; + + u8 fw_ractrl; + // Beacon function related global variable. + u32 RegBcnCtrlVal; + u8 RegTxPause; + u8 RegFwHwTxQCtrl; + u8 RegReg542; + u8 RegCR_1; + + struct dm_priv dmpriv; + + u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. + + //Query RF by FW + BOOLEAN bReadRFbyFW; + + // For 92C USB endpoint setting + // + + u32 UsbBulkOutSize; + + int RtBulkOutPipe[3]; + int RtBulkInPipe; + int RtIntInPipe; + + // Add for dual MAC 0--Mac0 1--Mac1 + u32 interfaceIndex; + + u8 OutEpQueueSel; + u8 OutEpNumber; + + u8 Queue2EPNum[8];//for out endpoint number mapping + +#ifdef CONFIG_USB_TX_AGGREGATION + u8 UsbTxAggMode; + u8 UsbTxAggDescNum; +#endif +#ifdef CONFIG_USB_RX_AGGREGATION + u16 HwRxPageSize; // Hardware setting + u32 MaxUsbRxAggBlock; + + USB_RX_AGG_MODE UsbRxAggMode; + u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed + u8 UsbRxAggBlockTimeout; + u8 UsbRxAggPageCount; // 8192C DMA page count + u8 UsbRxAggPageTimeout; +#endif + + u16 RegRRSR; + + u16 EfuseUsedBytes; + u8 RTSInitRate; // 2010.11.24.by tynli. +#ifdef CONFIG_P2P + struct P2P_PS_Offload_t p2p_ps_offload; +#endif //CONFIG_P2P +}; + +typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE; +#endif + +#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) +#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) + +int FirmwareDownload92D(IN PADAPTER Adapter,IN BOOLEAN bUsedWoWLANFw); +VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter); +void rtl8192d_ReadChipVersion(IN PADAPTER Adapter); +VOID rtl8192d_ReadChannelPlan(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); +VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); +VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter); +u8 GetEEPROMSize8192D(PADAPTER Adapter); +void rtl8192d_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg); +BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter); +VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter); +//void PHY_ConfigMacPhyMode92D(PADAPTER Adapter); +void rtl8192d_free_hal_data(_adapter * padapter); +void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc); + +#endif + +#ifdef CONFIG_MP_INCLUDED + + +extern void Hal_SetAntenna(PADAPTER pAdapter); +extern void Hal_SetBandwidth(PADAPTER pAdapter); + +extern void Hal_SetTxPower(PADAPTER pAdapter); +extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); +extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); +extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); +extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); +extern void Hal_SetBandwidth(PADAPTER pAdapter); + +extern void Hal_SetDataRate(PADAPTER pAdapter); +extern void Hal_SetChannel(PADAPTER pAdapter); +extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); +extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); +extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); +extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); +extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); +extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); +extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); +extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); +extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); +extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); +extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); +extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); +extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); +extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); + + +#endif //end CONFIG_MP_INCLUDED + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_led.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_led.h old mode 100755 new mode 100644 index 95e20ac8f8a670..454a1b8d6391b5 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_led.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_led.h @@ -1,44 +1,44 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTL8192D_LED_H_ -#define __RTL8192D_LED_H_ - -#include -#include -#include - - -//================================================================================ -// Interface to manipulate LED objects. -//================================================================================ -#ifdef CONFIG_USB_HCI -void rtl8192du_InitSwLeds(_adapter *padapter); -void rtl8192du_DeInitSwLeds(_adapter *padapter); -#endif - -#ifdef CONFIG_PCI_HCI -void rtl8192de_gen_RefreshLedState(PADAPTER Adapter); -void rtl8192de_InitSwLeds(_adapter *padapter); -void rtl8192de_DeInitSwLeds(_adapter *padapter); -#endif - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTL8192D_LED_H_ +#define __RTL8192D_LED_H_ + +#include +#include +#include + + +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ +#ifdef CONFIG_USB_HCI +void rtl8192du_InitSwLeds(_adapter *padapter); +void rtl8192du_DeInitSwLeds(_adapter *padapter); +#endif + +#ifdef CONFIG_PCI_HCI +void rtl8192de_gen_RefreshLedState(PADAPTER Adapter); +void rtl8192de_InitSwLeds(_adapter *padapter); +void rtl8192de_DeInitSwLeds(_adapter *padapter); +#endif + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_recv.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_recv.h old mode 100755 new mode 100644 index f7b62bded69abe..3ffc6466972070 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_recv.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_recv.h @@ -1,179 +1,183 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef _RTL8192D_RECV_H_ -#define _RTL8192D_RECV_H_ - -#include -#include -#include - - -#ifdef PLATFORM_OS_XP - #ifdef CONFIG_SDIO_HCI - #define NR_RECVBUFF 1024//512//128 - #else - #define NR_RECVBUFF (16) - #endif -#elif defined(PLATFORM_OS_CE) - #ifdef CONFIG_SDIO_HCI - #define NR_RECVBUFF (128) - #else - #define NR_RECVBUFF (4) - #endif -#else - #define NR_RECVBUFF (4) - #define NR_PREALLOC_RECV_SKB (8) -#endif - - - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - -#ifdef PLATFORM_OS_CE -#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k -#else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - //#define MAX_RECVBUF_SZ (32768) // 32k - //#define MAX_RECVBUF_SZ (16384) //16K - //#define MAX_RECVBUF_SZ (10240) //10K - #define MAX_RECVBUF_SZ (15360) // 15k < 16k - #else - #define MAX_RECVBUF_SZ (4000) // about 4K - #endif -#endif - -#elif defined(CONFIG_PCI_HCI) -//#ifndef CONFIG_MINIMAL_MEMORY_USAGE -// #define MAX_RECVBUF_SZ (9100) -//#else - #define MAX_RECVBUF_SZ (4000) // about 4K -//#endif - -#define RX_MPDU_QUEUE 0 -#define RX_CMD_QUEUE 1 -#define RX_MAX_QUEUE 2 -#endif - -#define RECV_BULK_IN_ADDR 0x80 -#define RECV_INT_IN_ADDR 0x81 - -#define PHY_RSSI_SLID_WIN_MAX 100 -#define PHY_LINKQUALITY_SLID_WIN_MAX 20 - -struct phy_stat -{ - unsigned int phydw0; - - unsigned int phydw1; - - unsigned int phydw2; - - unsigned int phydw3; - - unsigned int phydw4; - - unsigned int phydw5; - - unsigned int phydw6; - - unsigned int phydw7; -}; - -typedef struct _Phy_OFDM_Rx_Status_Report_8192cd -{ - unsigned char trsw_gain_X[4]; - unsigned char pwdb_all; - unsigned char cfosho_X[4]; - unsigned char cfotail_X[4]; - unsigned char rxevm_X[2]; - unsigned char rxsnr_X[4]; - unsigned char pdsnr_X[2]; - unsigned char csi_current_X[2]; - unsigned char csi_target_X[2]; - unsigned char sigevm; - unsigned char max_ex_pwr; -//#ifdef RTL8192SE -#ifdef CONFIG_LITTLE_ENDIAN - unsigned char ex_intf_flg:1; - unsigned char sgi_en:1; - unsigned char rxsc:2; - //unsigned char rsvd:4; - unsigned char idle_long:1; - unsigned char r_ant_train_en:1; - unsigned char ANTSELB:1; - unsigned char ANTSEL:1; -#else // _BIG_ENDIAN_ - //unsigned char rsvd:4; - unsigned char ANTSEL:1; - unsigned char ANTSELB:1; - unsigned char r_ant_train_en:1; - unsigned char idle_long:1; - unsigned char rxsc:2; - unsigned char sgi_en:1; - unsigned char ex_intf_flg:1; -#endif -//#else // RTL8190, RTL8192E -// unsigned char sgi_en; -// unsigned char rxsc_sgien_exflg; -//#endif -}__attribute__ ((packed)) PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; - -typedef struct _Phy_CCK_Rx_Status_Report_8192cd -{ - /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend - 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ - u8 adc_pwdb_X[4]; - u8 SQ_rpt; - u8 cck_agc_rpt; -} PHY_STS_CCK_8192CD_T; - -// Rx smooth factor -#define Rx_Smooth_Factor (20) - -#ifdef CONFIG_USB_HCI -typedef struct _INTERRUPT_MSG_FORMAT_EX{ - unsigned int C2H_MSG0; - unsigned int C2H_MSG1; - unsigned int C2H_MSG2; - unsigned int C2H_MSG3; - unsigned int HISR; // from HISR Reg0x124, read to clear - unsigned int HISRE;// from HISRE Reg0x12c, read to clear - unsigned int MSG_EX; -}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; - -void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -int rtl8192du_init_recv_priv(_adapter * padapter); -void rtl8192du_free_recv_priv(_adapter * padapter); -#endif - -#ifdef CONFIG_PCI_HCI -int rtl8192de_init_recv_priv(_adapter * padapter); -void rtl8192de_free_recv_priv(_adapter * padapter); -#endif - -void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info); -void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef _RTL8192D_RECV_H_ +#define _RTL8192D_RECV_H_ + +#include +#include +#include + + +#ifdef PLATFORM_OS_XP + #ifdef CONFIG_SDIO_HCI + #define NR_RECVBUFF 1024//512//128 + #else + #define NR_RECVBUFF (16) + #endif +#elif defined(PLATFORM_OS_CE) + #ifdef CONFIG_SDIO_HCI + #define NR_RECVBUFF (128) + #else + #define NR_RECVBUFF (4) + #endif +#else +#ifdef CONFIG_SINGLE_RECV_BUF + #define NR_RECVBUFF (1) +#else + #define NR_RECVBUFF (4) +#endif //CONFIG_SINGLE_RECV_BUF + #define NR_PREALLOC_RECV_SKB (8) +#endif + + + +#define RECV_BLK_SZ 512 +#define RECV_BLK_CNT 16 +#define RECV_BLK_TH RECV_BLK_CNT + +#if defined(CONFIG_USB_HCI) + +#ifdef PLATFORM_OS_CE +#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k +#else + #ifndef CONFIG_MINIMAL_MEMORY_USAGE + //#define MAX_RECVBUF_SZ (32768) // 32k + //#define MAX_RECVBUF_SZ (16384) //16K + //#define MAX_RECVBUF_SZ (10240) //10K + #define MAX_RECVBUF_SZ (15360) // 15k < 16k + #else + #define MAX_RECVBUF_SZ (4000) // about 4K + #endif +#endif + +#elif defined(CONFIG_PCI_HCI) +//#ifndef CONFIG_MINIMAL_MEMORY_USAGE +// #define MAX_RECVBUF_SZ (9100) +//#else + #define MAX_RECVBUF_SZ (4000) // about 4K +//#endif + +#define RX_MPDU_QUEUE 0 +#define RX_CMD_QUEUE 1 +#define RX_MAX_QUEUE 2 +#endif + +#define RECV_BULK_IN_ADDR 0x80 +#define RECV_INT_IN_ADDR 0x81 + +#define PHY_RSSI_SLID_WIN_MAX 100 +#define PHY_LINKQUALITY_SLID_WIN_MAX 20 + +struct phy_stat +{ + unsigned int phydw0; + + unsigned int phydw1; + + unsigned int phydw2; + + unsigned int phydw3; + + unsigned int phydw4; + + unsigned int phydw5; + + unsigned int phydw6; + + unsigned int phydw7; +}; + +typedef struct _Phy_OFDM_Rx_Status_Report_8192cd +{ + unsigned char trsw_gain_X[4]; + unsigned char pwdb_all; + unsigned char cfosho_X[4]; + unsigned char cfotail_X[4]; + unsigned char rxevm_X[2]; + unsigned char rxsnr_X[4]; + unsigned char pdsnr_X[2]; + unsigned char csi_current_X[2]; + unsigned char csi_target_X[2]; + unsigned char sigevm; + unsigned char max_ex_pwr; +//#ifdef RTL8192SE +#ifdef CONFIG_LITTLE_ENDIAN + unsigned char ex_intf_flg:1; + unsigned char sgi_en:1; + unsigned char rxsc:2; + //unsigned char rsvd:4; + unsigned char idle_long:1; + unsigned char r_ant_train_en:1; + unsigned char ANTSELB:1; + unsigned char ANTSEL:1; +#else // _BIG_ENDIAN_ + //unsigned char rsvd:4; + unsigned char ANTSEL:1; + unsigned char ANTSELB:1; + unsigned char r_ant_train_en:1; + unsigned char idle_long:1; + unsigned char rxsc:2; + unsigned char sgi_en:1; + unsigned char ex_intf_flg:1; +#endif +//#else // RTL8190, RTL8192E +// unsigned char sgi_en; +// unsigned char rxsc_sgien_exflg; +//#endif +}__attribute__ ((packed)) PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; + +typedef struct _Phy_CCK_Rx_Status_Report_8192cd +{ + /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend + 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ + u8 adc_pwdb_X[4]; + u8 SQ_rpt; + u8 cck_agc_rpt; +} PHY_STS_CCK_8192CD_T; + +// Rx smooth factor +#define Rx_Smooth_Factor (20) + +#ifdef CONFIG_USB_HCI +typedef struct _INTERRUPT_MSG_FORMAT_EX{ + unsigned int C2H_MSG0; + unsigned int C2H_MSG1; + unsigned int C2H_MSG2; + unsigned int C2H_MSG3; + unsigned int HISR; // from HISR Reg0x124, read to clear + unsigned int HISRE;// from HISRE Reg0x12c, read to clear + unsigned int MSG_EX; +}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; + +void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); +int rtl8192du_init_recv_priv(_adapter * padapter); +void rtl8192du_free_recv_priv(_adapter * padapter); +#endif + +#ifdef CONFIG_PCI_HCI +int rtl8192de_init_recv_priv(_adapter * padapter); +void rtl8192de_free_recv_priv(_adapter * padapter); +#endif + +void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info); +void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_rf.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_rf.h old mode 100755 new mode 100644 index eea18b94087b2d..6995464d53c765 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_rf.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_rf.h @@ -1,98 +1,98 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -/****************************************************************************** - * - * - * Module: rtl8192d_rf.h ( Header File) - * - * Note: Collect every HAL RF type exter API or constant. - * - * Function: - * - * Export: - * - * Abbrev: - * - * History: - * Data Who Remark - * - * 09/25/2008 MHC Create initial version. - * - * -******************************************************************************/ -#ifndef _RTL8192D_RF_H_ -#define _RTL8192D_RF_H_ -/* Check to see if the file has been included already. */ - - -/*--------------------------Define Parameters-------------------------------*/ - -// -// For RF 6052 Series -// -#define RF6052_MAX_TX_PWR 0x3F -#define RF6052_MAX_REG 0x3F -#define RF6052_MAX_PATH 2 -/*--------------------------Define Parameters-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure----------------------------*/ - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - -/*------------------------Export Marco Definition---------------------------*/ - -/*------------------------Export Marco Definition---------------------------*/ - - -/*--------------------------Exported Function prototype---------------------*/ - -// -// RF RL6052 Series API -// -void rtl8192d_RF_ChangeTxPath( IN PADAPTER Adapter, - IN u16 DataRate); -void rtl8192d_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN HT_CHANNEL_WIDTH Bandwidth); -VOID rtl8192d_PHY_RF6052SetCckTxPower( - IN PADAPTER Adapter, - IN u8* pPowerlevel); -VOID rtl8192d_PHY_RF6052SetOFDMTxPower( - IN PADAPTER Adapter, - IN u8* pPowerLevel, - IN u8 Channel); -int PHY_RF6052_Config8192D( IN PADAPTER Adapter ); - -BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); - -void rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); - - -/*--------------------------Exported Function prototype---------------------*/ - - -#endif/* End of HalRf.h */ - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +/****************************************************************************** + * + * + * Module: rtl8192d_rf.h ( Header File) + * + * Note: Collect every HAL RF type exter API or constant. + * + * Function: + * + * Export: + * + * Abbrev: + * + * History: + * Data Who Remark + * + * 09/25/2008 MHC Create initial version. + * + * +******************************************************************************/ +#ifndef _RTL8192D_RF_H_ +#define _RTL8192D_RF_H_ +/* Check to see if the file has been included already. */ + + +/*--------------------------Define Parameters-------------------------------*/ + +// +// For RF 6052 Series +// +#define RF6052_MAX_TX_PWR 0x3F +#define RF6052_MAX_REG 0x3F +#define RF6052_MAX_PATH 2 +/*--------------------------Define Parameters-------------------------------*/ + + +/*------------------------------Define structure----------------------------*/ + +/*------------------------------Define structure----------------------------*/ + + +/*------------------------Export global variable----------------------------*/ +/*------------------------Export global variable----------------------------*/ + +/*------------------------Export Marco Definition---------------------------*/ + +/*------------------------Export Marco Definition---------------------------*/ + + +/*--------------------------Exported Function prototype---------------------*/ + +// +// RF RL6052 Series API +// +void rtl8192d_RF_ChangeTxPath( IN PADAPTER Adapter, + IN u16 DataRate); +void rtl8192d_PHY_RF6052SetBandwidth( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth); +VOID rtl8192d_PHY_RF6052SetCckTxPower( + IN PADAPTER Adapter, + IN u8* pPowerlevel); +VOID rtl8192d_PHY_RF6052SetOFDMTxPower( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel); +int PHY_RF6052_Config8192D( IN PADAPTER Adapter ); + +BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); + +void rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); + + +/*--------------------------Exported Function prototype---------------------*/ + + +#endif/* End of HalRf.h */ + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_spec.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_spec.h old mode 100755 new mode 100644 index 2d055595fa7f6c..9bba78a85e1e21 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_spec.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_spec.h @@ -1,1879 +1,1879 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#ifndef __RTL8192D_SPEC_H__ -#define __RTL8192D_SPEC_H__ - -#include - -#ifndef BIT -#define BIT(x) (1 << (x)) -#endif - -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - - -//============================================================ -// 8192D Regsiter offset definition -//============================================================ - - -//============================================================ -// -//============================================================ - -//----------------------------------------------------- -// -// 0x0000h ~ 0x00FFh System Configuration -// -//----------------------------------------------------- -#define REG_SYS_ISO_CTRL 0x0000 -#define REG_SYS_FUNC_EN 0x0002 -#define REG_APS_FSMCO 0x0004 -#define REG_SYS_CLKR 0x0008 -#define REG_9346CR 0x000A -#define REG_EE_VPD 0x000C -#define REG_AFE_MISC 0x0010 -#define REG_SPS0_CTRL 0x0011 -#define REG_POWER_OFF_IN_PROCESS 0x0017 -#define REG_SPS_OCP_CFG 0x0018 -#define REG_RSV_CTRL 0x001C -#define REG_RF_CTRL 0x001F -#define REG_LDOA15_CTRL 0x0020 -#define REG_LDOV12D_CTRL 0x0021 -#define REG_LDOHCI12_CTRL 0x0022 -#define REG_LPLDO_CTRL 0x0023 -#define REG_AFE_XTAL_CTRL 0x0024 -#define REG_AFE_PLL_CTRL 0x0028 -#define REG_MAC_PHY_CTRL 0x002c //for 92d, DMDP,SMSP,DMSP contrl -#define REG_EFUSE_CTRL 0x0030 -#define REG_EFUSE_TEST 0x0034 -#define REG_PWR_DATA 0x0038 -#define REG_CAL_TIMER 0x003C -#define REG_ACLK_MON 0x003E -#define REG_GPIO_MUXCFG 0x0040 -//#define REG_GPIO_MUXCFG 0x0041 -#define REG_GPIO_IO_SEL 0x0042 -#define REG_MAC_PINMUX_CFG 0x0043 -#define REG_GPIO_PIN_CTRL 0x0044 -#define REG_GPIO_INTM 0x0048 -#define REG_LEDCFG0 0x004C -#define REG_LEDCFG1 0x004D -#define REG_LEDCFG2 0x004E -#define REG_LEDCFG3 0x004F -#define REG_FSIMR 0x0050 -#define REG_FSISR 0x0054 - -#define REG_MCUFWDL 0x0080 -#define REG_WOWLAN_REASON 0x0081 -#define REG_HMEBOX_EXT_0 0x0088 -#define REG_HMEBOX_EXT_1 0x008A -#define REG_HMEBOX_EXT_2 0x008C -#define REG_HMEBOX_EXT_3 0x008E - -#define REG_BIST_SCAN 0x00D0 -#define REG_BIST_RPT 0x00D4 -#define REG_BIST_ROM_RPT 0x00D8 -#define REG_USB_SIE_INTF 0x00E0 -#define REG_PCIE_MIO_INTF 0x00E4 -#define REG_PCIE_MIO_INTD 0x00E8 -#define REG_HPON_FSM 0x00EC -#define REG_SYS_CFG 0x00F0 -#define REG_MAC_PHY_CTRL_NORMAL 0x00f8 - -#define REG_MAC0 0x0081 -#define REG_MAC1 0x0053 -#define FW_MAC0_ready 0x18 -#define FW_MAC1_ready 0x1A -#define MAC0_ON BIT7 -#define MAC1_ON BIT0 -#define mac0_ready BIT0 -#define mac1_ready BIT0 - - -//----------------------------------------------------- -// -// 0x0100h ~ 0x01FFh MACTOP General Configuration -// -//----------------------------------------------------- -#define REG_CR 0x0100 -#define REG_PBP 0x0104 -#define REG_TRXDMA_CTRL 0x010C -#define REG_TRXFF_BNDY 0x0114 -#define REG_TRXFF_STATUS 0x0118 -#define REG_RXFF_PTR 0x011C -#define REG_HIMR 0x0120 -#define REG_HISR 0x0124 -#define REG_HIMRE 0x0128 -#define REG_HISRE 0x012C -#define REG_CPWM 0x012F -#define REG_FWIMR 0x0130 -#define REG_FWISR 0x0134 -#define REG_FTIMR 0x0138 -#define REG_PKTBUF_DBG_CTRL 0x0140 -#define REG_PKTBUF_DBG_DATA_L 0x0144 -#define REG_PKTBUF_DBG_DATA_H 0x0148 - -#define REG_TC0_CTRL 0x0150 -#define REG_TC1_CTRL 0x0154 -#define REG_TC2_CTRL 0x0158 -#define REG_TC3_CTRL 0x015C -#define REG_TC4_CTRL 0x0160 -#define REG_TCUNIT_BASE 0x0164 -#define REG_MBIST_START 0x0174 -#define REG_MBIST_DONE 0x0178 -#define REG_MBIST_FAIL 0x017C -#define REG_C2HEVT_MSG_NORMAL 0x01A0 -#define REG_C2HEVT_CLEAR 0x01AF -#define REG_C2HEVT_MSG_TEST 0x01B8 -#define REG_MCUTST_1 0x01c0 -#define REG_FMETHR 0x01C8 -#define REG_HMETFR 0x01CC -#define REG_HMEBOX_0 0x01D0 -#define REG_HMEBOX_1 0x01D4 -#define REG_HMEBOX_2 0x01D8 -#define REG_HMEBOX_3 0x01DC - -#define REG_LLT_INIT 0x01E0 -#define REG_BB_ACCEESS_CTRL 0x01E8 -#define REG_BB_ACCESS_DATA 0x01EC - - -//----------------------------------------------------- -// -// 0x0200h ~ 0x027Fh TXDMA Configuration -// -//----------------------------------------------------- -#define REG_RQPN 0x0200 -#define REG_FIFOPAGE 0x0204 -#define REG_TDECTRL 0x0208 -#define REG_TXDMA_OFFSET_CHK 0x020C -#define REG_TXDMA_STATUS 0x0210 -#define REG_RQPN_NPQ 0x0214 - -//----------------------------------------------------- -// -// 0x0280h ~ 0x02FFh RXDMA Configuration -// -//----------------------------------------------------- -#define REG_RXDMA_AGG_PG_TH 0x0280 -#define REG_RXPKT_NUM 0x0284 -#define REG_RXDMA_STATUS 0x0288 - - -//----------------------------------------------------- -// -// 0x0300h ~ 0x03FFh PCIe -// -//----------------------------------------------------- -#define REG_PCIE_CTRL_REG 0x0300 -#define REG_INT_MIG 0x0304 // Interrupt Migration -#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address -#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address -#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address -#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address -#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address -#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address -#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address -#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address -#define REG_DBI 0x0348 // Backdoor REG for Access Configuration -//sherry added for DBI Read/Write 20091126 -#define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration -#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration -#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration -#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY -#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY -#define REG_DBG_SEL 0x0360 // Debug Selection Register -#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM -#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM -#define REG_UART_CTRL 0x0364 // UART Control -#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address -#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address - - -// spec version 11 -//----------------------------------------------------- -// -// 0x0400h ~ 0x047Fh Protocol Configuration -// -//----------------------------------------------------- -#define REG_VOQ_INFORMATION 0x0400 -#define REG_VIQ_INFORMATION 0x0404 -#define REG_BEQ_INFORMATION 0x0408 -#define REG_BKQ_INFORMATION 0x040C -#define REG_MGQ_INFORMATION 0x0410 -#define REG_HGQ_INFORMATION 0x0414 -#define REG_BCNQ_INFORMATION 0x0418 - - -#define REG_CPU_MGQ_INFORMATION 0x041C -#define REG_FWHW_TXQ_CTRL 0x0420 -#define REG_HWSEQ_CTRL 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY 0x0425 -#define REG_LIFETIME_EN 0x0426 -#define REG_MULTI_BCNQ_OFFSET 0x0427 -#define REG_SPEC_SIFS 0x0428 -#define REG_RL 0x042A -#define REG_DARFRC 0x0430 -#define REG_RARFRC 0x0438 -#define REG_RRSR 0x0440 -#define REG_ARFR0 0x0444 -#define REG_ARFR1 0x0448 -#define REG_ARFR2 0x044C -#define REG_ARFR3 0x0450 -#define REG_AGGLEN_LMT 0x0458 -#define REG_AMPDU_MIN_SPACE 0x045C -#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D -#define REG_FAST_EDCA_CTRL 0x0460 -#define REG_RD_RESP_PKT_TH 0x0463 -#define REG_INIRTS_RATE_SEL 0x0480 -#define REG_INIDATA_RATE_SEL 0x0484 -#define REG_POWER_STATUS 0x04A4 -#define REG_POWER_STAGE1 0x04B4 -#define REG_POWER_STAGE2 0x04B8 -#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 -#define REG_STBC_SETTING 0x04C4 -#define REG_PROT_MODE_CTRL 0x04C8 -#define REG_MAX_AGGR_NUM 0x04CA -#define REG_RTS_MAX_AGGR_NUM 0x04CB -#define REG_BAR_MODE_CTRL 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT 0x04CF -#define REG_EARLY_MODE_CONTROL 0x04D0 -#define REG_NQOS_SEQ 0x04DC -#define REG_QOS_SEQ 0x04DE -#define REG_NEED_CPU_HANDLE 0x04E0 -#define REG_PKT_LOSE_RPT 0x04E1 -#define REG_PTCL_ERR_STATUS 0x04E2 -#define REG_DUMMY 0x04FC - - - -//----------------------------------------------------- -// -// 0x0500h ~ 0x05FFh EDCA Configuration -// -//----------------------------------------------------- -#define REG_EDCA_VO_PARAM 0x0500 -#define REG_EDCA_VI_PARAM 0x0504 -#define REG_EDCA_BE_PARAM 0x0508 -#define REG_EDCA_BK_PARAM 0x050C -#define REG_BCNTCFG 0x0510 -#define REG_PIFS 0x0512 -#define REG_RDG_PIFS 0x0513 -#define REG_SIFS_CTX 0x0514 -#define REG_SIFS_TRX 0x0516 -#define REG_TSFTR_SYN_OFFSET 0x0518 -#define REG_AGGR_BREAK_TIME 0x051A -#define REG_SLOT 0x051B -#define REG_TX_PTCL_CTRL 0x0520 -#define REG_TXPAUSE 0x0522 -#define REG_DIS_TXREQ_CLR 0x0523 -#define REG_RD_CTRL 0x0524 -#define REG_TBTT_PROHIBIT 0x0540 -#define REG_RD_NAV_NXT 0x0544 -#define REG_NAV_PROT_LEN 0x0546 -#define REG_BCN_CTRL 0x0550 -#define REG_BCN_CTRL_1 0x0551 -#define REG_MBID_NUM 0x0552 -#define REG_DUAL_TSF_RST 0x0553 -#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE -#define REG_MBSSID_BCN_SPACE 0x0554 -#define REG_DRVERLYINT 0x0558 -#define REG_BCNDMATIM 0x0559 -#define REG_ATIMWND 0x055A -#define REG_USTIME_TSF 0x055C -#define REG_BCN_MAX_ERR 0x055D -#define REG_RXTSF_OFFSET_CCK 0x055E -#define REG_RXTSF_OFFSET_OFDM 0x055F -#define REG_TSFTR 0x0560 -#define REG_TSFTR1 0x0568 -#define REG_INIT_TSFTR 0x0564 -#define REG_ATIMWND_1 0x0570 -#define REG_PSTIMER 0x0580 -#define REG_TIMER0 0x0584 -#define REG_TIMER1 0x0588 -#define REG_ACMHWCTRL 0x05C0 -#define REG_ACMRSTCTRL 0x05C1 -#define REG_ACMAVG 0x05C2 -#define REG_VO_ADMTIME 0x05C4 -#define REG_VI_ADMTIME 0x05C6 -#define REG_BE_ADMTIME 0x05C8 -#define REG_EDCA_RANDOM_GEN 0x05CC -#define REG_SCH_TXCMD 0x05D0 - -#define REG_DMC 0x05F0 //Dual MAC Co-Existence Register - - -//----------------------------------------------------- -// -// 0x0600h ~ 0x07FFh WMAC Configuration -// -//----------------------------------------------------- -#define REG_APSD_CTRL 0x0600 -#define REG_BWOPMODE 0x0603 -#define REG_TCR 0x0604 -#define REG_RCR 0x0608 -#define REG_RX_PKT_LIMIT 0x060C -#define REG_RX_DLK_TIME 0x060D -#define REG_RX_DRVINFO_SZ 0x060F - -#define REG_MACID 0x0610 -#define REG_BSSID 0x0618 -#define REG_MAR 0x0620 -#define REG_MBIDCAMCFG 0x0628 - -#define REG_USTIME_EDCA 0x0638 -#define REG_MAC_SPEC_SIFS 0x063A -#define REG_RESP_SIFS_CCK 0x063C -#define REG_RESP_SIFS_OFDM 0x063E -#define REG_ACKTO 0x0640 -#define REG_CTS2TO 0x0641 -#define REG_EIFS 0x0642 - - -//WMA, BA, CCX -#define REG_NAV_CTRL 0x0650 -#define REG_BACAMCMD 0x0654 -#define REG_BACAMCONTENT 0x0658 -#define REG_LBDLY 0x0660 -#define REG_FWDLY 0x0661 -#define REG_RXERR_RPT 0x0664 -#define REG_WMAC_TRXPTCL_CTL 0x0668 - - -// Security -#define REG_CAMCMD 0x0670 -#define REG_CAMWRITE 0x0674 -#define REG_CAMREAD 0x0678 -#define REG_CAMDBG 0x067C -#define REG_SECCFG 0x0680 - -// Power -#define REG_WOW_CTRL 0x0690 -#define REG_PSSTATUS 0x0691 -#define REG_PS_RX_INFO 0x0692 -#define REG_LPNAV_CTRL 0x0694 -#define REG_WKFMCAM_CMD 0x0698 -#define REG_WKFMCAM_RWD 0x069C -#define REG_RXFLTMAP0 0x06A0 -#define REG_RXFLTMAP1 0x06A2 -#define REG_RXFLTMAP2 0x06A4 -#define REG_BCN_PSR_RPT 0x06A8 -#define REG_CALB32K_CTRL 0x06AC -#define REG_PKT_MON_CTRL 0x06B4 -#define REG_BT_COEX_TABLE 0x06C0 -#define REG_WMAC_RESP_TXINFO 0x06D8 - -#define REG_MACID1 0x0700 -#define REG_BSSID1 0x0708 - -//----------------------------------------------------- -// -// 0xFE00h ~ 0xFE55h USB Configuration -// -//----------------------------------------------------- -#define REG_USB_INFO 0xFE17 -#define REG_USB_SPECIAL_OPTION 0xFE55 -#define REG_USB_DMA_AGG_TO 0xFE5B -#define REG_USB_AGG_TO 0xFE5C -#define REG_USB_AGG_TH 0xFE5D - -// for 92DU high_Queue low_Queue Normal_Queue select -#define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 -//#define REG_USB_LOW_Queue_Select_MAC0 0xFE45 -#define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 -//#define REG_USB_LOW_Queue_Select_MAC1 0xFE48 - -// For test chip -#define REG_TEST_USB_TXQS 0xFE48 -#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 -#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 -#define REG_TEST_SIE_OPTIONAL 0xFE64 -#define REG_TEST_SIE_CHIRP_K 0xFE65 -#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B -#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 -#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 - - -// For normal chip -#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 -#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 -#define REG_NORMAL_SIE_OPTIONAL 0xFE64 -#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 -#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B -#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 -#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF - - -//----------------------------------------------------- -// -// Redifine 8192C register definition for compatibility -// -//----------------------------------------------------- - -// TODO: use these definition when using REG_xxx naming rule. -// NOTE: DO NOT Remove these definition. Use later. - -#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. -#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. -#define SYS_CLK REG_SYS_CLKR -#define CR9346 REG_9346CR // 93C46/93C56 Command Register. -#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. -#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. -#define MSR (REG_CR + 2) // Media Status register -#define ISR REG_HISR -#define TSFR REG_TSFTR // Timing Sync Function Timer Register. - -#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 -#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 - -#define PBP REG_PBP - -// Redifine MACID register, to compatible prior ICs. -#define IDR0 MACIDR0 -#define IDR4 MACIDR4 - - -// -// 9. Security Control Registers (Offset: ) -// -#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd -#define WCAMI REG_CAMWRITE // Software write CAM input content -#define RCAMO REG_CAMREAD // Software read/write CAM config -#define CAMDBG REG_CAMDBG -#define SECR REG_SECCFG //Security Configuration Register - -// Unused register -#define UnusedRegister 0x1BF -#define DCAM UnusedRegister -#define PSR UnusedRegister -#define BBAddr UnusedRegister -#define PhyDataR UnusedRegister - -#define InvalidBBRFValue 0x12345678 - -// Min Spacing related settings. -#define MAX_MSS_DENSITY_2T 0x13 -#define MAX_MSS_DENSITY_1T 0x0A - -//---------------------------------------------------------------------------- -// 8192C Cmd9346CR bits (Offset 0xA, 16bit) -//---------------------------------------------------------------------------- -#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 -#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 -#define Cmd9346CR_9356SEL BIT4 -#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) -#define AutoLoadEFUSE CmdEEPROM_En - -// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) -//---------------------------------------------------------------------------- -#define GPIOSEL_GPIO 0 -#define GPIOSEL_ENBT BIT5 - -//---------------------------------------------------------------------------- -// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) -//---------------------------------------------------------------------------- -#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value -#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value -#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. -#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) - - -//---------------------------------------------------------------------------- -// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) -//---------------------------------------------------------------------------- -/* -Network Type -00: No link -01: Link in ad hoc network -10: Link in infrastructure network -11: AP mode -Default: 00b. -*/ -#define MSR_NOLINK 0x00 -#define MSR_ADHOC 0x01 -#define MSR_INFRA 0x02 -#define MSR_AP 0x03 - -// -// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) -// -//---------------------------------------------------------------------------- -// 8192C Response Rate Set Register (offset 0x181, 24bits) -//---------------------------------------------------------------------------- -#define RRSR_RSC_OFFSET 21 -#define RRSR_SHORT_OFFSET 23 -#define RRSR_RSC_BW_40M 0x600000 -#define RRSR_RSC_UPSUBCHNL 0x400000 -#define RRSR_RSC_LOWSUBCHNL 0x200000 -#define RRSR_SHORT 0x800000 -#define RRSR_1M BIT0 -#define RRSR_2M BIT1 -#define RRSR_5_5M BIT2 -#define RRSR_11M BIT3 -#define RRSR_6M BIT4 -#define RRSR_9M BIT5 -#define RRSR_12M BIT6 -#define RRSR_18M BIT7 -#define RRSR_24M BIT8 -#define RRSR_36M BIT9 -#define RRSR_48M BIT10 -#define RRSR_54M BIT11 -#define RRSR_MCS0 BIT12 -#define RRSR_MCS1 BIT13 -#define RRSR_MCS2 BIT14 -#define RRSR_MCS3 BIT15 -#define RRSR_MCS4 BIT16 -#define RRSR_MCS5 BIT17 -#define RRSR_MCS6 BIT18 -#define RRSR_MCS7 BIT19 -#define BRSR_AckShortPmb BIT23 -// CCK ACK: use Short Preamble or not - - -//---------------------------------------------------------------------------- -// 8192C Rate Definition -//---------------------------------------------------------------------------- -//CCK -#define RATR_1M 0x00000001 -#define RATR_2M 0x00000002 -#define RATR_55M 0x00000004 -#define RATR_11M 0x00000008 -//OFDM -#define RATR_6M 0x00000010 -#define RATR_9M 0x00000020 -#define RATR_12M 0x00000040 -#define RATR_18M 0x00000080 -#define RATR_24M 0x00000100 -#define RATR_36M 0x00000200 -#define RATR_48M 0x00000400 -#define RATR_54M 0x00000800 -//MCS 1 Spatial Stream -#define RATR_MCS0 0x00001000 -#define RATR_MCS1 0x00002000 -#define RATR_MCS2 0x00004000 -#define RATR_MCS3 0x00008000 -#define RATR_MCS4 0x00010000 -#define RATR_MCS5 0x00020000 -#define RATR_MCS6 0x00040000 -#define RATR_MCS7 0x00080000 -//MCS 2 Spatial Stream -#define RATR_MCS8 0x00100000 -#define RATR_MCS9 0x00200000 -#define RATR_MCS10 0x00400000 -#define RATR_MCS11 0x00800000 -#define RATR_MCS12 0x01000000 -#define RATR_MCS13 0x02000000 -#define RATR_MCS14 0x04000000 -#define RATR_MCS15 0x08000000 - - -// NOTE: For 92CU - Ziv -//CCK -#define RATE_1M BIT(0) -#define RATE_2M BIT(1) -#define RATE_5_5M BIT(2) -#define RATE_11M BIT(3) -//OFDM -#define RATE_6M BIT(4) -#define RATE_9M BIT(5) -#define RATE_12M BIT(6) -#define RATE_18M BIT(7) -#define RATE_24M BIT(8) -#define RATE_36M BIT(9) -#define RATE_48M BIT(10) -#define RATE_54M BIT(11) -//MCS 1 Spatial Stream -#define RATE_MCS0 BIT(12) -#define RATE_MCS1 BIT(13) -#define RATE_MCS2 BIT(14) -#define RATE_MCS3 BIT(15) -#define RATE_MCS4 BIT(16) -#define RATE_MCS5 BIT(17) -#define RATE_MCS6 BIT(18) -#define RATE_MCS7 BIT(19) -//MCS 2 Spatial Stream -#define RATE_MCS8 BIT(20) -#define RATE_MCS9 BIT(21) -#define RATE_MCS10 BIT(22) -#define RATE_MCS11 BIT(23) -#define RATE_MCS12 BIT(24) -#define RATE_MCS13 BIT(25) -#define RATE_MCS14 BIT(26) -#define RATE_MCS15 BIT(27) - - - - -// ALL CCK Rate -#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M -#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ - RATR_36M|RATR_48M|RATR_54M -#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ - RATR_MCS4|RATR_MCS5|RATR_MCS6|RATR_MCS7 -#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9|RATR_MCS10|RATR_MCS11|\ - RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 - -//---------------------------------------------------------------------------- -// 8192C BW_OPMODE bits (Offset 0x203, 8bit) -//---------------------------------------------------------------------------- -#define BW_OPMODE_20MHZ BIT2 -#define BW_OPMODE_5G BIT1 -#define BW_OPMODE_11J BIT0 - - -//---------------------------------------------------------------------------- -// 8192C CAM Config Setting (offset 0x250, 1 byte) -//---------------------------------------------------------------------------- -#define CAM_VALID BIT15 -#define CAM_NOTVALID 0x0000 -#define CAM_USEDK BIT5 - -#define CAM_CONTENT_COUNT 8 - -#define CAM_NONE 0x0 -#define CAM_WEP40 0x01 -#define CAM_TKIP 0x02 -#define CAM_AES 0x04 -#define CAM_WEP104 0x05 -#define CAM_SMS4 0x6 - - -#define TOTAL_CAM_ENTRY 32 -#define HALF_CAM_ENTRY 16 - -#define CAM_CONFIG_USEDK _TRUE -#define CAM_CONFIG_NO_USEDK _FALSE - -#define CAM_WRITE BIT16 -#define CAM_READ 0x00000000 -#define CAM_POLLINIG BIT31 - -#define SCR_UseDK 0x01 -#define SCR_TxSecEnable 0x02 -#define SCR_RxSecEnable 0x04 - - -// -// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) -// -//---------------------------------------------------------------------------- -// 8190 IMR/ISR bits (offset 0xfd, 8bits) -//---------------------------------------------------------------------------- -#define IMR8190_DISABLED 0x0 -// IMR DW0 Bit 0-31 -#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 -#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 -#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 -#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 -#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 -#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 -#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 -#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 -#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 -#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 -#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 -#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 -#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 -#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 -#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 -#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 -#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow -#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt -#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 -#define IMR_RXFOVW BIT12 // Receive FIFO Overflow -#define IMR_RDU BIT11 // Receive Descriptor Unavailable -#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt -#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup -#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt -#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup -#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt -#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt -#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt -#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt -#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt -#define IMR_VODOK BIT1 // AC_VO DMA Interrupt -#define IMR_ROK BIT0 // Receive DMA OK Interrupt - -// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) -#define IMR_TXERR BIT11 -#define IMR_RXERR BIT10 -#define IMR_C2HCMD BIT9 -#define IMR_CPWM BIT8 -//RSVD [2-7] -#define IMR_OCPINT BIT1 -#define IMR_WLANOFF BIT0 - - - -//---------------------------------------------------------------------------- -// 8192D EFUSE -//---------------------------------------------------------------------------- -#define HWSET_MAX_SIZE 256 - -//---------------------------------------------------------------------------- -// 8192C EEPROM/EFUSE share register definition. -//---------------------------------------------------------------------------- - -// -// Default Value for EEPROM or EFUSE!!! -// -#define EEPROM_Default_TSSI 0x0 -#define EEPROM_Default_TxPowerDiff 0x0 -#define EEPROM_Default_CrystalCap 0x0 //92D default 0x0 -#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) -#define EEPROM_Default_TxPower 0x1010 -#define EEPROM_Default_HT2T_TxPwr 0x10 - -#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 -#define EEPROM_Default_ThermalMeter 0x12 - -#define EEPROM_Default_AntTxPowerDiff 0x0 -//#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 -#define EEPROM_Default_TxPowerLevel_2G 0x2C -#define EEPROM_Default_TxPowerLevel_5G 0x22 - -#define EEPROM_Default_HT40_2SDiff 0x0 -#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference -#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 //OFDM Tx Power index diff -#define EEPROM_Default_HT40_PwrMaxOffset 0 -#define EEPROM_Default_HT20_PwrMaxOffset 0 - -// For debug -#define EEPROM_Default_PID 0x1234 -#define EEPROM_Default_VID 0x5678 -#define EEPROM_Default_CustomerID 0xAB -#define EEPROM_Default_SubCustomerID 0xCD -#define EEPROM_Default_Version 0 - -#define EEPROM_Default_externalPA_C9 0x00 -#define EEPROM_Default_externalPA_CC 0xFF -#define EEPROM_Default_internalPA_SP3T_C9 0xAA -#define EEPROM_Default_internalPA_SP3T_CC 0xAF -#define EEPROM_Default_internalPA_SPDT_C9 0xAA -#ifdef CONFIG_PCI_HCI -#define EEPROM_Default_internalPA_SPDT_CC 0xA0 -#else -#define EEPROM_Default_internalPA_SPDT_CC 0xFA -#endif - -#define EEPROM_CHANNEL_PLAN_FCC 0x0 -#define EEPROM_CHANNEL_PLAN_IC 0x1 -#define EEPROM_CHANNEL_PLAN_ETSI 0x2 -#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 -#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 -#define EEPROM_CHANNEL_PLAN_MKK 0x5 -#define EEPROM_CHANNEL_PLAN_MKK1 0x6 -#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 -#define EEPROM_CHANNEL_PLAN_TELEC 0x8 -#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 -#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA -#define EEPROM_CHANNEL_PLAN_NCC 0xB -#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 - - -#define EEPROM_CID_DEFAULT 0x0 -#define EEPROM_CID_TOSHIBA 0x4 -#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. -#define EEPROM_CID_QMI 0x0D -#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 - - -#define RTL8192_EEPROM_ID 0x8129 -#define EEPROM_WAPI_SUPPORT 0x78 - - -#ifdef CONFIG_PCI_HCI -#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) -#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) -#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) - -#define RTL8190_EEPROM_ID 0x8129 // 0-1 -#define EEPROM_HPON 0x02 // LDO settings.2-5 -#define EEPROM_CLK 0x06 // Clock settings.6-7 -#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 - -#define EEPROM_VID 0x28 // SE Vendor ID.A-B -#define EEPROM_DID 0x2A // SE Device ID. C-D -#define EEPROM_SVID 0x2C // SE Vendor ID.E-F -#define EEPROM_SMID 0x2E // SE PCI Subsystem ID. 10-11 - -#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 -#define EEPROM_MAC_ADDR_MAC0_92D 0x55 -#define EEPROM_MAC_ADDR_MAC1_92D 0x5B -//---------------------------------------------------------------- -// 2.4G band Tx power index setting -#define EEPROM_CCK_TX_PWR_INX_2G 0x61 -#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D -#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 -#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 -#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 -#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 - -//5GL channel 32-64 -#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 -#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 -#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 -#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B -#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E - -//5GM channel 100-140 -#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 -#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A -#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D -#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 -#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 - -//5GH channel 149-165 -#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC -#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF -#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 -#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 -#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 - -#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. -#define EEPROM_IQK_DELTA 0xBC -#define EEPROM_LCK_DELTA 0xBC -#define EEPROM_XTAL_K 0xBD //[7:5] -#define EEPROM_TSSI_A_5G 0xBE -#define EEPROM_TSSI_B_5G 0xBF -#define EEPROM_TSSI_AB_5G 0xC0 -#define EEPROM_THERMAL_METER 0xC3 //[4:0] -#define EEPROM_PATHDIV 0xC4 -#define EEPROM_RF_OPT1 0xC4 -#define EEPROM_RF_OPT2 0xC5 -#define EEPROM_RF_OPT3 0xC6 -#define EEPROM_RF_OPT4 0xC7 -#define EEPROM_RF_OPT5 0xC8 -#define EEPROM_RF_OPT6 0xC9 -#define EEPROM_VERSION 0xCA -#define EEPROM_CUSTOMER_ID 0xCB -#define EEPROM_RF_OPT7 0xCC - -#define EEPROM_WIDIPAIRING_ADDR 0xF0 -#define EEPROM_WIDIPAIRING_KEY 0xF6 - -#define EEPROM_DEF_PART_NO 0x3FD //Byte -#define EEPROME_CHIP_VERSION_L 0x3FF -#define EEPROME_CHIP_VERSION_H 0x3FE -#endif - -#ifdef CONFIG_USB_HCI -#define RTL8190_EEPROM_ID 0x8129 // 0-1 -#define EEPROM_HPON 0x02 // LDO settings.2-5 -#define EEPROM_CLK 0x06 // Clock settings.6-7 -#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 - -#define EEPROM_VID 0xC // SE Vendor ID.A-B -#define EEPROM_PID 0xE // SE Device ID. C-D -#define EEPROM_ENDPOINT_SETTING 0x10 -#define EEPROM_Option_Setting 0x11 -#define EEPROM_CHIRP_K 0x12 // Changed -#define EEPROM_USB_PHY 0x13 // Changed -#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] -#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 -#define EEPROM_STRING 0x1F -#define EEPROM_SUBCUSTOMER_ID 0x59 - -#define EEPROM_MAC_ADDR_MAC0_92D 0x19 -#define EEPROM_MAC_ADDR_MAC1_92D 0x5B -//---------------------------------------------------------------- -// 2.4G band Tx power index setting -#define EEPROM_CCK_TX_PWR_INX_2G 0x61 -#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D -#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 -#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 -#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 -#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 - -//5GL channel 32-64 -#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 -#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 -#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 -#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B -#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E - -//5GM channel 100-140 -#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 -#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A -#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D -#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 -#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 - -//5GH channel 149-165 -#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 -#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC -#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF -#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 -#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 -#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 - -#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. -#define EEPROM_TEST_CHANNEL_PLAN 0xBB -#define EEPROM_IQK_DELTA 0xBC -#define EEPROM_LCK_DELTA 0xBC -#define EEPROM_XTAL_K 0xBD //[7:5] -#define EEPROM_TSSI_A_5G 0xBE -#define EEPROM_TSSI_B_5G 0xBF -#define EEPROM_TSSI_AB_5G 0xC0 -#define EEPROM_THERMAL_METER 0xC3 //[4:0] -#define EEPROM_RF_OPT1 0xC4 -#define EEPROM_RF_OPT2 0xC5 -#define EEPROM_RF_OPT3 0xC6 -#define EEPROM_RF_OPT4 0xC7 -#define EEPROM_RF_OPT5 0xC8 -#define EEPROM_RF_OPT6 0xC9 -#define EEPROM_VERSION 0xCA -#define EEPROM_CUSTOMER_ID 0xCB -#define EEPROM_RF_OPT7 0xCC - -#define EEPROM_DEF_PART_NO 0x3FD //Byte -#define EEPROME_CHIP_VERSION_L 0x3FF -#define EEPROME_CHIP_VERSION_H 0x3FE - -//------------------------------------------------------------- -// EEPROM content definitions -//------------------------------------------------------------- -#define OS_LINK_SPEED_NORMAL_MASK BIT3 | BIT2 -#define OS_LINK_SPEED_TEST_MASK BIT3 | BIT4 - -#define BOARD_TYPE_NORMAL_MASK 0xE0 -#define BOARD_TYPE_TEST_MASK 0xF - -#define BT_COEXISTENCE_TEST BIT4 -#define BT_COEXISTENCE_NORMAL BIT5 - -#define BT_CO_SHIFT_TEST 4 -#define BT_CO_SHIFT_NORMAL 5 - -#define EP_NUMBER_MASK_TEST 0x30 //bit 4:5 0Eh -#define EP_NUMBER_SHIFT_TEST 4 - -#define USB_PHY_PARA_SIZE_TEST 6 -#define USB_PHY_PARA_SIZE_NORMAL 4 - -//------------------------------------------------------------- -// EEPROM default value definitions -//------------------------------------------------------------- -// Use 0xABCD instead of 0x8192 for debug -#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 -#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 - -#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 -#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 -#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 - -#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A -#define EEPROM_DEF_VID_1 0x0B - -#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C -#define EEPROM_DEF_PID_1 0x81 - - -#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E -#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E - -#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F - -#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 -#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 -#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 -#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 - -#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 -#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 - - -#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A - - -#define EEPROM_USB_SN BIT(0) -#define EEPROM_USB_REMOTE_WAKEUP BIT(1) -#define EEPROM_USB_DEVICE_PWR BIT(2) -#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) - -#if 0 -#define EEPROM_CHANNEL_PLAN_FCC 0x0 -#define EEPROM_CHANNEL_PLAN_IC 0x1 -#define EEPROM_CHANNEL_PLAN_ETSI 0x2 -#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 -#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 -#define EEPROM_CHANNEL_PLAN_MKK 0x5 -#define EEPROM_CHANNEL_PLAN_MKK1 0x6 -#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 -#define EEPROM_CHANNEL_PLAN_TELEC 0x8 -#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 -#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA -#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 - -#define EEPROM_CID_DEFAULT 0x0 - -#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 - - -#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. - -#endif -#endif - - -/*=================================================================== -===================================================================== -Here the register defines are for 92C. When the define is as same with 92C, -we will use the 92C's define for the consistency -So the following defines for 92C is not entire!!!!!! -===================================================================== -=====================================================================*/ -/* -Based on Datasheet V33---090401 -Register Summary -Current IOREG MAP -0x0000h ~ 0x00FFh System Configuration (256 Bytes) -0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) -0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) -0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) -0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) -0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) -0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) -0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) -0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) -*/ - -//---------------------------------------------------------------------------- -// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) -//---------------------------------------------------------------------------- -#define RCR_APPFCS BIT31 //WMAC append FCS after pauload -#define RCR_APP_MIC BIT30 // -#define RCR_APP_ICV BIT29 // -#define RCR_APP_PHYST_RXFF BIT28 // -#define RCR_APP_BA_SSN BIT27 //Accept BA SSN -#define RCR_ENMBID BIT24 //Enable Multiple BssId. -#define RCR_LSIGEN BIT23 -#define RCR_MFBEN BIT22 -#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 -#define RCR_AMF BIT13 //Accept management type frame -#define RCR_ACF BIT12 //Accept control type frame -#define RCR_ADF BIT11 //Accept data type frame -#define RCR_AICV BIT9 //Accept ICV error packet -#define RCR_ACRC32 BIT8 //Accept CRC32 error packet -#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) -#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) -#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet -#define RCR_APWRMGT BIT5 //Accept power management packet -#define RCR_ADD3 BIT4 //Accept address 3 match packet -#define RCR_AB BIT3 //Accept broadcast packet -#define RCR_AM BIT2 //Accept multicast packet -#define RCR_APM BIT1 //Accept physical match packet -#define RCR_AAP BIT0 //Accept all unicast packet -#define RCR_MXDMA_OFFSET 8 -#define RCR_FIFO_OFFSET 13 - - - -//============================================================================ -// 8192c USB specific Regsiter Offset and Content definition, -// 2009.08.18, added by vivi. for merge 92c and 92C into one driver -//============================================================================ -//#define APS_FSMCO 0x0004 same with 92Ce -#define RSV_CTRL 0x001C -#define RD_CTRL 0x0524 - -//----------------------------------------------------- -// -// 0xFE00h ~ 0xFE55h USB Configuration -// -//----------------------------------------------------- -#define REG_USB_INFO 0xFE17 -#define REG_USB_SPECIAL_OPTION 0xFE55 -#define REG_USB_DMA_AGG_TO 0xFE5B -#define REG_USB_AGG_TO 0xFE5C -#define REG_USB_AGG_TH 0xFE5D - -#define REG_USB_VID 0xFE60 -#define REG_USB_PID 0xFE62 -#define REG_USB_OPTIONAL 0xFE64 -#define REG_USB_CHIRP_K 0xFE65 -#define REG_USB_PHY 0xFE66 -#define REG_USB_MAC_ADDR 0xFE70 - -#define REG_USB_HRPWM 0xFE58 -#define REG_USB_HCPWM 0xFE57 - -#define InvalidBBRFValue 0x12345678 - -//============================================================================ -// 8192C Regsiter Bit and Content definition -//============================================================================ -//----------------------------------------------------- -// -// 0x0000h ~ 0x00FFh System Configuration -// -//----------------------------------------------------- - -//2 SPS0_CTRL -#define SW18_FPWM BIT(3) - - -//2 SYS_ISO_CTRL -#define ISO_MD2PP BIT(0) -#define ISO_UA2USB BIT(1) -#define ISO_UD2CORE BIT(2) -#define ISO_PA2PCIE BIT(3) -#define ISO_PD2CORE BIT(4) -#define ISO_IP2MAC BIT(5) -#define ISO_DIOP BIT(6) -#define ISO_DIOE BIT(7) -#define ISO_EB2CORE BIT(8) -#define ISO_DIOR BIT(9) - -#define PWC_EV25V BIT(14) -#define PWC_EV12V BIT(15) - - -//2 SYS_FUNC_EN -#define FEN_BBRSTB BIT(0) -#define FEN_BB_GLB_RSTn BIT(1) -#define FEN_USBA BIT(2) -#define FEN_UPLL BIT(3) -#define FEN_USBD BIT(4) -#define FEN_DIO_PCIE BIT(5) -#define FEN_PCIEA BIT(6) -#define FEN_PPLL BIT(7) -#define FEN_PCIED BIT(8) -#define FEN_DIOE BIT(9) -#define FEN_CPUEN BIT(10) -#define FEN_DCORE BIT(11) -#define FEN_ELDR BIT(12) -#define FEN_DIO_RF BIT(13) -#define FEN_HWPDN BIT(14) -#define FEN_MREGEN BIT(15) - -//2 APS_FSMCO -#define PFM_LDALL BIT(0) -#define PFM_ALDN BIT(1) -#define PFM_LDKP BIT(2) -#define PFM_WOWL BIT(3) -#define EnPDN BIT(4) -#define PDN_PL BIT(5) -#define APFM_ONMAC BIT(8) -#define APFM_OFF BIT(9) -#define APFM_RSM BIT(10) -#define AFSM_HSUS BIT(11) -#define AFSM_PCIE BIT(12) -#define APDM_MAC BIT(13) -#define APDM_HOST BIT(14) -#define APDM_HPDN BIT(15) -#define RDY_MACON BIT(16) -#define SUS_HOST BIT(17) -#define ROP_ALD BIT(20) -#define ROP_PWR BIT(21) -#define ROP_SPS BIT(22) -#define SOP_MRST BIT(25) -#define SOP_FUSE BIT(26) -#define SOP_ABG BIT(27) -#define SOP_AMB BIT(28) -#define SOP_RCK BIT(29) -#define SOP_A8M BIT(30) -#define XOP_BTCK BIT(31) - -//2 SYS_CLKR -#define ANAD16V_EN BIT(0) -#define ANA8M BIT(1) -#define MACSLP BIT(4) -#define LOADER_CLK_EN BIT(5) -#define _80M_SSC_DIS BIT(7) -#define _80M_SSC_EN_HO BIT(8) -#define PHY_SSC_RSTB BIT(9) -#define SEC_CLK_EN BIT(10) -#define MAC_CLK_EN BIT(11) -#define SYS_CLK_EN BIT(12) -#define RING_CLK_EN BIT(13) - - -//2 9346CR - -#define BOOT_FROM_EEPROM BIT(4) -#define EEPROM_EN BIT(5) - - -//2 AFE_MISC -#define AFE_BGEN BIT(0) -#define AFE_MBEN BIT(1) -#define MAC_ID_EN BIT(7) - - -//2 SPS0_CTRL - - -//2 SPS_OCP_CFG - - -//2 RSV_CTRL -#define WLOCK_ALL BIT(0) -#define WLOCK_00 BIT(1) -#define WLOCK_04 BIT(2) -#define WLOCK_08 BIT(3) -#define WLOCK_40 BIT(4) -#define R_DIS_PRST_0 BIT(5) -#define R_DIS_PRST_1 BIT(6) -#define LOCK_ALL_EN BIT(7) - -//2 RF_CTRL -#define RF_EN BIT(0) -#define RF_RSTB BIT(1) -#define RF_SDMRSTB BIT(2) - - - -//2 LDOA15_CTRL -#define LDA15_EN BIT(0) -#define LDA15_STBY BIT(1) -#define LDA15_OBUF BIT(2) -#define LDA15_REG_VOS BIT(3) -#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) - - - -//2 LDOV12D_CTRL -#define LDV12_EN BIT(0) -#define LDV12_SDBY BIT(1) -#define LPLDO_HSM BIT(2) -#define LPLDO_LSM_DIS BIT(3) -#define _LDV12_VADJ(x) (((x) & 0xF) << 4) - - -//2 AFE_XTAL_CTRL -#define XTAL_EN BIT(0) -#define XTAL_BSEL BIT(1) -#define _XTAL_BOSC(x) (((x) & 0x3) << 2) -#define _XTAL_CADJ(x) (((x) & 0xF) << 4) -#define XTAL_GATE_USB BIT(8) -#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) -#define XTAL_GATE_AFE BIT(11) -#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) -#define XTAL_RF_GATE BIT(14) -#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) -#define XTAL_GATE_DIG BIT(17) -#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) -#define XTAL_BT_GATE BIT(20) -#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) -#define _XTAL_GPIO(x) (((x) & 0x7) << 23) - - -#define CKDLY_AFE BIT(26) -#define CKDLY_USB BIT(27) -#define CKDLY_DIG BIT(28) -#define CKDLY_BT BIT(29) - - -//2 AFE_PLL_CTRL -#define APLL_EN BIT(0) -#define APLL_320_EN BIT(1) -#define APLL_FREF_SEL BIT(2) -#define APLL_EDGE_SEL BIT(3) -#define APLL_WDOGB BIT(4) -#define APLL_LPFEN BIT(5) - -#define APLL_REF_CLK_13MHZ 0x1 -#define APLL_REF_CLK_19_2MHZ 0x2 -#define APLL_REF_CLK_20MHZ 0x3 -#define APLL_REF_CLK_25MHZ 0x4 -#define APLL_REF_CLK_26MHZ 0x5 -#define APLL_REF_CLK_38_4MHZ 0x6 -#define APLL_REF_CLK_40MHZ 0x7 - -#define APLL_320EN BIT(14) -#define APLL_80EN BIT(15) -#define APLL_1MEN BIT(24) - - -//2 EFUSE_CTRL -#define ALD_EN BIT(18) -#define EF_PD BIT(19) -#define EF_FLAG BIT(31) - -//2 EFUSE_TEST -#define EF_TRPT BIT(7) -#define LDOE25_EN BIT(31) - -//2 PWR_DATA - -//2 CAL_TIMER - -//2 ACLK_MON -#define RSM_EN BIT(0) -#define Timer_EN BIT(4) - - -//2 GPIO_MUXCFG -#define TRSW0EN BIT(2) -#define TRSW1EN BIT(3) -#define EROM_EN BIT(4) -#define EnBT BIT(5) -#define EnUart BIT(8) -#define Uart_910 BIT(9) -#define EnPMAC BIT(10) -#define SIC_SWRST BIT(11) -#define EnSIC BIT(12) -#define SIC_23 BIT(13) -#define EnHDP BIT(14) -#define SIC_LBK BIT(15) - -//2 GPIO_PIN_CTRL - - - -//2 GPIO_INTM - -//2 LEDCFG -#define LED0PL BIT(4) -#define LED1PL BIT(12) -#define LED0DIS BIT(7) - -#define SECCAM_CLR BIT(30) - -//2 FSIMR - -//2 FSISR - - -//2 8051FWDL -//2 MCUFWDL -#define MCUFWDL_EN BIT(0) -#define MCUFWDL_RDY BIT(1) -#define FWDL_ChkSum_rpt BIT(2) -#define MACINI_RDY BIT(3) -#define BBINI_RDY BIT(4) -#define RFINI_RDY BIT(5) -#define WINTINI_RDY BIT(6) -#define MAC1_WINTINI_RDY BIT(11)// 0X81 BIT3 -#define CPRST BIT(23) - - - - -//2 REG_SYS_CFG -#define XCLK_VLD BIT(0) -#define ACLK_VLD BIT(1) -#define UCLK_VLD BIT(2) -#define PCLK_VLD BIT(3) -#define PCIRSTB BIT(4) -#define V15_VLD BIT(5) -#define TRP_B15V_EN BIT(7) -#define SIC_IDLE BIT(8) -#define BD_MAC2 BIT(9) -#define BD_MAC1 BIT(10) -#define IC_MACPHY_MODE BIT(11) -#define PAD_HWPD_IDN BIT(22) -#define TRP_VAUX_EN BIT(23) -#define TRP_BT_EN BIT(24) -#define BD_PKG_SEL BIT(25) -#define BD_HCI_SEL BIT(26) -#define TYPE_ID BIT(27) - -#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 -#define CHIP_VER_RTL_SHIFT 12 - -//----------------------------------------------------- -// -// 0x0100h ~ 0x01FFh MACTOP General Configuration -// -//----------------------------------------------------- - - -//2 Function Enable Registers -//2 CR - -#define REG_LBMODE (REG_CR + 3) - - -#define HCI_TXDMA_EN BIT(0) -#define HCI_RXDMA_EN BIT(1) -#define TXDMA_EN BIT(2) -#define RXDMA_EN BIT(3) -#define PROTOCOL_EN BIT(4) -#define SCHEDULE_EN BIT(5) -#define MACTXEN BIT(6) -#define MACRXEN BIT(7) -#define ENSWBCN BIT(8) -#define ENSEC BIT(9) - -// Network type -#define _NETTYPE(x) (((x) & 0x3) << 16) -#define MASK_NETTYPE 0x30000 -#define NT_NO_LINK 0x0 -#define NT_LINK_AD_HOC 0x1 -#define NT_LINK_AP 0x2 -#define NT_AS_AP 0x3 - -#define _LBMODE(x) (((x) & 0xF) << 24) -#define MASK_LBMODE 0xF000000 -#define LOOPBACK_NORMAL 0x0 -#define LOOPBACK_IMMEDIATELY 0xB -#define LOOPBACK_MAC_DELAY 0x3 -#define LOOPBACK_PHY 0x1 -#define LOOPBACK_DMA 0x7 - - -//2 PBP - Page Size Register -#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) -#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) -#define _PSRX_MASK 0xF -#define _PSTX_MASK 0xF0 -#define _PSRX(x) (x) -#define _PSTX(x) ((x) << 4) - -#define PBP_64 0x0 -#define PBP_128 0x1 -#define PBP_256 0x2 -#define PBP_512 0x3 -#define PBP_1024 0x4 - - -//2 TX/RXDMA -#define RXDMA_ARBBW_EN BIT(0) -#define RXSHFT_EN BIT(1) -#define RXDMA_AGG_EN BIT(2) -#define QS_VO_QUEUE BIT(8) -#define QS_VI_QUEUE BIT(9) -#define QS_BE_QUEUE BIT(10) -#define QS_BK_QUEUE BIT(11) -#define QS_MANAGER_QUEUE BIT(12) -#define QS_HIGH_QUEUE BIT(13) - -#define HQSEL_VOQ BIT(0) -#define HQSEL_VIQ BIT(1) -#define HQSEL_BEQ BIT(2) -#define HQSEL_BKQ BIT(3) -#define HQSEL_MGTQ BIT(4) -#define HQSEL_HIQ BIT(5) - -// For normal driver, 0x10C -#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) -#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) -#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) -#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) -#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) -#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) - -#define QUEUE_LOW 1 -#define QUEUE_NORMAL 2 -#define QUEUE_HIGH 3 - - - -//2 TRXFF_BNDY - - -//2 LLT_INIT -#define _LLT_NO_ACTIVE 0x0 -#define _LLT_WRITE_ACCESS 0x1 -#define _LLT_READ_ACCESS 0x2 - -#define _LLT_INIT_DATA(x) ((x) & 0xFF) -#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) -#define _LLT_OP(x) (((x) & 0x3) << 30) -#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) - - -//2 BB_ACCESS_CTRL -#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) -#define BB_WRITE_EN BIT(30) -#define BB_READ_EN BIT(31) -//#define BB_ADDR_MASK 0xFFF -//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) - -//----------------------------------------------------- -// -// 0x0200h ~ 0x027Fh TXDMA Configuration -// -//----------------------------------------------------- -//2 RQPN -#define _HPQ(x) ((x) & 0xFF) -#define _LPQ(x) (((x) & 0xFF) << 8) -#define _PUBQ(x) (((x) & 0xFF) << 16) -#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register - - -#define HPQ_PUBLIC_DIS BIT(24) -#define LPQ_PUBLIC_DIS BIT(25) -#define LD_RQPN BIT(31) - - -//2 TDECTRL -#define BCN_VALID BIT(16) -#define BCN_HEAD(x) (((x) & 0xFF) << 8) -#define BCN_HEAD_MASK 0xFF00 - -//2 TDECTL -#define BLK_DESC_NUM_SHIFT 4 -#define BLK_DESC_NUM_MASK 0xF - - -//2 TXDMA_OFFSET_CHK -#define DROP_DATA_EN BIT(9) - -//----------------------------------------------------- -// -// 0x0400h ~ 0x047Fh Protocol Configuration -// -//----------------------------------------------------- -//2 FWHW_TXQ_CTRL -#define EN_AMPDU_RTY_NEW BIT(7) - -//2 INIRTSMCS_SEL -#define _INIRTSMCS_SEL(x) ((x) & 0x3F) - - -//2 SPEC SIFS -#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) -#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) - - -//2 RRSR - -#define RATE_REG_BITMAP_ALL 0xFFFFF - -#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) - -#define _RRSR_RSC(x) (((x) & 0x3) << 21) -#define RRSR_RSC_RESERVED 0x0 -#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 -#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 -#define RRSR_RSC_DUPLICATE_MODE 0x3 - - -//2 ARFR -#define USE_SHORT_G1 BIT(20) - -//2 AGGLEN_LMT_L -#define _AGGLMT_MCS0(x) ((x) & 0xF) -#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) -#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) -#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) -#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) -#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) -#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) -#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) - - -//2 RL -#define RETRY_LIMIT_SHORT_SHIFT 8 -#define RETRY_LIMIT_LONG_SHIFT 0 - - -//2 DARFRC -#define _DARF_RC1(x) ((x) & 0x1F) -#define _DARF_RC2(x) (((x) & 0x1F) << 8) -#define _DARF_RC3(x) (((x) & 0x1F) << 16) -#define _DARF_RC4(x) (((x) & 0x1F) << 24) -// NOTE: shift starting from address (DARFRC + 4) -#define _DARF_RC5(x) ((x) & 0x1F) -#define _DARF_RC6(x) (((x) & 0x1F) << 8) -#define _DARF_RC7(x) (((x) & 0x1F) << 16) -#define _DARF_RC8(x) (((x) & 0x1F) << 24) - - -//2 RARFRC -#define _RARF_RC1(x) ((x) & 0x1F) -#define _RARF_RC2(x) (((x) & 0x1F) << 8) -#define _RARF_RC3(x) (((x) & 0x1F) << 16) -#define _RARF_RC4(x) (((x) & 0x1F) << 24) -// NOTE: shift starting from address (RARFRC + 4) -#define _RARF_RC5(x) ((x) & 0x1F) -#define _RARF_RC6(x) (((x) & 0x1F) << 8) -#define _RARF_RC7(x) (((x) & 0x1F) << 16) -#define _RARF_RC8(x) (((x) & 0x1F) << 24) - - - - -//----------------------------------------------------- -// -// 0x0500h ~ 0x05FFh EDCA Configuration -// -//----------------------------------------------------- - - - -//2 EDCA setting -#define AC_PARAM_TXOP_LIMIT_OFFSET 16 -#define AC_PARAM_ECW_MAX_OFFSET 12 -#define AC_PARAM_ECW_MIN_OFFSET 8 -#define AC_PARAM_AIFS_OFFSET 0 - - -//2 EDCA_VO_PARAM -#define _AIFS(x) (x) -#define _ECW_MAX_MIN(x) ((x) << 8) -#define _TXOP_LIMIT(x) ((x) << 16) - - -#define _BCNIFS(x) ((x) & 0xFF) -#define _BCNECW(x) (((x) & 0xF))<< 8) - - -#define _LRL(x) ((x) & 0x3F) -#define _SRL(x) (((x) & 0x3F) << 8) - - -//2 SIFS_CCK -#define _SIFS_CCK_CTX(x) ((x) & 0xFF) -#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); - - -//2 SIFS_OFDM -#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) -#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); - - -//2 TBTT PROHIBIT -#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) - - -//2 REG_RD_CTRL -#define DIS_EDCA_CNT_DWN BIT(11) - - -//2 BCN_CTRL -#define EN_MBSSID BIT(1) -#define EN_TXBCN_RPT BIT(2) -#define EN_BCN_FUNCTION BIT(3) - -// The same function but different bit field. -#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) -#define DIS_TSF_UDT0_TEST_CHIP BIT(5) - -//2 ACMHWCTRL -#define AcmHw_HwEn BIT(0) -#define AcmHw_BeqEn BIT(1) -#define AcmHw_ViqEn BIT(2) -#define AcmHw_VoqEn BIT(3) -#define AcmHw_BeqStatus BIT(4) -#define AcmHw_ViqStatus BIT(5) -#define AcmHw_VoqStatus BIT(6) - - - -//----------------------------------------------------- -// -// 0x0600h ~ 0x07FFh WMAC Configuration -// -//----------------------------------------------------- - -//2 APSD_CTRL -#define APSDOFF BIT(6) -#define APSDOFF_STATUS BIT(7) - - -//2 BWOPMODE -#define BW_20MHZ BIT(2) -//#define BW_OPMODE_20MHZ BIT(2) // For compability - - -#define RATE_BITMAP_ALL 0xFFFFF - -// Only use CCK 1M rate for ACK -#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 -#define RATE_RRSR_WITHOUT_CCK 0xFFFF0 - -//2 TCR -#define TSFRST BIT(0) -#define DIS_GCLK BIT(1) -#define PAD_SEL BIT(2) -#define PWR_ST BIT(6) -#define PWRBIT_OW_EN BIT(7) -#define ACRC BIT(8) -#define CFENDFORM BIT(9) -#define ICV BIT(10) - - - -//2 RCR -#define AAP BIT(0) -#define APM BIT(1) -#define AM BIT(2) -#define AB BIT(3) -#define ADD3 BIT(4) -#define APWRMGT BIT(5) -#define CBSSID BIT(6) -#define CBSSID_BCN BIT(7) -#define ACRC32 BIT(8) -#define AICV BIT(9) -#define ADF BIT(11) -#define ACF BIT(12) -#define AMF BIT(13) -#define HTC_LOC_CTRL BIT(14) -#define UC_DATA_EN BIT(16) -#define BM_DATA_EN BIT(17) -#define MFBEN BIT(22) -#define LSIGEN BIT(23) -#define EnMBID BIT(24) -#define APP_BASSN BIT(27) -#define APP_PHYSTS BIT(28) -#define APP_ICV BIT(29) -#define APP_MIC BIT(30) -#define APP_FCS BIT(31) - -//2 RX_PKT_LIMIT - -//2 RX_DLK_TIME - -//2 MBIDCAMCFG - - - -//2 AMPDU_MIN_SPACE -#define _MIN_SPACE(x) ((x) & 0x7) -#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) - - -//2 RXERR_RPT -#define RXERR_TYPE_OFDM_PPDU 0 -#define RXERR_TYPE_OFDM_FALSE_ALARM 1 -#define RXERR_TYPE_OFDM_MPDU_OK 2 -#define RXERR_TYPE_OFDM_MPDU_FAIL 3 -#define RXERR_TYPE_CCK_PPDU 4 -#define RXERR_TYPE_CCK_FALSE_ALARM 5 -#define RXERR_TYPE_CCK_MPDU_OK 6 -#define RXERR_TYPE_CCK_MPDU_FAIL 7 -#define RXERR_TYPE_HT_PPDU 8 -#define RXERR_TYPE_HT_FALSE_ALARM 9 -#define RXERR_TYPE_HT_MPDU_TOTAL 10 -#define RXERR_TYPE_HT_MPDU_OK 11 -#define RXERR_TYPE_HT_MPDU_FAIL 12 -#define RXERR_TYPE_RX_FULL_DROP 15 - -#define RXERR_COUNTER_MASK 0xFFFFF -#define RXERR_RPT_RST BIT(27) -#define _RXERR_RPT_SEL(type) ((type) << 28) - - -//2 SECCFG -#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key -#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key -#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption -#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption -#define SCR_SKByA2 BIT(4) //Search kEY BY A2 -#define SCR_NoSKMC BIT(5) //No Key Search Multicast -#define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key -#define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key - -//vivi added for new cam search flow, 20091028 -#ifdef HW_EN_DE_CRYPTION_FOR_NEW_CAM_SEARCH_FLOW -#define SCR_TxUseBroadcastDK BIT6 //Force Tx Use Broadcast Default Key -#define SCR_RxUseBroadcastDK BIT7 //Force Rx Use Broadcast Default Key -#endif - - -//----------------------------------------------------- -// -// 0xFE00h ~ 0xFE55h USB Configuration -// -//----------------------------------------------------- - -//2 USB Information (0xFE17) -#define USB_IS_HIGH_SPEED 0 -#define USB_IS_FULL_SPEED 1 -#define USB_SPEED_MASK BIT(5) - -#define USB_NORMAL_SIE_EP_MASK 0xF -#define USB_NORMAL_SIE_EP_SHIFT 4 - -#define USB_TEST_EP_MASK 0x30 -#define USB_TEST_EP_SHIFT 4 - -//2 Special Option -#define USB_AGG_EN BIT(3) - - -//2REG_C2HEVT_CLEAR -#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message -#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. - -//2 8192D PartNo. -#define PARTNO_92D_NIC (BIT7|BIT6) -#define PARTNO_92D_NIC_REMARK (BIT5|BIT4) -#define PARTNO_SINGLE_BAND_VS BIT3 -#define PARTNO_SINGLE_BAND_VS_REMARK BIT1 -#define PARTNO_CONCURRENT_BAND_VC (BIT3|BIT2) -#define PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1|BIT0) -//======================================================== -// General definitions -//======================================================== - -#define MAC_ADDR_LEN 6 -#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 -#define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 - -#define POLLING_LLT_THRESHOLD 20 -#define POLLING_READY_TIMEOUT_COUNT 1000 - -// Min Spacing related settings. -#define MAX_MSS_DENSITY_2T 0x13 -#define MAX_MSS_DENSITY_1T 0x0A -// GPIO BIT -#define HAL_8192C_HW_GPIO_WPS_BIT BIT2 - - -#include "basic_types.h" - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __RTL8192D_SPEC_H__ +#define __RTL8192D_SPEC_H__ + +#include + +#ifndef BIT +#define BIT(x) (1 << (x)) +#endif + +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + + +//============================================================ +// 8192D Regsiter offset definition +//============================================================ + + +//============================================================ +// +//============================================================ + +//----------------------------------------------------- +// +// 0x0000h ~ 0x00FFh System Configuration +// +//----------------------------------------------------- +#define REG_SYS_ISO_CTRL 0x0000 +#define REG_SYS_FUNC_EN 0x0002 +#define REG_APS_FSMCO 0x0004 +#define REG_SYS_CLKR 0x0008 +#define REG_9346CR 0x000A +#define REG_EE_VPD 0x000C +#define REG_AFE_MISC 0x0010 +#define REG_SPS0_CTRL 0x0011 +#define REG_POWER_OFF_IN_PROCESS 0x0017 +#define REG_SPS_OCP_CFG 0x0018 +#define REG_RSV_CTRL 0x001C +#define REG_RF_CTRL 0x001F +#define REG_LDOA15_CTRL 0x0020 +#define REG_LDOV12D_CTRL 0x0021 +#define REG_LDOHCI12_CTRL 0x0022 +#define REG_LPLDO_CTRL 0x0023 +#define REG_AFE_XTAL_CTRL 0x0024 +#define REG_AFE_PLL_CTRL 0x0028 +#define REG_MAC_PHY_CTRL 0x002c //for 92d, DMDP,SMSP,DMSP contrl +#define REG_EFUSE_CTRL 0x0030 +#define REG_EFUSE_TEST 0x0034 +#define REG_PWR_DATA 0x0038 +#define REG_CAL_TIMER 0x003C +#define REG_ACLK_MON 0x003E +#define REG_GPIO_MUXCFG 0x0040 +//#define REG_GPIO_MUXCFG 0x0041 +#define REG_GPIO_IO_SEL 0x0042 +#define REG_MAC_PINMUX_CFG 0x0043 +#define REG_GPIO_PIN_CTRL 0x0044 +#define REG_GPIO_INTM 0x0048 +#define REG_LEDCFG0 0x004C +#define REG_LEDCFG1 0x004D +#define REG_LEDCFG2 0x004E +#define REG_LEDCFG3 0x004F +#define REG_FSIMR 0x0050 +#define REG_FSISR 0x0054 + +#define REG_MCUFWDL 0x0080 +#define REG_WOWLAN_REASON 0x0081 +#define REG_HMEBOX_EXT_0 0x0088 +#define REG_HMEBOX_EXT_1 0x008A +#define REG_HMEBOX_EXT_2 0x008C +#define REG_HMEBOX_EXT_3 0x008E + +#define REG_BIST_SCAN 0x00D0 +#define REG_BIST_RPT 0x00D4 +#define REG_BIST_ROM_RPT 0x00D8 +#define REG_USB_SIE_INTF 0x00E0 +#define REG_PCIE_MIO_INTF 0x00E4 +#define REG_PCIE_MIO_INTD 0x00E8 +#define REG_HPON_FSM 0x00EC +#define REG_SYS_CFG 0x00F0 +#define REG_MAC_PHY_CTRL_NORMAL 0x00f8 + +#define REG_MAC0 0x0081 +#define REG_MAC1 0x0053 +#define FW_MAC0_ready 0x18 +#define FW_MAC1_ready 0x1A +#define MAC0_ON BIT7 +#define MAC1_ON BIT0 +#define mac0_ready BIT0 +#define mac1_ready BIT0 + + +//----------------------------------------------------- +// +// 0x0100h ~ 0x01FFh MACTOP General Configuration +// +//----------------------------------------------------- +#define REG_CR 0x0100 +#define REG_PBP 0x0104 +#define REG_TRXDMA_CTRL 0x010C +#define REG_TRXFF_BNDY 0x0114 +#define REG_TRXFF_STATUS 0x0118 +#define REG_RXFF_PTR 0x011C +#define REG_HIMR 0x0120 +#define REG_HISR 0x0124 +#define REG_HIMRE 0x0128 +#define REG_HISRE 0x012C +#define REG_CPWM 0x012F +#define REG_FWIMR 0x0130 +#define REG_FWISR 0x0134 +#define REG_FTIMR 0x0138 +#define REG_PKTBUF_DBG_CTRL 0x0140 +#define REG_PKTBUF_DBG_DATA_L 0x0144 +#define REG_PKTBUF_DBG_DATA_H 0x0148 + +#define REG_TC0_CTRL 0x0150 +#define REG_TC1_CTRL 0x0154 +#define REG_TC2_CTRL 0x0158 +#define REG_TC3_CTRL 0x015C +#define REG_TC4_CTRL 0x0160 +#define REG_TCUNIT_BASE 0x0164 +#define REG_MBIST_START 0x0174 +#define REG_MBIST_DONE 0x0178 +#define REG_MBIST_FAIL 0x017C +#define REG_C2HEVT_MSG_NORMAL 0x01A0 +#define REG_C2HEVT_CLEAR 0x01AF +#define REG_C2HEVT_MSG_TEST 0x01B8 +#define REG_MCUTST_1 0x01c0 +#define REG_FMETHR 0x01C8 +#define REG_HMETFR 0x01CC +#define REG_HMEBOX_0 0x01D0 +#define REG_HMEBOX_1 0x01D4 +#define REG_HMEBOX_2 0x01D8 +#define REG_HMEBOX_3 0x01DC + +#define REG_LLT_INIT 0x01E0 +#define REG_BB_ACCEESS_CTRL 0x01E8 +#define REG_BB_ACCESS_DATA 0x01EC + + +//----------------------------------------------------- +// +// 0x0200h ~ 0x027Fh TXDMA Configuration +// +//----------------------------------------------------- +#define REG_RQPN 0x0200 +#define REG_FIFOPAGE 0x0204 +#define REG_TDECTRL 0x0208 +#define REG_TXDMA_OFFSET_CHK 0x020C +#define REG_TXDMA_STATUS 0x0210 +#define REG_RQPN_NPQ 0x0214 + +//----------------------------------------------------- +// +// 0x0280h ~ 0x02FFh RXDMA Configuration +// +//----------------------------------------------------- +#define REG_RXDMA_AGG_PG_TH 0x0280 +#define REG_RXPKT_NUM 0x0284 +#define REG_RXDMA_STATUS 0x0288 + + +//----------------------------------------------------- +// +// 0x0300h ~ 0x03FFh PCIe +// +//----------------------------------------------------- +#define REG_PCIE_CTRL_REG 0x0300 +#define REG_INT_MIG 0x0304 // Interrupt Migration +#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address +#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address +#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address +#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address +#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address +#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address +#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address +#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address +#define REG_DBI 0x0348 // Backdoor REG for Access Configuration +//sherry added for DBI Read/Write 20091126 +#define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration +#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration +#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration +#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY +#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY +#define REG_DBG_SEL 0x0360 // Debug Selection Register +#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM +#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM +#define REG_UART_CTRL 0x0364 // UART Control +#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address +#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address + + +// spec version 11 +//----------------------------------------------------- +// +// 0x0400h ~ 0x047Fh Protocol Configuration +// +//----------------------------------------------------- +#define REG_VOQ_INFORMATION 0x0400 +#define REG_VIQ_INFORMATION 0x0404 +#define REG_BEQ_INFORMATION 0x0408 +#define REG_BKQ_INFORMATION 0x040C +#define REG_MGQ_INFORMATION 0x0410 +#define REG_HGQ_INFORMATION 0x0414 +#define REG_BCNQ_INFORMATION 0x0418 + + +#define REG_CPU_MGQ_INFORMATION 0x041C +#define REG_FWHW_TXQ_CTRL 0x0420 +#define REG_HWSEQ_CTRL 0x0423 +#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 +#define REG_TXPKTBUF_MGQ_BDNY 0x0425 +#define REG_LIFETIME_EN 0x0426 +#define REG_MULTI_BCNQ_OFFSET 0x0427 +#define REG_SPEC_SIFS 0x0428 +#define REG_RL 0x042A +#define REG_DARFRC 0x0430 +#define REG_RARFRC 0x0438 +#define REG_RRSR 0x0440 +#define REG_ARFR0 0x0444 +#define REG_ARFR1 0x0448 +#define REG_ARFR2 0x044C +#define REG_ARFR3 0x0450 +#define REG_AGGLEN_LMT 0x0458 +#define REG_AMPDU_MIN_SPACE 0x045C +#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D +#define REG_FAST_EDCA_CTRL 0x0460 +#define REG_RD_RESP_PKT_TH 0x0463 +#define REG_INIRTS_RATE_SEL 0x0480 +#define REG_INIDATA_RATE_SEL 0x0484 +#define REG_POWER_STATUS 0x04A4 +#define REG_POWER_STAGE1 0x04B4 +#define REG_POWER_STAGE2 0x04B8 +#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 +#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 +#define REG_STBC_SETTING 0x04C4 +#define REG_PROT_MODE_CTRL 0x04C8 +#define REG_MAX_AGGR_NUM 0x04CA +#define REG_RTS_MAX_AGGR_NUM 0x04CB +#define REG_BAR_MODE_CTRL 0x04CC +#define REG_RA_TRY_RATE_AGG_LMT 0x04CF +#define REG_EARLY_MODE_CONTROL 0x04D0 +#define REG_NQOS_SEQ 0x04DC +#define REG_QOS_SEQ 0x04DE +#define REG_NEED_CPU_HANDLE 0x04E0 +#define REG_PKT_LOSE_RPT 0x04E1 +#define REG_PTCL_ERR_STATUS 0x04E2 +#define REG_DUMMY 0x04FC + + + +//----------------------------------------------------- +// +// 0x0500h ~ 0x05FFh EDCA Configuration +// +//----------------------------------------------------- +#define REG_EDCA_VO_PARAM 0x0500 +#define REG_EDCA_VI_PARAM 0x0504 +#define REG_EDCA_BE_PARAM 0x0508 +#define REG_EDCA_BK_PARAM 0x050C +#define REG_BCNTCFG 0x0510 +#define REG_PIFS 0x0512 +#define REG_RDG_PIFS 0x0513 +#define REG_SIFS_CTX 0x0514 +#define REG_SIFS_TRX 0x0516 +#define REG_TSFTR_SYN_OFFSET 0x0518 +#define REG_AGGR_BREAK_TIME 0x051A +#define REG_SLOT 0x051B +#define REG_TX_PTCL_CTRL 0x0520 +#define REG_TXPAUSE 0x0522 +#define REG_DIS_TXREQ_CLR 0x0523 +#define REG_RD_CTRL 0x0524 +#define REG_TBTT_PROHIBIT 0x0540 +#define REG_RD_NAV_NXT 0x0544 +#define REG_NAV_PROT_LEN 0x0546 +#define REG_BCN_CTRL 0x0550 +#define REG_BCN_CTRL_1 0x0551 +#define REG_MBID_NUM 0x0552 +#define REG_DUAL_TSF_RST 0x0553 +#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE +#define REG_MBSSID_BCN_SPACE 0x0554 +#define REG_DRVERLYINT 0x0558 +#define REG_BCNDMATIM 0x0559 +#define REG_ATIMWND 0x055A +#define REG_USTIME_TSF 0x055C +#define REG_BCN_MAX_ERR 0x055D +#define REG_RXTSF_OFFSET_CCK 0x055E +#define REG_RXTSF_OFFSET_OFDM 0x055F +#define REG_TSFTR 0x0560 +#define REG_TSFTR1 0x0568 +#define REG_INIT_TSFTR 0x0564 +#define REG_ATIMWND_1 0x0570 +#define REG_PSTIMER 0x0580 +#define REG_TIMER0 0x0584 +#define REG_TIMER1 0x0588 +#define REG_ACMHWCTRL 0x05C0 +#define REG_ACMRSTCTRL 0x05C1 +#define REG_ACMAVG 0x05C2 +#define REG_VO_ADMTIME 0x05C4 +#define REG_VI_ADMTIME 0x05C6 +#define REG_BE_ADMTIME 0x05C8 +#define REG_EDCA_RANDOM_GEN 0x05CC +#define REG_SCH_TXCMD 0x05D0 + +#define REG_DMC 0x05F0 //Dual MAC Co-Existence Register + + +//----------------------------------------------------- +// +// 0x0600h ~ 0x07FFh WMAC Configuration +// +//----------------------------------------------------- +#define REG_APSD_CTRL 0x0600 +#define REG_BWOPMODE 0x0603 +#define REG_TCR 0x0604 +#define REG_RCR 0x0608 +#define REG_RX_PKT_LIMIT 0x060C +#define REG_RX_DLK_TIME 0x060D +#define REG_RX_DRVINFO_SZ 0x060F + +#define REG_MACID 0x0610 +#define REG_BSSID 0x0618 +#define REG_MAR 0x0620 +#define REG_MBIDCAMCFG 0x0628 + +#define REG_USTIME_EDCA 0x0638 +#define REG_MAC_SPEC_SIFS 0x063A +#define REG_RESP_SIFS_CCK 0x063C +#define REG_RESP_SIFS_OFDM 0x063E +#define REG_ACKTO 0x0640 +#define REG_CTS2TO 0x0641 +#define REG_EIFS 0x0642 + + +//WMA, BA, CCX +#define REG_NAV_CTRL 0x0650 +#define REG_BACAMCMD 0x0654 +#define REG_BACAMCONTENT 0x0658 +#define REG_LBDLY 0x0660 +#define REG_FWDLY 0x0661 +#define REG_RXERR_RPT 0x0664 +#define REG_WMAC_TRXPTCL_CTL 0x0668 + + +// Security +#define REG_CAMCMD 0x0670 +#define REG_CAMWRITE 0x0674 +#define REG_CAMREAD 0x0678 +#define REG_CAMDBG 0x067C +#define REG_SECCFG 0x0680 + +// Power +#define REG_WOW_CTRL 0x0690 +#define REG_PSSTATUS 0x0691 +#define REG_PS_RX_INFO 0x0692 +#define REG_LPNAV_CTRL 0x0694 +#define REG_WKFMCAM_CMD 0x0698 +#define REG_WKFMCAM_RWD 0x069C +#define REG_RXFLTMAP0 0x06A0 +#define REG_RXFLTMAP1 0x06A2 +#define REG_RXFLTMAP2 0x06A4 +#define REG_BCN_PSR_RPT 0x06A8 +#define REG_CALB32K_CTRL 0x06AC +#define REG_PKT_MON_CTRL 0x06B4 +#define REG_BT_COEX_TABLE 0x06C0 +#define REG_WMAC_RESP_TXINFO 0x06D8 + +#define REG_MACID1 0x0700 +#define REG_BSSID1 0x0708 + +//----------------------------------------------------- +// +// 0xFE00h ~ 0xFE55h USB Configuration +// +//----------------------------------------------------- +#define REG_USB_INFO 0xFE17 +#define REG_USB_SPECIAL_OPTION 0xFE55 +#define REG_USB_DMA_AGG_TO 0xFE5B +#define REG_USB_AGG_TO 0xFE5C +#define REG_USB_AGG_TH 0xFE5D + +// for 92DU high_Queue low_Queue Normal_Queue select +#define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 +//#define REG_USB_LOW_Queue_Select_MAC0 0xFE45 +#define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 +//#define REG_USB_LOW_Queue_Select_MAC1 0xFE48 + +// For test chip +#define REG_TEST_USB_TXQS 0xFE48 +#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 +#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 +#define REG_TEST_SIE_OPTIONAL 0xFE64 +#define REG_TEST_SIE_CHIRP_K 0xFE65 +#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B +#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 +#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 + + +// For normal chip +#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 +#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 +#define REG_NORMAL_SIE_OPTIONAL 0xFE64 +#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 +#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B +#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 +#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF + + +//----------------------------------------------------- +// +// Redifine 8192C register definition for compatibility +// +//----------------------------------------------------- + +// TODO: use these definition when using REG_xxx naming rule. +// NOTE: DO NOT Remove these definition. Use later. + +#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. +#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. +#define SYS_CLK REG_SYS_CLKR +#define CR9346 REG_9346CR // 93C46/93C56 Command Register. +#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. +#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. +#define MSR (REG_CR + 2) // Media Status register +#define ISR REG_HISR +#define TSFR REG_TSFTR // Timing Sync Function Timer Register. + +#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 +#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 + +#define PBP REG_PBP + +// Redifine MACID register, to compatible prior ICs. +#define IDR0 MACIDR0 +#define IDR4 MACIDR4 + + +// +// 9. Security Control Registers (Offset: ) +// +#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd +#define WCAMI REG_CAMWRITE // Software write CAM input content +#define RCAMO REG_CAMREAD // Software read/write CAM config +#define CAMDBG REG_CAMDBG +#define SECR REG_SECCFG //Security Configuration Register + +// Unused register +#define UnusedRegister 0x1BF +#define DCAM UnusedRegister +#define PSR UnusedRegister +#define BBAddr UnusedRegister +#define PhyDataR UnusedRegister + +#define InvalidBBRFValue 0x12345678 + +// Min Spacing related settings. +#define MAX_MSS_DENSITY_2T 0x13 +#define MAX_MSS_DENSITY_1T 0x0A + +//---------------------------------------------------------------------------- +// 8192C Cmd9346CR bits (Offset 0xA, 16bit) +//---------------------------------------------------------------------------- +#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 +#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 +#define Cmd9346CR_9356SEL BIT4 +#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) +#define AutoLoadEFUSE CmdEEPROM_En + +// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) +//---------------------------------------------------------------------------- +#define GPIOSEL_GPIO 0 +#define GPIOSEL_ENBT BIT5 + +//---------------------------------------------------------------------------- +// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) +//---------------------------------------------------------------------------- +#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value +#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value +#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. +#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) + + +//---------------------------------------------------------------------------- +// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) +//---------------------------------------------------------------------------- +/* +Network Type +00: No link +01: Link in ad hoc network +10: Link in infrastructure network +11: AP mode +Default: 00b. +*/ +#define MSR_NOLINK 0x00 +#define MSR_ADHOC 0x01 +#define MSR_INFRA 0x02 +#define MSR_AP 0x03 + +// +// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) +// +//---------------------------------------------------------------------------- +// 8192C Response Rate Set Register (offset 0x181, 24bits) +//---------------------------------------------------------------------------- +#define RRSR_RSC_OFFSET 21 +#define RRSR_SHORT_OFFSET 23 +#define RRSR_RSC_BW_40M 0x600000 +#define RRSR_RSC_UPSUBCHNL 0x400000 +#define RRSR_RSC_LOWSUBCHNL 0x200000 +#define RRSR_SHORT 0x800000 +#define RRSR_1M BIT0 +#define RRSR_2M BIT1 +#define RRSR_5_5M BIT2 +#define RRSR_11M BIT3 +#define RRSR_6M BIT4 +#define RRSR_9M BIT5 +#define RRSR_12M BIT6 +#define RRSR_18M BIT7 +#define RRSR_24M BIT8 +#define RRSR_36M BIT9 +#define RRSR_48M BIT10 +#define RRSR_54M BIT11 +#define RRSR_MCS0 BIT12 +#define RRSR_MCS1 BIT13 +#define RRSR_MCS2 BIT14 +#define RRSR_MCS3 BIT15 +#define RRSR_MCS4 BIT16 +#define RRSR_MCS5 BIT17 +#define RRSR_MCS6 BIT18 +#define RRSR_MCS7 BIT19 +#define BRSR_AckShortPmb BIT23 +// CCK ACK: use Short Preamble or not + + +//---------------------------------------------------------------------------- +// 8192C Rate Definition +//---------------------------------------------------------------------------- +//CCK +#define RATR_1M 0x00000001 +#define RATR_2M 0x00000002 +#define RATR_55M 0x00000004 +#define RATR_11M 0x00000008 +//OFDM +#define RATR_6M 0x00000010 +#define RATR_9M 0x00000020 +#define RATR_12M 0x00000040 +#define RATR_18M 0x00000080 +#define RATR_24M 0x00000100 +#define RATR_36M 0x00000200 +#define RATR_48M 0x00000400 +#define RATR_54M 0x00000800 +//MCS 1 Spatial Stream +#define RATR_MCS0 0x00001000 +#define RATR_MCS1 0x00002000 +#define RATR_MCS2 0x00004000 +#define RATR_MCS3 0x00008000 +#define RATR_MCS4 0x00010000 +#define RATR_MCS5 0x00020000 +#define RATR_MCS6 0x00040000 +#define RATR_MCS7 0x00080000 +//MCS 2 Spatial Stream +#define RATR_MCS8 0x00100000 +#define RATR_MCS9 0x00200000 +#define RATR_MCS10 0x00400000 +#define RATR_MCS11 0x00800000 +#define RATR_MCS12 0x01000000 +#define RATR_MCS13 0x02000000 +#define RATR_MCS14 0x04000000 +#define RATR_MCS15 0x08000000 + + +// NOTE: For 92CU - Ziv +//CCK +#define RATE_1M BIT(0) +#define RATE_2M BIT(1) +#define RATE_5_5M BIT(2) +#define RATE_11M BIT(3) +//OFDM +#define RATE_6M BIT(4) +#define RATE_9M BIT(5) +#define RATE_12M BIT(6) +#define RATE_18M BIT(7) +#define RATE_24M BIT(8) +#define RATE_36M BIT(9) +#define RATE_48M BIT(10) +#define RATE_54M BIT(11) +//MCS 1 Spatial Stream +#define RATE_MCS0 BIT(12) +#define RATE_MCS1 BIT(13) +#define RATE_MCS2 BIT(14) +#define RATE_MCS3 BIT(15) +#define RATE_MCS4 BIT(16) +#define RATE_MCS5 BIT(17) +#define RATE_MCS6 BIT(18) +#define RATE_MCS7 BIT(19) +//MCS 2 Spatial Stream +#define RATE_MCS8 BIT(20) +#define RATE_MCS9 BIT(21) +#define RATE_MCS10 BIT(22) +#define RATE_MCS11 BIT(23) +#define RATE_MCS12 BIT(24) +#define RATE_MCS13 BIT(25) +#define RATE_MCS14 BIT(26) +#define RATE_MCS15 BIT(27) + + + + +// ALL CCK Rate +#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M +#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ + RATR_36M|RATR_48M|RATR_54M +#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ + RATR_MCS4|RATR_MCS5|RATR_MCS6|RATR_MCS7 +#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9|RATR_MCS10|RATR_MCS11|\ + RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 + +//---------------------------------------------------------------------------- +// 8192C BW_OPMODE bits (Offset 0x203, 8bit) +//---------------------------------------------------------------------------- +#define BW_OPMODE_20MHZ BIT2 +#define BW_OPMODE_5G BIT1 +#define BW_OPMODE_11J BIT0 + + +//---------------------------------------------------------------------------- +// 8192C CAM Config Setting (offset 0x250, 1 byte) +//---------------------------------------------------------------------------- +#define CAM_VALID BIT15 +#define CAM_NOTVALID 0x0000 +#define CAM_USEDK BIT5 + +#define CAM_CONTENT_COUNT 8 + +#define CAM_NONE 0x0 +#define CAM_WEP40 0x01 +#define CAM_TKIP 0x02 +#define CAM_AES 0x04 +#define CAM_WEP104 0x05 +#define CAM_SMS4 0x6 + + +#define TOTAL_CAM_ENTRY 32 +#define HALF_CAM_ENTRY 16 + +#define CAM_CONFIG_USEDK _TRUE +#define CAM_CONFIG_NO_USEDK _FALSE + +#define CAM_WRITE BIT16 +#define CAM_READ 0x00000000 +#define CAM_POLLINIG BIT31 + +#define SCR_UseDK 0x01 +#define SCR_TxSecEnable 0x02 +#define SCR_RxSecEnable 0x04 + + +// +// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) +// +//---------------------------------------------------------------------------- +// 8190 IMR/ISR bits (offset 0xfd, 8bits) +//---------------------------------------------------------------------------- +#define IMR8190_DISABLED 0x0 +// IMR DW0 Bit 0-31 +#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 +#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 +#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 +#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 +#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 +#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 +#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 +#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 +#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 +#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 +#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 +#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 +#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 +#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 +#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 +#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 +#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow +#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt +#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 +#define IMR_RXFOVW BIT12 // Receive FIFO Overflow +#define IMR_RDU BIT11 // Receive Descriptor Unavailable +#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt +#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup +#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt +#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup +#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt +#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt +#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt +#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt +#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt +#define IMR_VODOK BIT1 // AC_VO DMA Interrupt +#define IMR_ROK BIT0 // Receive DMA OK Interrupt + +// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) +#define IMR_TXERR BIT11 +#define IMR_RXERR BIT10 +#define IMR_C2HCMD BIT9 +#define IMR_CPWM BIT8 +//RSVD [2-7] +#define IMR_OCPINT BIT1 +#define IMR_WLANOFF BIT0 + + + +//---------------------------------------------------------------------------- +// 8192D EFUSE +//---------------------------------------------------------------------------- +#define HWSET_MAX_SIZE 256 + +//---------------------------------------------------------------------------- +// 8192C EEPROM/EFUSE share register definition. +//---------------------------------------------------------------------------- + +// +// Default Value for EEPROM or EFUSE!!! +// +#define EEPROM_Default_TSSI 0x0 +#define EEPROM_Default_TxPowerDiff 0x0 +#define EEPROM_Default_CrystalCap 0x0 //92D default 0x0 +#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) +#define EEPROM_Default_TxPower 0x1010 +#define EEPROM_Default_HT2T_TxPwr 0x10 + +#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 +#define EEPROM_Default_ThermalMeter 0x12 + +#define EEPROM_Default_AntTxPowerDiff 0x0 +//#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 +#define EEPROM_Default_TxPowerLevel_2G 0x2C +#define EEPROM_Default_TxPowerLevel_5G 0x22 + +#define EEPROM_Default_HT40_2SDiff 0x0 +#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference +#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 //OFDM Tx Power index diff +#define EEPROM_Default_HT40_PwrMaxOffset 0 +#define EEPROM_Default_HT20_PwrMaxOffset 0 + +// For debug +#define EEPROM_Default_PID 0x1234 +#define EEPROM_Default_VID 0x5678 +#define EEPROM_Default_CustomerID 0xAB +#define EEPROM_Default_SubCustomerID 0xCD +#define EEPROM_Default_Version 0 + +#define EEPROM_Default_externalPA_C9 0x00 +#define EEPROM_Default_externalPA_CC 0xFF +#define EEPROM_Default_internalPA_SP3T_C9 0xAA +#define EEPROM_Default_internalPA_SP3T_CC 0xAF +#define EEPROM_Default_internalPA_SPDT_C9 0xAA +#ifdef CONFIG_PCI_HCI +#define EEPROM_Default_internalPA_SPDT_CC 0xA0 +#else +#define EEPROM_Default_internalPA_SPDT_CC 0xFA +#endif + +#define EEPROM_CHANNEL_PLAN_FCC 0x0 +#define EEPROM_CHANNEL_PLAN_IC 0x1 +#define EEPROM_CHANNEL_PLAN_ETSI 0x2 +#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 +#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 +#define EEPROM_CHANNEL_PLAN_MKK 0x5 +#define EEPROM_CHANNEL_PLAN_MKK1 0x6 +#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 +#define EEPROM_CHANNEL_PLAN_TELEC 0x8 +#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 +#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA +#define EEPROM_CHANNEL_PLAN_NCC 0xB +#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 + + +#define EEPROM_CID_DEFAULT 0x0 +#define EEPROM_CID_TOSHIBA 0x4 +#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. +#define EEPROM_CID_QMI 0x0D +#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 + + +#define RTL8192_EEPROM_ID 0x8129 +#define EEPROM_WAPI_SUPPORT 0x78 + + +#ifdef CONFIG_PCI_HCI +#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) +#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) +#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) + +#define RTL8190_EEPROM_ID 0x8129 // 0-1 +#define EEPROM_HPON 0x02 // LDO settings.2-5 +#define EEPROM_CLK 0x06 // Clock settings.6-7 +#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 + +#define EEPROM_VID 0x28 // SE Vendor ID.A-B +#define EEPROM_DID 0x2A // SE Device ID. C-D +#define EEPROM_SVID 0x2C // SE Vendor ID.E-F +#define EEPROM_SMID 0x2E // SE PCI Subsystem ID. 10-11 + +#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 +#define EEPROM_MAC_ADDR_MAC0_92D 0x55 +#define EEPROM_MAC_ADDR_MAC1_92D 0x5B +//---------------------------------------------------------------- +// 2.4G band Tx power index setting +#define EEPROM_CCK_TX_PWR_INX_2G 0x61 +#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D +#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 +#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 +#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 +#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 + +//5GL channel 32-64 +#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 +#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 +#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 +#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B +#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E + +//5GM channel 100-140 +#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 +#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A +#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D +#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 +#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 + +//5GH channel 149-165 +#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC +#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF +#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 +#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 +#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 + +#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. +#define EEPROM_IQK_DELTA 0xBC +#define EEPROM_LCK_DELTA 0xBC +#define EEPROM_XTAL_K 0xBD //[7:5] +#define EEPROM_TSSI_A_5G 0xBE +#define EEPROM_TSSI_B_5G 0xBF +#define EEPROM_TSSI_AB_5G 0xC0 +#define EEPROM_THERMAL_METER 0xC3 //[4:0] +#define EEPROM_PATHDIV 0xC4 +#define EEPROM_RF_OPT1 0xC4 +#define EEPROM_RF_OPT2 0xC5 +#define EEPROM_RF_OPT3 0xC6 +#define EEPROM_RF_OPT4 0xC7 +#define EEPROM_RF_OPT5 0xC8 +#define EEPROM_RF_OPT6 0xC9 +#define EEPROM_VERSION 0xCA +#define EEPROM_CUSTOMER_ID 0xCB +#define EEPROM_RF_OPT7 0xCC + +#define EEPROM_WIDIPAIRING_ADDR 0xF0 +#define EEPROM_WIDIPAIRING_KEY 0xF6 + +#define EEPROM_DEF_PART_NO 0x3FD //Byte +#define EEPROME_CHIP_VERSION_L 0x3FF +#define EEPROME_CHIP_VERSION_H 0x3FE +#endif + +#ifdef CONFIG_USB_HCI +#define RTL8190_EEPROM_ID 0x8129 // 0-1 +#define EEPROM_HPON 0x02 // LDO settings.2-5 +#define EEPROM_CLK 0x06 // Clock settings.6-7 +#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 + +#define EEPROM_VID 0xC // SE Vendor ID.A-B +#define EEPROM_PID 0xE // SE Device ID. C-D +#define EEPROM_ENDPOINT_SETTING 0x10 +#define EEPROM_Option_Setting 0x11 +#define EEPROM_CHIRP_K 0x12 // Changed +#define EEPROM_USB_PHY 0x13 // Changed +#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] +#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 +#define EEPROM_STRING 0x1F +#define EEPROM_SUBCUSTOMER_ID 0x59 + +#define EEPROM_MAC_ADDR_MAC0_92D 0x19 +#define EEPROM_MAC_ADDR_MAC1_92D 0x5B +//---------------------------------------------------------------- +// 2.4G band Tx power index setting +#define EEPROM_CCK_TX_PWR_INX_2G 0x61 +#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D +#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 +#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 +#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 +#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 + +//5GL channel 32-64 +#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 +#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 +#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 +#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B +#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E + +//5GM channel 100-140 +#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 +#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A +#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D +#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 +#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 + +//5GH channel 149-165 +#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 +#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC +#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF +#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 +#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 +#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 + +#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. +#define EEPROM_TEST_CHANNEL_PLAN 0xBB +#define EEPROM_IQK_DELTA 0xBC +#define EEPROM_LCK_DELTA 0xBC +#define EEPROM_XTAL_K 0xBD //[7:5] +#define EEPROM_TSSI_A_5G 0xBE +#define EEPROM_TSSI_B_5G 0xBF +#define EEPROM_TSSI_AB_5G 0xC0 +#define EEPROM_THERMAL_METER 0xC3 //[4:0] +#define EEPROM_RF_OPT1 0xC4 +#define EEPROM_RF_OPT2 0xC5 +#define EEPROM_RF_OPT3 0xC6 +#define EEPROM_RF_OPT4 0xC7 +#define EEPROM_RF_OPT5 0xC8 +#define EEPROM_RF_OPT6 0xC9 +#define EEPROM_VERSION 0xCA +#define EEPROM_CUSTOMER_ID 0xCB +#define EEPROM_RF_OPT7 0xCC + +#define EEPROM_DEF_PART_NO 0x3FD //Byte +#define EEPROME_CHIP_VERSION_L 0x3FF +#define EEPROME_CHIP_VERSION_H 0x3FE + +//------------------------------------------------------------- +// EEPROM content definitions +//------------------------------------------------------------- +#define OS_LINK_SPEED_NORMAL_MASK BIT3 | BIT2 +#define OS_LINK_SPEED_TEST_MASK BIT3 | BIT4 + +#define BOARD_TYPE_NORMAL_MASK 0xE0 +#define BOARD_TYPE_TEST_MASK 0xF + +#define BT_COEXISTENCE_TEST BIT4 +#define BT_COEXISTENCE_NORMAL BIT5 + +#define BT_CO_SHIFT_TEST 4 +#define BT_CO_SHIFT_NORMAL 5 + +#define EP_NUMBER_MASK_TEST 0x30 //bit 4:5 0Eh +#define EP_NUMBER_SHIFT_TEST 4 + +#define USB_PHY_PARA_SIZE_TEST 6 +#define USB_PHY_PARA_SIZE_NORMAL 4 + +//------------------------------------------------------------- +// EEPROM default value definitions +//------------------------------------------------------------- +// Use 0xABCD instead of 0x8192 for debug +#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 +#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 + +#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 +#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 +#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 + +#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A +#define EEPROM_DEF_VID_1 0x0B + +#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C +#define EEPROM_DEF_PID_1 0x81 + + +#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E +#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E + +#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F + +#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 +#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 +#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 +#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 + +#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 +#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 + + +#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A + + +#define EEPROM_USB_SN BIT(0) +#define EEPROM_USB_REMOTE_WAKEUP BIT(1) +#define EEPROM_USB_DEVICE_PWR BIT(2) +#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) + +#if 0 +#define EEPROM_CHANNEL_PLAN_FCC 0x0 +#define EEPROM_CHANNEL_PLAN_IC 0x1 +#define EEPROM_CHANNEL_PLAN_ETSI 0x2 +#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 +#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 +#define EEPROM_CHANNEL_PLAN_MKK 0x5 +#define EEPROM_CHANNEL_PLAN_MKK1 0x6 +#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 +#define EEPROM_CHANNEL_PLAN_TELEC 0x8 +#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 +#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA +#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 + +#define EEPROM_CID_DEFAULT 0x0 + +#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 + + +#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. + +#endif +#endif + + +/*=================================================================== +===================================================================== +Here the register defines are for 92C. When the define is as same with 92C, +we will use the 92C's define for the consistency +So the following defines for 92C is not entire!!!!!! +===================================================================== +=====================================================================*/ +/* +Based on Datasheet V33---090401 +Register Summary +Current IOREG MAP +0x0000h ~ 0x00FFh System Configuration (256 Bytes) +0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) +0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) +0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) +0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) +0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) +0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) +0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) +0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) +*/ + +//---------------------------------------------------------------------------- +// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) +//---------------------------------------------------------------------------- +#define RCR_APPFCS BIT31 //WMAC append FCS after pauload +#define RCR_APP_MIC BIT30 // +#define RCR_APP_ICV BIT29 // +#define RCR_APP_PHYST_RXFF BIT28 // +#define RCR_APP_BA_SSN BIT27 //Accept BA SSN +#define RCR_ENMBID BIT24 //Enable Multiple BssId. +#define RCR_LSIGEN BIT23 +#define RCR_MFBEN BIT22 +#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 +#define RCR_AMF BIT13 //Accept management type frame +#define RCR_ACF BIT12 //Accept control type frame +#define RCR_ADF BIT11 //Accept data type frame +#define RCR_AICV BIT9 //Accept ICV error packet +#define RCR_ACRC32 BIT8 //Accept CRC32 error packet +#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) +#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) +#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet +#define RCR_APWRMGT BIT5 //Accept power management packet +#define RCR_ADD3 BIT4 //Accept address 3 match packet +#define RCR_AB BIT3 //Accept broadcast packet +#define RCR_AM BIT2 //Accept multicast packet +#define RCR_APM BIT1 //Accept physical match packet +#define RCR_AAP BIT0 //Accept all unicast packet +#define RCR_MXDMA_OFFSET 8 +#define RCR_FIFO_OFFSET 13 + + + +//============================================================================ +// 8192c USB specific Regsiter Offset and Content definition, +// 2009.08.18, added by vivi. for merge 92c and 92C into one driver +//============================================================================ +//#define APS_FSMCO 0x0004 same with 92Ce +#define RSV_CTRL 0x001C +#define RD_CTRL 0x0524 + +//----------------------------------------------------- +// +// 0xFE00h ~ 0xFE55h USB Configuration +// +//----------------------------------------------------- +#define REG_USB_INFO 0xFE17 +#define REG_USB_SPECIAL_OPTION 0xFE55 +#define REG_USB_DMA_AGG_TO 0xFE5B +#define REG_USB_AGG_TO 0xFE5C +#define REG_USB_AGG_TH 0xFE5D + +#define REG_USB_VID 0xFE60 +#define REG_USB_PID 0xFE62 +#define REG_USB_OPTIONAL 0xFE64 +#define REG_USB_CHIRP_K 0xFE65 +#define REG_USB_PHY 0xFE66 +#define REG_USB_MAC_ADDR 0xFE70 + +#define REG_USB_HRPWM 0xFE58 +#define REG_USB_HCPWM 0xFE57 + +#define InvalidBBRFValue 0x12345678 + +//============================================================================ +// 8192C Regsiter Bit and Content definition +//============================================================================ +//----------------------------------------------------- +// +// 0x0000h ~ 0x00FFh System Configuration +// +//----------------------------------------------------- + +//2 SPS0_CTRL +#define SW18_FPWM BIT(3) + + +//2 SYS_ISO_CTRL +#define ISO_MD2PP BIT(0) +#define ISO_UA2USB BIT(1) +#define ISO_UD2CORE BIT(2) +#define ISO_PA2PCIE BIT(3) +#define ISO_PD2CORE BIT(4) +#define ISO_IP2MAC BIT(5) +#define ISO_DIOP BIT(6) +#define ISO_DIOE BIT(7) +#define ISO_EB2CORE BIT(8) +#define ISO_DIOR BIT(9) + +#define PWC_EV25V BIT(14) +#define PWC_EV12V BIT(15) + + +//2 SYS_FUNC_EN +#define FEN_BBRSTB BIT(0) +#define FEN_BB_GLB_RSTn BIT(1) +#define FEN_USBA BIT(2) +#define FEN_UPLL BIT(3) +#define FEN_USBD BIT(4) +#define FEN_DIO_PCIE BIT(5) +#define FEN_PCIEA BIT(6) +#define FEN_PPLL BIT(7) +#define FEN_PCIED BIT(8) +#define FEN_DIOE BIT(9) +#define FEN_CPUEN BIT(10) +#define FEN_DCORE BIT(11) +#define FEN_ELDR BIT(12) +#define FEN_DIO_RF BIT(13) +#define FEN_HWPDN BIT(14) +#define FEN_MREGEN BIT(15) + +//2 APS_FSMCO +#define PFM_LDALL BIT(0) +#define PFM_ALDN BIT(1) +#define PFM_LDKP BIT(2) +#define PFM_WOWL BIT(3) +#define EnPDN BIT(4) +#define PDN_PL BIT(5) +#define APFM_ONMAC BIT(8) +#define APFM_OFF BIT(9) +#define APFM_RSM BIT(10) +#define AFSM_HSUS BIT(11) +#define AFSM_PCIE BIT(12) +#define APDM_MAC BIT(13) +#define APDM_HOST BIT(14) +#define APDM_HPDN BIT(15) +#define RDY_MACON BIT(16) +#define SUS_HOST BIT(17) +#define ROP_ALD BIT(20) +#define ROP_PWR BIT(21) +#define ROP_SPS BIT(22) +#define SOP_MRST BIT(25) +#define SOP_FUSE BIT(26) +#define SOP_ABG BIT(27) +#define SOP_AMB BIT(28) +#define SOP_RCK BIT(29) +#define SOP_A8M BIT(30) +#define XOP_BTCK BIT(31) + +//2 SYS_CLKR +#define ANAD16V_EN BIT(0) +#define ANA8M BIT(1) +#define MACSLP BIT(4) +#define LOADER_CLK_EN BIT(5) +#define _80M_SSC_DIS BIT(7) +#define _80M_SSC_EN_HO BIT(8) +#define PHY_SSC_RSTB BIT(9) +#define SEC_CLK_EN BIT(10) +#define MAC_CLK_EN BIT(11) +#define SYS_CLK_EN BIT(12) +#define RING_CLK_EN BIT(13) + + +//2 9346CR + +#define BOOT_FROM_EEPROM BIT(4) +#define EEPROM_EN BIT(5) + + +//2 AFE_MISC +#define AFE_BGEN BIT(0) +#define AFE_MBEN BIT(1) +#define MAC_ID_EN BIT(7) + + +//2 SPS0_CTRL + + +//2 SPS_OCP_CFG + + +//2 RSV_CTRL +#define WLOCK_ALL BIT(0) +#define WLOCK_00 BIT(1) +#define WLOCK_04 BIT(2) +#define WLOCK_08 BIT(3) +#define WLOCK_40 BIT(4) +#define R_DIS_PRST_0 BIT(5) +#define R_DIS_PRST_1 BIT(6) +#define LOCK_ALL_EN BIT(7) + +//2 RF_CTRL +#define RF_EN BIT(0) +#define RF_RSTB BIT(1) +#define RF_SDMRSTB BIT(2) + + + +//2 LDOA15_CTRL +#define LDA15_EN BIT(0) +#define LDA15_STBY BIT(1) +#define LDA15_OBUF BIT(2) +#define LDA15_REG_VOS BIT(3) +#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) + + + +//2 LDOV12D_CTRL +#define LDV12_EN BIT(0) +#define LDV12_SDBY BIT(1) +#define LPLDO_HSM BIT(2) +#define LPLDO_LSM_DIS BIT(3) +#define _LDV12_VADJ(x) (((x) & 0xF) << 4) + + +//2 AFE_XTAL_CTRL +#define XTAL_EN BIT(0) +#define XTAL_BSEL BIT(1) +#define _XTAL_BOSC(x) (((x) & 0x3) << 2) +#define _XTAL_CADJ(x) (((x) & 0xF) << 4) +#define XTAL_GATE_USB BIT(8) +#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) +#define XTAL_GATE_AFE BIT(11) +#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) +#define XTAL_RF_GATE BIT(14) +#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) +#define XTAL_GATE_DIG BIT(17) +#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) +#define XTAL_BT_GATE BIT(20) +#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) +#define _XTAL_GPIO(x) (((x) & 0x7) << 23) + + +#define CKDLY_AFE BIT(26) +#define CKDLY_USB BIT(27) +#define CKDLY_DIG BIT(28) +#define CKDLY_BT BIT(29) + + +//2 AFE_PLL_CTRL +#define APLL_EN BIT(0) +#define APLL_320_EN BIT(1) +#define APLL_FREF_SEL BIT(2) +#define APLL_EDGE_SEL BIT(3) +#define APLL_WDOGB BIT(4) +#define APLL_LPFEN BIT(5) + +#define APLL_REF_CLK_13MHZ 0x1 +#define APLL_REF_CLK_19_2MHZ 0x2 +#define APLL_REF_CLK_20MHZ 0x3 +#define APLL_REF_CLK_25MHZ 0x4 +#define APLL_REF_CLK_26MHZ 0x5 +#define APLL_REF_CLK_38_4MHZ 0x6 +#define APLL_REF_CLK_40MHZ 0x7 + +#define APLL_320EN BIT(14) +#define APLL_80EN BIT(15) +#define APLL_1MEN BIT(24) + + +//2 EFUSE_CTRL +#define ALD_EN BIT(18) +#define EF_PD BIT(19) +#define EF_FLAG BIT(31) + +//2 EFUSE_TEST +#define EF_TRPT BIT(7) +#define LDOE25_EN BIT(31) + +//2 PWR_DATA + +//2 CAL_TIMER + +//2 ACLK_MON +#define RSM_EN BIT(0) +#define Timer_EN BIT(4) + + +//2 GPIO_MUXCFG +#define TRSW0EN BIT(2) +#define TRSW1EN BIT(3) +#define EROM_EN BIT(4) +#define EnBT BIT(5) +#define EnUart BIT(8) +#define Uart_910 BIT(9) +#define EnPMAC BIT(10) +#define SIC_SWRST BIT(11) +#define EnSIC BIT(12) +#define SIC_23 BIT(13) +#define EnHDP BIT(14) +#define SIC_LBK BIT(15) + +//2 GPIO_PIN_CTRL + + + +//2 GPIO_INTM + +//2 LEDCFG +#define LED0PL BIT(4) +#define LED1PL BIT(12) +#define LED0DIS BIT(7) + +#define SECCAM_CLR BIT(30) + +//2 FSIMR + +//2 FSISR + + +//2 8051FWDL +//2 MCUFWDL +#define MCUFWDL_EN BIT(0) +#define MCUFWDL_RDY BIT(1) +#define FWDL_ChkSum_rpt BIT(2) +#define MACINI_RDY BIT(3) +#define BBINI_RDY BIT(4) +#define RFINI_RDY BIT(5) +#define WINTINI_RDY BIT(6) +#define MAC1_WINTINI_RDY BIT(11)// 0X81 BIT3 +#define CPRST BIT(23) + + + + +//2 REG_SYS_CFG +#define XCLK_VLD BIT(0) +#define ACLK_VLD BIT(1) +#define UCLK_VLD BIT(2) +#define PCLK_VLD BIT(3) +#define PCIRSTB BIT(4) +#define V15_VLD BIT(5) +#define TRP_B15V_EN BIT(7) +#define SIC_IDLE BIT(8) +#define BD_MAC2 BIT(9) +#define BD_MAC1 BIT(10) +#define IC_MACPHY_MODE BIT(11) +#define PAD_HWPD_IDN BIT(22) +#define TRP_VAUX_EN BIT(23) +#define TRP_BT_EN BIT(24) +#define BD_PKG_SEL BIT(25) +#define BD_HCI_SEL BIT(26) +#define TYPE_ID BIT(27) + +#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 +#define CHIP_VER_RTL_SHIFT 12 + +//----------------------------------------------------- +// +// 0x0100h ~ 0x01FFh MACTOP General Configuration +// +//----------------------------------------------------- + + +//2 Function Enable Registers +//2 CR + +#define REG_LBMODE (REG_CR + 3) + + +#define HCI_TXDMA_EN BIT(0) +#define HCI_RXDMA_EN BIT(1) +#define TXDMA_EN BIT(2) +#define RXDMA_EN BIT(3) +#define PROTOCOL_EN BIT(4) +#define SCHEDULE_EN BIT(5) +#define MACTXEN BIT(6) +#define MACRXEN BIT(7) +#define ENSWBCN BIT(8) +#define ENSEC BIT(9) + +// Network type +#define _NETTYPE(x) (((x) & 0x3) << 16) +#define MASK_NETTYPE 0x30000 +#define NT_NO_LINK 0x0 +#define NT_LINK_AD_HOC 0x1 +#define NT_LINK_AP 0x2 +#define NT_AS_AP 0x3 + +#define _LBMODE(x) (((x) & 0xF) << 24) +#define MASK_LBMODE 0xF000000 +#define LOOPBACK_NORMAL 0x0 +#define LOOPBACK_IMMEDIATELY 0xB +#define LOOPBACK_MAC_DELAY 0x3 +#define LOOPBACK_PHY 0x1 +#define LOOPBACK_DMA 0x7 + + +//2 PBP - Page Size Register +#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) +#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) +#define _PSRX_MASK 0xF +#define _PSTX_MASK 0xF0 +#define _PSRX(x) (x) +#define _PSTX(x) ((x) << 4) + +#define PBP_64 0x0 +#define PBP_128 0x1 +#define PBP_256 0x2 +#define PBP_512 0x3 +#define PBP_1024 0x4 + + +//2 TX/RXDMA +#define RXDMA_ARBBW_EN BIT(0) +#define RXSHFT_EN BIT(1) +#define RXDMA_AGG_EN BIT(2) +#define QS_VO_QUEUE BIT(8) +#define QS_VI_QUEUE BIT(9) +#define QS_BE_QUEUE BIT(10) +#define QS_BK_QUEUE BIT(11) +#define QS_MANAGER_QUEUE BIT(12) +#define QS_HIGH_QUEUE BIT(13) + +#define HQSEL_VOQ BIT(0) +#define HQSEL_VIQ BIT(1) +#define HQSEL_BEQ BIT(2) +#define HQSEL_BKQ BIT(3) +#define HQSEL_MGTQ BIT(4) +#define HQSEL_HIQ BIT(5) + +// For normal driver, 0x10C +#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) +#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) +#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) +#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) +#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) +#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) + +#define QUEUE_LOW 1 +#define QUEUE_NORMAL 2 +#define QUEUE_HIGH 3 + + + +//2 TRXFF_BNDY + + +//2 LLT_INIT +#define _LLT_NO_ACTIVE 0x0 +#define _LLT_WRITE_ACCESS 0x1 +#define _LLT_READ_ACCESS 0x2 + +#define _LLT_INIT_DATA(x) ((x) & 0xFF) +#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) +#define _LLT_OP(x) (((x) & 0x3) << 30) +#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) + + +//2 BB_ACCESS_CTRL +#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) +#define BB_WRITE_EN BIT(30) +#define BB_READ_EN BIT(31) +//#define BB_ADDR_MASK 0xFFF +//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) + +//----------------------------------------------------- +// +// 0x0200h ~ 0x027Fh TXDMA Configuration +// +//----------------------------------------------------- +//2 RQPN +#define _HPQ(x) ((x) & 0xFF) +#define _LPQ(x) (((x) & 0xFF) << 8) +#define _PUBQ(x) (((x) & 0xFF) << 16) +#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register + + +#define HPQ_PUBLIC_DIS BIT(24) +#define LPQ_PUBLIC_DIS BIT(25) +#define LD_RQPN BIT(31) + + +//2 TDECTRL +#define BCN_VALID BIT(16) +#define BCN_HEAD(x) (((x) & 0xFF) << 8) +#define BCN_HEAD_MASK 0xFF00 + +//2 TDECTL +#define BLK_DESC_NUM_SHIFT 4 +#define BLK_DESC_NUM_MASK 0xF + + +//2 TXDMA_OFFSET_CHK +#define DROP_DATA_EN BIT(9) + +//----------------------------------------------------- +// +// 0x0400h ~ 0x047Fh Protocol Configuration +// +//----------------------------------------------------- +//2 FWHW_TXQ_CTRL +#define EN_AMPDU_RTY_NEW BIT(7) + +//2 INIRTSMCS_SEL +#define _INIRTSMCS_SEL(x) ((x) & 0x3F) + + +//2 SPEC SIFS +#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) +#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) + + +//2 RRSR + +#define RATE_REG_BITMAP_ALL 0xFFFFF + +#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) + +#define _RRSR_RSC(x) (((x) & 0x3) << 21) +#define RRSR_RSC_RESERVED 0x0 +#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 +#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 +#define RRSR_RSC_DUPLICATE_MODE 0x3 + + +//2 ARFR +#define USE_SHORT_G1 BIT(20) + +//2 AGGLEN_LMT_L +#define _AGGLMT_MCS0(x) ((x) & 0xF) +#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) +#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) +#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) +#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) +#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) +#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) +#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) + + +//2 RL +#define RETRY_LIMIT_SHORT_SHIFT 8 +#define RETRY_LIMIT_LONG_SHIFT 0 + + +//2 DARFRC +#define _DARF_RC1(x) ((x) & 0x1F) +#define _DARF_RC2(x) (((x) & 0x1F) << 8) +#define _DARF_RC3(x) (((x) & 0x1F) << 16) +#define _DARF_RC4(x) (((x) & 0x1F) << 24) +// NOTE: shift starting from address (DARFRC + 4) +#define _DARF_RC5(x) ((x) & 0x1F) +#define _DARF_RC6(x) (((x) & 0x1F) << 8) +#define _DARF_RC7(x) (((x) & 0x1F) << 16) +#define _DARF_RC8(x) (((x) & 0x1F) << 24) + + +//2 RARFRC +#define _RARF_RC1(x) ((x) & 0x1F) +#define _RARF_RC2(x) (((x) & 0x1F) << 8) +#define _RARF_RC3(x) (((x) & 0x1F) << 16) +#define _RARF_RC4(x) (((x) & 0x1F) << 24) +// NOTE: shift starting from address (RARFRC + 4) +#define _RARF_RC5(x) ((x) & 0x1F) +#define _RARF_RC6(x) (((x) & 0x1F) << 8) +#define _RARF_RC7(x) (((x) & 0x1F) << 16) +#define _RARF_RC8(x) (((x) & 0x1F) << 24) + + + + +//----------------------------------------------------- +// +// 0x0500h ~ 0x05FFh EDCA Configuration +// +//----------------------------------------------------- + + + +//2 EDCA setting +#define AC_PARAM_TXOP_LIMIT_OFFSET 16 +#define AC_PARAM_ECW_MAX_OFFSET 12 +#define AC_PARAM_ECW_MIN_OFFSET 8 +#define AC_PARAM_AIFS_OFFSET 0 + + +//2 EDCA_VO_PARAM +#define _AIFS(x) (x) +#define _ECW_MAX_MIN(x) ((x) << 8) +#define _TXOP_LIMIT(x) ((x) << 16) + + +#define _BCNIFS(x) ((x) & 0xFF) +#define _BCNECW(x) (((x) & 0xF))<< 8) + + +#define _LRL(x) ((x) & 0x3F) +#define _SRL(x) (((x) & 0x3F) << 8) + + +//2 SIFS_CCK +#define _SIFS_CCK_CTX(x) ((x) & 0xFF) +#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); + + +//2 SIFS_OFDM +#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) +#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); + + +//2 TBTT PROHIBIT +#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) + + +//2 REG_RD_CTRL +#define DIS_EDCA_CNT_DWN BIT(11) + + +//2 BCN_CTRL +#define EN_MBSSID BIT(1) +#define EN_TXBCN_RPT BIT(2) +#define EN_BCN_FUNCTION BIT(3) + +// The same function but different bit field. +#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) +#define DIS_TSF_UDT0_TEST_CHIP BIT(5) + +//2 ACMHWCTRL +#define AcmHw_HwEn BIT(0) +#define AcmHw_BeqEn BIT(1) +#define AcmHw_ViqEn BIT(2) +#define AcmHw_VoqEn BIT(3) +#define AcmHw_BeqStatus BIT(4) +#define AcmHw_ViqStatus BIT(5) +#define AcmHw_VoqStatus BIT(6) + + + +//----------------------------------------------------- +// +// 0x0600h ~ 0x07FFh WMAC Configuration +// +//----------------------------------------------------- + +//2 APSD_CTRL +#define APSDOFF BIT(6) +#define APSDOFF_STATUS BIT(7) + + +//2 BWOPMODE +#define BW_20MHZ BIT(2) +//#define BW_OPMODE_20MHZ BIT(2) // For compability + + +#define RATE_BITMAP_ALL 0xFFFFF + +// Only use CCK 1M rate for ACK +#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 +#define RATE_RRSR_WITHOUT_CCK 0xFFFF0 + +//2 TCR +#define TSFRST BIT(0) +#define DIS_GCLK BIT(1) +#define PAD_SEL BIT(2) +#define PWR_ST BIT(6) +#define PWRBIT_OW_EN BIT(7) +#define ACRC BIT(8) +#define CFENDFORM BIT(9) +#define ICV BIT(10) + + + +//2 RCR +#define AAP BIT(0) +#define APM BIT(1) +#define AM BIT(2) +#define AB BIT(3) +#define ADD3 BIT(4) +#define APWRMGT BIT(5) +#define CBSSID BIT(6) +#define CBSSID_BCN BIT(7) +#define ACRC32 BIT(8) +#define AICV BIT(9) +#define ADF BIT(11) +#define ACF BIT(12) +#define AMF BIT(13) +#define HTC_LOC_CTRL BIT(14) +#define UC_DATA_EN BIT(16) +#define BM_DATA_EN BIT(17) +#define MFBEN BIT(22) +#define LSIGEN BIT(23) +#define EnMBID BIT(24) +#define APP_BASSN BIT(27) +#define APP_PHYSTS BIT(28) +#define APP_ICV BIT(29) +#define APP_MIC BIT(30) +#define APP_FCS BIT(31) + +//2 RX_PKT_LIMIT + +//2 RX_DLK_TIME + +//2 MBIDCAMCFG + + + +//2 AMPDU_MIN_SPACE +#define _MIN_SPACE(x) ((x) & 0x7) +#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) + + +//2 RXERR_RPT +#define RXERR_TYPE_OFDM_PPDU 0 +#define RXERR_TYPE_OFDM_FALSE_ALARM 1 +#define RXERR_TYPE_OFDM_MPDU_OK 2 +#define RXERR_TYPE_OFDM_MPDU_FAIL 3 +#define RXERR_TYPE_CCK_PPDU 4 +#define RXERR_TYPE_CCK_FALSE_ALARM 5 +#define RXERR_TYPE_CCK_MPDU_OK 6 +#define RXERR_TYPE_CCK_MPDU_FAIL 7 +#define RXERR_TYPE_HT_PPDU 8 +#define RXERR_TYPE_HT_FALSE_ALARM 9 +#define RXERR_TYPE_HT_MPDU_TOTAL 10 +#define RXERR_TYPE_HT_MPDU_OK 11 +#define RXERR_TYPE_HT_MPDU_FAIL 12 +#define RXERR_TYPE_RX_FULL_DROP 15 + +#define RXERR_COUNTER_MASK 0xFFFFF +#define RXERR_RPT_RST BIT(27) +#define _RXERR_RPT_SEL(type) ((type) << 28) + + +//2 SECCFG +#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key +#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key +#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption +#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption +#define SCR_SKByA2 BIT(4) //Search kEY BY A2 +#define SCR_NoSKMC BIT(5) //No Key Search Multicast +#define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key +#define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key + +//vivi added for new cam search flow, 20091028 +#ifdef HW_EN_DE_CRYPTION_FOR_NEW_CAM_SEARCH_FLOW +#define SCR_TxUseBroadcastDK BIT6 //Force Tx Use Broadcast Default Key +#define SCR_RxUseBroadcastDK BIT7 //Force Rx Use Broadcast Default Key +#endif + + +//----------------------------------------------------- +// +// 0xFE00h ~ 0xFE55h USB Configuration +// +//----------------------------------------------------- + +//2 USB Information (0xFE17) +#define USB_IS_HIGH_SPEED 0 +#define USB_IS_FULL_SPEED 1 +#define USB_SPEED_MASK BIT(5) + +#define USB_NORMAL_SIE_EP_MASK 0xF +#define USB_NORMAL_SIE_EP_SHIFT 4 + +#define USB_TEST_EP_MASK 0x30 +#define USB_TEST_EP_SHIFT 4 + +//2 Special Option +#define USB_AGG_EN BIT(3) + + +//2REG_C2HEVT_CLEAR +#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message +#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. + +//2 8192D PartNo. +#define PARTNO_92D_NIC (BIT7|BIT6) +#define PARTNO_92D_NIC_REMARK (BIT5|BIT4) +#define PARTNO_SINGLE_BAND_VS BIT3 +#define PARTNO_SINGLE_BAND_VS_REMARK BIT1 +#define PARTNO_CONCURRENT_BAND_VC (BIT3|BIT2) +#define PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1|BIT0) +//======================================================== +// General definitions +//======================================================== + +#define MAC_ADDR_LEN 6 +#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 +#define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 + +#define POLLING_LLT_THRESHOLD 20 +#define POLLING_READY_TIMEOUT_COUNT 1000 + +// Min Spacing related settings. +#define MAX_MSS_DENSITY_2T 0x13 +#define MAX_MSS_DENSITY_1T 0x0A +// GPIO BIT +#define HAL_8192C_HW_GPIO_WPS_BIT BIT2 + + +#include "basic_types.h" + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtl8192d_xmit.h b/drivers/net/wireless/rtl8192cu/include/rtl8192d_xmit.h old mode 100755 new mode 100644 index 2b1580ff240236..0babb27c7d0d21 --- a/drivers/net/wireless/rtl8192cu/include/rtl8192d_xmit.h +++ b/drivers/net/wireless/rtl8192cu/include/rtl8192d_xmit.h @@ -1,106 +1,106 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef _RTL8192D_XMIT_H_ -#define _RTL8192D_XMIT_H_ - -#define VO_QUEUE_INX 0 -#define VI_QUEUE_INX 1 -#define BE_QUEUE_INX 2 -#define BK_QUEUE_INX 3 -#define BCN_QUEUE_INX 4 -#define MGT_QUEUE_INX 5 -#define HIGH_QUEUE_INX 6 -#define TXCMD_QUEUE_INX 7 - -#define HW_QUEUE_ENTRY 8 - -// -// Queue Select Value in TxDesc -// -#define QSLT_BK 0x2//0x01 -#define QSLT_BE 0x0 -#define QSLT_VI 0x5//0x4 -#define QSLT_VO 0x7//0x6 -#define QSLT_BEACON 0x10 -#define QSLT_HIGH 0x11 -#define QSLT_MGNT 0x12 -#define QSLT_CMD 0x13 - -//Because we open EM for normal case, we just always insert 2*8 bytes.by wl -#define USB_92D_DUMMY_OFFSET 2 -#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ) -#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH) - -//For 92D early mode -#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) - -#ifdef CONFIG_USB_HCI - -#ifdef CONFIG_USB_TX_AGGREGATION -#define MAX_TX_AGG_PACKET_NUMBER 0xFF -#endif - -s32 rtl8192du_init_xmit_priv(_adapter * padapter); - -void rtl8192du_free_xmit_priv(_adapter * padapter); - -void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc); - -s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - -void rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); - -s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); - -#ifdef CONFIG_HOSTAPD_MLME -s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); -#endif - -#endif - -#ifdef CONFIG_PCI_HCI -s32 rtl8192de_init_xmit_priv(_adapter * padapter); -void rtl8192de_free_xmit_priv(_adapter * padapter); - -s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); -struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring); - -void rtl8192de_xmitframe_resume(_adapter *padapter); - -void rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); - -s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); - -#ifdef CONFIG_HOSTAPD_MLME -s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); -#endif - -#endif - - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef _RTL8192D_XMIT_H_ +#define _RTL8192D_XMIT_H_ + +#define VO_QUEUE_INX 0 +#define VI_QUEUE_INX 1 +#define BE_QUEUE_INX 2 +#define BK_QUEUE_INX 3 +#define BCN_QUEUE_INX 4 +#define MGT_QUEUE_INX 5 +#define HIGH_QUEUE_INX 6 +#define TXCMD_QUEUE_INX 7 + +#define HW_QUEUE_ENTRY 8 + +// +// Queue Select Value in TxDesc +// +#define QSLT_BK 0x2//0x01 +#define QSLT_BE 0x0 +#define QSLT_VI 0x5//0x4 +#define QSLT_VO 0x7//0x6 +#define QSLT_BEACON 0x10 +#define QSLT_HIGH 0x11 +#define QSLT_MGNT 0x12 +#define QSLT_CMD 0x13 + +//Because we open EM for normal case, we just always insert 2*8 bytes.by wl +#define USB_92D_DUMMY_OFFSET 2 +#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ) +#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH) + +//For 92D early mode +#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) +#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) +#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) +#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) +#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) +#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) +#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) + +#ifdef CONFIG_USB_HCI + +#ifdef CONFIG_USB_TX_AGGREGATION +#define MAX_TX_AGG_PACKET_NUMBER 0xFF +#endif + +s32 rtl8192du_init_xmit_priv(_adapter * padapter); + +void rtl8192du_free_xmit_priv(_adapter * padapter); + +void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc); + +s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); + +void rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); + +s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); + +#ifdef CONFIG_HOSTAPD_MLME +s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); +#endif + +#endif + +#ifdef CONFIG_PCI_HCI +s32 rtl8192de_init_xmit_priv(_adapter * padapter); +void rtl8192de_free_xmit_priv(_adapter * padapter); + +s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); +struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring); + +void rtl8192de_xmitframe_resume(_adapter *padapter); + +void rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); + +s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); + +#ifdef CONFIG_HOSTAPD_MLME +s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); +#endif + +#endif + + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_android.h b/drivers/net/wireless/rtl8192cu/include/rtw_android.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_br_ext.h b/drivers/net/wireless/rtl8192cu/include/rtw_br_ext.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_byteorder.h b/drivers/net/wireless/rtl8192cu/include/rtw_byteorder.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_cmd.h b/drivers/net/wireless/rtl8192cu/include/rtw_cmd.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_debug.h b/drivers/net/wireless/rtl8192cu/include/rtw_debug.h old mode 100755 new mode 100644 index 7dc750b5a992e4..eca6692580f23e --- a/drivers/net/wireless/rtl8192cu/include/rtw_debug.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_debug.h @@ -368,6 +368,12 @@ extern void rtl871x_cedbg(const char *fmt, ...); int proc_set_rx_signal(struct file *file, const char *buffer, unsigned long count, void *data); + int proc_get_ampdu_enable(char *page, char **start, + off_t offset, int count, + int *eof, void *data); + + int proc_set_ampdu_enable(struct file *file, const char *buffer, + unsigned long count, void *data); int proc_get_rssi_disp(char *page, char **start, off_t offset, int count, diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_eeprom.h b/drivers/net/wireless/rtl8192cu/include/rtw_eeprom.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_efuse.h b/drivers/net/wireless/rtl8192cu/include/rtw_efuse.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_event.h b/drivers/net/wireless/rtl8192cu/include/rtw_event.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_ht.h b/drivers/net/wireless/rtl8192cu/include/rtw_ht.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_io.h b/drivers/net/wireless/rtl8192cu/include/rtw_io.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_ioctl.h b/drivers/net/wireless/rtl8192cu/include/rtw_ioctl.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_query.h b/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_query.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_rtl.h b/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_rtl.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_set.h b/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_set.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_iol.h b/drivers/net/wireless/rtl8192cu/include/rtw_iol.h old mode 100755 new mode 100644 index 2750eb3e84dd14..45fa5a22554ed8 --- a/drivers/net/wireless/rtl8192cu/include/rtw_iol.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_iol.h @@ -1,89 +1,89 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __RTW_IOL_H_ -#define __RTW_IOL_H_ - -#include -#include -#include - -typedef struct _io_offload_cmd { - u8 rsvd0; - u8 cmd; - u16 address; - u32 value; -} IO_OFFLOAD_CMD, IOL_CMD; - -#define IOL_CMD_LLT 0x00 -//#define IOL_CMD_R_EFUSE 0x01 -#define IOL_CMD_WB_REG 0x02 -#define IOL_CMD_WW_REG 0x03 -#define IOL_CMD_WD_REG 0x04 -//#define IOL_CMD_W_RF 0x05 -#define IOL_CMD_DELAY_US 0x80 -#define IOL_CMD_DELAY_MS 0x81 -//#define IOL_CMD_DELAY_S 0x82 -#define IOL_CMD_END 0x83 - -/***************************************************** -CMD Address Value -(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) -****************************************************** -IOL_CMD_LLT - B7: PGBNDY -//IOL_CMD_R_EFUSE - - -IOL_CMD_WB_REG 0x0~0xFFFF B7 -IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 -IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 -//IOL_CMD_W_RF RF Reg B5~B7 -IOL_CMD_DELAY_US - B6~B7 -IOL_CMD_DELAY_MS - B6~B7 -//IOL_CMD_DELAY_S - B6~B7 -IOL_CMD_END - - -******************************************************/ - -struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); -int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); -int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); -int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); -int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); -int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); -int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); -int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); -int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); -int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); -int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); -int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); - -#ifdef DBG_IO -int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); -int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); -int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); -#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) -#else -#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) -#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) -#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) -#endif - -bool rtw_IOL_applied(ADAPTER *adapter); - -#endif //__RTW_IOL_H_ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __RTW_IOL_H_ +#define __RTW_IOL_H_ + +#include +#include +#include + +typedef struct _io_offload_cmd { + u8 rsvd0; + u8 cmd; + u16 address; + u32 value; +} IO_OFFLOAD_CMD, IOL_CMD; + +#define IOL_CMD_LLT 0x00 +//#define IOL_CMD_R_EFUSE 0x01 +#define IOL_CMD_WB_REG 0x02 +#define IOL_CMD_WW_REG 0x03 +#define IOL_CMD_WD_REG 0x04 +//#define IOL_CMD_W_RF 0x05 +#define IOL_CMD_DELAY_US 0x80 +#define IOL_CMD_DELAY_MS 0x81 +//#define IOL_CMD_DELAY_S 0x82 +#define IOL_CMD_END 0x83 + +/***************************************************** +CMD Address Value +(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) +****************************************************** +IOL_CMD_LLT - B7: PGBNDY +//IOL_CMD_R_EFUSE - - +IOL_CMD_WB_REG 0x0~0xFFFF B7 +IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 +IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 +//IOL_CMD_W_RF RF Reg B5~B7 +IOL_CMD_DELAY_US - B6~B7 +IOL_CMD_DELAY_MS - B6~B7 +//IOL_CMD_DELAY_S - B6~B7 +IOL_CMD_END - - +******************************************************/ + +struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); +int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); +int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); +int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); +int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); +int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); +int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); +int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); +int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); +int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); +int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); +int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); + +#ifdef DBG_IO +int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); +int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); +int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); +#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) +#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) +#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) +#else +#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) +#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) +#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) +#endif + +bool rtw_IOL_applied(ADAPTER *adapter); + +#endif //__RTW_IOL_H_ diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_led.h b/drivers/net/wireless/rtl8192cu/include/rtw_led.h old mode 100755 new mode 100644 index bef37df3dd0232..72634f8b43119f --- a/drivers/net/wireless/rtl8192cu/include/rtw_led.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_led.h @@ -1,214 +1,214 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef __RTW_LED_H_ -#define __RTW_LED_H_ - -#include -#include -#include - -#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) - -typedef enum _LED_CTL_MODE{ - LED_CTL_POWER_ON = 1, - LED_CTL_LINK = 2, - LED_CTL_NO_LINK = 3, - LED_CTL_TX = 4, - LED_CTL_RX = 5, - LED_CTL_SITE_SURVEY = 6, - LED_CTL_POWER_OFF = 7, - LED_CTL_START_TO_LINK = 8, - LED_CTL_START_WPS = 9, - LED_CTL_STOP_WPS = 10, - LED_CTL_START_WPS_BOTTON = 11, //added for runtop - LED_CTL_STOP_WPS_FAIL = 12, //added for ALPHA - LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, //added for BELKIN -}LED_CTL_MODE; - - -#ifdef CONFIG_USB_HCI -//================================================================================ -// LED object. -//================================================================================ - -typedef enum _LED_STATE_871x{ - LED_UNKNOWN = 0, - LED_ON = 1, - LED_OFF = 2, - LED_BLINK_NORMAL = 3, - LED_BLINK_SLOWLY = 4, - LED_POWER_ON_BLINK = 5, - LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. - LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. - LED_BLINK_StartToBlink = 8,// Customzied for Sercomm Printer Server case - LED_BLINK_WPS = 9, // LED is blinkg during WPS communication - LED_TXRX_BLINK = 10, - LED_BLINK_WPS_STOP = 11, //for ALPHA - LED_BLINK_WPS_STOP_OVERLAP = 12, //for BELKIN -}LED_STATE_871x; - -#define IS_LED_WPS_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \ - || ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \ - || ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress) - -#define IS_LED_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress \ - ||((PLED_871x)_LED_871x)->bLedScanBlinkInProgress) - -typedef enum _LED_PIN_871x{ - LED_PIN_GPIO0, - LED_PIN_LED0, - LED_PIN_LED1 -}LED_PIN_871x; - -typedef struct _LED_871x{ - _adapter *padapter; - LED_PIN_871x LedPin; // Identify how to implement this SW led. - LED_STATE_871x CurrLedState; // Current LED state. - u8 bLedOn; // true if LED is ON, false if LED is OFF. - - u8 bSWLedCtrl; - - u8 bLedBlinkInProgress; // true if it is blinking, false o.w.. - // ALPHA, added by chiyoko, 20090106 - u8 bLedNoLinkBlinkInProgress; - u8 bLedLinkBlinkInProgress; - u8 bLedStartToLinkBlinkInProgress; - u8 bLedScanBlinkInProgress; - u8 bLedWPSBlinkInProgress; - - u32 BlinkTimes; // Number of times to toggle led state for blinking. - LED_STATE_871x BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. - - _timer BlinkTimer; // Timer object for led blinking. -#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) - _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. -#endif -} LED_871x, *PLED_871x; - - -//================================================================================ -// LED customization. -//================================================================================ - -typedef enum _LED_STRATEGY_871x{ - SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. - SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA. - SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. - SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. - SW_LED_MODE4, //for Edimax / Belkin - SW_LED_MODE5, //for Sercomm / Belkin - SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7 - HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) -}LED_STRATEGY_871x, *PLED_STRATEGY_871x; -#endif //CONFIG_USB_HCI - -#ifdef CONFIG_PCI_HCI -//================================================================================ -// LED object. -//================================================================================ - -typedef enum _LED_STATE_871x{ - LED_UNKNOWN = 0, - LED_ON = 1, - LED_OFF = 2, - LED_BLINK_NORMAL = 3, - LED_BLINK_SLOWLY = 4, - LED_POWER_ON_BLINK = 5, - LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. - LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. - LED_BLINK_StartToBlink = 8, - LED_BLINK_TXRX = 9, - LED_BLINK_RUNTOP = 10, // Customized for RunTop - LED_BLINK_CAMEO = 11, -}LED_STATE_871x; - -typedef enum _LED_PIN_871x{ - LED_PIN_GPIO0, - LED_PIN_LED0, - LED_PIN_LED1, - LED_PIN_LED2 -}LED_PIN_871x; - -typedef struct _LED_871x{ - _adapter *padapter; - - LED_PIN_871x LedPin; // Identify how to implement this SW led. - - LED_STATE_871x CurrLedState; // Current LED state. - u8 bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. - - u8 bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. - u8 bLedWPSBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. - - u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode - u32 BlinkTimes; // Number of times to toggle led state for blinking. - LED_STATE_871x BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. - - _timer BlinkTimer; // Timer object for led blinking. -} LED_871x, *PLED_871x; - - -//================================================================================ -// LED customization. -//================================================================================ - -typedef enum _LED_STRATEGY_871x{ - SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. - SW_LED_MODE1, // SW control for PCI Express - SW_LED_MODE2, // SW control for Cameo. - SW_LED_MODE3, // SW contorl for RunTop. - SW_LED_MODE4, // SW control for Netcore - SW_LED_MODE5, //added by vivi, for led new mode, DLINK - SW_LED_MODE6, //added by vivi, for led new mode, PRONET - SW_LED_MODE7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec - SW_LED_MODE8, //added by chiyokolin, for QMI - SW_LED_MODE9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1 - SW_LED_MODE10, //added by chiyokolin, for Edimax-ASUS - HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) -}LED_STRATEGY_871x, *PLED_STRATEGY_871x; - -#define LED_CM8_BLINK_INTERVAL 500 //for QMI -#endif //CONFIG_PCI_HCI - -struct led_priv{ - /* add for led controll */ - LED_871x SwLed0; - LED_871x SwLed1; - LED_STRATEGY_871x LedStrategy; - u8 bRegUseLed; - void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction); - /* add for led controll */ -}; - -#ifdef CONFIG_SW_LED -#define rtw_led_control(adapter, LedAction) \ - do { \ - if((adapter)->ledpriv.LedControlHandler) \ - (adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \ - } while(0) -#else //CONFIG_SW_LED -#define rtw_led_control(adapter, LedAction) -#endif //CONFIG_SW_LED - -extern void BlinkHandler(PLED_871x pLed); - -#endif //__RTW_LED_H_ - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef __RTW_LED_H_ +#define __RTW_LED_H_ + +#include +#include +#include + +#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) + +typedef enum _LED_CTL_MODE{ + LED_CTL_POWER_ON = 1, + LED_CTL_LINK = 2, + LED_CTL_NO_LINK = 3, + LED_CTL_TX = 4, + LED_CTL_RX = 5, + LED_CTL_SITE_SURVEY = 6, + LED_CTL_POWER_OFF = 7, + LED_CTL_START_TO_LINK = 8, + LED_CTL_START_WPS = 9, + LED_CTL_STOP_WPS = 10, + LED_CTL_START_WPS_BOTTON = 11, //added for runtop + LED_CTL_STOP_WPS_FAIL = 12, //added for ALPHA + LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, //added for BELKIN +}LED_CTL_MODE; + + +#ifdef CONFIG_USB_HCI +//================================================================================ +// LED object. +//================================================================================ + +typedef enum _LED_STATE_871x{ + LED_UNKNOWN = 0, + LED_ON = 1, + LED_OFF = 2, + LED_BLINK_NORMAL = 3, + LED_BLINK_SLOWLY = 4, + LED_POWER_ON_BLINK = 5, + LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. + LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. + LED_BLINK_StartToBlink = 8,// Customzied for Sercomm Printer Server case + LED_BLINK_WPS = 9, // LED is blinkg during WPS communication + LED_TXRX_BLINK = 10, + LED_BLINK_WPS_STOP = 11, //for ALPHA + LED_BLINK_WPS_STOP_OVERLAP = 12, //for BELKIN +}LED_STATE_871x; + +#define IS_LED_WPS_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \ + || ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \ + || ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress) + +#define IS_LED_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress \ + ||((PLED_871x)_LED_871x)->bLedScanBlinkInProgress) + +typedef enum _LED_PIN_871x{ + LED_PIN_GPIO0, + LED_PIN_LED0, + LED_PIN_LED1 +}LED_PIN_871x; + +typedef struct _LED_871x{ + _adapter *padapter; + LED_PIN_871x LedPin; // Identify how to implement this SW led. + LED_STATE_871x CurrLedState; // Current LED state. + u8 bLedOn; // true if LED is ON, false if LED is OFF. + + u8 bSWLedCtrl; + + u8 bLedBlinkInProgress; // true if it is blinking, false o.w.. + // ALPHA, added by chiyoko, 20090106 + u8 bLedNoLinkBlinkInProgress; + u8 bLedLinkBlinkInProgress; + u8 bLedStartToLinkBlinkInProgress; + u8 bLedScanBlinkInProgress; + u8 bLedWPSBlinkInProgress; + + u32 BlinkTimes; // Number of times to toggle led state for blinking. + LED_STATE_871x BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. + + _timer BlinkTimer; // Timer object for led blinking. +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) + _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. +#endif +} LED_871x, *PLED_871x; + + +//================================================================================ +// LED customization. +//================================================================================ + +typedef enum _LED_STRATEGY_871x{ + SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. + SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA. + SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. + SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. + SW_LED_MODE4, //for Edimax / Belkin + SW_LED_MODE5, //for Sercomm / Belkin + SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7 + HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) +}LED_STRATEGY_871x, *PLED_STRATEGY_871x; +#endif //CONFIG_USB_HCI + +#ifdef CONFIG_PCI_HCI +//================================================================================ +// LED object. +//================================================================================ + +typedef enum _LED_STATE_871x{ + LED_UNKNOWN = 0, + LED_ON = 1, + LED_OFF = 2, + LED_BLINK_NORMAL = 3, + LED_BLINK_SLOWLY = 4, + LED_POWER_ON_BLINK = 5, + LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. + LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. + LED_BLINK_StartToBlink = 8, + LED_BLINK_TXRX = 9, + LED_BLINK_RUNTOP = 10, // Customized for RunTop + LED_BLINK_CAMEO = 11, +}LED_STATE_871x; + +typedef enum _LED_PIN_871x{ + LED_PIN_GPIO0, + LED_PIN_LED0, + LED_PIN_LED1, + LED_PIN_LED2 +}LED_PIN_871x; + +typedef struct _LED_871x{ + _adapter *padapter; + + LED_PIN_871x LedPin; // Identify how to implement this SW led. + + LED_STATE_871x CurrLedState; // Current LED state. + u8 bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. + + u8 bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. + u8 bLedWPSBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. + + u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode + u32 BlinkTimes; // Number of times to toggle led state for blinking. + LED_STATE_871x BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. + + _timer BlinkTimer; // Timer object for led blinking. +} LED_871x, *PLED_871x; + + +//================================================================================ +// LED customization. +//================================================================================ + +typedef enum _LED_STRATEGY_871x{ + SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. + SW_LED_MODE1, // SW control for PCI Express + SW_LED_MODE2, // SW control for Cameo. + SW_LED_MODE3, // SW contorl for RunTop. + SW_LED_MODE4, // SW control for Netcore + SW_LED_MODE5, //added by vivi, for led new mode, DLINK + SW_LED_MODE6, //added by vivi, for led new mode, PRONET + SW_LED_MODE7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec + SW_LED_MODE8, //added by chiyokolin, for QMI + SW_LED_MODE9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1 + SW_LED_MODE10, //added by chiyokolin, for Edimax-ASUS + HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) +}LED_STRATEGY_871x, *PLED_STRATEGY_871x; + +#define LED_CM8_BLINK_INTERVAL 500 //for QMI +#endif //CONFIG_PCI_HCI + +struct led_priv{ + /* add for led controll */ + LED_871x SwLed0; + LED_871x SwLed1; + LED_STRATEGY_871x LedStrategy; + u8 bRegUseLed; + void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction); + /* add for led controll */ +}; + +#ifdef CONFIG_SW_LED +#define rtw_led_control(adapter, LedAction) \ + do { \ + if((adapter)->ledpriv.LedControlHandler) \ + (adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \ + } while(0) +#else //CONFIG_SW_LED +#define rtw_led_control(adapter, LedAction) +#endif //CONFIG_SW_LED + +extern void BlinkHandler(PLED_871x pLed); + +#endif //__RTW_LED_H_ + diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_mlme.h b/drivers/net/wireless/rtl8192cu/include/rtw_mlme.h old mode 100755 new mode 100644 index 05af290b133384..0beca93c942f2c --- a/drivers/net/wireless/rtl8192cu/include/rtw_mlme.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_mlme.h @@ -351,9 +351,10 @@ struct mlme_priv { u8 ChannelPlan; RT_SCAN_TYPE scan_mode; // active: 1, passive: 0 - - u8 probereq_wpsie[MAX_WPS_IE_LEN];//added in probe req - int probereq_wpsie_len; + //u8 probereq_wpsie[MAX_WPS_IE_LEN];//added in probe req + //int probereq_wpsie_len; + u8 *wps_probe_req_ie; + u32 wps_probe_req_ie_len; #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) /* Number of associated Non-ERP stations (i.e., stations using 802.11b @@ -385,12 +386,12 @@ struct mlme_priv { #endif /* CONFIG_80211N_HT */ u8 *wps_beacon_ie; - u8 *wps_probe_req_ie; + //u8 *wps_probe_req_ie; u8 *wps_probe_resp_ie; u8 *wps_assoc_resp_ie; // for CONFIG_IOCTL_CFG80211, this IE could include p2p ie u32 wps_beacon_ie_len; - u32 wps_probe_req_ie_len; + //u32 wps_probe_req_ie_len; u32 wps_probe_resp_ie_len; u32 wps_assoc_resp_ie_len; diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_mlme_ext.h b/drivers/net/wireless/rtl8192cu/include/rtw_mlme_ext.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_mp.h b/drivers/net/wireless/rtl8192cu/include/rtw_mp.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_mp_ioctl.h b/drivers/net/wireless/rtl8192cu/include/rtw_mp_ioctl.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_mp_phy_regdef.h b/drivers/net/wireless/rtl8192cu/include/rtw_mp_phy_regdef.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_p2p.h b/drivers/net/wireless/rtl8192cu/include/rtw_p2p.h old mode 100755 new mode 100644 index 02edc6dfe5fcdc..a29ceaaa1d2da5 --- a/drivers/net/wireless/rtl8192cu/include/rtw_p2p.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_p2p.h @@ -1,139 +1,151 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#ifndef __RTW_P2P_H_ -#define __RTW_P2P_H_ - -#include - -u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ); -u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); -u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -#ifdef CONFIG_WFD -u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); -#endif //CONFIG_WFD - -u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); -u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); -u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe); -u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); -u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); -u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); -u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); - -void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength); -void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state); -void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType); -u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue); - -#ifdef CONFIG_IOCTL_CFG80211 -void rtw_init_cfg80211_wifidirect_info( _adapter* padapter); -int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); -#endif //CONFIG_IOCTL_CFG80211 - -void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role); -int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role); - -static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) -{ - if(wdinfo->p2p_state != state) { - //wdinfo->pre_p2p_state = wdinfo->p2p_state; - wdinfo->p2p_state = state; - } -} -static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) -{ - if(wdinfo->pre_p2p_state != state) { - wdinfo->pre_p2p_state = state; - } -} -#if 0 -static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) -{ - if(wdinfo->pre_p2p_state != -1) { - wdinfo->p2p_state = wdinfo->pre_p2p_state; - wdinfo->pre_p2p_state = -1; - } -} -#endif -static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) -{ - if(wdinfo->role != role) { - wdinfo->role = role; - } -} -static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) -{ - return wdinfo->p2p_state; -} -static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo) -{ - return wdinfo->pre_p2p_state; -} -static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo) -{ - return wdinfo->role; -} -static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) -{ - return wdinfo->p2p_state == state; -} -static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) -{ - return wdinfo->role == role; -} - -#ifdef CONFIG_DBG_P2P -void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); -void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); -//void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); -void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line); -#define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__) -#define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__) -#define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__) -//#define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) -#else //CONFIG_DBG_P2P -#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state) -#define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state) -#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role) -//#define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) -#endif //CONFIG_DBG_P2P - -#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo) -#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo) -#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo) -#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state) -#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role) - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __RTW_P2P_H_ +#define __RTW_P2P_H_ + +#include + +u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ); +u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); +u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +#ifdef CONFIG_WFD +u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); +#endif //CONFIG_WFD + +u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); +u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); +u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); +u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); +u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); +u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe); +u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); +u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); +u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); +u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); + +void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength); +void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state); +void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType); +u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue); + +#ifdef CONFIG_IOCTL_CFG80211 +void rtw_init_cfg80211_wifidirect_info( _adapter* padapter); +int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); +#endif //CONFIG_IOCTL_CFG80211 + +void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role); +int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role); + +static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) +{ + if(wdinfo->p2p_state != state) { + //wdinfo->pre_p2p_state = wdinfo->p2p_state; + wdinfo->p2p_state = state; + } +} +static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) +{ + if(wdinfo->pre_p2p_state != state) { + wdinfo->pre_p2p_state = state; + } +} +#if 0 +static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) +{ + if(wdinfo->pre_p2p_state != -1) { + wdinfo->p2p_state = wdinfo->pre_p2p_state; + wdinfo->pre_p2p_state = -1; + } +} +#endif +static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) +{ + if(wdinfo->role != role) { + wdinfo->role = role; + } +} +static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) +{ + return wdinfo->p2p_state; +} +static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo) +{ + return wdinfo->pre_p2p_state; +} +static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo) +{ + return wdinfo->role; +} +static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) +{ + return wdinfo->p2p_state == state; +} +static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) +{ + return wdinfo->role == role; +} + +#ifdef CONFIG_DBG_P2P +void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); +void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); +//void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); +void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line); +#define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__) +#define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__) +#define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__) +//#define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) +#else //CONFIG_DBG_P2P +#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state) +#define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state) +#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role) +//#define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) +#endif //CONFIG_DBG_P2P + +#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo) +#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo) +#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo) +#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state) +#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role) + +#define rtw_p2p_findphase_ex_set(wdinfo, value) \ + (wdinfo)->find_phase_state_exchange_cnt = (value) + +//is this find phase exchange for social channel scan? +#define rtw_p2p_findphase_ex_is_social(wdinfo) \ + (wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST + +//should we need find phase exchange anymore? +#define rtw_p2p_findphase_ex_is_needed(wdinfo) \ + ((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \ + (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE) + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_pwrctrl.h b/drivers/net/wireless/rtl8192cu/include/rtw_pwrctrl.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_qos.h b/drivers/net/wireless/rtl8192cu/include/rtw_qos.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_recv.h b/drivers/net/wireless/rtl8192cu/include/rtw_recv.h old mode 100755 new mode 100644 index 420810882ac9c2..a88f5050c78ecb --- a/drivers/net/wireless/rtl8192cu/include/rtw_recv.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_recv.h @@ -161,11 +161,7 @@ struct rx_pkt_attrib { //#define REORDER_ENTRY_NUM 128 #define REORDER_WAIT_TIME (30) // (ms) -#ifdef CONFIG_MINIMAL_MEMORY_USAGE -#define RECVBUFF_ALIGN_SZ 512 -#else #define RECVBUFF_ALIGN_SZ 8 -#endif #define RXDESC_SIZE 24 #define RXDESC_OFFSET RXDESC_SIZE diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_rf.h b/drivers/net/wireless/rtl8192cu/include/rtw_rf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_security.h b/drivers/net/wireless/rtl8192cu/include/rtw_security.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_version.h b/drivers/net/wireless/rtl8192cu/include/rtw_version.h index 1a26560e309715..f88ea77cc631bb 100644 --- a/drivers/net/wireless/rtl8192cu/include/rtw_version.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_version.h @@ -1 +1 @@ -#define DRIVERVERSION "v3.4.3_4369.20120622" +#define DRIVERVERSION "v3.4.4_4749.20121105" diff --git a/drivers/net/wireless/rtl8192cu/include/rtw_xmit.h b/drivers/net/wireless/rtl8192cu/include/rtw_xmit.h old mode 100755 new mode 100644 index ef0c26273c071d..54e0b2d9ac5742 --- a/drivers/net/wireless/rtl8192cu/include/rtw_xmit.h +++ b/drivers/net/wireless/rtl8192cu/include/rtw_xmit.h @@ -35,8 +35,11 @@ #else #define MAX_XMITBUF_SZ (2048) #endif - +#ifdef CONFIG_SINGLE_XMIT_BUF +#define NR_XMITBUFF (1) +#else #define NR_XMITBUFF (4) +#endif //CONFIG_SINGLE_XMIT_BUF #elif defined (CONFIG_PCI_HCI) #define MAX_XMITBUF_SZ (1664) @@ -55,8 +58,11 @@ // xmit extension buff defination #define MAX_XMIT_EXTBUF_SZ (2048) - +#ifdef CONFIG_SINGLE_XMIT_BUF +#define NR_XMIT_EXTBUFF (1) +#else #define NR_XMIT_EXTBUFF (32) +#endif //CONFIG_SINGLE_XMIT_BUF #define MAX_NUMBLKS (1) diff --git a/drivers/net/wireless/rtl8192cu/include/sdio_hal.h b/drivers/net/wireless/rtl8192cu/include/sdio_hal.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/sdio_ops.h b/drivers/net/wireless/rtl8192cu/include/sdio_ops.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/sdio_ops_ce.h b/drivers/net/wireless/rtl8192cu/include/sdio_ops_ce.h old mode 100755 new mode 100644 index 6b0c1a29f3eece..81687c9d26fc3f --- a/drivers/net/wireless/rtl8192cu/include/sdio_ops_ce.h +++ b/drivers/net/wireless/rtl8192cu/include/sdio_ops_ce.h @@ -1,56 +1,56 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - -******************************************************************************/ -#ifndef _SDIO_OPS_WINCE_H_ -#define _SDIO_OPS_WINCE_H_ - -#include -#include -#include -#include - - -#ifdef PLATFORM_OS_CE - - -extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); - - -extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); - - -uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); - -extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); - - -extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); - -extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); -extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); -extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); -extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); -extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); -extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); - -#endif - -#endif - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + +******************************************************************************/ +#ifndef _SDIO_OPS_WINCE_H_ +#define _SDIO_OPS_WINCE_H_ + +#include +#include +#include +#include + + +#ifdef PLATFORM_OS_CE + + +extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); + + +extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); + + +uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); + +extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); + + +extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); + +extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); +extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); +extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); +extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); +extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); +extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); + +#endif + +#endif + diff --git a/drivers/net/wireless/rtl8192cu/include/sdio_ops_linux.h b/drivers/net/wireless/rtl8192cu/include/sdio_ops_linux.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/sdio_ops_xp.h b/drivers/net/wireless/rtl8192cu/include/sdio_ops_xp.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/sdio_osintf.h b/drivers/net/wireless/rtl8192cu/include/sdio_osintf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/sta_info.h b/drivers/net/wireless/rtl8192cu/include/sta_info.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/usb_hal.h b/drivers/net/wireless/rtl8192cu/include/usb_hal.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/usb_ops.h b/drivers/net/wireless/rtl8192cu/include/usb_ops.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/usb_osintf.h b/drivers/net/wireless/rtl8192cu/include/usb_osintf.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/usb_vendor_req.h b/drivers/net/wireless/rtl8192cu/include/usb_vendor_req.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/wifi.h b/drivers/net/wireless/rtl8192cu/include/wifi.h old mode 100755 new mode 100644 index 5ae127532a81e8..a80a8050956a42 --- a/drivers/net/wireless/rtl8192cu/include/wifi.h +++ b/drivers/net/wireless/rtl8192cu/include/wifi.h @@ -1082,7 +1082,12 @@ struct ADDBA_request #define P2P_PROVISIONING_SCAN_CNT 3 #define P2P_WILDCARD_SSID_LEN 7 -#define P2P_FINDPHASE_EX_CNT 3 + +#define P2P_FINDPHASE_EX_NONE 0 // default value, used when: (1)p2p disabed or (2)p2p enabled but only do 1 scan phase +#define P2P_FINDPHASE_EX_FULL 1 // used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase +#define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1) +#define P2P_FINDPHASE_EX_MAX 4 +#define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX #define P2P_PROVISION_TIMEOUT 5000 // 5 seconds timeout for sending the provision discovery request #define P2P_GO_NEGO_TIMEOUT 5000 // 5 seconds timeout for receiving the group negotation response diff --git a/drivers/net/wireless/rtl8192cu/include/wlan_bssdef.h b/drivers/net/wireless/rtl8192cu/include/wlan_bssdef.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/include/xmit_osdep.h b/drivers/net/wireless/rtl8192cu/include/xmit_osdep.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_cfg80211.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_cfg80211.c old mode 100755 new mode 100644 index b58e5c00184256..b592e27906bbf3 --- a/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_cfg80211.c +++ b/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_cfg80211.c @@ -1,4620 +1,4618 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _IOCTL_CFG80211_C_ - -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_IOCTL_CFG80211 - -#include "ioctl_cfg80211.h" - -#define RTW_SCAN_IE_LEN_MAX 2304 -#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 65535 //ms -#define RTW_MAX_NUM_PMKIDS 4 - -#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ - -static const u32 rtw_cipher_suites[] = { - WLAN_CIPHER_SUITE_WEP40, - WLAN_CIPHER_SUITE_WEP104, - WLAN_CIPHER_SUITE_TKIP, - WLAN_CIPHER_SUITE_CCMP, -}; - -#define RATETAB_ENT(_rate, _rateid, _flags) \ - { \ - .bitrate = (_rate), \ - .hw_value = (_rateid), \ - .flags = (_flags), \ - } - -#define CHAN2G(_channel, _freq, _flags) { \ - .band = IEEE80211_BAND_2GHZ, \ - .center_freq = (_freq), \ - .hw_value = (_channel), \ - .flags = (_flags), \ - .max_antenna_gain = 0, \ - .max_power = 30, \ -} - -#define CHAN5G(_channel, _flags) { \ - .band = IEEE80211_BAND_5GHZ, \ - .center_freq = 5000 + (5 * (_channel)), \ - .hw_value = (_channel), \ - .flags = (_flags), \ - .max_antenna_gain = 0, \ - .max_power = 30, \ -} - -static struct ieee80211_rate rtw_rates[] = { - RATETAB_ENT(10, 0x1, 0), - RATETAB_ENT(20, 0x2, 0), - RATETAB_ENT(55, 0x4, 0), - RATETAB_ENT(110, 0x8, 0), - RATETAB_ENT(60, 0x10, 0), - RATETAB_ENT(90, 0x20, 0), - RATETAB_ENT(120, 0x40, 0), - RATETAB_ENT(180, 0x80, 0), - RATETAB_ENT(240, 0x100, 0), - RATETAB_ENT(360, 0x200, 0), - RATETAB_ENT(480, 0x400, 0), - RATETAB_ENT(540, 0x800, 0), -}; - -#define rtw_a_rates (rtw_rates + 4) -#define rtw_a_rates_size 8 -#define rtw_g_rates (rtw_rates + 0) -#define rtw_g_rates_size 12 - -static struct ieee80211_channel rtw_2ghz_channels[] = { - CHAN2G(1, 2412, 0), - CHAN2G(2, 2417, 0), - CHAN2G(3, 2422, 0), - CHAN2G(4, 2427, 0), - CHAN2G(5, 2432, 0), - CHAN2G(6, 2437, 0), - CHAN2G(7, 2442, 0), - CHAN2G(8, 2447, 0), - CHAN2G(9, 2452, 0), - CHAN2G(10, 2457, 0), - CHAN2G(11, 2462, 0), - CHAN2G(12, 2467, 0), - CHAN2G(13, 2472, 0), - CHAN2G(14, 2484, 0), -}; - -//{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x12, RT_CHANNEL_DOMAIN_WORLD_WIDE37 - -static struct ieee80211_channel rtw_5ghz_a_channels[] = { - CHAN5G(34, 0), CHAN5G(36, 0), - CHAN5G(38, 0), CHAN5G(40, 0), - CHAN5G(42, 0), CHAN5G(44, 0), - CHAN5G(46, 0), CHAN5G(48, 0), - CHAN5G(52, 0), CHAN5G(56, 0), - CHAN5G(60, 0), CHAN5G(64, 0), - CHAN5G(100, 0), CHAN5G(104, 0), - CHAN5G(108, 0), CHAN5G(112, 0), - CHAN5G(116, 0), CHAN5G(120, 0), - CHAN5G(124, 0), CHAN5G(128, 0), - CHAN5G(132, 0), CHAN5G(136, 0), - CHAN5G(140, 0), CHAN5G(149, 0), - CHAN5G(153, 0), CHAN5G(157, 0), - CHAN5G(161, 0), CHAN5G(165, 0), - CHAN5G(184, 0), CHAN5G(188, 0), - CHAN5G(192, 0), CHAN5G(196, 0), - CHAN5G(200, 0), CHAN5G(204, 0), - CHAN5G(208, 0), CHAN5G(212, 0), - CHAN5G(216, 0), -}; - -static struct ieee80211_supported_band rtw_band_2ghz = { - .band = IEEE80211_BAND_2GHZ, - .channels = rtw_2ghz_channels, - .n_channels = ARRAY_SIZE(rtw_2ghz_channels), - .bitrates = rtw_g_rates, - .n_bitrates = rtw_g_rates_size, -}; - -static struct ieee80211_supported_band rtw_band_5ghz = { - .band = IEEE80211_BAND_5GHZ, - .channels = rtw_5ghz_a_channels, - .n_channels = ARRAY_SIZE(rtw_5ghz_a_channels), - .bitrates = rtw_a_rates, - .n_bitrates = rtw_a_rates_size, -}; - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -static const struct ieee80211_txrx_stypes -rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { - [NL80211_IFTYPE_ADHOC] = { - .tx = 0xffff, - .rx = BIT(IEEE80211_STYPE_ACTION >> 4) - }, - [NL80211_IFTYPE_STATION] = { - .tx = 0xffff, - .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | - BIT(IEEE80211_STYPE_PROBE_REQ >> 4) - }, - [NL80211_IFTYPE_AP] = { - .tx = 0xffff, - .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | - BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | - BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | - BIT(IEEE80211_STYPE_DISASSOC >> 4) | - BIT(IEEE80211_STYPE_AUTH >> 4) | - BIT(IEEE80211_STYPE_DEAUTH >> 4) | - BIT(IEEE80211_STYPE_ACTION >> 4) - }, - [NL80211_IFTYPE_AP_VLAN] = { - /* copy AP */ - .tx = 0xffff, - .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | - BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | - BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | - BIT(IEEE80211_STYPE_DISASSOC >> 4) | - BIT(IEEE80211_STYPE_AUTH >> 4) | - BIT(IEEE80211_STYPE_DEAUTH >> 4) | - BIT(IEEE80211_STYPE_ACTION >> 4) - }, - [NL80211_IFTYPE_P2P_CLIENT] = { - .tx = 0xffff, - .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | - BIT(IEEE80211_STYPE_PROBE_REQ >> 4) - }, - [NL80211_IFTYPE_P2P_GO] = { - .tx = 0xffff, - .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | - BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | - BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | - BIT(IEEE80211_STYPE_DISASSOC >> 4) | - BIT(IEEE80211_STYPE_AUTH >> 4) | - BIT(IEEE80211_STYPE_DEAUTH >> 4) | - BIT(IEEE80211_STYPE_ACTION >> 4) - }, -}; -#endif - -static int rtw_ieee80211_channel_to_frequency(int chan, int band) -{ - /* see 802.11 17.3.8.3.2 and Annex J - * there are overlapping channel numbers in 5GHz and 2GHz bands */ - - if (band == IEEE80211_BAND_5GHZ) { - if (chan >= 182 && chan <= 196) - return 4000 + chan * 5; - else - return 5000 + chan * 5; - } else { /* IEEE80211_BAND_2GHZ */ - if (chan == 14) - return 2484; - else if (chan < 14) - return 2407 + chan * 5; - else - return 0; /* not supported */ - } -} - -static int rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) -{ - int ret=0; - struct ieee80211_channel *notify_channel; - struct cfg80211_bss *bss; - //struct ieee80211_supported_band *band; - u16 channel; - u32 freq; - u64 notify_timestamp; - u16 notify_capability; - u16 notify_interval; - u8 *notify_ie; - size_t notify_ielen; - s32 notify_signal; - u8 buf[768], *pbuf; - size_t len; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - struct wireless_dev *wdev = padapter->rtw_wdev; - struct wiphy *wiphy = wdev->wiphy; - - - //printk("%s\n", __func__); - - - channel = pnetwork->network.Configuration.DSConfig; - if (channel <= RTW_CH_MAX_2G_CHANNEL) - { - //band = wiphy->bands[IEEE80211_BAND_2GHZ]; - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); - } - else - { - //band = wiphy->bands[IEEE80211_BAND_5GHZ]; - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); - } - - notify_channel = ieee80211_get_channel(wiphy, freq); - - //rtw_get_timestampe_from_ie() - notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */ - - notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); - notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); - - - notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; - notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; - - //notify_signal = (s16)le16_to_cpu(bi->RSSI) * 100; - - //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) - notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm - -/* - printk("bssid: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", - pnetwork->network.MacAddress[0], pnetwork->network.MacAddress[1], pnetwork->network.MacAddress[2], - pnetwork->network.MacAddress[3], pnetwork->network.MacAddress[4], pnetwork->network.MacAddress[5]); - printk("Channel: %d(%d)\n", channel, freq); - printk("Capability: %X\n", notify_capability); - printk("Beacon interval: %d\n", notify_interval); - printk("Signal: %d\n", notify_signal); - printk("notify_timestamp: %#018llx\n", notify_timestamp); -*/ - - pbuf = buf; - pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); - //pmlmeext->mgnt_seq++; - - if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON - - _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); - - SetFrameSubType(pbuf, WIFI_BEACON); - - } else { - - _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); - - SetFrameSubType(pbuf, WIFI_PROBERSP); - } - - _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); - - - pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); - len = sizeof (struct rtw_ieee80211_hdr_3addr); - - _rtw_memcpy(pbuf, pnetwork->network.IEs, pnetwork->network.IELength); - len += pnetwork->network.IELength; - - -#if 1 - bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)buf, - len, notify_signal, GFP_ATOMIC); -#else - - bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, - notify_timestamp, notify_capability, notify_interval, notify_ie, - notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); -#endif - - if (unlikely(!bss)) { - printk("rtw_cfg80211_inform_bss error\n"); - return -EINVAL; - } - - return ret; - -} - -void rtw_cfg80211_indicate_connect(_adapter *padapter) -{ - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wlan_network *cur_network = &(pmlmepriv->cur_network); - struct wireless_dev *pwdev = padapter->rtw_wdev; - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - - - printk("%s\n", __func__); - - if (pwdev->iftype != NL80211_IFTYPE_STATION - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT - #endif - ) { - return; - } - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) - return; - - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); - rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); - } - - #ifdef CONFIG_LAYER2_ROAMING - if(pmlmepriv->to_roaming > 0) { - //rtw_cfg80211_inform_bss(padapter, cur_network); - DBG_871X("%s call cfg80211_roamed\n", __FUNCTION__); - cfg80211_roamed(padapter->pnetdev, - #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) - NULL, - #endif - cur_network->network.MacAddress, - cur_network->network.IEs+_FIXED_IE_LENGTH_, cur_network->network.IELength-_FIXED_IE_LENGTH_, - NULL, 0, GFP_ATOMIC - ); - } - else - #endif - { - cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress, NULL, 0, NULL, 0, - WLAN_STATUS_SUCCESS, GFP_ATOMIC/*GFP_KERNEL*/); - } -} - -void rtw_cfg80211_indicate_disconnect(_adapter *padapter) -{ - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wireless_dev *pwdev = padapter->rtw_wdev; - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - - printk("%s\n", __func__); - - if (pwdev->iftype != NL80211_IFTYPE_STATION - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT - #endif - ) { - return; - } - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) - return; - - - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - - rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - - printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); - } - - if(pwdev->sme_state==CFG80211_SME_CONNECTING) - cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, - WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); - else if(pwdev->sme_state==CFG80211_SME_CONNECTED) - cfg80211_disconnected(padapter->pnetdev, 0, - NULL, 0, GFP_ATOMIC); - else - printk("pwdev->sme_state=%d\n", pwdev->sme_state); - -} - - -#ifdef CONFIG_AP_MODE -static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta) -{ - struct cmd_obj* ph2c; - struct set_stakey_parm *psetstakey_para; - struct cmd_priv *pcmdpriv=&padapter->cmdpriv; - u8 res=_SUCCESS; - - ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); - if ( ph2c == NULL){ - res= _FAIL; - goto exit; - } - - psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); - if(psetstakey_para==NULL){ - rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); - res=_FAIL; - goto exit; - } - - init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); - - - psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; - - _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); - - _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); - - - res = rtw_enqueue_cmd(pcmdpriv, ph2c); - -exit: - - return res; - -} - -static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) -{ - u8 keylen; - struct cmd_obj* pcmd; - struct setkey_parm *psetkeyparm; - struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); - int res=_SUCCESS; - - DBG_8192C("%s\n", __FUNCTION__); - - pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); - if(pcmd==NULL){ - res= _FAIL; - goto exit; - } - psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); - if(psetkeyparm==NULL){ - rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); - res= _FAIL; - goto exit; - } - - _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); - - psetkeyparm->keyid=(u8)keyid; - - psetkeyparm->algorithm = alg; - - psetkeyparm->set_tx = 1; - - switch(alg) - { - case _WEP40_: - keylen = 5; - break; - case _WEP104_: - keylen = 13; - break; - case _TKIP_: - case _TKIP_WTMIC_: - case _AES_: - keylen = 16; - default: - keylen = 16; - } - - _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); - - pcmd->cmdcode = _SetKey_CMD_; - pcmd->parmbuf = (u8 *)psetkeyparm; - pcmd->cmdsz = (sizeof(struct setkey_parm)); - pcmd->rsp = NULL; - pcmd->rspsz = 0; - - - _rtw_init_listhead(&pcmd->list); - - res = rtw_enqueue_cmd(pcmdpriv, pcmd); - -exit: - - return res; - - -} - -static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid) -{ - u8 alg; - - switch(keylen) - { - case 5: - alg =_WEP40_; - break; - case 13: - alg =_WEP104_; - break; - default: - alg =_NO_PRIVACY_; - } - - return set_group_key(padapter, key, alg, keyid); - -} - -static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) -{ - int ret = 0; - u32 wep_key_idx, wep_key_len,wep_total_len; - NDIS_802_11_WEP *pwep = NULL; - struct sta_info *psta = NULL, *pbcmc_sta = NULL; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct security_priv* psecuritypriv=&(padapter->securitypriv); - struct sta_priv *pstapriv = &padapter->stapriv; - - DBG_8192C("%s\n", __FUNCTION__); - - param->u.crypt.err = 0; - param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; - - //sizeof(struct ieee_param) = 64 bytes; - //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) - if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) - { - ret = -EINVAL; - goto exit; - } - - if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && - param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && - param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) - { - if (param->u.crypt.idx >= WEP_KEYS) - { - ret = -EINVAL; - goto exit; - } - } - else - { - psta = rtw_get_stainfo(pstapriv, param->sta_addr); - if(!psta) - { - //ret = -EINVAL; - DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); - goto exit; - } - } - - if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) - { - //todo:clear default encryption keys - - DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); - - goto exit; - } - - - if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) - { - DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); - - wep_key_idx = param->u.crypt.idx; - wep_key_len = param->u.crypt.key_len; - - DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); - - if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) - { - ret = -EINVAL; - goto exit; - } - - - if (wep_key_len > 0) - { - wep_key_len = wep_key_len <= 5 ? 5 : 13; - wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); - pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len); - if(pwep == NULL){ - DBG_8192C(" r871x_set_encryption: pwep allocate fail !!!\n"); - goto exit; - } - - _rtw_memset(pwep, 0, wep_total_len); - - pwep->KeyLength = wep_key_len; - pwep->Length = wep_total_len; - - } - - pwep->KeyIndex = wep_key_idx; - - _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); - - if(param->u.crypt.set_tx) - { - DBG_8192C("wep, set_tx=1\n"); - - psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; - psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; - psecuritypriv->dot118021XGrpPrivacy=_WEP40_; - - if(pwep->KeyLength==13) - { - psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; - psecuritypriv->dot118021XGrpPrivacy=_WEP104_; - } - - - psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; - - _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); - - psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; - - set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); - - - } - else - { - DBG_8192C("wep, set_tx=0\n"); - - //don't update "psecuritypriv->dot11PrivacyAlgrthm" and - //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam - - _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); - - psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; - - set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); - - } - - goto exit; - - } - - - if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key - { - //if(param->u.crypt.set_tx == 1) - if(param->u.crypt.set_tx == 0) - { - if(strcmp(param->u.crypt.alg, "WEP") == 0) - { - DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); - - _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - - psecuritypriv->dot118021XGrpPrivacy = _WEP40_; - if(param->u.crypt.key_len==13) - { - psecuritypriv->dot118021XGrpPrivacy = _WEP104_; - } - - } - else if(strcmp(param->u.crypt.alg, "TKIP") == 0) - { - DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); - - psecuritypriv->dot118021XGrpPrivacy = _TKIP_; - - _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - - //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); - //set mic key - _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); - _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); - - psecuritypriv->busetkipkey = _TRUE; - - } - else if(strcmp(param->u.crypt.alg, "CCMP") == 0) - { - DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); - - psecuritypriv->dot118021XGrpPrivacy = _AES_; - - _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - } - else - { - DBG_8192C("%s, set group_key, none\n", __FUNCTION__); - - psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; - } - - psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; - - psecuritypriv->binstallGrpkey = _TRUE; - - psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! - - set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); - - pbcmc_sta=rtw_get_bcmc_stainfo(padapter); - if(pbcmc_sta) - { - pbcmc_sta->ieee8021x_blocked = _FALSE; - pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy - } - - } - - goto exit; - - } - - if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x - { - if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) - { - if(param->u.crypt.set_tx ==1) - { - _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - - if(strcmp(param->u.crypt.alg, "WEP") == 0) - { - DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); - - psta->dot118021XPrivacy = _WEP40_; - if(param->u.crypt.key_len==13) - { - psta->dot118021XPrivacy = _WEP104_; - } - } - else if(strcmp(param->u.crypt.alg, "TKIP") == 0) - { - DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); - - psta->dot118021XPrivacy = _TKIP_; - - //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); - //set mic key - _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); - _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); - - psecuritypriv->busetkipkey = _TRUE; - - } - else if(strcmp(param->u.crypt.alg, "CCMP") == 0) - { - - DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); - - psta->dot118021XPrivacy = _AES_; - } - else - { - DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); - - psta->dot118021XPrivacy = _NO_PRIVACY_; - } - - set_pairwise_key(padapter, psta); - - psta->ieee8021x_blocked = _FALSE; - - psta->bpairwise_key_installed = _TRUE; - - } - else//group key??? - { - if(strcmp(param->u.crypt.alg, "WEP") == 0) - { - _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - - psecuritypriv->dot118021XGrpPrivacy = _WEP40_; - if(param->u.crypt.key_len==13) - { - psecuritypriv->dot118021XGrpPrivacy = _WEP104_; - } - } - else if(strcmp(param->u.crypt.alg, "TKIP") == 0) - { - psecuritypriv->dot118021XGrpPrivacy = _TKIP_; - - _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - - //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); - //set mic key - _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); - _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); - - psecuritypriv->busetkipkey = _TRUE; - - } - else if(strcmp(param->u.crypt.alg, "CCMP") == 0) - { - psecuritypriv->dot118021XGrpPrivacy = _AES_; - - _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - } - else - { - psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; - } - - psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; - - psecuritypriv->binstallGrpkey = _TRUE; - - psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! - - set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); - - pbcmc_sta=rtw_get_bcmc_stainfo(padapter); - if(pbcmc_sta) - { - pbcmc_sta->ieee8021x_blocked = _FALSE; - pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy - } - - } - - } - - } - -exit: - - if(pwep) - { - rtw_mfree((u8 *)pwep, wep_total_len); - } - - return ret; - -} -#endif - -static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) -{ - int ret = 0; - u32 wep_key_idx, wep_key_len,wep_total_len; - NDIS_802_11_WEP *pwep = NULL; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct security_priv *psecuritypriv = &padapter->securitypriv; -#ifdef CONFIG_P2P - struct wifidirect_info* pwdinfo = &padapter->wdinfo; -#endif //CONFIG_P2P - -_func_enter_; - - printk("%s\n", __func__); - - param->u.crypt.err = 0; - param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; - - if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) - { - ret = -EINVAL; - goto exit; - } - - if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && - param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && - param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) - { - if (param->u.crypt.idx >= WEP_KEYS) - { - ret = -EINVAL; - goto exit; - } - } else { - ret = -EINVAL; - goto exit; - } - - if (strcmp(param->u.crypt.alg, "WEP") == 0) - { - RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); - DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); - - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; - padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; - padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; - - wep_key_idx = param->u.crypt.idx; - wep_key_len = param->u.crypt.key_len; - - RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); - DBG_8192C("(1)wep_key_idx=%d\n", wep_key_idx); - - if (wep_key_idx > WEP_KEYS) - return -EINVAL; - - RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); - - if (wep_key_len > 0) - { - wep_key_len = wep_key_len <= 5 ? 5 : 13; - wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); - pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); - if(pwep == NULL){ - RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); - goto exit; - } - - _rtw_memset(pwep, 0, wep_total_len); - - pwep->KeyLength = wep_key_len; - pwep->Length = wep_total_len; - - if(wep_key_len==13) - { - padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; - padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; - } - } - else { - ret = -EINVAL; - goto exit; - } - - pwep->KeyIndex = wep_key_idx; - pwep->KeyIndex |= 0x80000000; - - _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); - - if(param->u.crypt.set_tx) - { - DBG_8192C("wep, set_tx=1\n"); - - if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) - { - ret = -EOPNOTSUPP ; - } - } - else - { - DBG_8192C("wep, set_tx=0\n"); - - //don't update "psecuritypriv->dot11PrivacyAlgrthm" and - //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam - - if (wep_key_idx >= WEP_KEYS) { - ret = -EOPNOTSUPP ; - goto exit; - } - - _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); - psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; - rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); - } - - goto exit; - } - - if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x - { - struct sta_info * psta,*pbcmc_sta; - struct sta_priv * pstapriv = &padapter->stapriv; - - //printk("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); - - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode - { - psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); - if (psta == NULL) { - //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); - printk("%s, : Obtain Sta_info fail \n", __func__); - } - else - { - //Jeff: don't disable ieee8021x_blocked while clearing key - if (strcmp(param->u.crypt.alg, "none") != 0) - psta->ieee8021x_blocked = _FALSE; - - - if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| - (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) - { - psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; - } - - if(param->u.crypt.set_tx ==1)//pairwise key - { - - printk("%s, : param->u.crypt.set_tx ==1 \n", __func__); - - _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - - if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key - { - //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); - _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); - _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); - - padapter->securitypriv.busetkipkey=_FALSE; - //_set_timer(&padapter->securitypriv.tkip_timer, 50); - } - - //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); - //DEBUG_ERR(("\n ~~~~stastakey:unicastkey\n")); - DBG_871X("\n ~~~~stastakey:unicastkey\n"); - - rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); - } - else//group key - { - _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); - _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); - _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); - padapter->securitypriv.binstallGrpkey = _TRUE; - //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); - //DEBUG_ERR(("\n ~~~~stastakey:groupkey\n")); - DBG_871X("\n ~~~~stastakey:groupkey\n"); - - padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; - - rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1); -#ifdef CONFIG_P2P - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) - { - rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); - } -#endif //CONFIG_P2P - - } - } - - pbcmc_sta=rtw_get_bcmc_stainfo(padapter); - if(pbcmc_sta==NULL) - { - //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); - } - else - { - //Jeff: don't disable ieee8021x_blocked while clearing key - if (strcmp(param->u.crypt.alg, "none") != 0) - pbcmc_sta->ieee8021x_blocked = _FALSE; - - if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| - (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) - { - pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; - } - } - } - else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode - { - } - } - -exit: - - printk("%s, ret=%d\n", __func__, ret); - - if (pwep) { - rtw_mfree((u8 *)pwep,wep_total_len); - } - - _func_exit_; - - return ret; -} - -static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - u8 key_index, bool pairwise, const u8 *mac_addr, -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - u8 key_index, const u8 *mac_addr, -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - struct key_params *params) -{ - char *alg_name; - u32 param_len; - struct ieee_param *param = NULL; - int ret=0; - struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - - - printk("%s, Adding key for %pM\n", __func__, mac_addr); - - printk("cipher=0x%x\n", params->cipher); - - printk("key_len=0x%x\n", params->key_len); - - printk("seq_len=0x%x\n", params->seq_len); - - printk("key_index=%d\n", key_index); - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - printk("pairwise=%d\n", pairwise); -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - - - param_len = sizeof(struct ieee_param) + params->key_len; - param = (struct ieee_param *)rtw_malloc(param_len); - if (param == NULL) - return -1; - - _rtw_memset(param, 0, param_len); - - param->cmd = IEEE_CMD_SET_ENCRYPTION; - _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); - - switch (params->cipher) { - case IW_AUTH_CIPHER_NONE: - //todo: remove key - //remove = 1; - alg_name = "none"; - break; - case WLAN_CIPHER_SUITE_WEP40: - case WLAN_CIPHER_SUITE_WEP104: - alg_name = "WEP"; - break; - case WLAN_CIPHER_SUITE_TKIP: - alg_name = "TKIP"; - break; - case WLAN_CIPHER_SUITE_CCMP: - alg_name = "CCMP"; - break; - default: - return -ENOTSUPP; - } - - strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); - - - if (!mac_addr || is_broadcast_ether_addr(mac_addr)) - { - param->u.crypt.set_tx = 0; - } else { - param->u.crypt.set_tx = 1; - } - - - //param->u.crypt.idx = key_index - 1; - param->u.crypt.idx = key_index; - - if (params->seq_len && params->seq) - { - _rtw_memcpy(param->u.crypt.seq, params->seq, params->seq_len); - } - - if(params->key_len && params->key) - { - param->u.crypt.key_len = params->key_len; - _rtw_memcpy(param->u.crypt.key, params->key, params->key_len); - } - - //if(rtw_wdev->iftype == NL80211_IFTYPE_STATION) - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - { - ret = rtw_cfg80211_set_encryption(ndev, param, param_len); - } - else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)//else if(rtw_wdev->iftype == NL80211_IFTYPE_AP) - { -#ifdef CONFIG_AP_MODE - if(mac_addr) - _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); - - ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); -#endif - } - else - { - printk("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); - - } - - if(param) - { - rtw_mfree((u8*)param, param_len); - } - - return ret; - -} - -static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - u8 key_index, bool pairwise, const u8 *mac_addr, -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - u8 key_index, const u8 *mac_addr, -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - void *cookie, - void (*callback)(void *cookie, - struct key_params*)) -{ -#if 0 - struct iwm_priv *iwm = ndev_to_iwm(ndev); - struct iwm_key *key = &iwm->keys[key_index]; - struct key_params params; - - IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); - - memset(¶ms, 0, sizeof(params)); - - params.cipher = key->cipher; - params.key_len = key->key_len; - params.seq_len = key->seq_len; - params.seq = key->seq; - params.key = key->key; - - callback(cookie, ¶ms); - - return key->key_len ? 0 : -ENOENT; -#endif - printk("%s\n", __func__); - return 0; -} - -static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - u8 key_index, bool pairwise, const u8 *mac_addr) -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - u8 key_index, const u8 *mac_addr) -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -{ -#if 0 - struct iwm_priv *iwm = ndev_to_iwm(ndev); - struct iwm_key *key = &iwm->keys[key_index]; - - if (!iwm->keys[key_index].key_len) { - IWM_DBG_WEXT(iwm, DBG, "Key %d not used\n", key_index); - return 0; - } - - if (key_index == iwm->default_key) - iwm->default_key = -1; - - return iwm_set_key(iwm, 1, key); -#endif - printk("%s\n", __func__); - return 0; -} - -static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, - struct net_device *ndev, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - u8 key_index, bool unicast, bool multicast) -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - u8 key_index) -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) -{ -#if 0 - struct iwm_priv *iwm = ndev_to_iwm(ndev); - - IWM_DBG_WEXT(iwm, DBG, "Default key index is: %d\n", key_index); - - if (!iwm->keys[key_index].key_len) { - IWM_ERR(iwm, "Key %d not used\n", key_index); - return -EINVAL; - } - - iwm->default_key = key_index; - - return iwm_set_tx_key(iwm, key_index); -#endif - printk("%s\n", __func__); - return 0; -} - -static int cfg80211_rtw_get_station(struct wiphy *wiphy, - struct net_device *ndev, - u8 *mac, struct station_info *sinfo) -{ - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - - if(!mac) { - DBG_871X("%s, mac==%p\n", __func__, mac); - return -ENOENT; - } - -#ifdef CONFIG_DEBUG_CFG80211 - DBG_871X("%s, mac="MAC_FMT"\n", __func__, MAC_ARG(mac)); -#endif - - //for infra./P2PClient mode - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) - && check_fwstate(pmlmepriv, _FW_LINKED) - ) - { - struct wlan_network *cur_network = &(pmlmepriv->cur_network); - - if (_rtw_memcmp(mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) - { - DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); - return -ENOENT; - } - - sinfo->filled |= STATION_INFO_SIGNAL; - sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); - - sinfo->filled |= STATION_INFO_TX_BITRATE; - sinfo->txrate.legacy = 10 * rtw_get_network_max_rate(padapter, &pmlmepriv->cur_network.network); - } - - //for Ad-Hoc/AP mode - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) - ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) - ||check_fwstate(pmlmepriv, WIFI_AP_STATE) ) - && check_fwstate(pmlmepriv, _FW_LINKED) - ) - { - struct sta_info *psta = NULL; - struct sta_priv *pstapriv = &padapter->stapriv; - - psta = rtw_get_stainfo(pstapriv, mac); - if(psta == NULL) - { - printk("%s, sta_info is null\n", __func__); - return -ENOENT; - } - - //TODO: should acquire station info... - } - - return 0; -} - -extern int netdev_open(struct net_device *pnetdev); - -static int cfg80211_rtw_change_iface(struct wiphy *wiphy, - struct net_device *ndev, - enum nl80211_iftype type, u32 *flags, - struct vif_params *params) -{ - enum nl80211_iftype old_type; - NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - int ret = 0; - u8 change = _FALSE; - - - DBG_871X("%s call netdev_open\n", __FUNCTION__); - if(netdev_open(ndev) != 0) { - ret= -EPERM; - goto exit; - } - - if(_FAIL == rtw_pwr_wakeup(padapter)) { - ret= -EPERM; - goto exit; - } - - old_type = rtw_wdev->iftype; - printk("%s, old_iftype=%d, new_iftype=%d\n", __func__, old_type, type); - - - - if(old_type != type) - change = _TRUE; - - - switch (type) { - case NL80211_IFTYPE_ADHOC: - networkType = Ndis802_11IBSS; - break; - case NL80211_IFTYPE_STATION: - networkType = Ndis802_11Infrastructure; - if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - - //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) - rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); - rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); - - printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); - - } - break; - case NL80211_IFTYPE_AP: - networkType = Ndis802_11APMode; - if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - } - break; - default: - return -EOPNOTSUPP; - } - - rtw_wdev->iftype = type; - - if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) - { - rtw_wdev->iftype = old_type; - ret = -EPERM; - goto exit; - } - - rtw_setopmode_cmd(padapter, networkType); - -exit: - - return ret; -} - -void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted) -{ - _irqL irqL; - - _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); - if(pwdev_priv->scan_request != NULL) - { - //struct cfg80211_scan_request *scan_request = pwdev_priv->scan_request; - -#ifdef CONFIG_DEBUG_CFG80211 - DBG_871X("%s with scan req\n", __FUNCTION__); -#endif - - //avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); - //if(scan_request == wiphy_to_dev(scan_request->wiphy)->scan_req) - - cfg80211_scan_done(pwdev_priv->scan_request, aborted); - pwdev_priv->scan_request = NULL; - - } else { - DBG_871X("%s without scan req\n", __FUNCTION__); - } - _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); -} - -void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) -{ - _irqL irqL; - _list *plist, *phead; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - _queue *queue = &(pmlmepriv->scanned_queue); - struct wlan_network *pnetwork = NULL; - u32 cnt=0; - u32 wait_for_surveydone; - sint wait_status; -#ifdef CONFIG_P2P - struct wifidirect_info* pwdinfo = &padapter->wdinfo; -#endif //CONFIG_P2P - struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s\n", __func__); -#endif - -#if 0 - if(padapter->pwrctrlpriv.brfoffbyhw && padapter->bDriverStopped) - { - return; - } - -#ifdef CONFIG_P2P - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - // P2P is enabled - wait_for_surveydone = 200; - } - else - { - // P2P is disabled - wait_for_surveydone = 100; - } -#else - { - wait_for_surveydone = 100; - } -#endif //CONFIG_P2P - - - wait_status = _FW_UNDER_SURVEY - #ifndef CONFIG_ANDROID - |_FW_UNDER_LINKING - #endif - ; - - while(check_fwstate(pmlmepriv, wait_status) == _TRUE) - { - rtw_msleep_os(30); - cnt++; - if(cnt > wait_for_surveydone ) - break; - } -#endif - - _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); - - phead = get_list_head(queue); - plist = get_next(phead); - - while(1) - { - if (rtw_end_of_queue_search(phead,plist)== _TRUE) - break; - - pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); - - //report network only if the current channel set contains the channel to which this network belongs - if( _TRUE == rtw_is_channel_set_contains_channel(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) - #ifdef CONFIG_VALIDATE_SSID - && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) - #endif - ) - { - //ev=translate_scan(padapter, a, pnetwork, ev, stop); - rtw_cfg80211_inform_bss(padapter, pnetwork); - } - - plist = get_next(plist); - - } - - _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); - - #if 0 - // Disable P2P Listen State - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - - //rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); - rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -#endif - - if(pwrpriv->bips_processing == _FALSE){ - rtw_set_pwr_state_check_timer(pwrpriv); - } - } - #endif - - //call this after other things have been done - rtw_indicate_scan_done(padapter, _FALSE); - -} - -static int rtw_cfg80211_set_probe_req_wpsp2pie(struct net_device *net, char *buf, int len) -{ - int ret = 0; - uint wps_ielen = 0; - u8 *wps_ie; - u32 p2p_ielen = 0; - u8 *p2p_ie; - _adapter *padapter = (_adapter *)rtw_netdev_priv(net); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, ielen=%d\n", __func__, len); -#endif - - if(len>0) - { - if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) - { - #ifdef CONFIG_DEBUG_CFG80211 - printk("probe_req_wps_ielen=%d\n", wps_ielen); - #endif - - if(pmlmepriv->wps_probe_req_ie) - { - u32 free_len = pmlmepriv->wps_probe_req_ie_len; - pmlmepriv->wps_probe_req_ie_len = 0; - rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); - pmlmepriv->wps_probe_req_ie = NULL; - } - - pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); - if ( pmlmepriv->wps_probe_req_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); - pmlmepriv->wps_probe_req_ie_len = wps_ielen; - } - - buf += wps_ielen; - len -= wps_ielen; - if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) - { - #ifdef CONFIG_DEBUG_CFG80211 - printk("probe_req_p2p_ielen=%d\n", p2p_ielen); - #endif - - if(pmlmepriv->p2p_probe_req_ie) - { - u32 free_len = pmlmepriv->p2p_probe_req_ie_len; - pmlmepriv->p2p_probe_req_ie_len = 0; - rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); - pmlmepriv->p2p_probe_req_ie = NULL; - } - - pmlmepriv->p2p_probe_req_ie = rtw_malloc(len); - if ( pmlmepriv->p2p_probe_req_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); - pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; - } - - } - - return ret; - -} - -static void rtw_cfg80211_scan_abort(_adapter *padapter) -{ - u32 cnt=0; - u32 wait_for_surveydone; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s\n", __func__); -#endif - - wait_for_surveydone = 10; - - pmlmeext->scan_abort = _TRUE; - - while(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) - { - printk("%s : fw_state=_FW_UNDER_SURVEY!\n", __func__); - - rtw_msleep_os(20); - cnt++; - if(cnt > wait_for_surveydone ) - { - printk("waiting for scan_abort time out!\n"); - break; - } - } - - rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), _TRUE); - -} - -static int cfg80211_rtw_scan(struct wiphy *wiphy, struct net_device *ndev, - struct cfg80211_scan_request *request) -{ - int i; - u8 _status = _FALSE; - int ret = 0; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_priv *pmlmepriv= &padapter->mlmepriv; - NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; - _irqL irqL; - u8 *wps_ie=NULL; - uint wps_ielen=0; - u8 *p2p_ie=NULL; - uint p2p_ielen=0; -#ifdef CONFIG_P2P - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); -#endif //CONFIG_P2P - struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); - struct cfg80211_ssid *ssids = request->ssids; - struct ieee80211_channel *pchannel = request->channels[0]; - int social_channel = 0, j = 0; - bool need_indicate_scan_done = _FALSE; - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s\n", __func__); -#endif - -#ifdef CONFIG_MP_INCLUDED - if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) - { - ret = -EPERM; - goto exit; - } -#endif - - _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); - pwdev_priv->scan_request = request; - _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); - - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) - { - //need_indicate_scan_done = _TRUE; - //goto check_need_indicate_scan_done; - } - - if(_FAIL == rtw_pwr_wakeup(padapter)) { - need_indicate_scan_done = _TRUE; - goto check_need_indicate_scan_done; - } - - if( ssids->ssid != NULL ) - { - if( _rtw_memcmp(ssids->ssid, "DIRECT-", 7) - && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) - ) - { - //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); - wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; - } - else - { - rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); - #ifdef CONFIG_DEBUG_CFG80211 - printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); - #endif - } - - rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); - - if(request->n_channels == 3 && - pchannel->center_freq == 2412 && - (pchannel+1)->center_freq == 2417 && - (pchannel+2)->center_freq == 2422 - ) - { - social_channel = 1; - } - } - } - - if(request->ie && request->ie_len>0) - { - rtw_cfg80211_set_probe_req_wpsp2pie( ndev, (u8 *)request->ie, request->ie_len ); - } - - if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) - { - printk("%s, bBusyTraffic == _TRUE\n", __func__); - need_indicate_scan_done = _TRUE; - goto check_need_indicate_scan_done; - } - - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) - { - printk("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); - need_indicate_scan_done = _TRUE; - goto check_need_indicate_scan_done; - } - - -#ifdef CONFIG_P2P - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) - { - rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); - rtw_free_network_queue(padapter, _TRUE); - - //Commented by Kurt 20120114 - //For pwdinfo->find_phase_state_exchange_cnt = 3 means we just do site survey on social channels - if(social_channel == 0) - pwdinfo->find_phase_state_exchange_cnt = 0; - else - pwdinfo->find_phase_state_exchange_cnt = 3; - } -#endif //CONFIG_P2P - - - _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); - //parsing request ssids, n_ssids - for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { - #ifdef CONFIG_DEBUG_CFG80211 - printk("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); - #endif - _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); - ssid[i].SsidLength = ssids[i].ssid_len; - } - - -#ifdef CONFIG_DEBUG_CFG80211 - //parsing channels, n_channels - DBG_871X("%s n_channels:%u\n", __FUNCTION__, request->n_channels); -#endif - - _enter_critical_bh(&pmlmepriv->lock, &irqL); - _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT); - _exit_critical_bh(&pmlmepriv->lock, &irqL); - - - if(_status == _FALSE) - { - ret = -1; - } - -check_need_indicate_scan_done: - if(need_indicate_scan_done) - rtw_cfg80211_surveydone_event_callback(padapter); - -exit: - - return ret; - -} - -static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) -{ -#if 0 - struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - - if (changed & WIPHY_PARAM_RTS_THRESHOLD && - (iwm->conf.rts_threshold != wiphy->rts_threshold)) { - int ret; - - iwm->conf.rts_threshold = wiphy->rts_threshold; - - ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, - CFG_RTS_THRESHOLD, - iwm->conf.rts_threshold); - if (ret < 0) - return ret; - } - - if (changed & WIPHY_PARAM_FRAG_THRESHOLD && - (iwm->conf.frag_threshold != wiphy->frag_threshold)) { - int ret; - - iwm->conf.frag_threshold = wiphy->frag_threshold; - - ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, - CFG_FRAG_THRESHOLD, - iwm->conf.frag_threshold); - if (ret < 0) - return ret; - } -#endif - printk("%s\n", __func__); - return 0; -} - -static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_ibss_params *params) -{ -#if 0 - struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - struct ieee80211_channel *chan = params->channel; - - if (!test_bit(IWM_STATUS_READY, &iwm->status)) - return -EIO; - - /* UMAC doesn't support creating or joining an IBSS network - * with specified bssid. */ - if (params->bssid) - return -EOPNOTSUPP; - - iwm->channel = ieee80211_frequency_to_channel(chan->center_freq); - iwm->umac_profile->ibss.band = chan->band; - iwm->umac_profile->ibss.channel = iwm->channel; - iwm->umac_profile->ssid.ssid_len = params->ssid_len; - memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len); - - return iwm_send_mlme_profile(iwm); -#endif - printk("%s\n", __func__); - return 0; -} - -static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *dev) -{ -#if 0 - struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - - if (iwm->umac_profile_active) - return iwm_invalidate_mlme_profile(iwm); -#endif - printk("%s\n", __func__); - return 0; -} - -static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) -{ - printk("%s, wpa_version=%d\n", __func__, wpa_version); - - - if (!wpa_version) { - psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; - return 0; - } - - - if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) - { - psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; - } - -/* - if (wpa_version & NL80211_WPA_VERSION_2) - { - psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; - } -*/ - - return 0; - -} - -static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, - enum nl80211_auth_type sme_auth_type) -{ - printk("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); - - - switch (sme_auth_type) { - case NL80211_AUTHTYPE_AUTOMATIC: - - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; - - break; - case NL80211_AUTHTYPE_OPEN_SYSTEM: - - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; - - if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; - - break; - case NL80211_AUTHTYPE_SHARED_KEY: - - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; - - psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; - - - break; - default: - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; - //return -ENOTSUPP; - } - - return 0; - -} - -static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) -{ - u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; - - u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : - &psecuritypriv->dot118021XGrpPrivacy; - - printk("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); - - - if (!cipher) { - *profile_cipher = _NO_PRIVACY_; - psecuritypriv->ndisencryptstatus = ndisencryptstatus; - return 0; - } - - switch (cipher) { - case IW_AUTH_CIPHER_NONE: - *profile_cipher = _NO_PRIVACY_; - ndisencryptstatus = Ndis802_11EncryptionDisabled; - break; - case WLAN_CIPHER_SUITE_WEP40: - *profile_cipher = _WEP40_; - ndisencryptstatus = Ndis802_11Encryption1Enabled; - break; - case WLAN_CIPHER_SUITE_WEP104: - *profile_cipher = _WEP104_; - ndisencryptstatus = Ndis802_11Encryption1Enabled; - break; - case WLAN_CIPHER_SUITE_TKIP: - *profile_cipher = _TKIP_; - ndisencryptstatus = Ndis802_11Encryption2Enabled; - break; - case WLAN_CIPHER_SUITE_CCMP: - *profile_cipher = _AES_; - ndisencryptstatus = Ndis802_11Encryption3Enabled; - break; - default: - printk("Unsupported cipher: 0x%x\n", cipher); - return -ENOTSUPP; - } - - if(ucast) - { - psecuritypriv->ndisencryptstatus = ndisencryptstatus; - - //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) - // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; - } - - return 0; -} - -static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) -{ - printk("%s, key_mgt=0x%x\n", __func__, key_mgt); - - if (key_mgt == WLAN_AKM_SUITE_8021X) - //*auth_type = UMAC_AUTH_TYPE_8021X; - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; - else if (key_mgt == WLAN_AKM_SUITE_PSK) { - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; - } else { - printk("Invalid key mgt: 0x%x\n", key_mgt); - //return -EINVAL; - } - - return 0; -} - -static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) -{ - u8 *buf=NULL, *pos=NULL; - u32 left; - int group_cipher = 0, pairwise_cipher = 0; - int ret = 0; -#ifdef CONFIG_P2P - struct wifidirect_info* pwdinfo = &padapter->wdinfo; -#endif //CONFIG_P2P - int wpa_ielen=0; - int wpa2_ielen=0; - u8 *pwpa, *pwpa2; - - - if((ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) || (pie == NULL)){ - padapter->securitypriv.wps_phase = _FALSE; - if(pie == NULL) - return ret; - else - return -EINVAL; - } - - if(ielen) - { - buf = rtw_zmalloc(ielen); - if (buf == NULL){ - ret = -ENOMEM; - goto exit; - } - - _rtw_memcpy(buf, pie , ielen); - - //dump - { - int i; - DBG_8192C("set wpa_ie(length:%d):\n", ielen); - for(i=0;i= RSN_SELECTOR_LEN){ - pos += RSN_SELECTOR_LEN; - left -= RSN_SELECTOR_LEN; - } - else if (left > 0){ - RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left)); - ret =-1; - goto exit; - } -#endif - - pwpa = rtw_get_wpa_ie(buf, &wpa_ielen, ielen); - pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); - - if(pwpa && wpa_ielen>0) - { - if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) - { - padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; - padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; - _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); - - printk("got wpa_ie\n"); - } - } - - if(pwpa2 && wpa2_ielen>0) - { - if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) - { - padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; - padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; - _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); - - printk("got wpa2_ie\n"); - } - } - - switch(group_cipher) - { - case WPA_CIPHER_NONE: - padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; - padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; - break; - case WPA_CIPHER_WEP40: - padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; - break; - case WPA_CIPHER_TKIP: - padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; - break; - case WPA_CIPHER_CCMP: - padapter->securitypriv.dot118021XGrpPrivacy=_AES_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; - break; - case WPA_CIPHER_WEP104: - padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; - break; - } - - switch(pairwise_cipher) - { - case WPA_CIPHER_NONE: - padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; - padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; - break; - case WPA_CIPHER_WEP40: - padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; - break; - case WPA_CIPHER_TKIP: - padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; - break; - case WPA_CIPHER_CCMP: - padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; - break; - case WPA_CIPHER_WEP104: - padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; - break; - } - - - - padapter->securitypriv.wps_phase = _FALSE; - {//set wps_ie - u16 cnt = 0; - u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; - uint wps_ielen=0; - u8 *pwps; - - pwps = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); - - //while( cnt < ielen ) - while( cnt < wps_ielen ) - { - //eid = buf[cnt]; - eid = pwps[cnt]; - - if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&pwps[cnt+2], wps_oui, 4)==_TRUE)) - { - DBG_8192C("SET WPS_IE\n"); - - padapter->securitypriv.wps_ie_len = ( (pwps[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (pwps[cnt+1]+2):(MAX_WPA_IE_LEN<<2); - - _rtw_memcpy(padapter->securitypriv.wps_ie, &pwps[cnt], padapter->securitypriv.wps_ie_len); - - if(pwpa==NULL && pwpa2==NULL) - { - padapter->securitypriv.wps_phase = _TRUE; - - DBG_8192C("SET WPS_IE, wps_phase==_TRUE\n"); - } -#ifdef CONFIG_P2P - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) - { - //rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); - } -#endif //CONFIG_P2P - - cnt += pwps[cnt+1]+2; - - break; - } else { - cnt += pwps[cnt+1]+2; //goto next - } - } - }//set wps_ie - - {//check p2p_ie for assoc req; - uint p2p_ielen=0; - u8 *p2p_ie; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - - if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) - { - #ifdef CONFIG_DEBUG_CFG80211 - printk("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); - #endif - - if(pmlmepriv->p2p_assoc_req_ie) - { - u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; - pmlmepriv->p2p_assoc_req_ie_len = 0; - rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); - pmlmepriv->p2p_assoc_req_ie = NULL; - } - - pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); - if ( pmlmepriv->p2p_assoc_req_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - goto exit; - - } - _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); - pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; - - } - } - - } - - - RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, - ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", - pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); - -exit: - - if (buf) rtw_mfree(buf, ielen); - - return ret; -} - -static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_connect_params *sme) -{ - int ret=0; - _irqL irqL; - _list *phead; - struct wlan_network *pnetwork = NULL; - NDIS_802_11_AUTHENTICATION_MODE authmode; - NDIS_802_11_SSID ndis_ssid; - u8 *dst_ssid, *src_ssid; - u8 *dst_bssid, *src_bssid; - //u8 matched_by_bssid=_FALSE; - //u8 matched_by_ssid=_FALSE; - u8 matched=_FALSE; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct security_priv *psecuritypriv = &padapter->securitypriv; - _queue *queue = &pmlmepriv->scanned_queue; - - printk("\n=>%s\n",__FUNCTION__); - - - printk("privacy=%d, key=%p, key_len=%d, key_idx=%d\n", sme->privacy, sme->key, sme->key_len, sme->key_idx); - - - if(wdev_to_priv(padapter->rtw_wdev)->block == _TRUE) - { - ret = -EBUSY; - DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); - goto exit; - } - - if(_FAIL == rtw_pwr_wakeup(padapter)) { - ret= -EPERM; - goto exit; - } - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { - ret = -EPERM; - goto exit; - } - - if (!sme->ssid || !sme->ssid_len) - { - ret = -EINVAL; - goto exit; - } - - if (sme->ssid_len > IW_ESSID_MAX_SIZE){ - - ret= -E2BIG; - goto exit; - } - - - _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); - ndis_ssid.SsidLength = sme->ssid_len; - _rtw_memcpy(ndis_ssid.Ssid, sme->ssid, sme->ssid_len); - - DBG_8192C("ssid=%s, len=%d\n", ndis_ssid.Ssid, sme->ssid_len); - - - if (sme->bssid) - printk("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); - - - if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) - { - ret = -EBUSY; - printk("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); - goto exit; - } - - - _enter_critical_bh(&queue->lock, &irqL); - - phead = get_list_head(queue); - pmlmepriv->pscanned = get_next(phead); - - while (1) - { - if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) - { - break; - } - - pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); - pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); - - dst_ssid = pnetwork->network.Ssid.Ssid; - dst_bssid = pnetwork->network.MacAddress; - - if(sme->bssid) { - if(_rtw_memcmp(pnetwork->network.MacAddress, sme->bssid, ETH_ALEN) == _FALSE) - continue; - } - - if(sme->ssid && sme->ssid_len) { - if( pnetwork->network.Ssid.SsidLength != sme->ssid_len - || _rtw_memcmp(pnetwork->network.Ssid.Ssid, sme->ssid, sme->ssid_len) == _FALSE - ) - continue; - } - - - if (sme->bssid) - { - src_bssid = sme->bssid; - - if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) - { - printk("matched by bssid\n"); - - ndis_ssid.SsidLength = pnetwork->network.Ssid.SsidLength; - _rtw_memcpy(ndis_ssid.Ssid, pnetwork->network.Ssid.Ssid, pnetwork->network.Ssid.SsidLength); - - matched=_TRUE; - break; - } - - } - else if (sme->ssid && sme->ssid_len) - { - src_ssid = ndis_ssid.Ssid; - - if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && - (pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength)) - { - printk("matched by ssid\n"); - matched=_TRUE; - break; - } - } - - } - - _exit_critical_bh(&queue->lock, &irqL); - - if((matched == _FALSE) || (pnetwork== NULL)) - { - ret = -EBUSY; - printk("connect, matched == _FALSE, goto exit\n"); - goto exit; - } - - - if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE) - { - ret = -EPERM; - goto exit; - } - - - psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; - psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; - psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system - psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; - - - ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); - if (ret < 0) - goto exit; - - ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); - if (ret < 0) - goto exit; - - - if (sme->crypto.n_ciphers_pairwise) { - ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); - if (ret < 0) - goto exit; - } - - //For WEP Shared auth - if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared - || psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto - ) - { - u32 wep_key_idx, wep_key_len,wep_total_len; - NDIS_802_11_WEP *pwep = NULL; - DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); - - wep_key_idx = sme->key_idx; - wep_key_len = sme->key_len; - - if (sme->key_idx > WEP_KEYS) { - ret = -EINVAL; - goto exit; - } - - if (wep_key_len > 0) - { - wep_key_len = wep_key_len <= 5 ? 5 : 13; - wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); - pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); - if(pwep == NULL){ - DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); - ret = -ENOMEM; - goto exit; - } - - _rtw_memset(pwep, 0, wep_total_len); - - pwep->KeyLength = wep_key_len; - pwep->Length = wep_total_len; - - if(wep_key_len==13) - { - padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; - padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; - } - } - else { - ret = -EINVAL; - goto exit; - } - - pwep->KeyIndex = wep_key_idx; - pwep->KeyIndex |= 0x80000000; - - _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); - - if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) - { - ret = -EOPNOTSUPP ; - } - - if (pwep) { - rtw_mfree((u8 *)pwep,wep_total_len); - } - - if(ret < 0) - goto exit; - } - - ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); - if (ret < 0) - return ret; - - if (sme->crypto.n_akm_suites) { - ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); - if (ret < 0) - goto exit; - } - - printk("%s, ie_len=%d\n", __func__, sme->ie_len); - - ret = rtw_cfg80211_set_wpa_ie(padapter, sme->ie, sme->ie_len); - if (ret < 0) - goto exit; - - authmode = psecuritypriv->ndisauthtype; - rtw_set_802_11_authentication_mode(padapter, authmode); - - //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); - - if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { - ret = -1; - goto exit; - } - - - printk("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); - -exit: - - DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); - - return ret; -} - -static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *dev, - u16 reason_code) -{ - _adapter *padapter = wiphy_to_adapter(wiphy); - - printk("\n%s\n", __func__); - - if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) - { - rtw_disassoc_cmd(padapter); - - DBG_871X("%s...call rtw_indicate_disconnect\n ", __FUNCTION__); - - rtw_indicate_disconnect(padapter); - - rtw_free_assoc_resources(padapter, 1); - } - - return 0; -} - -static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) - enum nl80211_tx_power_setting type, int mbm) -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) - enum tx_power_setting type, int dbm) -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) -{ -#if 0 - struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - int ret; - - switch (type) { - case NL80211_TX_POWER_AUTOMATIC: - return 0; - case NL80211_TX_POWER_FIXED: - if (mbm < 0 || (mbm % 100)) - return -EOPNOTSUPP; - - if (!test_bit(IWM_STATUS_READY, &iwm->status)) - return 0; - - ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, - CFG_TX_PWR_LIMIT_USR, - MBM_TO_DBM(mbm) * 2); - if (ret < 0) - return ret; - - return iwm_tx_power_trigger(iwm); - default: - IWM_ERR(iwm, "Unsupported power type: %d\n", type); - return -EOPNOTSUPP; - } -#endif - printk("%s\n", __func__); - return 0; -} - -static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, int *dbm) -{ - //_adapter *padapter = wiphy_to_adapter(wiphy); - - printk("%s\n", __func__); - - *dbm = (12); - - return 0; -} - -static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, - struct net_device *dev, - bool enabled, int timeout) -{ -#if 0 - struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - u32 power_index; - - if (enabled) - power_index = IWM_POWER_INDEX_DEFAULT; - else - power_index = IWM_POWER_INDEX_MIN; - - if (power_index == iwm->conf.power_index) - return 0; - - iwm->conf.power_index = power_index; - - return iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, - CFG_POWER_INDEX, iwm->conf.power_index); -#endif - - printk("%s\n", __func__); - - return 0; -} - -static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, - struct net_device *netdev, - struct cfg80211_pmksa *pmksa) -{ - //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - _adapter *padapter = wiphy_to_adapter(wiphy); - - printk("%s\n", __func__); - - //return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_ADD); - return 0; -} - -static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, - struct net_device *netdev, - struct cfg80211_pmksa *pmksa) -{ - //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - _adapter *padapter = wiphy_to_adapter(wiphy); - - printk("%s\n", __func__); - - //return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_DEL); - return 0; -} - -static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, - struct net_device *netdev) -{ - //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); - _adapter *padapter = wiphy_to_adapter(wiphy); - struct cfg80211_pmksa pmksa; - - printk("%s\n", __func__); - - memset(&pmksa, 0, sizeof(struct cfg80211_pmksa)); - - - //return iwm_send_pmkid_update(iwm, &pmksa, IWM_CMD_PMKID_FLUSH); - return 0; -} - -#ifdef CONFIG_AP_MODE -void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -{ - s32 freq; - int channel; - struct wireless_dev *pwdev = padapter->rtw_wdev; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - - printk("%s\n", __func__); - - channel = pmlmeext->cur_channel; - - if (channel <= RTW_CH_MAX_2G_CHANNEL) - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); - } - else - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); - } - - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) - cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -#else - //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() - pwdev->iftype = NL80211_IFTYPE_STATION; - cfg80211_send_rx_assoc(padapter->pnetdev, pmgmt_frame, frame_len); - pwdev->iftype = NL80211_IFTYPE_AP; - //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -#endif - -} - -void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) -{ - s32 freq; - int channel; - u8 *pmgmt_frame; - uint frame_len; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - u8 mgmt_buf[128] = {0}; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - - printk("%s\n", __func__); - - channel = pmlmeext->cur_channel; - - if (channel <= RTW_CH_MAX_2G_CHANNEL) - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); - } - else - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); - } - - - pmgmt_frame = mgmt_buf; - pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - //_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); - //_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; - SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); - - pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); - frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); - - reason = cpu_to_le16(reason); - pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) - cfg80211_rx_mgmt(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); -#else - cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); - //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); -#endif - -} - -static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) -{ - int ret = 0; - - printk("%s\n", __func__); - - return ret; -} - -static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) -{ - int ret = 0; - - printk("%s\n", __func__); - - return ret; -} - -static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) -{ - int ret = 0; - int rtap_len; - int qos_len = 0; - int dot11_hdr_len = 24; - int snap_len = 6; - unsigned char *pdata; - unsigned short frame_ctl; - unsigned char src_mac_addr[6]; - unsigned char dst_mac_addr[6]; - struct ieee80211_hdr *dot11_hdr; - struct ieee80211_radiotap_header *rtap_hdr; - _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); - - printk("%s\n", __func__); - - if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) - goto fail; - - rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; - if (unlikely(rtap_hdr->it_version)) - goto fail; - - rtap_len = ieee80211_get_radiotap_len(skb->data); - if (unlikely(skb->len < rtap_len)) - goto fail; - - if(rtap_len != 14) - { - printk("radiotap len (should be 14): %d\n", rtap_len); - goto fail; - } - - /* Skip the ratio tap header */ - skb_pull(skb, rtap_len); - - dot11_hdr = (struct ieee80211_hdr *)skb->data; - frame_ctl = le16_to_cpu(dot11_hdr->frame_control); - /* Check if the QoS bit is set */ - if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) { - /* Check if this ia a Wireless Distribution System (WDS) frame - * which has 4 MAC addresses - */ - if (dot11_hdr->frame_control & 0x0080) - qos_len = 2; - if ((dot11_hdr->frame_control & 0x0300) == 0x0300) - dot11_hdr_len += 6; - - memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); - memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); - - /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for - * for two MAC addresses - */ - skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); - pdata = (unsigned char*)skb->data; - memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); - memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); - - printk("should be eapol packet\n"); - - /* Use the real net device to transmit the packet */ - ret = rtw_xmit_entry(skb, padapter->pnetdev); - - return ret; - - } - else if((frame_ctl & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)) == cpu_to_le16(IEEE80211_STYPE_ACTION)) - { - //only for action frames - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - //u8 category, action, OUI_Subtype, dialogToken=0; - //unsigned char *frame_body; - struct rtw_ieee80211_hdr *pwlanhdr; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - u8 *buf = skb->data; - u32 len = skb->len; - - if(rtw_p2p_check_frames(padapter, buf, len, _TRUE) < 0) - { - goto fail; - } - -/* - frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); - category = frame_body[0]; - //just for check - if(category == RTW_WLAN_CATEGORY_PUBLIC) - { - action = frame_body[ 1 ]; - OUI_Subtype = frame_body[ 6 ]; - dialogToken = frame_body[7]; - - if ( action == ACT_PUBLIC_P2P ) - { - printk("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); - } - else - { - printk("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); - } - - } - else if(category == RTW_WLAN_CATEGORY_P2P) - { - OUI_Subtype = frame_body[5]; - dialogToken = frame_body[6]; - - printk("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); - - } - else - { - printk("%s, action frame category=%d, drop!\n", __func__, category); - goto fail; - } -*/ - - //starting alloc mgmt frame to dump it - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - goto fail; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - pattrib->retry_ctrl = _FALSE; - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - - _rtw_memcpy(pframe, (void*)buf, len); - pattrib->pktlen = len; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - //update seq number - pmlmeext->mgnt_seq = GetSequence(pwlanhdr); - pattrib->seqnum = pmlmeext->mgnt_seq; - pmlmeext->mgnt_seq++; - - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(padapter, pmgntframe); - - - } - else - { - printk("frame_ctl=0x%x\n", frame_ctl & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)); - } - - -fail: - - dev_kfree_skb(skb); - - return 0; - -} - -static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) -{ - printk("%s\n", __func__); -} - -static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) -{ - int ret = 0; - - printk("%s\n", __func__); - - return ret; -} - -#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) -static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { - .ndo_open = rtw_cfg80211_monitor_if_open, - .ndo_stop = rtw_cfg80211_monitor_if_close, - .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, - .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, - .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, -}; -#endif - -static struct net_device *rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name) -{ - int ret = 0; - struct net_device* ndev = NULL; - struct rtw_netdev_priv_indicator *pnpi; - struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); - - printk("%s\n", __func__); - - if (!name ) { - ret = -EINVAL; - goto out; - } - - if((strnicmp(name, pwdev_priv->ifname_mon, strlen(name)) ==0) - && pwdev_priv->pmon_ndev) - { - ndev = pwdev_priv->pmon_ndev; - - printk("%s, monitor interface(%s) has existed\n", __func__, name); - - goto out; - } - - - ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); - if (!ndev) { - ret = -ENOMEM; - goto out; - } - - ndev->type = ARPHRD_IEEE80211_RADIOTAP; - strncpy(ndev->name, name, IFNAMSIZ); - ndev->name[IFNAMSIZ - 1] = 0; - -#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) - ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; -#else - ndev->open = rtw_cfg80211_monitor_if_open; - ndev->stop = rtw_cfg80211_monitor_if_close; - ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; - ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; -#endif - - pnpi = netdev_priv(ndev); - pnpi->priv = padapter; - pnpi->sizeof_priv = sizeof(_adapter); - - ret = register_netdevice(ndev); - if (ret) { - goto out; - } - - pwdev_priv->pmon_ndev = ndev; - _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); - -out: - if (ret && ndev) - { - free_netdev(ndev); - ndev = NULL; - } - - - printk("%s, ndev=%p, pmon_ndev=%p, ret=%d\n", __func__, ndev, pwdev_priv->pmon_ndev, ret); - - return ndev; -} - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) -static struct net_device * cfg80211_rtw_add_virtual_intf(struct wiphy *wiphy, char *name, -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) -static int cfg80211_rtw_add_virtual_intf(struct wiphy *wiphy, char *name, -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - enum nl80211_iftype type, u32 *flags, - struct vif_params *params) -{ - struct net_device* ndev = NULL; - _adapter *padapter = wiphy_to_adapter(wiphy); - - printk("%s, ifname=%s, type=%d\n", __func__, name, type); - - - switch (type) { - case NL80211_IFTYPE_ADHOC: - case NL80211_IFTYPE_AP_VLAN: - case NL80211_IFTYPE_WDS: - case NL80211_IFTYPE_MESH_POINT: - - break; - case NL80211_IFTYPE_MONITOR: - ndev = rtw_cfg80211_add_monitor_if(padapter, name); - break; - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - case NL80211_IFTYPE_P2P_CLIENT: -#endif - case NL80211_IFTYPE_STATION: - - break; - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - case NL80211_IFTYPE_P2P_GO: -#endif - case NL80211_IFTYPE_AP: - - break; - default: - printk("Unsupported interface type\n"); - break; - } - - printk("ndev=%p\n", ndev); - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - return ndev; -#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - return 0; -#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - -} - -static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, struct net_device *dev) -{ - _adapter *padapter = wiphy_to_adapter(wiphy); - struct rtw_wdev_priv *pwdev_priv = (struct rtw_wdev_priv *)wiphy_priv(wiphy); - - printk("%s\n", __func__); - - if(dev) - { - unregister_netdev(dev); - - free_netdev(dev); - - if(dev == pwdev_priv->pmon_ndev) - { - printk("remove monitor interface\n"); - pwdev_priv->pmon_ndev = NULL; - pwdev_priv->ifname_mon[0] = '\0'; - } - } - - return 0; -} - -static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *dev, - struct beacon_parameters *info) -{ - int ret=0; - u8 *pbuf = NULL; - uint len, wps_ielen=0; - uint p2p_ielen=0; - u8 *p2p_ie; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - //struct sta_priv *pstapriv = &padapter->stapriv; - - - printk("%s, beacon_head_len=%d, beacon_tail_len=%d\n", __FUNCTION__, info->head_len, info->tail_len); - - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) - return -EINVAL; - - if(info->head_len<24) - return -EINVAL; - - - pbuf = rtw_zmalloc(info->head_len+info->tail_len); - if(!pbuf) - return -ENOMEM; - - - //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); - - //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) - // pstapriv->max_num_sta = NUM_STA; - - - _rtw_memcpy(pbuf, info->head+24, info->head_len-24);// 24=beacon header len. - _rtw_memcpy(pbuf+info->head_len-24, info->tail, info->tail_len); - - len = info->head_len+info->tail_len-24; - - //check wps ie if inclued - if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) - printk("add bcn, wps_ielen=%d\n", wps_ielen); - - - //check p2p ie if inclued - if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) - printk("got p2p_ie, len=%d\n", p2p_ielen); - - - - // pbss_network->IEs will not include p2p_ie - if(rtw_check_beacon_data(padapter, pbuf, len-p2p_ielen) == _SUCCESS) - //if(rtw_check_beacon_data(padapter, pbuf, len) == _SUCCESS) - { -#ifdef CONFIG_P2P - //check p2p if enable - if((p2p_ie=rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen))) - { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct wifidirect_info *pwdinfo= &(padapter->wdinfo); - - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - printk("Enable P2P function for the first time\n"); - rtw_p2p_enable(padapter, P2P_ROLE_GO); - wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; - } - else - { - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - - printk("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); - - rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); - rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); - pwdinfo->intent = 15; - } - - pwdinfo->operating_channel = pmlmeext->cur_channel; - - } -#endif //CONFIG_P2P - - ret = 0; - - } - else - { - ret = -EINVAL; - } - - - rtw_mfree(pbuf, info->head_len+info->tail_len); - - return ret; - -} - -static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *dev, - struct beacon_parameters *info) -{ - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - - printk("%s\n", __func__); - - pmlmeext->bstart_bss = _TRUE; - - cfg80211_rtw_add_beacon(wiphy, dev, info); - - return 0; -} - -static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *dev) -{ - printk("%s\n", __func__); - - return 0; -} - - -static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *dev, - u8 *mac, struct station_parameters *params) -{ - printk("%s\n", __func__); - - return 0; -} - -static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *dev, - u8 *mac) -{ - int ret=0; - _irqL irqL; - _list *phead, *plist; - struct sta_info *psta = NULL; - _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct sta_priv *pstapriv = &padapter->stapriv; - - printk("+%s\n", __func__); - - if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) - { - printk("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); - return -EINVAL; - } - - - if(!mac) - { - printk("flush all sta, and cam_entry\n"); - - flush_all_cam_entry(padapter); //clear CAM - - ret = rtw_sta_flush(padapter); - - return ret; - } - - - printk("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac)); - - if (mac[0] == 0xff && mac[1] == 0xff && - mac[2] == 0xff && mac[3] == 0xff && - mac[4] == 0xff && mac[5] == 0xff) - { - return -EINVAL; - } - - - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - phead = &pstapriv->asoc_list; - plist = get_next(phead); - - //check asoc_queue - while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) - { - psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); - - plist = get_next(plist); - - if(_rtw_memcmp(mac, psta->hwaddr, ETH_ALEN)) - { - if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) - { - DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); - } - else - { - DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); - - rtw_list_delete(&psta->asoc_list); - - //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - ap_free_sta(padapter, psta); - //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - psta = NULL; - - break; - } - - } - - } - - _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - -#if 0 - psta = rtw_get_stainfo(pstapriv, mac); - if(psta) - { - //DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); - - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); - if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) - { - rtw_list_delete(&psta->asoc_list); - ap_free_sta(padapter, psta); - - psta = NULL; - - } - _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); - - } - else - { - DBG_8192C("cfg80211_rtw_del_station(), sta has already been removed or never been added\n"); - - //ret = -1; - } -#endif - - printk("-%s\n", __func__); - - return ret; - -} - -static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *dev, - u8 *mac, struct station_parameters *params) -{ - printk("%s\n", __func__); - - return 0; -} - -static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *dev, - int idx, u8 *mac, struct station_info *sinfo) -{ - printk("%s\n", __func__); - - return 0; -} - -static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *dev, - struct bss_parameters *params) -{ - u8 i; - - printk("%s\n", __func__); -/* - printk("use_cts_prot=%d\n", params->use_cts_prot); - printk("use_short_preamble=%d\n", params->use_short_preamble); - printk("use_short_slot_time=%d\n", params->use_short_slot_time); - printk("ap_isolate=%d\n", params->ap_isolate); - - printk("basic_rates_len=%d\n", params->basic_rates_len); - for(i=0; ibasic_rates_len; i++) - { - printk("basic_rates=%d\n", params->basic_rates[i]); - - } -*/ - return 0; - -} - -static int cfg80211_rtw_set_channel(struct wiphy *wiphy, struct net_device *dev, - struct ieee80211_channel *chan, - enum nl80211_channel_type channel_type) -{ - printk("%s\n", __func__); - - return 0; -} - -static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_auth_request *req) -{ - printk("%s\n", __func__); - - return 0; -} - -static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_assoc_request *req) -{ - printk("%s\n", __func__); - - return 0; -} -#endif //CONFIG_AP_MODE - -void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -{ - s32 freq; - int channel; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s\n", __func__); -#endif - - rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); - - channel = pmlmeext->cur_channel; - - if (channel <= RTW_CH_MAX_2G_CHANNEL) - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); - } - else - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); - } - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -#else - cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -#endif - -} - -void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) -{ - s32 freq; - int channel; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s\n", __func__); -#endif - - rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); - - channel = pmlmeext->cur_channel; - - if (channel <= RTW_CH_MAX_2G_CHANNEL) - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); - } - else - { - freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); - } - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -#else - cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); -#endif - -} - -void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) -{ - u16 wps_devicepassword_id = 0x0000; - uint wps_devicepassword_id_len = 0; - u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; - uint p2p_ielen = 0; - uint wpsielen = 0; - u32 devinfo_contentlen = 0; - u8 devinfo_content[64] = { 0x00 }; - u16 capability = 0; - uint capability_len = 0; - - unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; - u8 action = P2P_PUB_ACTION_ACTION; - u8 dialogToken = 1; - u32 p2poui = cpu_to_be32(P2POUI); - u8 oui_subtype = P2P_PROVISION_DISC_REQ; - u32 p2pielen = 0; -#ifdef CONFIG_WFD - u32 wfdielen = 0; -#endif //CONFIG_WFD - - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - struct rtw_ieee80211_hdr *pwlanhdr; - unsigned short *fctrl; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); - size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); - - - DBG_871X( "[%s] In\n", __FUNCTION__ ); - - //prepare for building provision_request frame - _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); - _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); - - pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; - - rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); - rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); - wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); - - switch(wps_devicepassword_id) - { - case WPS_DPID_PIN: - pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; - break; - case WPS_DPID_USER_SPEC: - pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; - break; - case WPS_DPID_MACHINE_SPEC: - break; - case WPS_DPID_REKEY: - break; - case WPS_DPID_PBC: - pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; - break; - case WPS_DPID_REGISTRAR_SPEC: - pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; - break; - default: - break; - } - - - if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) - { - - rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); - rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); - - } - - - //start to build provision_request frame - _rtw_memset(wpsie, 0, sizeof(wpsie)); - _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); - p2p_ielen = 0; - - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - return; - } - - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerIFAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerIFAddr, ETH_ALEN); - - SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); - pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_ACTION); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); - - - //build_prov_disc_request_p2p_ie - // P2P OUI - p2pielen = 0; - p2p_ie[ p2pielen++ ] = 0x50; - p2p_ie[ p2pielen++ ] = 0x6F; - p2p_ie[ p2pielen++ ] = 0x9A; - p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 - - // Commented by Albert 20110301 - // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes - // 1. P2P Capability - // 2. Device Info - // 3. Group ID ( When joining an operating P2P Group ) - - // P2P Capability ATTR - // Type: - p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; - - // Length: - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); - RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); - p2pielen += 2; - - // Value: - // Device Capability Bitmap, 1 byte - // Be able to participate in additional P2P Groups and - // support the P2P Invitation Procedure - _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); - p2pielen += 2; - - - // Device Info ATTR - // Type: - p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; - - // Length: - // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) - // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) - //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); - RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); - p2pielen += 2; - - // Value: - _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); - p2pielen += devinfo_contentlen; - - - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); - //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); - //pframe += p2pielen; - pattrib->pktlen += p2p_ielen; - - wpsielen = 0; - // WPS OUI - *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); - wpsielen += 4; - - // WPS version - // Type: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); - wpsielen += 2; - - // Length: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); - wpsielen += 2; - - // Value: - wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 - - // Config Method - // Type: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); - wpsielen += 2; - - // Length: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); - wpsielen += 2; - - // Value: - *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); - wpsielen += 2; - - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); - - -#ifdef CONFIG_WFD - wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); - pframe += wfdielen; - pattrib->pktlen += wfdielen; -#endif //CONFIG_WFD - - pattrib->last_txcmdsz = pattrib->pktlen; - - dump_mgntframe(padapter, pmgntframe); - - //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) - //{ - // printk("waiting for p2p peer key-in PIN CODE\n"); - // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. - //} - -} - -static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct net_device *dev, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - struct ieee80211_channel *chan, bool offchan, - enum nl80211_channel_type channel_type, - bool channel_type_valid, unsigned int wait, -#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - struct ieee80211_channel *chan, - enum nl80211_channel_type channel_type, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - bool channel_type_valid, -#endif -#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - const u8 *buf, size_t len, u64 *cookie) -{ - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; - const struct ieee80211_mgmt *mgmt; - //u8 category, action, OUI_Subtype, dialogToken=0; - //unsigned char *frame_body; - int ret = 0; - int type = (-1); - u16 fc; - bool ack = _TRUE; - struct rtw_ieee80211_hdr *pwlanhdr; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - - - /* cookie generation */ - *cookie = (unsigned long) buf; - - - printk("%s, len=%d, ch=%d, ch_type=%d\n", __func__, len, - ieee80211_frequency_to_channel(chan->center_freq), channel_type); - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - printk("channel_type_valid=%d\n", channel_type_valid); -#endif - - mgmt = (const struct ieee80211_mgmt *) buf; - fc = mgmt->frame_control; - if (fc != IEEE80211_STYPE_ACTION) - { - if (fc == IEEE80211_STYPE_PROBE_RESP) - { - printk("%s, fc == IEEE80211_STYPE_PROBE_RESP\n", __func__); - } - else - { - printk("%s, frame_control == 0x%x\n", __func__, fc); - } - - //cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); - - goto exit; - - } - else - { - u32 cnt=0; - u32 wait_for_surveydone; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, do: scan_abort\n", __func__); -#endif - - /* Abort the dwell time of any previous off-channel action frame that may - * be still in effect. Sending off-channel action frames relies on the - * driver's scan engine. If a previous off-channel action frame tx is - * still in progress (including the dwell time), then this new action - * frame will not be sent out. - */ - - rtw_cfg80211_scan_abort(padapter); - } -#if 0 - if (wl->p2p->vif_created) { - wifi_p2p_pub_act_frame_t *act_frm = - (wifi_p2p_pub_act_frame_t *) (action_frame->data); - WL_DBG(("action_frame->len: %d chan %d category %d subtype %d\n", - action_frame->len, af_params->channel, - act_frm->category, act_frm->subtype)); - /* - * To make sure to send successfully action frame, we have to turn off mpc - */ - if ((act_frm->subtype == P2P_PAF_GON_REQ)|| - (act_frm->subtype == P2P_PAF_GON_RSP)) { - wldev_iovar_setint(dev, "mpc", 0); - } else if (act_frm->subtype == P2P_PAF_GON_CONF) { - wldev_iovar_setint(dev, "mpc", 1); - } else if (act_frm->subtype == P2P_PAF_DEVDIS_REQ) { - af_params->dwell_time = WL_LONG_DWELL_TIME; - } - } -#endif - -/* - frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); - category = frame_body[0]; - //just for check - if(category == RTW_WLAN_CATEGORY_PUBLIC) - { - action = frame_body[ 1 ]; - OUI_Subtype = frame_body[ 6 ]; - dialogToken = frame_body[7]; - - if ( action == ACT_PUBLIC_P2P ) - { - printk("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); - } - else - { - printk("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); - } - - } - else if(category == RTW_WLAN_CATEGORY_P2P) - { - OUI_Subtype = frame_body[5]; - dialogToken = frame_body[6]; - - printk("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", - cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); - - } - else - { - printk("%s, action frame category=%d\n", __func__, category); - ack = _FALSE; - goto exit; - } -*/ - - if( ieee80211_frequency_to_channel(chan->center_freq) != pmlmeext->cur_channel ) - { - pmlmeext->cur_channel = ieee80211_frequency_to_channel(chan->center_freq); - set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - } - - - if( (type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) < 0) - { - ack = _FALSE; - goto exit; - } - - - //if(type == P2P_GO_NEGO_REQ) - //{ - // rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); - //} - - - //starting alloc mgmt frame to dump it - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) - { - ack = _FALSE; - ret = -ENOMEM; - goto exit; - } - - //update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - pattrib->retry_ctrl = _FALSE; - - _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); - - pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - - _rtw_memcpy(pframe, (void*)buf, len); - pattrib->pktlen = len; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - //update seq number - pmlmeext->mgnt_seq = GetSequence(pwlanhdr); - pattrib->seqnum = pmlmeext->mgnt_seq; - pmlmeext->mgnt_seq++; - - - pattrib->last_txcmdsz = pattrib->pktlen; - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, ack=%d, ok!\n", __func__, ack ); -#endif - - //indicate ack before issue frame to avoid racing with rsp frame -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); -#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) - cfg80211_action_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); -#endif - - dump_mgntframe(padapter, pmgntframe); - - return ret; - -exit: - - printk("%s, ack=%d \n", __func__, ack ); - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); -#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) - cfg80211_action_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); -#endif - - return ret; - -} - -static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, struct net_device *dev, - struct ieee80211_channel * channel, - enum nl80211_channel_type channel_type, - unsigned int duration, u64 *cookie) -{ - s32 err = 0; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; - u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); - - printk("%s channel %02u duration %d\n", __func__, remain_ch, duration); - - if(_FAIL == rtw_pwr_wakeup(padapter)) { - err = -EFAULT; - goto exit; - } - - pcfg80211_wdinfo->remain_on_ch_dev = dev; - _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); - pcfg80211_wdinfo->remain_on_ch_type= channel_type; - pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; - cfg80211_ready_on_channel(dev, *cookie, channel, channel_type, duration, GFP_KERNEL); - - pcfg80211_wdinfo->restore_channel = pmlmeext->cur_channel; - - if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY)) - rtw_cfg80211_scan_abort(padapter); - - if( remain_ch != pmlmeext->cur_channel ) - { - if(rtw_is_channel_set_contains_channel(pmlmeext->channel_set, remain_ch)) { - pmlmeext->cur_channel = remain_ch; - set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); - } else { - DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); - } - } - - //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); - wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; - } - else - { - rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -#endif - } - - rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); - pwdinfo->listen_channel = pmlmeext->cur_channel; - - //call this after other things have been done - _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); - -exit: - return err; -} - -static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, struct net_device *dev, - u64 cookie) -{ - s32 err = 0; - _adapter *padapter = wiphy_to_adapter(wiphy); - struct wifidirect_info *pwdinfo = &padapter->wdinfo; - struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - - printk("%s\n", __func__); - - //Modified bu Kurt 20120114 - _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); - - #if 0 - // Disable P2P Listen State - if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) - { - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) - { - _cancel_timer_ex( &pwdinfo->find_phase_timer ); - _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); - _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); - - rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); - _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); - - if(pwrpriv->bips_processing == _FALSE){ - rtw_set_pwr_state_check_timer(pwrpriv); - } - } - } - else - #endif - { - rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); -#endif - } - - return err; -} - -static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, struct net_device *dev, - u16 frame_type, bool reg) -{ - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s: frame_type: %x, reg: %d\n", __func__, frame_type, reg); -#endif - - if (frame_type != (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ)) - return; - - return; -} - -static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *net, char *buf, int len) -{ - int ret = 0; - uint wps_ielen = 0; - u8 *wps_ie; - u32 p2p_ielen = 0; - u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; - u8 *p2p_ie; - _adapter *padapter = (_adapter *)rtw_netdev_priv(net); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - - printk("%s, ielen=%d\n", __func__, len); - - if(len>0) - { - if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) - { - #ifdef CONFIG_DEBUG_CFG80211 - printk("bcn_wps_ielen=%d\n", wps_ielen); - #endif - - if(pmlmepriv->wps_beacon_ie) - { - u32 free_len = pmlmepriv->wps_beacon_ie_len; - pmlmepriv->wps_beacon_ie_len = 0; - rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); - pmlmepriv->wps_beacon_ie = NULL; - } - - pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); - if ( pmlmepriv->wps_beacon_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - - _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); - pmlmepriv->wps_beacon_ie_len = wps_ielen; - - update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); - - } - - buf += wps_ielen; - len -= wps_ielen; - - if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) - { - #ifdef CONFIG_DEBUG_CFG80211 - printk("bcn_p2p_ielen=%d\n", p2p_ielen); - #endif - - if(pmlmepriv->p2p_beacon_ie) - { - u32 free_len = pmlmepriv->p2p_beacon_ie_len; - pmlmepriv->p2p_beacon_ie_len = 0; - rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); - pmlmepriv->p2p_beacon_ie = NULL; - } - - pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); - if ( pmlmepriv->p2p_beacon_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - - _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); - pmlmepriv->p2p_beacon_ie_len = p2p_ielen; - - } - - pmlmeext->bstart_bss = _TRUE; - - } - - return ret; - -} - -static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) -{ - int ret = 0; - uint wps_ielen = 0; - u8 *wps_ie; - u32 p2p_ielen = 0; - u8 *p2p_ie; - _adapter *padapter = (_adapter *)rtw_netdev_priv(net); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, ielen=%d\n", __func__, len); -#endif - - if(len>0) - { - if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) - { - uint attr_contentlen = 0; - u16 uconfig_method, *puconfig_method = NULL; - - #ifdef CONFIG_DEBUG_CFG80211 - printk("probe_resp_wps_ielen=%d\n", wps_ielen); - #endif - - if(pmlmepriv->wps_probe_resp_ie) - { - u32 free_len = pmlmepriv->wps_probe_resp_ie_len; - pmlmepriv->wps_probe_resp_ie_len = 0; - rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); - pmlmepriv->wps_probe_resp_ie = NULL; - } - - pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); - if ( pmlmepriv->wps_probe_resp_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - - //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode - if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) - { - #ifdef CONFIG_DEBUG_CFG80211 - //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); - #endif - - uconfig_method = WPS_CM_PUSH_BUTTON; - uconfig_method = cpu_to_be16( uconfig_method ); - - *puconfig_method |= uconfig_method; - } - - _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); - pmlmepriv->wps_probe_resp_ie_len = wps_ielen; - - } - - buf += wps_ielen; - len -= wps_ielen; - - if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) - { - u8 is_GO = _FALSE; - u32 attr_contentlen = 0; - u16 cap_attr=0; - - #ifdef CONFIG_DEBUG_CFG80211 - printk("probe_resp_p2p_ielen=%d\n", p2p_ielen); - #endif - - //Check P2P Capability ATTR - if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) - { - u8 grp_cap=0; - //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); - cap_attr = le16_to_cpu(cap_attr); - grp_cap = (u8)((cap_attr >> 8)&0xff); - - is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; - - if(is_GO) - printk("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); - } - - - if(is_GO == _FALSE) - { - if(pmlmepriv->p2p_probe_resp_ie) - { - u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; - pmlmepriv->p2p_probe_resp_ie_len = 0; - rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); - pmlmepriv->p2p_probe_resp_ie = NULL; - } - - pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); - if ( pmlmepriv->p2p_probe_resp_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); - pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; - } - else - { - if(pmlmepriv->p2p_go_probe_resp_ie) - { - u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; - pmlmepriv->p2p_go_probe_resp_ie_len = 0; - rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); - pmlmepriv->p2p_go_probe_resp_ie = NULL; - } - - pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); - if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); - pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; - } - - } - - } - - return ret; - -} - -static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) -{ - int ret = 0; - _adapter *padapter = (_adapter *)rtw_netdev_priv(net); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - - printk("%s, ielen=%d\n", __func__, len); - - if(len>0) - { - if(pmlmepriv->wps_assoc_resp_ie) - { - u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; - pmlmepriv->wps_assoc_resp_ie_len = 0; - rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); - pmlmepriv->wps_assoc_resp_ie = NULL; - } - - pmlmepriv->wps_assoc_resp_ie = rtw_malloc(len); - if ( pmlmepriv->wps_assoc_resp_ie == NULL) { - printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); - return -EINVAL; - - } - _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, buf, len); - pmlmepriv->wps_assoc_resp_ie_len = len; - } - - return ret; - -} - -int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, - int type) -{ - int ret = 0; - uint wps_ielen = 0; - u32 p2p_ielen = 0; - -#ifdef CONFIG_DEBUG_CFG80211 - printk("%s, ielen=%d\n", __func__, len); -#endif - - if((rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) || - (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) ) - { - if (net != NULL) - { - switch (type) - { - case 0x1: //BEACON - ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); - break; - case 0x2: //PROBE_RESP - ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); - break; - case 0x4: //ASSOC_RESP - ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); - break; - } - } - } - - return ret; - -} - -static struct cfg80211_ops rtw_cfg80211_ops = { - .change_virtual_intf = cfg80211_rtw_change_iface, - .add_key = cfg80211_rtw_add_key, - .get_key = cfg80211_rtw_get_key, - .del_key = cfg80211_rtw_del_key, - .set_default_key = cfg80211_rtw_set_default_key, - .get_station = cfg80211_rtw_get_station, - .scan = cfg80211_rtw_scan, - .set_wiphy_params = cfg80211_rtw_set_wiphy_params, - .connect = cfg80211_rtw_connect, - .disconnect = cfg80211_rtw_disconnect, - .join_ibss = cfg80211_rtw_join_ibss, - .leave_ibss = cfg80211_rtw_leave_ibss, - .set_tx_power = cfg80211_rtw_set_txpower, - .get_tx_power = cfg80211_rtw_get_txpower, - .set_power_mgmt = cfg80211_rtw_set_power_mgmt, - .set_pmksa = cfg80211_rtw_set_pmksa, - .del_pmksa = cfg80211_rtw_del_pmksa, - .flush_pmksa = cfg80211_rtw_flush_pmksa, -#ifdef CONFIG_AP_MODE - .add_virtual_intf = cfg80211_rtw_add_virtual_intf, - .del_virtual_intf = cfg80211_rtw_del_virtual_intf, - .add_beacon = cfg80211_rtw_add_beacon, - .set_beacon = cfg80211_rtw_set_beacon, - .del_beacon = cfg80211_rtw_del_beacon, - .add_station = cfg80211_rtw_add_station, - .del_station = cfg80211_rtw_del_station, - .change_station = cfg80211_rtw_change_station, - .dump_station = cfg80211_rtw_dump_station, - .change_bss = cfg80211_rtw_change_bss, - .set_channel = cfg80211_rtw_set_channel, - //.auth = cfg80211_rtw_auth, - //.assoc = cfg80211_rtw_assoc, -#endif //CONFIG_AP_MODE - .remain_on_channel = cfg80211_rtw_remain_on_channel, - .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - .mgmt_tx = cfg80211_rtw_mgmt_tx, - .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) - .action = cfg80211_rtw_mgmt_tx, -#endif -}; - -static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) -{ - -#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ -#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ - - ht_cap->ht_supported = _TRUE; - - ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | - IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | - IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; - - /* - *Maximum length of AMPDU that the STA can receive. - *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) - */ - ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; - - /*Minimum MPDU start spacing , */ - ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; - - ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; - - /* - *hw->wiphy->bands[IEEE80211_BAND_2GHZ] - *base on ant_num - *rx_mask: RX mask - *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 - *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 - *if rx_ant >=3 rx_mask[2]=0xff; - *if BW_40 rx_mask[4]=0x01; - *highest supported RX rate - */ - if(rf_type == RF_1T1R) - { - ht_cap->mcs.rx_mask[0] = 0xFF; - ht_cap->mcs.rx_mask[1] = 0x00; - ht_cap->mcs.rx_mask[4] = 0x01; - - ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; - } - else if((rf_type == RF_1T2R) || (rf_type==RF_2T2R)) - { - ht_cap->mcs.rx_mask[0] = 0xFF; - ht_cap->mcs.rx_mask[1] = 0xFF; - ht_cap->mcs.rx_mask[4] = 0x01; - - ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; - } - else - { - printk("%s, error rf_type=%d\n", __func__, rf_type); - } - -} - -void rtw_cfg80211_init_wiphy(_adapter *padapter) -{ - u8 rf_type; - struct ieee80211_supported_band *bands; - struct wireless_dev *pwdev = padapter->rtw_wdev; - struct wiphy *wiphy = pwdev->wiphy; - - padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - - printk("%s:rf_type=%d\n", __func__, rf_type); - - bands = wiphy->bands[IEEE80211_BAND_2GHZ]; - rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); - - - bands = wiphy->bands[IEEE80211_BAND_5GHZ]; - rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); -} - -static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) -{ - - wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; - - wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; - wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; - wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) - wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; -#endif - - wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | - BIT(NL80211_IFTYPE_ADHOC) -#ifdef CONFIG_AP_MODE - | BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_MONITOR) -#endif -#if defined(CONFIG_P2P) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) - | BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO) -#endif - ; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) -#ifdef CONFIG_AP_MODE - wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; -#endif //CONFIG_AP_MODE -#endif - - wiphy->cipher_suites = rtw_cipher_suites; - wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); - - - wiphy->bands[IEEE80211_BAND_2GHZ] = &rtw_band_2ghz; - wiphy->bands[IEEE80211_BAND_5GHZ] = &rtw_band_5ghz; - -} - -int rtw_wdev_alloc(_adapter *padapter, struct device *dev) -{ - int ret = 0; - struct wireless_dev *wdev; - struct rtw_wdev_priv *pwdev_priv; - struct net_device *pnetdev = padapter->pnetdev; - - printk("%s\n", __func__); - - wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); - if (!wdev) { - printk("Couldn't allocate wireless device\n"); - return (-ENOMEM); - } - - wdev->wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(struct rtw_wdev_priv)); - if (!wdev->wiphy) { - printk("Couldn't allocate wiphy device\n"); - ret = -ENOMEM; - goto out_err_new; - } - - set_wiphy_dev(wdev->wiphy, dev); - - // - padapter->rtw_wdev = wdev; - pnetdev->ieee80211_ptr = wdev; - - //init pwdev_priv - pwdev_priv = wdev_to_priv(wdev); - pwdev_priv->pmon_ndev = NULL; - pwdev_priv->ifname_mon[0] = '\0'; - pwdev_priv->rtw_wdev = wdev; - pwdev_priv->padapter = padapter; - pwdev_priv->scan_request = NULL; - _rtw_spinlock_init(&pwdev_priv->scan_req_lock); - - pwdev_priv->p2p_enabled = _FALSE; - pwdev_priv->provdisc_req_issued = _FALSE; - - wdev->netdev = pnetdev; - wdev->iftype = NL80211_IFTYPE_MONITOR; - - rtw_cfg80211_preinit_wiphy(padapter, wdev->wiphy); - - ret = wiphy_register(wdev->wiphy); - if (ret < 0) { - printk("Couldn't register wiphy device\n"); - goto out_err_register; - } - - SET_NETDEV_DEV(pnetdev, wiphy_dev(wdev->wiphy)); - - return ret; - - out_err_register: - wiphy_free(wdev->wiphy); - - out_err_new: - rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); - - return ret; - -} - -void rtw_wdev_free(struct wireless_dev *wdev) -{ - struct rtw_wdev_priv *pwdev_priv; - - printk("%s\n", __func__); - - if (!wdev) - return; - - pwdev_priv = wdev_to_priv(wdev); - - printk("%s, scan abort when device remove\n", __func__); - rtw_cfg80211_indicate_scan_done(pwdev_priv, _TRUE); - - if(pwdev_priv->pmon_ndev) - { - printk("%s, unregister monitor interface\n", __func__); - - unregister_netdev(pwdev_priv->pmon_ndev); - - free_netdev(pwdev_priv->pmon_ndev); - } - - - wiphy_unregister(wdev->wiphy); - wiphy_free(wdev->wiphy); - - rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); -} - -#endif //CONFIG_IOCTL_CFG80211 - +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _IOCTL_CFG80211_C_ + +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_IOCTL_CFG80211 + +#include "ioctl_cfg80211.h" + +#define RTW_SCAN_IE_LEN_MAX 2304 +#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 65535 //ms +#define RTW_MAX_NUM_PMKIDS 4 + +#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ + +static const u32 rtw_cipher_suites[] = { + WLAN_CIPHER_SUITE_WEP40, + WLAN_CIPHER_SUITE_WEP104, + WLAN_CIPHER_SUITE_TKIP, + WLAN_CIPHER_SUITE_CCMP, +}; + +#define RATETAB_ENT(_rate, _rateid, _flags) \ + { \ + .bitrate = (_rate), \ + .hw_value = (_rateid), \ + .flags = (_flags), \ + } + +#define CHAN2G(_channel, _freq, _flags) { \ + .band = IEEE80211_BAND_2GHZ, \ + .center_freq = (_freq), \ + .hw_value = (_channel), \ + .flags = (_flags), \ + .max_antenna_gain = 0, \ + .max_power = 30, \ +} + +#define CHAN5G(_channel, _flags) { \ + .band = IEEE80211_BAND_5GHZ, \ + .center_freq = 5000 + (5 * (_channel)), \ + .hw_value = (_channel), \ + .flags = (_flags), \ + .max_antenna_gain = 0, \ + .max_power = 30, \ +} + +static struct ieee80211_rate rtw_rates[] = { + RATETAB_ENT(10, 0x1, 0), + RATETAB_ENT(20, 0x2, 0), + RATETAB_ENT(55, 0x4, 0), + RATETAB_ENT(110, 0x8, 0), + RATETAB_ENT(60, 0x10, 0), + RATETAB_ENT(90, 0x20, 0), + RATETAB_ENT(120, 0x40, 0), + RATETAB_ENT(180, 0x80, 0), + RATETAB_ENT(240, 0x100, 0), + RATETAB_ENT(360, 0x200, 0), + RATETAB_ENT(480, 0x400, 0), + RATETAB_ENT(540, 0x800, 0), +}; + +#define rtw_a_rates (rtw_rates + 4) +#define rtw_a_rates_size 8 +#define rtw_g_rates (rtw_rates + 0) +#define rtw_g_rates_size 12 + +static struct ieee80211_channel rtw_2ghz_channels[] = { + CHAN2G(1, 2412, 0), + CHAN2G(2, 2417, 0), + CHAN2G(3, 2422, 0), + CHAN2G(4, 2427, 0), + CHAN2G(5, 2432, 0), + CHAN2G(6, 2437, 0), + CHAN2G(7, 2442, 0), + CHAN2G(8, 2447, 0), + CHAN2G(9, 2452, 0), + CHAN2G(10, 2457, 0), + CHAN2G(11, 2462, 0), + CHAN2G(12, 2467, 0), + CHAN2G(13, 2472, 0), + CHAN2G(14, 2484, 0), +}; + +//{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x12, RT_CHANNEL_DOMAIN_WORLD_WIDE37 + +static struct ieee80211_channel rtw_5ghz_a_channels[] = { + CHAN5G(34, 0), CHAN5G(36, 0), + CHAN5G(38, 0), CHAN5G(40, 0), + CHAN5G(42, 0), CHAN5G(44, 0), + CHAN5G(46, 0), CHAN5G(48, 0), + CHAN5G(52, 0), CHAN5G(56, 0), + CHAN5G(60, 0), CHAN5G(64, 0), + CHAN5G(100, 0), CHAN5G(104, 0), + CHAN5G(108, 0), CHAN5G(112, 0), + CHAN5G(116, 0), CHAN5G(120, 0), + CHAN5G(124, 0), CHAN5G(128, 0), + CHAN5G(132, 0), CHAN5G(136, 0), + CHAN5G(140, 0), CHAN5G(149, 0), + CHAN5G(153, 0), CHAN5G(157, 0), + CHAN5G(161, 0), CHAN5G(165, 0), + CHAN5G(184, 0), CHAN5G(188, 0), + CHAN5G(192, 0), CHAN5G(196, 0), + CHAN5G(200, 0), CHAN5G(204, 0), + CHAN5G(208, 0), CHAN5G(212, 0), + CHAN5G(216, 0), +}; + +static struct ieee80211_supported_band rtw_band_2ghz = { + .band = IEEE80211_BAND_2GHZ, + .channels = rtw_2ghz_channels, + .n_channels = ARRAY_SIZE(rtw_2ghz_channels), + .bitrates = rtw_g_rates, + .n_bitrates = rtw_g_rates_size, +}; + +static struct ieee80211_supported_band rtw_band_5ghz = { + .band = IEEE80211_BAND_5GHZ, + .channels = rtw_5ghz_a_channels, + .n_channels = ARRAY_SIZE(rtw_5ghz_a_channels), + .bitrates = rtw_a_rates, + .n_bitrates = rtw_a_rates_size, +}; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +static const struct ieee80211_txrx_stypes +rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { + [NL80211_IFTYPE_ADHOC] = { + .tx = 0xffff, + .rx = BIT(IEEE80211_STYPE_ACTION >> 4) + }, + [NL80211_IFTYPE_STATION] = { + .tx = 0xffff, + .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | + BIT(IEEE80211_STYPE_PROBE_REQ >> 4) + }, + [NL80211_IFTYPE_AP] = { + .tx = 0xffff, + .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | + BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | + BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | + BIT(IEEE80211_STYPE_DISASSOC >> 4) | + BIT(IEEE80211_STYPE_AUTH >> 4) | + BIT(IEEE80211_STYPE_DEAUTH >> 4) | + BIT(IEEE80211_STYPE_ACTION >> 4) + }, + [NL80211_IFTYPE_AP_VLAN] = { + /* copy AP */ + .tx = 0xffff, + .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | + BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | + BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | + BIT(IEEE80211_STYPE_DISASSOC >> 4) | + BIT(IEEE80211_STYPE_AUTH >> 4) | + BIT(IEEE80211_STYPE_DEAUTH >> 4) | + BIT(IEEE80211_STYPE_ACTION >> 4) + }, + [NL80211_IFTYPE_P2P_CLIENT] = { + .tx = 0xffff, + .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | + BIT(IEEE80211_STYPE_PROBE_REQ >> 4) + }, + [NL80211_IFTYPE_P2P_GO] = { + .tx = 0xffff, + .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | + BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | + BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | + BIT(IEEE80211_STYPE_DISASSOC >> 4) | + BIT(IEEE80211_STYPE_AUTH >> 4) | + BIT(IEEE80211_STYPE_DEAUTH >> 4) | + BIT(IEEE80211_STYPE_ACTION >> 4) + }, +}; +#endif + +static int rtw_ieee80211_channel_to_frequency(int chan, int band) +{ + /* see 802.11 17.3.8.3.2 and Annex J + * there are overlapping channel numbers in 5GHz and 2GHz bands */ + + if (band == IEEE80211_BAND_5GHZ) { + if (chan >= 182 && chan <= 196) + return 4000 + chan * 5; + else + return 5000 + chan * 5; + } else { /* IEEE80211_BAND_2GHZ */ + if (chan == 14) + return 2484; + else if (chan < 14) + return 2407 + chan * 5; + else + return 0; /* not supported */ + } +} + +static int rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) +{ + int ret=0; + struct ieee80211_channel *notify_channel; + struct cfg80211_bss *bss; + //struct ieee80211_supported_band *band; + u16 channel; + u32 freq; + u64 notify_timestamp; + u16 notify_capability; + u16 notify_interval; + u8 *notify_ie; + size_t notify_ielen; + s32 notify_signal; + u8 buf[768], *pbuf; + size_t len; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + struct wireless_dev *wdev = padapter->rtw_wdev; + struct wiphy *wiphy = wdev->wiphy; + + + //printk("%s\n", __func__); + + + channel = pnetwork->network.Configuration.DSConfig; + if (channel <= RTW_CH_MAX_2G_CHANNEL) + { + //band = wiphy->bands[IEEE80211_BAND_2GHZ]; + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); + } + else + { + //band = wiphy->bands[IEEE80211_BAND_5GHZ]; + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); + } + + notify_channel = ieee80211_get_channel(wiphy, freq); + + //rtw_get_timestampe_from_ie() + notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */ + + notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); + notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); + + + notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; + notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; + + //notify_signal = (s16)le16_to_cpu(bi->RSSI) * 100; + + //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) + notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm + +/* + printk("bssid: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", + pnetwork->network.MacAddress[0], pnetwork->network.MacAddress[1], pnetwork->network.MacAddress[2], + pnetwork->network.MacAddress[3], pnetwork->network.MacAddress[4], pnetwork->network.MacAddress[5]); + printk("Channel: %d(%d)\n", channel, freq); + printk("Capability: %X\n", notify_capability); + printk("Beacon interval: %d\n", notify_interval); + printk("Signal: %d\n", notify_signal); + printk("notify_timestamp: %#018llx\n", notify_timestamp); +*/ + + pbuf = buf; + pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); + //pmlmeext->mgnt_seq++; + + if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); + + SetFrameSubType(pbuf, WIFI_BEACON); + + } else { + + _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); + + SetFrameSubType(pbuf, WIFI_PROBERSP); + } + + _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); + + + pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); + len = sizeof (struct rtw_ieee80211_hdr_3addr); + + _rtw_memcpy(pbuf, pnetwork->network.IEs, pnetwork->network.IELength); + len += pnetwork->network.IELength; + + +#if 1 + bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)buf, + len, notify_signal, GFP_ATOMIC); +#else + + bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, + notify_timestamp, notify_capability, notify_interval, notify_ie, + notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); +#endif + + if (unlikely(!bss)) { + printk("rtw_cfg80211_inform_bss error\n"); + return -EINVAL; + } + + return ret; + +} + +void rtw_cfg80211_indicate_connect(_adapter *padapter) +{ + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &(pmlmepriv->cur_network); + struct wireless_dev *pwdev = padapter->rtw_wdev; + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + + + printk("%s\n", __func__); + + if (pwdev->iftype != NL80211_IFTYPE_STATION + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT + #endif + ) { + return; + } + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) + return; + + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); + rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); + } + + #ifdef CONFIG_LAYER2_ROAMING + if(pmlmepriv->to_roaming > 0) { + //rtw_cfg80211_inform_bss(padapter, cur_network); + DBG_871X("%s call cfg80211_roamed\n", __FUNCTION__); + cfg80211_roamed(padapter->pnetdev, + #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) + NULL, + #endif + cur_network->network.MacAddress, + cur_network->network.IEs+_FIXED_IE_LENGTH_, cur_network->network.IELength-_FIXED_IE_LENGTH_, + NULL, 0, GFP_ATOMIC + ); + } + else + #endif + { + cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress, NULL, 0, NULL, 0, + WLAN_STATUS_SUCCESS, GFP_ATOMIC/*GFP_KERNEL*/); + } +} + +void rtw_cfg80211_indicate_disconnect(_adapter *padapter) +{ + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wireless_dev *pwdev = padapter->rtw_wdev; + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + + printk("%s\n", __func__); + + if (pwdev->iftype != NL80211_IFTYPE_STATION + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT + #endif + ) { + return; + } + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) + return; + + + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + + rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + + printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); + } + + if(pwdev->sme_state==CFG80211_SME_CONNECTING) + cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, + WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); + else if(pwdev->sme_state==CFG80211_SME_CONNECTED) + cfg80211_disconnected(padapter->pnetdev, 0, + NULL, 0, GFP_ATOMIC); + else + printk("pwdev->sme_state=%d\n", pwdev->sme_state); + +} + + +#ifdef CONFIG_AP_MODE +static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta) +{ + struct cmd_obj* ph2c; + struct set_stakey_parm *psetstakey_para; + struct cmd_priv *pcmdpriv=&padapter->cmdpriv; + u8 res=_SUCCESS; + + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if ( ph2c == NULL){ + res= _FAIL; + goto exit; + } + + psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); + if(psetstakey_para==NULL){ + rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); + res=_FAIL; + goto exit; + } + + init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); + + + psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; + + _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); + + _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); + + + res = rtw_enqueue_cmd(pcmdpriv, ph2c); + +exit: + + return res; + +} + +static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) +{ + u8 keylen; + struct cmd_obj* pcmd; + struct setkey_parm *psetkeyparm; + struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); + int res=_SUCCESS; + + DBG_8192C("%s\n", __FUNCTION__); + + pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if(pcmd==NULL){ + res= _FAIL; + goto exit; + } + psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); + if(psetkeyparm==NULL){ + rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); + res= _FAIL; + goto exit; + } + + _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); + + psetkeyparm->keyid=(u8)keyid; + + psetkeyparm->algorithm = alg; + + psetkeyparm->set_tx = 1; + + switch(alg) + { + case _WEP40_: + keylen = 5; + break; + case _WEP104_: + keylen = 13; + break; + case _TKIP_: + case _TKIP_WTMIC_: + case _AES_: + keylen = 16; + default: + keylen = 16; + } + + _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); + + pcmd->cmdcode = _SetKey_CMD_; + pcmd->parmbuf = (u8 *)psetkeyparm; + pcmd->cmdsz = (sizeof(struct setkey_parm)); + pcmd->rsp = NULL; + pcmd->rspsz = 0; + + + _rtw_init_listhead(&pcmd->list); + + res = rtw_enqueue_cmd(pcmdpriv, pcmd); + +exit: + + return res; + + +} + +static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid) +{ + u8 alg; + + switch(keylen) + { + case 5: + alg =_WEP40_; + break; + case 13: + alg =_WEP104_; + break; + default: + alg =_NO_PRIVACY_; + } + + return set_group_key(padapter, key, alg, keyid); + +} + +static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) +{ + int ret = 0; + u32 wep_key_idx, wep_key_len,wep_total_len; + NDIS_802_11_WEP *pwep = NULL; + struct sta_info *psta = NULL, *pbcmc_sta = NULL; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct security_priv* psecuritypriv=&(padapter->securitypriv); + struct sta_priv *pstapriv = &padapter->stapriv; + + DBG_8192C("%s\n", __FUNCTION__); + + param->u.crypt.err = 0; + param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; + + //sizeof(struct ieee_param) = 64 bytes; + //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) + if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) + { + ret = -EINVAL; + goto exit; + } + + if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && + param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && + param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) + { + if (param->u.crypt.idx >= WEP_KEYS) + { + ret = -EINVAL; + goto exit; + } + } + else + { + psta = rtw_get_stainfo(pstapriv, param->sta_addr); + if(!psta) + { + //ret = -EINVAL; + DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); + goto exit; + } + } + + if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) + { + //todo:clear default encryption keys + + DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); + + goto exit; + } + + + if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) + { + DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); + + wep_key_idx = param->u.crypt.idx; + wep_key_len = param->u.crypt.key_len; + + DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); + + if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) + { + ret = -EINVAL; + goto exit; + } + + + if (wep_key_len > 0) + { + wep_key_len = wep_key_len <= 5 ? 5 : 13; + wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); + pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len); + if(pwep == NULL){ + DBG_8192C(" r871x_set_encryption: pwep allocate fail !!!\n"); + goto exit; + } + + _rtw_memset(pwep, 0, wep_total_len); + + pwep->KeyLength = wep_key_len; + pwep->Length = wep_total_len; + + } + + pwep->KeyIndex = wep_key_idx; + + _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); + + if(param->u.crypt.set_tx) + { + DBG_8192C("wep, set_tx=1\n"); + + psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; + psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; + psecuritypriv->dot118021XGrpPrivacy=_WEP40_; + + if(pwep->KeyLength==13) + { + psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; + psecuritypriv->dot118021XGrpPrivacy=_WEP104_; + } + + + psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; + + _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); + + psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; + + set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); + + + } + else + { + DBG_8192C("wep, set_tx=0\n"); + + //don't update "psecuritypriv->dot11PrivacyAlgrthm" and + //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam + + _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); + + psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; + + set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); + + } + + goto exit; + + } + + + if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key + { + //if(param->u.crypt.set_tx == 1) + if(param->u.crypt.set_tx == 0) + { + if(strcmp(param->u.crypt.alg, "WEP") == 0) + { + DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); + + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + + psecuritypriv->dot118021XGrpPrivacy = _WEP40_; + if(param->u.crypt.key_len==13) + { + psecuritypriv->dot118021XGrpPrivacy = _WEP104_; + } + + } + else if(strcmp(param->u.crypt.alg, "TKIP") == 0) + { + DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); + + psecuritypriv->dot118021XGrpPrivacy = _TKIP_; + + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + + //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); + //set mic key + _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); + _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); + + psecuritypriv->busetkipkey = _TRUE; + + } + else if(strcmp(param->u.crypt.alg, "CCMP") == 0) + { + DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); + + psecuritypriv->dot118021XGrpPrivacy = _AES_; + + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + } + else + { + DBG_8192C("%s, set group_key, none\n", __FUNCTION__); + + psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; + } + + psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; + + psecuritypriv->binstallGrpkey = _TRUE; + + psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! + + set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); + + pbcmc_sta=rtw_get_bcmc_stainfo(padapter); + if(pbcmc_sta) + { + pbcmc_sta->ieee8021x_blocked = _FALSE; + pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy + } + + } + + goto exit; + + } + + if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x + { + if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) + { + if(param->u.crypt.set_tx ==1) + { + _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + + if(strcmp(param->u.crypt.alg, "WEP") == 0) + { + DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); + + psta->dot118021XPrivacy = _WEP40_; + if(param->u.crypt.key_len==13) + { + psta->dot118021XPrivacy = _WEP104_; + } + } + else if(strcmp(param->u.crypt.alg, "TKIP") == 0) + { + DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); + + psta->dot118021XPrivacy = _TKIP_; + + //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); + //set mic key + _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); + _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); + + psecuritypriv->busetkipkey = _TRUE; + + } + else if(strcmp(param->u.crypt.alg, "CCMP") == 0) + { + + DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); + + psta->dot118021XPrivacy = _AES_; + } + else + { + DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); + + psta->dot118021XPrivacy = _NO_PRIVACY_; + } + + set_pairwise_key(padapter, psta); + + psta->ieee8021x_blocked = _FALSE; + + psta->bpairwise_key_installed = _TRUE; + + } + else//group key??? + { + if(strcmp(param->u.crypt.alg, "WEP") == 0) + { + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + + psecuritypriv->dot118021XGrpPrivacy = _WEP40_; + if(param->u.crypt.key_len==13) + { + psecuritypriv->dot118021XGrpPrivacy = _WEP104_; + } + } + else if(strcmp(param->u.crypt.alg, "TKIP") == 0) + { + psecuritypriv->dot118021XGrpPrivacy = _TKIP_; + + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + + //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); + //set mic key + _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); + _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); + + psecuritypriv->busetkipkey = _TRUE; + + } + else if(strcmp(param->u.crypt.alg, "CCMP") == 0) + { + psecuritypriv->dot118021XGrpPrivacy = _AES_; + + _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + } + else + { + psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; + } + + psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; + + psecuritypriv->binstallGrpkey = _TRUE; + + psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! + + set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); + + pbcmc_sta=rtw_get_bcmc_stainfo(padapter); + if(pbcmc_sta) + { + pbcmc_sta->ieee8021x_blocked = _FALSE; + pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy + } + + } + + } + + } + +exit: + + if(pwep) + { + rtw_mfree((u8 *)pwep, wep_total_len); + } + + return ret; + +} +#endif + +static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) +{ + int ret = 0; + u32 wep_key_idx, wep_key_len,wep_total_len; + NDIS_802_11_WEP *pwep = NULL; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; +#ifdef CONFIG_P2P + struct wifidirect_info* pwdinfo = &padapter->wdinfo; +#endif //CONFIG_P2P + +_func_enter_; + + printk("%s\n", __func__); + + param->u.crypt.err = 0; + param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; + + if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) + { + ret = -EINVAL; + goto exit; + } + + if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && + param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && + param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) + { + if (param->u.crypt.idx >= WEP_KEYS) + { + ret = -EINVAL; + goto exit; + } + } else { + ret = -EINVAL; + goto exit; + } + + if (strcmp(param->u.crypt.alg, "WEP") == 0) + { + RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); + DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); + + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; + padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; + padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; + + wep_key_idx = param->u.crypt.idx; + wep_key_len = param->u.crypt.key_len; + + RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); + DBG_8192C("(1)wep_key_idx=%d\n", wep_key_idx); + + if (wep_key_idx > WEP_KEYS) + return -EINVAL; + + RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); + + if (wep_key_len > 0) + { + wep_key_len = wep_key_len <= 5 ? 5 : 13; + wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); + pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); + if(pwep == NULL){ + RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); + goto exit; + } + + _rtw_memset(pwep, 0, wep_total_len); + + pwep->KeyLength = wep_key_len; + pwep->Length = wep_total_len; + + if(wep_key_len==13) + { + padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; + padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; + } + } + else { + ret = -EINVAL; + goto exit; + } + + pwep->KeyIndex = wep_key_idx; + pwep->KeyIndex |= 0x80000000; + + _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); + + if(param->u.crypt.set_tx) + { + DBG_8192C("wep, set_tx=1\n"); + + if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) + { + ret = -EOPNOTSUPP ; + } + } + else + { + DBG_8192C("wep, set_tx=0\n"); + + //don't update "psecuritypriv->dot11PrivacyAlgrthm" and + //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam + + if (wep_key_idx >= WEP_KEYS) { + ret = -EOPNOTSUPP ; + goto exit; + } + + _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); + psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; + rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); + } + + goto exit; + } + + if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x + { + struct sta_info * psta,*pbcmc_sta; + struct sta_priv * pstapriv = &padapter->stapriv; + + //printk("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode + { + psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); + if (psta == NULL) { + //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); + printk("%s, : Obtain Sta_info fail \n", __func__); + } + else + { + //Jeff: don't disable ieee8021x_blocked while clearing key + if (strcmp(param->u.crypt.alg, "none") != 0) + psta->ieee8021x_blocked = _FALSE; + + + if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| + (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) + { + psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; + } + + if(param->u.crypt.set_tx ==1)//pairwise key + { + + printk("%s, : param->u.crypt.set_tx ==1 \n", __func__); + + _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + + if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key + { + //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); + _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); + _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); + + padapter->securitypriv.busetkipkey=_FALSE; + //_set_timer(&padapter->securitypriv.tkip_timer, 50); + } + + //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); + //DEBUG_ERR(("\n ~~~~stastakey:unicastkey\n")); + DBG_871X("\n ~~~~stastakey:unicastkey\n"); + + rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); + } + else//group key + { + _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); + _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); + _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); + padapter->securitypriv.binstallGrpkey = _TRUE; + //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); + //DEBUG_ERR(("\n ~~~~stastakey:groupkey\n")); + DBG_871X("\n ~~~~stastakey:groupkey\n"); + + padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; + + rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1); +#ifdef CONFIG_P2P + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) + { + rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); + } +#endif //CONFIG_P2P + + } + } + + pbcmc_sta=rtw_get_bcmc_stainfo(padapter); + if(pbcmc_sta==NULL) + { + //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); + } + else + { + //Jeff: don't disable ieee8021x_blocked while clearing key + if (strcmp(param->u.crypt.alg, "none") != 0) + pbcmc_sta->ieee8021x_blocked = _FALSE; + + if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| + (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) + { + pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; + } + } + } + else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode + { + } + } + +exit: + + printk("%s, ret=%d\n", __func__, ret); + + if (pwep) { + rtw_mfree((u8 *)pwep,wep_total_len); + } + + _func_exit_; + + return ret; +} + +static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + u8 key_index, bool pairwise, const u8 *mac_addr, +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + u8 key_index, const u8 *mac_addr, +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + struct key_params *params) +{ + char *alg_name; + u32 param_len; + struct ieee_param *param = NULL; + int ret=0; + struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + + + printk("%s, Adding key for %pM\n", __func__, mac_addr); + + printk("cipher=0x%x\n", params->cipher); + + printk("key_len=0x%x\n", params->key_len); + + printk("seq_len=0x%x\n", params->seq_len); + + printk("key_index=%d\n", key_index); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + printk("pairwise=%d\n", pairwise); +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + + + param_len = sizeof(struct ieee_param) + params->key_len; + param = (struct ieee_param *)rtw_malloc(param_len); + if (param == NULL) + return -1; + + _rtw_memset(param, 0, param_len); + + param->cmd = IEEE_CMD_SET_ENCRYPTION; + _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); + + switch (params->cipher) { + case IW_AUTH_CIPHER_NONE: + //todo: remove key + //remove = 1; + alg_name = "none"; + break; + case WLAN_CIPHER_SUITE_WEP40: + case WLAN_CIPHER_SUITE_WEP104: + alg_name = "WEP"; + break; + case WLAN_CIPHER_SUITE_TKIP: + alg_name = "TKIP"; + break; + case WLAN_CIPHER_SUITE_CCMP: + alg_name = "CCMP"; + break; + default: + return -ENOTSUPP; + } + + strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); + + + if (!mac_addr || is_broadcast_ether_addr(mac_addr)) + { + param->u.crypt.set_tx = 0; + } else { + param->u.crypt.set_tx = 1; + } + + + //param->u.crypt.idx = key_index - 1; + param->u.crypt.idx = key_index; + + if (params->seq_len && params->seq) + { + _rtw_memcpy(param->u.crypt.seq, params->seq, params->seq_len); + } + + if(params->key_len && params->key) + { + param->u.crypt.key_len = params->key_len; + _rtw_memcpy(param->u.crypt.key, params->key, params->key_len); + } + + //if(rtw_wdev->iftype == NL80211_IFTYPE_STATION) + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { + ret = rtw_cfg80211_set_encryption(ndev, param, param_len); + } + else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)//else if(rtw_wdev->iftype == NL80211_IFTYPE_AP) + { +#ifdef CONFIG_AP_MODE + if(mac_addr) + _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); + + ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); +#endif + } + else + { + printk("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); + + } + + if(param) + { + rtw_mfree((u8*)param, param_len); + } + + return ret; + +} + +static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + u8 key_index, bool pairwise, const u8 *mac_addr, +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + u8 key_index, const u8 *mac_addr, +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + void *cookie, + void (*callback)(void *cookie, + struct key_params*)) +{ +#if 0 + struct iwm_priv *iwm = ndev_to_iwm(ndev); + struct iwm_key *key = &iwm->keys[key_index]; + struct key_params params; + + IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); + + memset(¶ms, 0, sizeof(params)); + + params.cipher = key->cipher; + params.key_len = key->key_len; + params.seq_len = key->seq_len; + params.seq = key->seq; + params.key = key->key; + + callback(cookie, ¶ms); + + return key->key_len ? 0 : -ENOENT; +#endif + printk("%s\n", __func__); + return 0; +} + +static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + u8 key_index, bool pairwise, const u8 *mac_addr) +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + u8 key_index, const u8 *mac_addr) +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +{ +#if 0 + struct iwm_priv *iwm = ndev_to_iwm(ndev); + struct iwm_key *key = &iwm->keys[key_index]; + + if (!iwm->keys[key_index].key_len) { + IWM_DBG_WEXT(iwm, DBG, "Key %d not used\n", key_index); + return 0; + } + + if (key_index == iwm->default_key) + iwm->default_key = -1; + + return iwm_set_key(iwm, 1, key); +#endif + printk("%s\n", __func__); + return 0; +} + +static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, + struct net_device *ndev, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + u8 key_index, bool unicast, bool multicast) +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + u8 key_index) +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) +{ +#if 0 + struct iwm_priv *iwm = ndev_to_iwm(ndev); + + IWM_DBG_WEXT(iwm, DBG, "Default key index is: %d\n", key_index); + + if (!iwm->keys[key_index].key_len) { + IWM_ERR(iwm, "Key %d not used\n", key_index); + return -EINVAL; + } + + iwm->default_key = key_index; + + return iwm_set_tx_key(iwm, key_index); +#endif + printk("%s\n", __func__); + return 0; +} + +static int cfg80211_rtw_get_station(struct wiphy *wiphy, + struct net_device *ndev, + u8 *mac, struct station_info *sinfo) +{ + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + + if(!mac) { + DBG_871X("%s, mac==%p\n", __func__, mac); + return -ENOENT; + } + +#ifdef CONFIG_DEBUG_CFG80211 + DBG_871X("%s, mac="MAC_FMT"\n", __func__, MAC_ARG(mac)); +#endif + + //for infra./P2PClient mode + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) + && check_fwstate(pmlmepriv, _FW_LINKED) + ) + { + struct wlan_network *cur_network = &(pmlmepriv->cur_network); + + if (_rtw_memcmp(mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) + { + DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); + return -ENOENT; + } + + sinfo->filled |= STATION_INFO_SIGNAL; + sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); + + sinfo->filled |= STATION_INFO_TX_BITRATE; + sinfo->txrate.legacy = 10 * rtw_get_network_max_rate(padapter, &pmlmepriv->cur_network.network); + } + + //for Ad-Hoc/AP mode + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) + ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) + ||check_fwstate(pmlmepriv, WIFI_AP_STATE) ) + && check_fwstate(pmlmepriv, _FW_LINKED) + ) + { + struct sta_info *psta = NULL; + struct sta_priv *pstapriv = &padapter->stapriv; + + psta = rtw_get_stainfo(pstapriv, mac); + if(psta == NULL) + { + printk("%s, sta_info is null\n", __func__); + return -ENOENT; + } + + //TODO: should acquire station info... + } + + return 0; +} + +extern int netdev_open(struct net_device *pnetdev); + +static int cfg80211_rtw_change_iface(struct wiphy *wiphy, + struct net_device *ndev, + enum nl80211_iftype type, u32 *flags, + struct vif_params *params) +{ + enum nl80211_iftype old_type; + NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + int ret = 0; + u8 change = _FALSE; + + + DBG_871X("%s call netdev_open\n", __FUNCTION__); + if(netdev_open(ndev) != 0) { + ret= -EPERM; + goto exit; + } + + if(_FAIL == rtw_pwr_wakeup(padapter)) { + ret= -EPERM; + goto exit; + } + + old_type = rtw_wdev->iftype; + printk("%s, old_iftype=%d, new_iftype=%d\n", __func__, old_type, type); + + + + if(old_type != type) + change = _TRUE; + + + switch (type) { + case NL80211_IFTYPE_ADHOC: + networkType = Ndis802_11IBSS; + break; + case NL80211_IFTYPE_STATION: + networkType = Ndis802_11Infrastructure; + if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + + //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) + rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); + rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); + + printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); + + } + break; + case NL80211_IFTYPE_AP: + networkType = Ndis802_11APMode; + if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + } + break; + default: + return -EOPNOTSUPP; + } + + rtw_wdev->iftype = type; + + if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) + { + rtw_wdev->iftype = old_type; + ret = -EPERM; + goto exit; + } + + rtw_setopmode_cmd(padapter, networkType); + +exit: + + return ret; +} + +void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted) +{ + _irqL irqL; + + _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); + if(pwdev_priv->scan_request != NULL) + { + //struct cfg80211_scan_request *scan_request = pwdev_priv->scan_request; + +#ifdef CONFIG_DEBUG_CFG80211 + DBG_871X("%s with scan req\n", __FUNCTION__); +#endif + + //avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); + //if(scan_request == wiphy_to_dev(scan_request->wiphy)->scan_req) + + cfg80211_scan_done(pwdev_priv->scan_request, aborted); + pwdev_priv->scan_request = NULL; + + } else { + DBG_871X("%s without scan req\n", __FUNCTION__); + } + _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); +} + +void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) +{ + _irqL irqL; + _list *plist, *phead; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + _queue *queue = &(pmlmepriv->scanned_queue); + struct wlan_network *pnetwork = NULL; + u32 cnt=0; + u32 wait_for_surveydone; + sint wait_status; +#ifdef CONFIG_P2P + struct wifidirect_info* pwdinfo = &padapter->wdinfo; +#endif //CONFIG_P2P + struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s\n", __func__); +#endif + +#if 0 + if(padapter->pwrctrlpriv.brfoffbyhw && padapter->bDriverStopped) + { + return; + } + +#ifdef CONFIG_P2P + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + // P2P is enabled + wait_for_surveydone = 200; + } + else + { + // P2P is disabled + wait_for_surveydone = 100; + } +#else + { + wait_for_surveydone = 100; + } +#endif //CONFIG_P2P + + + wait_status = _FW_UNDER_SURVEY + #ifndef CONFIG_ANDROID + |_FW_UNDER_LINKING + #endif + ; + + while(check_fwstate(pmlmepriv, wait_status) == _TRUE) + { + rtw_msleep_os(30); + cnt++; + if(cnt > wait_for_surveydone ) + break; + } +#endif + + _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); + + phead = get_list_head(queue); + plist = get_next(phead); + + while(1) + { + if (rtw_end_of_queue_search(phead,plist)== _TRUE) + break; + + pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); + + //report network only if the current channel set contains the channel to which this network belongs + if( _TRUE == rtw_is_channel_set_contains_channel(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) + #ifdef CONFIG_VALIDATE_SSID + && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) + #endif + ) + { + //ev=translate_scan(padapter, a, pnetwork, ev, stop); + rtw_cfg80211_inform_bss(padapter, pnetwork); + } + + plist = get_next(plist); + + } + + _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); + + #if 0 + // Disable P2P Listen State + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + + //rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); + rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +#endif + + if(pwrpriv->bips_processing == _FALSE){ + rtw_set_pwr_state_check_timer(pwrpriv); + } + } + #endif + + //call this after other things have been done + rtw_indicate_scan_done(padapter, _FALSE); + +} + +static int rtw_cfg80211_set_probe_req_wpsp2pie(struct net_device *net, char *buf, int len) +{ + int ret = 0; + uint wps_ielen = 0; + u8 *wps_ie; + u32 p2p_ielen = 0; + u8 *p2p_ie; + _adapter *padapter = (_adapter *)rtw_netdev_priv(net); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, ielen=%d\n", __func__, len); +#endif + + if(len>0) + { + if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) + { + #ifdef CONFIG_DEBUG_CFG80211 + printk("probe_req_wps_ielen=%d\n", wps_ielen); + #endif + + if(pmlmepriv->wps_probe_req_ie) + { + u32 free_len = pmlmepriv->wps_probe_req_ie_len; + pmlmepriv->wps_probe_req_ie_len = 0; + rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); + pmlmepriv->wps_probe_req_ie = NULL; + } + + pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); + if ( pmlmepriv->wps_probe_req_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); + pmlmepriv->wps_probe_req_ie_len = wps_ielen; + } + + buf += wps_ielen; + len -= wps_ielen; + if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) + { + #ifdef CONFIG_DEBUG_CFG80211 + printk("probe_req_p2p_ielen=%d\n", p2p_ielen); + #endif + + if(pmlmepriv->p2p_probe_req_ie) + { + u32 free_len = pmlmepriv->p2p_probe_req_ie_len; + pmlmepriv->p2p_probe_req_ie_len = 0; + rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); + pmlmepriv->p2p_probe_req_ie = NULL; + } + + pmlmepriv->p2p_probe_req_ie = rtw_malloc(len); + if ( pmlmepriv->p2p_probe_req_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); + pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; + } + + } + + return ret; + +} + +static void rtw_cfg80211_scan_abort(_adapter *padapter) +{ + u32 cnt=0; + u32 wait_for_surveydone; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s\n", __func__); +#endif + + wait_for_surveydone = 10; + + pmlmeext->scan_abort = _TRUE; + + while(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) + { + printk("%s : fw_state=_FW_UNDER_SURVEY!\n", __func__); + + rtw_msleep_os(20); + cnt++; + if(cnt > wait_for_surveydone ) + { + printk("waiting for scan_abort time out!\n"); + break; + } + } + + pmlmeext->scan_abort = _FALSE; + + rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), _TRUE); + +} + +static int cfg80211_rtw_scan(struct wiphy *wiphy, struct net_device *ndev, + struct cfg80211_scan_request *request) +{ + int i; + u8 _status = _FALSE; + int ret = 0; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_priv *pmlmepriv= &padapter->mlmepriv; + NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; + _irqL irqL; + u8 *wps_ie=NULL; + uint wps_ielen=0; + u8 *p2p_ie=NULL; + uint p2p_ielen=0; +#ifdef CONFIG_P2P + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +#endif //CONFIG_P2P + struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); + struct cfg80211_ssid *ssids = request->ssids; + int social_channel = 0, j = 0; + bool need_indicate_scan_done = _FALSE; + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s\n", __func__); +#endif + +#ifdef CONFIG_MP_INCLUDED + if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) + { + ret = -EPERM; + goto exit; + } +#endif + + _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); + pwdev_priv->scan_request = request; + _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); + + if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) + { + //need_indicate_scan_done = _TRUE; + //goto check_need_indicate_scan_done; + } + + if(_FAIL == rtw_pwr_wakeup(padapter)) { + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + } + + if( ssids->ssid != NULL ) + { + if( _rtw_memcmp(ssids->ssid, "DIRECT-", 7) + && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) + ) + { + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); + wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; + } + else + { + rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); + #ifdef CONFIG_DEBUG_CFG80211 + printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); + #endif + } + rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); + + if(request->n_channels == 3 && + request->channels[0]->hw_value == 1 && + request->channels[1]->hw_value == 6 && + request->channels[2]->hw_value == 11 + ) + { + social_channel = 1; + } + } + } + + if(request->ie && request->ie_len>0) + { + rtw_cfg80211_set_probe_req_wpsp2pie( ndev, (u8 *)request->ie, request->ie_len ); + } + + if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) + { + printk("%s, bBusyTraffic == _TRUE\n", __func__); + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + } + + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) + { + printk("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); + need_indicate_scan_done = _TRUE; + goto check_need_indicate_scan_done; + } + + +#ifdef CONFIG_P2P + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) + { + rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); + rtw_free_network_queue(padapter, _TRUE); + + if(social_channel == 0) + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); + else + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); + } +#endif //CONFIG_P2P + + + _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); + //parsing request ssids, n_ssids + for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { + #ifdef CONFIG_DEBUG_CFG80211 + printk("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); + #endif + _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); + ssid[i].SsidLength = ssids[i].ssid_len; + } + + +#ifdef CONFIG_DEBUG_CFG80211 + //parsing channels, n_channels + DBG_871X("%s n_channels:%u\n", __FUNCTION__, request->n_channels); +#endif + + _enter_critical_bh(&pmlmepriv->lock, &irqL); + _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT); + _exit_critical_bh(&pmlmepriv->lock, &irqL); + + + if(_status == _FALSE) + { + ret = -1; + } + +check_need_indicate_scan_done: + if(need_indicate_scan_done) + rtw_cfg80211_surveydone_event_callback(padapter); + +exit: + + return ret; + +} + +static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) +{ +#if 0 + struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + + if (changed & WIPHY_PARAM_RTS_THRESHOLD && + (iwm->conf.rts_threshold != wiphy->rts_threshold)) { + int ret; + + iwm->conf.rts_threshold = wiphy->rts_threshold; + + ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, + CFG_RTS_THRESHOLD, + iwm->conf.rts_threshold); + if (ret < 0) + return ret; + } + + if (changed & WIPHY_PARAM_FRAG_THRESHOLD && + (iwm->conf.frag_threshold != wiphy->frag_threshold)) { + int ret; + + iwm->conf.frag_threshold = wiphy->frag_threshold; + + ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, + CFG_FRAG_THRESHOLD, + iwm->conf.frag_threshold); + if (ret < 0) + return ret; + } +#endif + printk("%s\n", __func__); + return 0; +} + +static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_ibss_params *params) +{ +#if 0 + struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + struct ieee80211_channel *chan = params->channel; + + if (!test_bit(IWM_STATUS_READY, &iwm->status)) + return -EIO; + + /* UMAC doesn't support creating or joining an IBSS network + * with specified bssid. */ + if (params->bssid) + return -EOPNOTSUPP; + + iwm->channel = ieee80211_frequency_to_channel(chan->center_freq); + iwm->umac_profile->ibss.band = chan->band; + iwm->umac_profile->ibss.channel = iwm->channel; + iwm->umac_profile->ssid.ssid_len = params->ssid_len; + memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len); + + return iwm_send_mlme_profile(iwm); +#endif + printk("%s\n", __func__); + return 0; +} + +static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *dev) +{ +#if 0 + struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + + if (iwm->umac_profile_active) + return iwm_invalidate_mlme_profile(iwm); +#endif + printk("%s\n", __func__); + return 0; +} + +static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) +{ + printk("%s, wpa_version=%d\n", __func__, wpa_version); + + + if (!wpa_version) { + psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; + return 0; + } + + + if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) + { + psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; + } + +/* + if (wpa_version & NL80211_WPA_VERSION_2) + { + psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; + } +*/ + + return 0; + +} + +static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, + enum nl80211_auth_type sme_auth_type) +{ + printk("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); + + + switch (sme_auth_type) { + case NL80211_AUTHTYPE_AUTOMATIC: + + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; + + break; + case NL80211_AUTHTYPE_OPEN_SYSTEM: + + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; + + if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; + + break; + case NL80211_AUTHTYPE_SHARED_KEY: + + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; + + psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; + + + break; + default: + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; + //return -ENOTSUPP; + } + + return 0; + +} + +static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) +{ + u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; + + u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : + &psecuritypriv->dot118021XGrpPrivacy; + + printk("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); + + + if (!cipher) { + *profile_cipher = _NO_PRIVACY_; + psecuritypriv->ndisencryptstatus = ndisencryptstatus; + return 0; + } + + switch (cipher) { + case IW_AUTH_CIPHER_NONE: + *profile_cipher = _NO_PRIVACY_; + ndisencryptstatus = Ndis802_11EncryptionDisabled; + break; + case WLAN_CIPHER_SUITE_WEP40: + *profile_cipher = _WEP40_; + ndisencryptstatus = Ndis802_11Encryption1Enabled; + break; + case WLAN_CIPHER_SUITE_WEP104: + *profile_cipher = _WEP104_; + ndisencryptstatus = Ndis802_11Encryption1Enabled; + break; + case WLAN_CIPHER_SUITE_TKIP: + *profile_cipher = _TKIP_; + ndisencryptstatus = Ndis802_11Encryption2Enabled; + break; + case WLAN_CIPHER_SUITE_CCMP: + *profile_cipher = _AES_; + ndisencryptstatus = Ndis802_11Encryption3Enabled; + break; + default: + printk("Unsupported cipher: 0x%x\n", cipher); + return -ENOTSUPP; + } + + if(ucast) + { + psecuritypriv->ndisencryptstatus = ndisencryptstatus; + + //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) + // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; + } + + return 0; +} + +static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) +{ + printk("%s, key_mgt=0x%x\n", __func__, key_mgt); + + if (key_mgt == WLAN_AKM_SUITE_8021X) + //*auth_type = UMAC_AUTH_TYPE_8021X; + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; + else if (key_mgt == WLAN_AKM_SUITE_PSK) { + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; + } else { + printk("Invalid key mgt: 0x%x\n", key_mgt); + //return -EINVAL; + } + + return 0; +} + +static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) +{ + u8 *buf=NULL, *pos=NULL; + u32 left; + int group_cipher = 0, pairwise_cipher = 0; + int ret = 0; +#ifdef CONFIG_P2P + struct wifidirect_info* pwdinfo = &padapter->wdinfo; +#endif //CONFIG_P2P + int wpa_ielen=0; + int wpa2_ielen=0; + u8 *pwpa, *pwpa2; + + + if((ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) || (pie == NULL)){ + padapter->securitypriv.wps_phase = _FALSE; + if(pie == NULL) + return ret; + else + return -EINVAL; + } + + if(ielen) + { + buf = rtw_zmalloc(ielen); + if (buf == NULL){ + ret = -ENOMEM; + goto exit; + } + + _rtw_memcpy(buf, pie , ielen); + + //dump + { + int i; + DBG_8192C("set wpa_ie(length:%d):\n", ielen); + for(i=0;i= RSN_SELECTOR_LEN){ + pos += RSN_SELECTOR_LEN; + left -= RSN_SELECTOR_LEN; + } + else if (left > 0){ + RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left)); + ret =-1; + goto exit; + } +#endif + + pwpa = rtw_get_wpa_ie(buf, &wpa_ielen, ielen); + pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); + + if(pwpa && wpa_ielen>0) + { + if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) + { + padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; + padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; + _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); + + printk("got wpa_ie\n"); + } + } + + if(pwpa2 && wpa2_ielen>0) + { + if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) + { + padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; + padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; + _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); + + printk("got wpa2_ie\n"); + } + } + + switch(group_cipher) + { + case WPA_CIPHER_NONE: + padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; + padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; + break; + case WPA_CIPHER_WEP40: + padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; + break; + case WPA_CIPHER_TKIP: + padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; + break; + case WPA_CIPHER_CCMP: + padapter->securitypriv.dot118021XGrpPrivacy=_AES_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; + break; + case WPA_CIPHER_WEP104: + padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; + break; + } + + switch(pairwise_cipher) + { + case WPA_CIPHER_NONE: + padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; + padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; + break; + case WPA_CIPHER_WEP40: + padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; + break; + case WPA_CIPHER_TKIP: + padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; + break; + case WPA_CIPHER_CCMP: + padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; + break; + case WPA_CIPHER_WEP104: + padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; + padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; + break; + } + + + + padapter->securitypriv.wps_phase = _FALSE; + {//set wps_ie + u16 cnt = 0; + u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; + uint wps_ielen=0; + u8 *pwps; + + pwps = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); + + //while( cnt < ielen ) + while( cnt < wps_ielen ) + { + //eid = buf[cnt]; + eid = pwps[cnt]; + + if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&pwps[cnt+2], wps_oui, 4)==_TRUE)) + { + DBG_8192C("SET WPS_IE\n"); + + padapter->securitypriv.wps_ie_len = ( (pwps[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (pwps[cnt+1]+2):(MAX_WPA_IE_LEN<<2); + + _rtw_memcpy(padapter->securitypriv.wps_ie, &pwps[cnt], padapter->securitypriv.wps_ie_len); + + if(pwpa==NULL && pwpa2==NULL) + { + padapter->securitypriv.wps_phase = _TRUE; + + DBG_8192C("SET WPS_IE, wps_phase==_TRUE\n"); + } +#ifdef CONFIG_P2P + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) + { + //rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); + } +#endif //CONFIG_P2P + + cnt += pwps[cnt+1]+2; + + break; + } else { + cnt += pwps[cnt+1]+2; //goto next + } + } + }//set wps_ie + + {//check p2p_ie for assoc req; + uint p2p_ielen=0; + u8 *p2p_ie; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + + if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) + { + #ifdef CONFIG_DEBUG_CFG80211 + printk("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); + #endif + + if(pmlmepriv->p2p_assoc_req_ie) + { + u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; + pmlmepriv->p2p_assoc_req_ie_len = 0; + rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); + pmlmepriv->p2p_assoc_req_ie = NULL; + } + + pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); + if ( pmlmepriv->p2p_assoc_req_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + goto exit; + + } + _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); + pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; + + } + } + + } + + + RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, + ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", + pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); + +exit: + + if (buf) rtw_mfree(buf, ielen); + + return ret; +} + +static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_connect_params *sme) +{ + int ret=0; + _irqL irqL; + _list *phead; + struct wlan_network *pnetwork = NULL; + NDIS_802_11_AUTHENTICATION_MODE authmode; + NDIS_802_11_SSID ndis_ssid; + u8 *dst_ssid, *src_ssid; + u8 *dst_bssid, *src_bssid; + //u8 matched_by_bssid=_FALSE; + //u8 matched_by_ssid=_FALSE; + u8 matched=_FALSE; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; + _queue *queue = &pmlmepriv->scanned_queue; + + printk("\n=>%s\n",__FUNCTION__); + + + printk("privacy=%d, key=%p, key_len=%d, key_idx=%d\n", sme->privacy, sme->key, sme->key_len, sme->key_idx); + + + if(wdev_to_priv(padapter->rtw_wdev)->block == _TRUE) + { + ret = -EBUSY; + DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); + goto exit; + } + + if(_FAIL == rtw_pwr_wakeup(padapter)) { + ret= -EPERM; + goto exit; + } + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { + ret = -EPERM; + goto exit; + } + + if (!sme->ssid || !sme->ssid_len) + { + ret = -EINVAL; + goto exit; + } + + if (sme->ssid_len > IW_ESSID_MAX_SIZE){ + + ret= -E2BIG; + goto exit; + } + + + _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); + ndis_ssid.SsidLength = sme->ssid_len; + _rtw_memcpy(ndis_ssid.Ssid, sme->ssid, sme->ssid_len); + + DBG_8192C("ssid=%s, len=%d\n", ndis_ssid.Ssid, sme->ssid_len); + + + if (sme->bssid) + printk("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); + + + if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) + { + ret = -EBUSY; + printk("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); + goto exit; + } + + + _enter_critical_bh(&queue->lock, &irqL); + + phead = get_list_head(queue); + pmlmepriv->pscanned = get_next(phead); + + while (1) + { + if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) + { + break; + } + + pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); + pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); + + dst_ssid = pnetwork->network.Ssid.Ssid; + dst_bssid = pnetwork->network.MacAddress; + + if(sme->bssid) { + if(_rtw_memcmp(pnetwork->network.MacAddress, sme->bssid, ETH_ALEN) == _FALSE) + continue; + } + + if(sme->ssid && sme->ssid_len) { + if( pnetwork->network.Ssid.SsidLength != sme->ssid_len + || _rtw_memcmp(pnetwork->network.Ssid.Ssid, sme->ssid, sme->ssid_len) == _FALSE + ) + continue; + } + + + if (sme->bssid) + { + src_bssid = sme->bssid; + + if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) + { + printk("matched by bssid\n"); + + ndis_ssid.SsidLength = pnetwork->network.Ssid.SsidLength; + _rtw_memcpy(ndis_ssid.Ssid, pnetwork->network.Ssid.Ssid, pnetwork->network.Ssid.SsidLength); + + matched=_TRUE; + break; + } + + } + else if (sme->ssid && sme->ssid_len) + { + src_ssid = ndis_ssid.Ssid; + + if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && + (pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength)) + { + printk("matched by ssid\n"); + matched=_TRUE; + break; + } + } + + } + + _exit_critical_bh(&queue->lock, &irqL); + + if((matched == _FALSE) || (pnetwork== NULL)) + { + ret = -ENOENT; + printk("connect, matched == _FALSE, goto exit\n"); + goto exit; + } + + + if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE) + { + ret = -EPERM; + goto exit; + } + + + psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; + psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; + psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; + psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system + psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; + + + ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); + if (ret < 0) + goto exit; + + ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); + if (ret < 0) + goto exit; + + + if (sme->crypto.n_ciphers_pairwise) { + ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); + if (ret < 0) + goto exit; + } + + //For WEP Shared auth + if((psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared + || psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key + ) + { + u32 wep_key_idx, wep_key_len,wep_total_len; + NDIS_802_11_WEP *pwep = NULL; + DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); + + wep_key_idx = sme->key_idx; + wep_key_len = sme->key_len; + + if (sme->key_idx > WEP_KEYS) { + ret = -EINVAL; + goto exit; + } + + if (wep_key_len > 0) + { + wep_key_len = wep_key_len <= 5 ? 5 : 13; + wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); + pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); + if(pwep == NULL){ + DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); + ret = -ENOMEM; + goto exit; + } + + _rtw_memset(pwep, 0, wep_total_len); + + pwep->KeyLength = wep_key_len; + pwep->Length = wep_total_len; + + if(wep_key_len==13) + { + padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; + padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; + } + } + else { + ret = -EINVAL; + goto exit; + } + + pwep->KeyIndex = wep_key_idx; + pwep->KeyIndex |= 0x80000000; + + _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); + + if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) + { + ret = -EOPNOTSUPP ; + } + + if (pwep) { + rtw_mfree((u8 *)pwep,wep_total_len); + } + + if(ret < 0) + goto exit; + } + + ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); + if (ret < 0) + return ret; + + if (sme->crypto.n_akm_suites) { + ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); + if (ret < 0) + goto exit; + } + + printk("%s, ie_len=%d\n", __func__, sme->ie_len); + + ret = rtw_cfg80211_set_wpa_ie(padapter, sme->ie, sme->ie_len); + if (ret < 0) + goto exit; + + authmode = psecuritypriv->ndisauthtype; + rtw_set_802_11_authentication_mode(padapter, authmode); + + //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); + + if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { + ret = -1; + goto exit; + } + + + printk("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); + +exit: + + DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); + + return ret; +} + +static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *dev, + u16 reason_code) +{ + _adapter *padapter = wiphy_to_adapter(wiphy); + + printk("\n%s\n", __func__); + + if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) + { + rtw_disassoc_cmd(padapter); + + DBG_871X("%s...call rtw_indicate_disconnect\n ", __FUNCTION__); + + rtw_indicate_disconnect(padapter); + + rtw_free_assoc_resources(padapter, 1); + } + + return 0; +} + +static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) + enum nl80211_tx_power_setting type, int mbm) +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) + enum tx_power_setting type, int dbm) +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) +{ +#if 0 + struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + int ret; + + switch (type) { + case NL80211_TX_POWER_AUTOMATIC: + return 0; + case NL80211_TX_POWER_FIXED: + if (mbm < 0 || (mbm % 100)) + return -EOPNOTSUPP; + + if (!test_bit(IWM_STATUS_READY, &iwm->status)) + return 0; + + ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, + CFG_TX_PWR_LIMIT_USR, + MBM_TO_DBM(mbm) * 2); + if (ret < 0) + return ret; + + return iwm_tx_power_trigger(iwm); + default: + IWM_ERR(iwm, "Unsupported power type: %d\n", type); + return -EOPNOTSUPP; + } +#endif + printk("%s\n", __func__); + return 0; +} + +static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, int *dbm) +{ + //_adapter *padapter = wiphy_to_adapter(wiphy); + + printk("%s\n", __func__); + + *dbm = (12); + + return 0; +} + +static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, + struct net_device *dev, + bool enabled, int timeout) +{ +#if 0 + struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + u32 power_index; + + if (enabled) + power_index = IWM_POWER_INDEX_DEFAULT; + else + power_index = IWM_POWER_INDEX_MIN; + + if (power_index == iwm->conf.power_index) + return 0; + + iwm->conf.power_index = power_index; + + return iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, + CFG_POWER_INDEX, iwm->conf.power_index); +#endif + + printk("%s\n", __func__); + + return 0; +} + +static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, + struct net_device *netdev, + struct cfg80211_pmksa *pmksa) +{ + //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + _adapter *padapter = wiphy_to_adapter(wiphy); + + printk("%s\n", __func__); + + //return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_ADD); + return 0; +} + +static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, + struct net_device *netdev, + struct cfg80211_pmksa *pmksa) +{ + //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + _adapter *padapter = wiphy_to_adapter(wiphy); + + printk("%s\n", __func__); + + //return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_DEL); + return 0; +} + +static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, + struct net_device *netdev) +{ + //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); + _adapter *padapter = wiphy_to_adapter(wiphy); + struct cfg80211_pmksa pmksa; + + printk("%s\n", __func__); + + memset(&pmksa, 0, sizeof(struct cfg80211_pmksa)); + + + //return iwm_send_pmkid_update(iwm, &pmksa, IWM_CMD_PMKID_FLUSH); + return 0; +} + +#ifdef CONFIG_AP_MODE +void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) +{ + s32 freq; + int channel; + struct wireless_dev *pwdev = padapter->rtw_wdev; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + + printk("%s\n", __func__); + + channel = pmlmeext->cur_channel; + + if (channel <= RTW_CH_MAX_2G_CHANNEL) + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); + } + else + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); + } + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) + cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +#else + //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() + pwdev->iftype = NL80211_IFTYPE_STATION; + cfg80211_send_rx_assoc(padapter->pnetdev, pmgmt_frame, frame_len); + pwdev->iftype = NL80211_IFTYPE_AP; + //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +#endif + +} + +void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) +{ + s32 freq; + int channel; + u8 *pmgmt_frame; + uint frame_len; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + u8 mgmt_buf[128] = {0}; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + + printk("%s\n", __func__); + + channel = pmlmeext->cur_channel; + + if (channel <= RTW_CH_MAX_2G_CHANNEL) + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); + } + else + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); + } + + + pmgmt_frame = mgmt_buf; + pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + //_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); + //_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); + + pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); + frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); + + reason = cpu_to_le16(reason); + pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) + cfg80211_rx_mgmt(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); +#else + cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); + //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); +#endif + +} + +static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) +{ + int ret = 0; + + printk("%s\n", __func__); + + return ret; +} + +static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) +{ + int ret = 0; + + printk("%s\n", __func__); + + return ret; +} + +static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) +{ + int ret = 0; + int rtap_len; + int qos_len = 0; + int dot11_hdr_len = 24; + int snap_len = 6; + unsigned char *pdata; + unsigned short frame_ctl; + unsigned char src_mac_addr[6]; + unsigned char dst_mac_addr[6]; + struct ieee80211_hdr *dot11_hdr; + struct ieee80211_radiotap_header *rtap_hdr; + _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); + + printk("%s\n", __func__); + + if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) + goto fail; + + rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; + if (unlikely(rtap_hdr->it_version)) + goto fail; + + rtap_len = ieee80211_get_radiotap_len(skb->data); + if (unlikely(skb->len < rtap_len)) + goto fail; + + if(rtap_len != 14) + { + printk("radiotap len (should be 14): %d\n", rtap_len); + goto fail; + } + + /* Skip the ratio tap header */ + skb_pull(skb, rtap_len); + + dot11_hdr = (struct ieee80211_hdr *)skb->data; + frame_ctl = le16_to_cpu(dot11_hdr->frame_control); + /* Check if the QoS bit is set */ + if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) { + /* Check if this ia a Wireless Distribution System (WDS) frame + * which has 4 MAC addresses + */ + if (dot11_hdr->frame_control & 0x0080) + qos_len = 2; + if ((dot11_hdr->frame_control & 0x0300) == 0x0300) + dot11_hdr_len += 6; + + memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); + memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); + + /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for + * for two MAC addresses + */ + skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); + pdata = (unsigned char*)skb->data; + memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); + memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); + + printk("should be eapol packet\n"); + + /* Use the real net device to transmit the packet */ + ret = rtw_xmit_entry(skb, padapter->pnetdev); + + return ret; + + } + else if((frame_ctl & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)) == cpu_to_le16(IEEE80211_STYPE_ACTION)) + { + //only for action frames + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + //u8 category, action, OUI_Subtype, dialogToken=0; + //unsigned char *frame_body; + struct rtw_ieee80211_hdr *pwlanhdr; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + u8 *buf = skb->data; + u32 len = skb->len; + + if(rtw_p2p_check_frames(padapter, buf, len, _TRUE) < 0) + { + goto fail; + } + +/* + frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); + category = frame_body[0]; + //just for check + if(category == RTW_WLAN_CATEGORY_PUBLIC) + { + action = frame_body[ 1 ]; + OUI_Subtype = frame_body[ 6 ]; + dialogToken = frame_body[7]; + + if ( action == ACT_PUBLIC_P2P ) + { + printk("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); + } + else + { + printk("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); + } + + } + else if(category == RTW_WLAN_CATEGORY_P2P) + { + OUI_Subtype = frame_body[5]; + dialogToken = frame_body[6]; + + printk("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); + + } + else + { + printk("%s, action frame category=%d, drop!\n", __func__, category); + goto fail; + } +*/ + + //starting alloc mgmt frame to dump it + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + goto fail; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->retry_ctrl = _FALSE; + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + + _rtw_memcpy(pframe, (void*)buf, len); + pattrib->pktlen = len; + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + //update seq number + pmlmeext->mgnt_seq = GetSequence(pwlanhdr); + pattrib->seqnum = pmlmeext->mgnt_seq; + pmlmeext->mgnt_seq++; + + + pattrib->last_txcmdsz = pattrib->pktlen; + + dump_mgntframe(padapter, pmgntframe); + + + } + else + { + printk("frame_ctl=0x%x\n", frame_ctl & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)); + } + + +fail: + + dev_kfree_skb(skb); + + return 0; + +} + +static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) +{ + printk("%s\n", __func__); +} + +static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) +{ + int ret = 0; + + printk("%s\n", __func__); + + return ret; +} + +#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) +static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { + .ndo_open = rtw_cfg80211_monitor_if_open, + .ndo_stop = rtw_cfg80211_monitor_if_close, + .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, + .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, + .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, +}; +#endif + +static struct net_device *rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name) +{ + int ret = 0; + struct net_device* ndev = NULL; + struct rtw_netdev_priv_indicator *pnpi; + struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); + + printk("%s\n", __func__); + + if (!name ) { + ret = -EINVAL; + goto out; + } + + if((strnicmp(name, pwdev_priv->ifname_mon, strlen(name)) ==0) + && pwdev_priv->pmon_ndev) + { + ndev = pwdev_priv->pmon_ndev; + + printk("%s, monitor interface(%s) has existed\n", __func__, name); + + goto out; + } + + + ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); + if (!ndev) { + ret = -ENOMEM; + goto out; + } + + ndev->type = ARPHRD_IEEE80211_RADIOTAP; + strncpy(ndev->name, name, IFNAMSIZ); + ndev->name[IFNAMSIZ - 1] = 0; + +#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) + ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; +#else + ndev->open = rtw_cfg80211_monitor_if_open; + ndev->stop = rtw_cfg80211_monitor_if_close; + ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; + ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; +#endif + + pnpi = netdev_priv(ndev); + pnpi->priv = padapter; + pnpi->sizeof_priv = sizeof(_adapter); + + ret = register_netdevice(ndev); + if (ret) { + goto out; + } + + pwdev_priv->pmon_ndev = ndev; + _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); + +out: + if (ret && ndev) + { + free_netdev(ndev); + ndev = NULL; + } + + + printk("%s, ndev=%p, pmon_ndev=%p, ret=%d\n", __func__, ndev, pwdev_priv->pmon_ndev, ret); + + return ndev; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) +static struct net_device * cfg80211_rtw_add_virtual_intf(struct wiphy *wiphy, char *name, +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) +static int cfg80211_rtw_add_virtual_intf(struct wiphy *wiphy, char *name, +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + enum nl80211_iftype type, u32 *flags, + struct vif_params *params) +{ + struct net_device* ndev = NULL; + _adapter *padapter = wiphy_to_adapter(wiphy); + + printk("%s, ifname=%s, type=%d\n", __func__, name, type); + + + switch (type) { + case NL80211_IFTYPE_ADHOC: + case NL80211_IFTYPE_AP_VLAN: + case NL80211_IFTYPE_WDS: + case NL80211_IFTYPE_MESH_POINT: + + break; + case NL80211_IFTYPE_MONITOR: + ndev = rtw_cfg80211_add_monitor_if(padapter, name); + break; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + case NL80211_IFTYPE_P2P_CLIENT: +#endif + case NL80211_IFTYPE_STATION: + + break; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + case NL80211_IFTYPE_P2P_GO: +#endif + case NL80211_IFTYPE_AP: + + break; + default: + printk("Unsupported interface type\n"); + break; + } + + printk("ndev=%p\n", ndev); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + return ndev; +#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + return 0; +#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + +} + +static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, struct net_device *dev) +{ + _adapter *padapter = wiphy_to_adapter(wiphy); + struct rtw_wdev_priv *pwdev_priv = (struct rtw_wdev_priv *)wiphy_priv(wiphy); + + printk("%s\n", __func__); + + if(dev) + { + unregister_netdev(dev); + + free_netdev(dev); + + if(dev == pwdev_priv->pmon_ndev) + { + printk("remove monitor interface\n"); + pwdev_priv->pmon_ndev = NULL; + pwdev_priv->ifname_mon[0] = '\0'; + } + } + + return 0; +} + +static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *dev, + struct beacon_parameters *info) +{ + int ret=0; + u8 *pbuf = NULL; + uint len, wps_ielen=0; + uint p2p_ielen=0; + u8 *p2p_ie; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + //struct sta_priv *pstapriv = &padapter->stapriv; + + + printk("%s, beacon_head_len=%d, beacon_tail_len=%d\n", __FUNCTION__, info->head_len, info->tail_len); + + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) + return -EINVAL; + + if(info->head_len<24) + return -EINVAL; + + + pbuf = rtw_zmalloc(info->head_len+info->tail_len); + if(!pbuf) + return -ENOMEM; + + + //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); + + //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) + // pstapriv->max_num_sta = NUM_STA; + + + _rtw_memcpy(pbuf, info->head+24, info->head_len-24);// 24=beacon header len. + _rtw_memcpy(pbuf+info->head_len-24, info->tail, info->tail_len); + + len = info->head_len+info->tail_len-24; + + //check wps ie if inclued + if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) + printk("add bcn, wps_ielen=%d\n", wps_ielen); + + + //check p2p ie if inclued + if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) + printk("got p2p_ie, len=%d\n", p2p_ielen); + + + + // pbss_network->IEs will not include p2p_ie + if(rtw_check_beacon_data(padapter, pbuf, len-p2p_ielen) == _SUCCESS) + //if(rtw_check_beacon_data(padapter, pbuf, len) == _SUCCESS) + { +#ifdef CONFIG_P2P + //check p2p if enable + if((p2p_ie=rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen))) + { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct wifidirect_info *pwdinfo= &(padapter->wdinfo); + + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + printk("Enable P2P function for the first time\n"); + rtw_p2p_enable(padapter, P2P_ROLE_GO); + wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; + } + else + { + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + + printk("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); + + rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); + rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); + pwdinfo->intent = 15; + } + + pwdinfo->operating_channel = pmlmeext->cur_channel; + + } +#endif //CONFIG_P2P + + ret = 0; + + } + else + { + ret = -EINVAL; + } + + + rtw_mfree(pbuf, info->head_len+info->tail_len); + + return ret; + +} + +static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *dev, + struct beacon_parameters *info) +{ + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + + printk("%s\n", __func__); + + pmlmeext->bstart_bss = _TRUE; + + cfg80211_rtw_add_beacon(wiphy, dev, info); + + return 0; +} + +static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *dev) +{ + printk("%s\n", __func__); + + return 0; +} + + +static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *dev, + u8 *mac, struct station_parameters *params) +{ + printk("%s\n", __func__); + + return 0; +} + +static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *dev, + u8 *mac) +{ + int ret=0; + _irqL irqL; + _list *phead, *plist; + struct sta_info *psta = NULL; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct sta_priv *pstapriv = &padapter->stapriv; + + printk("+%s\n", __func__); + + if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) + { + printk("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); + return -EINVAL; + } + + + if(!mac) + { + printk("flush all sta, and cam_entry\n"); + + flush_all_cam_entry(padapter); //clear CAM + + ret = rtw_sta_flush(padapter); + + return ret; + } + + + printk("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac)); + + if (mac[0] == 0xff && mac[1] == 0xff && + mac[2] == 0xff && mac[3] == 0xff && + mac[4] == 0xff && mac[5] == 0xff) + { + return -EINVAL; + } + + + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + phead = &pstapriv->asoc_list; + plist = get_next(phead); + + //check asoc_queue + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); + + plist = get_next(plist); + + if(_rtw_memcmp(mac, psta->hwaddr, ETH_ALEN)) + { + if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) + { + DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); + } + else + { + DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); + + rtw_list_delete(&psta->asoc_list); + + //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + ap_free_sta(padapter, psta); + //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + psta = NULL; + + break; + } + + } + + } + + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + +#if 0 + psta = rtw_get_stainfo(pstapriv, mac); + if(psta) + { + //DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); + + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) + { + rtw_list_delete(&psta->asoc_list); + ap_free_sta(padapter, psta); + + psta = NULL; + + } + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + } + else + { + DBG_8192C("cfg80211_rtw_del_station(), sta has already been removed or never been added\n"); + + //ret = -1; + } +#endif + + printk("-%s\n", __func__); + + return ret; + +} + +static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *dev, + u8 *mac, struct station_parameters *params) +{ + printk("%s\n", __func__); + + return 0; +} + +static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *dev, + int idx, u8 *mac, struct station_info *sinfo) +{ + printk("%s\n", __func__); + + //TODO: dump scanned queue + + return -ENOENT; +} + +static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *dev, + struct bss_parameters *params) +{ + u8 i; + + printk("%s\n", __func__); +/* + printk("use_cts_prot=%d\n", params->use_cts_prot); + printk("use_short_preamble=%d\n", params->use_short_preamble); + printk("use_short_slot_time=%d\n", params->use_short_slot_time); + printk("ap_isolate=%d\n", params->ap_isolate); + + printk("basic_rates_len=%d\n", params->basic_rates_len); + for(i=0; ibasic_rates_len; i++) + { + printk("basic_rates=%d\n", params->basic_rates[i]); + + } +*/ + return 0; + +} + +static int cfg80211_rtw_set_channel(struct wiphy *wiphy, struct net_device *dev, + struct ieee80211_channel *chan, + enum nl80211_channel_type channel_type) +{ + printk("%s\n", __func__); + + return 0; +} + +static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_auth_request *req) +{ + printk("%s\n", __func__); + + return 0; +} + +static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_assoc_request *req) +{ + printk("%s\n", __func__); + + return 0; +} +#endif //CONFIG_AP_MODE + +void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) +{ + s32 freq; + int channel; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s\n", __func__); +#endif + + rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); + + channel = pmlmeext->cur_channel; + + if (channel <= RTW_CH_MAX_2G_CHANNEL) + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); + } + else + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); + } + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +#else + cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +#endif + +} + +void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) +{ + s32 freq; + int channel; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s\n", __func__); +#endif + + rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); + + channel = pmlmeext->cur_channel; + + if (channel <= RTW_CH_MAX_2G_CHANNEL) + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); + } + else + { + freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); + } + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +#else + cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); +#endif + +} + +void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) +{ + u16 wps_devicepassword_id = 0x0000; + uint wps_devicepassword_id_len = 0; + u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; + uint p2p_ielen = 0; + uint wpsielen = 0; + u32 devinfo_contentlen = 0; + u8 devinfo_content[64] = { 0x00 }; + u16 capability = 0; + uint capability_len = 0; + + unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; + u8 action = P2P_PUB_ACTION_ACTION; + u8 dialogToken = 1; + u32 p2poui = cpu_to_be32(P2POUI); + u8 oui_subtype = P2P_PROVISION_DISC_REQ; + u32 p2pielen = 0; +#ifdef CONFIG_WFD + u32 wfdielen = 0; +#endif //CONFIG_WFD + + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + struct rtw_ieee80211_hdr *pwlanhdr; + unsigned short *fctrl; + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); + u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); + size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); + + + DBG_871X( "[%s] In\n", __FUNCTION__ ); + + //prepare for building provision_request frame + _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); + _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); + + pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; + + rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); + rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); + wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); + + switch(wps_devicepassword_id) + { + case WPS_DPID_PIN: + pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; + break; + case WPS_DPID_USER_SPEC: + pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; + break; + case WPS_DPID_MACHINE_SPEC: + break; + case WPS_DPID_REKEY: + break; + case WPS_DPID_PBC: + pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; + break; + case WPS_DPID_REGISTRAR_SPEC: + pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; + break; + default: + break; + } + + + if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) + { + + rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); + rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); + + } + + + //start to build provision_request frame + _rtw_memset(wpsie, 0, sizeof(wpsie)); + _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); + p2p_ielen = 0; + + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + return; + } + + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerIFAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerIFAddr, ETH_ALEN); + + SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); + pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_ACTION); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + + pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); + + + //build_prov_disc_request_p2p_ie + // P2P OUI + p2pielen = 0; + p2p_ie[ p2pielen++ ] = 0x50; + p2p_ie[ p2pielen++ ] = 0x6F; + p2p_ie[ p2pielen++ ] = 0x9A; + p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 + + // Commented by Albert 20110301 + // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes + // 1. P2P Capability + // 2. Device Info + // 3. Group ID ( When joining an operating P2P Group ) + + // P2P Capability ATTR + // Type: + p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; + + // Length: + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); + RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); + p2pielen += 2; + + // Value: + // Device Capability Bitmap, 1 byte + // Be able to participate in additional P2P Groups and + // support the P2P Invitation Procedure + _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); + p2pielen += 2; + + + // Device Info ATTR + // Type: + p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; + + // Length: + // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) + // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) + //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); + RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); + p2pielen += 2; + + // Value: + _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); + p2pielen += devinfo_contentlen; + + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); + //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); + //pframe += p2pielen; + pattrib->pktlen += p2p_ielen; + + wpsielen = 0; + // WPS OUI + *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); + wpsielen += 4; + + // WPS version + // Type: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); + wpsielen += 2; + + // Length: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); + wpsielen += 2; + + // Value: + wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 + + // Config Method + // Type: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); + wpsielen += 2; + + // Length: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); + wpsielen += 2; + + // Value: + *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); + wpsielen += 2; + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); + + +#ifdef CONFIG_WFD + wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); + pframe += wfdielen; + pattrib->pktlen += wfdielen; +#endif //CONFIG_WFD + + pattrib->last_txcmdsz = pattrib->pktlen; + + dump_mgntframe(padapter, pmgntframe); + + //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) + //{ + // printk("waiting for p2p peer key-in PIN CODE\n"); + // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. + //} + +} + +static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct net_device *dev, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + struct ieee80211_channel *chan, bool offchan, + enum nl80211_channel_type channel_type, + bool channel_type_valid, unsigned int wait, +#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + struct ieee80211_channel *chan, + enum nl80211_channel_type channel_type, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + bool channel_type_valid, +#endif +#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + const u8 *buf, size_t len, u64 *cookie) +{ + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; + const struct ieee80211_mgmt *mgmt; + //u8 category, action, OUI_Subtype, dialogToken=0; + //unsigned char *frame_body; + int ret = 0; + int type = (-1); + u16 fc; + bool ack = _TRUE; + struct rtw_ieee80211_hdr *pwlanhdr; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + + + /* cookie generation */ + *cookie = (unsigned long) buf; + + + printk("%s, len=%d, ch=%d, ch_type=%d\n", __func__, len, + ieee80211_frequency_to_channel(chan->center_freq), channel_type); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + printk("channel_type_valid=%d\n", channel_type_valid); +#endif + + mgmt = (const struct ieee80211_mgmt *) buf; + fc = mgmt->frame_control; + if (fc != IEEE80211_STYPE_ACTION) + { + if (fc == IEEE80211_STYPE_PROBE_RESP) + { + printk("%s, fc == IEEE80211_STYPE_PROBE_RESP\n", __func__); + } + else + { + printk("%s, frame_control == 0x%x\n", __func__, fc); + } + + //cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); + + goto exit; + + } + else + { + u32 cnt=0; + u32 wait_for_surveydone; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, do: scan_abort\n", __func__); +#endif + + /* Abort the dwell time of any previous off-channel action frame that may + * be still in effect. Sending off-channel action frames relies on the + * driver's scan engine. If a previous off-channel action frame tx is + * still in progress (including the dwell time), then this new action + * frame will not be sent out. + */ + + rtw_cfg80211_scan_abort(padapter); + } +#if 0 + if (wl->p2p->vif_created) { + wifi_p2p_pub_act_frame_t *act_frm = + (wifi_p2p_pub_act_frame_t *) (action_frame->data); + WL_DBG(("action_frame->len: %d chan %d category %d subtype %d\n", + action_frame->len, af_params->channel, + act_frm->category, act_frm->subtype)); + /* + * To make sure to send successfully action frame, we have to turn off mpc + */ + if ((act_frm->subtype == P2P_PAF_GON_REQ)|| + (act_frm->subtype == P2P_PAF_GON_RSP)) { + wldev_iovar_setint(dev, "mpc", 0); + } else if (act_frm->subtype == P2P_PAF_GON_CONF) { + wldev_iovar_setint(dev, "mpc", 1); + } else if (act_frm->subtype == P2P_PAF_DEVDIS_REQ) { + af_params->dwell_time = WL_LONG_DWELL_TIME; + } + } +#endif + +/* + frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); + category = frame_body[0]; + //just for check + if(category == RTW_WLAN_CATEGORY_PUBLIC) + { + action = frame_body[ 1 ]; + OUI_Subtype = frame_body[ 6 ]; + dialogToken = frame_body[7]; + + if ( action == ACT_PUBLIC_P2P ) + { + printk("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); + } + else + { + printk("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); + } + + } + else if(category == RTW_WLAN_CATEGORY_P2P) + { + OUI_Subtype = frame_body[5]; + dialogToken = frame_body[6]; + + printk("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", + cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); + + } + else + { + printk("%s, action frame category=%d\n", __func__, category); + ack = _FALSE; + goto exit; + } +*/ + + if( ieee80211_frequency_to_channel(chan->center_freq) != pmlmeext->cur_channel ) + { + pmlmeext->cur_channel = ieee80211_frequency_to_channel(chan->center_freq); + set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + } + + + if( (type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) < 0) + { + ack = _FALSE; + goto exit; + } + + + //if(type == P2P_GO_NEGO_REQ) + //{ + // rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); + //} + + + //starting alloc mgmt frame to dump it + if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) + { + ack = _FALSE; + ret = -ENOMEM; + goto exit; + } + + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->retry_ctrl = _FALSE; + + _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); + + pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; + + _rtw_memcpy(pframe, (void*)buf, len); + pattrib->pktlen = len; + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + //update seq number + pmlmeext->mgnt_seq = GetSequence(pwlanhdr); + pattrib->seqnum = pmlmeext->mgnt_seq; + pmlmeext->mgnt_seq++; + + + pattrib->last_txcmdsz = pattrib->pktlen; + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, ack=%d, ok!\n", __func__, ack ); +#endif + + //indicate ack before issue frame to avoid racing with rsp frame +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); +#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) + cfg80211_action_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); +#endif + + dump_mgntframe(padapter, pmgntframe); + + return ret; + +exit: + + printk("%s, ack=%d \n", __func__, ack ); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); +#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) + cfg80211_action_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); +#endif + + return ret; + +} + +static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, struct net_device *dev, + struct ieee80211_channel * channel, + enum nl80211_channel_type channel_type, + unsigned int duration, u64 *cookie) +{ + s32 err = 0; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; + u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); + + printk("%s channel %02u duration %d\n", __func__, remain_ch, duration); + + if(_FAIL == rtw_pwr_wakeup(padapter)) { + err = -EFAULT; + goto exit; + } + + pcfg80211_wdinfo->remain_on_ch_dev = dev; + _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); + pcfg80211_wdinfo->remain_on_ch_type= channel_type; + pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; + cfg80211_ready_on_channel(dev, *cookie, channel, channel_type, duration, GFP_KERNEL); + + pcfg80211_wdinfo->restore_channel = pmlmeext->cur_channel; + + rtw_cfg80211_scan_abort(padapter); + + if( remain_ch != pmlmeext->cur_channel ) + { + if(rtw_is_channel_set_contains_channel(pmlmeext->channel_set, remain_ch)) { + pmlmeext->cur_channel = remain_ch; + set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); + } else { + DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); + } + } + + //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); + wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; + } + else + { + rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +#endif + } + + rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); + pwdinfo->listen_channel = pmlmeext->cur_channel; + + //call this after other things have been done + _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); + +exit: + return err; +} + +static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, struct net_device *dev, + u64 cookie) +{ + s32 err = 0; + _adapter *padapter = wiphy_to_adapter(wiphy); + struct wifidirect_info *pwdinfo = &padapter->wdinfo; + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; + + printk("%s\n", __func__); + + //Modified bu Kurt 20120114 + _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); + + #if 0 + // Disable P2P Listen State + if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) + { + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + _cancel_timer_ex( &pwdinfo->find_phase_timer ); + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); + + rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); + _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); + + if(pwrpriv->bips_processing == _FALSE){ + rtw_set_pwr_state_check_timer(pwrpriv); + } + } + } + else + #endif + { + rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); +#endif + } + + return err; +} + +static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, struct net_device *dev, + u16 frame_type, bool reg) +{ + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s: frame_type: %x, reg: %d\n", __func__, frame_type, reg); +#endif + + if (frame_type != (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ)) + return; + + return; +} + +static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *net, char *buf, int len) +{ + int ret = 0; + uint wps_ielen = 0; + u8 *wps_ie; + u32 p2p_ielen = 0; + u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; + u8 *p2p_ie; + _adapter *padapter = (_adapter *)rtw_netdev_priv(net); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + + printk("%s, ielen=%d\n", __func__, len); + + if(len>0) + { + if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) + { + #ifdef CONFIG_DEBUG_CFG80211 + printk("bcn_wps_ielen=%d\n", wps_ielen); + #endif + + if(pmlmepriv->wps_beacon_ie) + { + u32 free_len = pmlmepriv->wps_beacon_ie_len; + pmlmepriv->wps_beacon_ie_len = 0; + rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); + pmlmepriv->wps_beacon_ie = NULL; + } + + pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); + if ( pmlmepriv->wps_beacon_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + + _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); + pmlmepriv->wps_beacon_ie_len = wps_ielen; + + update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); + + } + + buf += wps_ielen; + len -= wps_ielen; + + if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) + { + #ifdef CONFIG_DEBUG_CFG80211 + printk("bcn_p2p_ielen=%d\n", p2p_ielen); + #endif + + if(pmlmepriv->p2p_beacon_ie) + { + u32 free_len = pmlmepriv->p2p_beacon_ie_len; + pmlmepriv->p2p_beacon_ie_len = 0; + rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); + pmlmepriv->p2p_beacon_ie = NULL; + } + + pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); + if ( pmlmepriv->p2p_beacon_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + + _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); + pmlmepriv->p2p_beacon_ie_len = p2p_ielen; + + } + + pmlmeext->bstart_bss = _TRUE; + + } + + return ret; + +} + +static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) +{ + int ret = 0; + uint wps_ielen = 0; + u8 *wps_ie; + u32 p2p_ielen = 0; + u8 *p2p_ie; + _adapter *padapter = (_adapter *)rtw_netdev_priv(net); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, ielen=%d\n", __func__, len); +#endif + + if(len>0) + { + if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) + { + uint attr_contentlen = 0; + u16 uconfig_method, *puconfig_method = NULL; + + #ifdef CONFIG_DEBUG_CFG80211 + printk("probe_resp_wps_ielen=%d\n", wps_ielen); + #endif + + if(pmlmepriv->wps_probe_resp_ie) + { + u32 free_len = pmlmepriv->wps_probe_resp_ie_len; + pmlmepriv->wps_probe_resp_ie_len = 0; + rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); + pmlmepriv->wps_probe_resp_ie = NULL; + } + + pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); + if ( pmlmepriv->wps_probe_resp_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + + //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode + if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) + { + #ifdef CONFIG_DEBUG_CFG80211 + //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); + #endif + + uconfig_method = WPS_CM_PUSH_BUTTON; + uconfig_method = cpu_to_be16( uconfig_method ); + + *puconfig_method |= uconfig_method; + } + + _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); + pmlmepriv->wps_probe_resp_ie_len = wps_ielen; + + } + + buf += wps_ielen; + len -= wps_ielen; + + if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) + { + u8 is_GO = _FALSE; + u32 attr_contentlen = 0; + u16 cap_attr=0; + + #ifdef CONFIG_DEBUG_CFG80211 + printk("probe_resp_p2p_ielen=%d\n", p2p_ielen); + #endif + + //Check P2P Capability ATTR + if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) + { + u8 grp_cap=0; + //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); + cap_attr = le16_to_cpu(cap_attr); + grp_cap = (u8)((cap_attr >> 8)&0xff); + + is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; + + if(is_GO) + printk("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); + } + + + if(is_GO == _FALSE) + { + if(pmlmepriv->p2p_probe_resp_ie) + { + u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; + pmlmepriv->p2p_probe_resp_ie_len = 0; + rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); + pmlmepriv->p2p_probe_resp_ie = NULL; + } + + pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); + if ( pmlmepriv->p2p_probe_resp_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); + pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; + } + else + { + if(pmlmepriv->p2p_go_probe_resp_ie) + { + u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; + pmlmepriv->p2p_go_probe_resp_ie_len = 0; + rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); + pmlmepriv->p2p_go_probe_resp_ie = NULL; + } + + pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); + if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); + pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; + } + + } + + } + + return ret; + +} + +static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) +{ + int ret = 0; + _adapter *padapter = (_adapter *)rtw_netdev_priv(net); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + + printk("%s, ielen=%d\n", __func__, len); + + if(len>0) + { + if(pmlmepriv->wps_assoc_resp_ie) + { + u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; + pmlmepriv->wps_assoc_resp_ie_len = 0; + rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); + pmlmepriv->wps_assoc_resp_ie = NULL; + } + + pmlmepriv->wps_assoc_resp_ie = rtw_malloc(len); + if ( pmlmepriv->wps_assoc_resp_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + return -EINVAL; + + } + _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, buf, len); + pmlmepriv->wps_assoc_resp_ie_len = len; + } + + return ret; + +} + +int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, + int type) +{ + int ret = 0; + uint wps_ielen = 0; + u32 p2p_ielen = 0; + +#ifdef CONFIG_DEBUG_CFG80211 + printk("%s, ielen=%d\n", __func__, len); +#endif + + if((rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) || + (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) ) + { + if (net != NULL) + { + switch (type) + { + case 0x1: //BEACON + ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); + break; + case 0x2: //PROBE_RESP + ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); + break; + case 0x4: //ASSOC_RESP + ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); + break; + } + } + } + + return ret; + +} + +static struct cfg80211_ops rtw_cfg80211_ops = { + .change_virtual_intf = cfg80211_rtw_change_iface, + .add_key = cfg80211_rtw_add_key, + .get_key = cfg80211_rtw_get_key, + .del_key = cfg80211_rtw_del_key, + .set_default_key = cfg80211_rtw_set_default_key, + .get_station = cfg80211_rtw_get_station, + .scan = cfg80211_rtw_scan, + .set_wiphy_params = cfg80211_rtw_set_wiphy_params, + .connect = cfg80211_rtw_connect, + .disconnect = cfg80211_rtw_disconnect, + .join_ibss = cfg80211_rtw_join_ibss, + .leave_ibss = cfg80211_rtw_leave_ibss, + .set_tx_power = cfg80211_rtw_set_txpower, + .get_tx_power = cfg80211_rtw_get_txpower, + .set_power_mgmt = cfg80211_rtw_set_power_mgmt, + .set_pmksa = cfg80211_rtw_set_pmksa, + .del_pmksa = cfg80211_rtw_del_pmksa, + .flush_pmksa = cfg80211_rtw_flush_pmksa, +#ifdef CONFIG_AP_MODE + .add_virtual_intf = cfg80211_rtw_add_virtual_intf, + .del_virtual_intf = cfg80211_rtw_del_virtual_intf, + .add_beacon = cfg80211_rtw_add_beacon, + .set_beacon = cfg80211_rtw_set_beacon, + .del_beacon = cfg80211_rtw_del_beacon, + .add_station = cfg80211_rtw_add_station, + .del_station = cfg80211_rtw_del_station, + .change_station = cfg80211_rtw_change_station, + .dump_station = cfg80211_rtw_dump_station, + .change_bss = cfg80211_rtw_change_bss, + .set_channel = cfg80211_rtw_set_channel, + //.auth = cfg80211_rtw_auth, + //.assoc = cfg80211_rtw_assoc, +#endif //CONFIG_AP_MODE + .remain_on_channel = cfg80211_rtw_remain_on_channel, + .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + .mgmt_tx = cfg80211_rtw_mgmt_tx, + .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, +#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) + .action = cfg80211_rtw_mgmt_tx, +#endif +}; + +static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) +{ + +#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ +#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ + + ht_cap->ht_supported = _TRUE; + + ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | + IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | + IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; + + /* + *Maximum length of AMPDU that the STA can receive. + *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) + */ + ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; + + /*Minimum MPDU start spacing , */ + ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; + + ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; + + /* + *hw->wiphy->bands[IEEE80211_BAND_2GHZ] + *base on ant_num + *rx_mask: RX mask + *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 + *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 + *if rx_ant >=3 rx_mask[2]=0xff; + *if BW_40 rx_mask[4]=0x01; + *highest supported RX rate + */ + if(rf_type == RF_1T1R) + { + ht_cap->mcs.rx_mask[0] = 0xFF; + ht_cap->mcs.rx_mask[1] = 0x00; + ht_cap->mcs.rx_mask[4] = 0x01; + + ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; + } + else if((rf_type == RF_1T2R) || (rf_type==RF_2T2R)) + { + ht_cap->mcs.rx_mask[0] = 0xFF; + ht_cap->mcs.rx_mask[1] = 0xFF; + ht_cap->mcs.rx_mask[4] = 0x01; + + ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; + } + else + { + printk("%s, error rf_type=%d\n", __func__, rf_type); + } + +} + +void rtw_cfg80211_init_wiphy(_adapter *padapter) +{ + u8 rf_type; + struct ieee80211_supported_band *bands; + struct wireless_dev *pwdev = padapter->rtw_wdev; + struct wiphy *wiphy = pwdev->wiphy; + + padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + + printk("%s:rf_type=%d\n", __func__, rf_type); + + bands = wiphy->bands[IEEE80211_BAND_2GHZ]; + rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); + + + bands = wiphy->bands[IEEE80211_BAND_5GHZ]; + rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); +} + +static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) +{ + + wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; + + wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; + wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; + wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) + wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; +#endif + + wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | + BIT(NL80211_IFTYPE_ADHOC) +#ifdef CONFIG_AP_MODE + | BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_MONITOR) +#endif +#if defined(CONFIG_P2P) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) + | BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO) +#endif + ; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) +#ifdef CONFIG_AP_MODE + wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; +#endif //CONFIG_AP_MODE +#endif + + wiphy->cipher_suites = rtw_cipher_suites; + wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); + + + wiphy->bands[IEEE80211_BAND_2GHZ] = &rtw_band_2ghz; + wiphy->bands[IEEE80211_BAND_5GHZ] = &rtw_band_5ghz; + +} + +int rtw_wdev_alloc(_adapter *padapter, struct device *dev) +{ + int ret = 0; + struct wireless_dev *wdev; + struct rtw_wdev_priv *pwdev_priv; + struct net_device *pnetdev = padapter->pnetdev; + + printk("%s\n", __func__); + + wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); + if (!wdev) { + printk("Couldn't allocate wireless device\n"); + return (-ENOMEM); + } + + wdev->wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(struct rtw_wdev_priv)); + if (!wdev->wiphy) { + printk("Couldn't allocate wiphy device\n"); + ret = -ENOMEM; + goto out_err_new; + } + + set_wiphy_dev(wdev->wiphy, dev); + + // + padapter->rtw_wdev = wdev; + pnetdev->ieee80211_ptr = wdev; + + //init pwdev_priv + pwdev_priv = wdev_to_priv(wdev); + pwdev_priv->pmon_ndev = NULL; + pwdev_priv->ifname_mon[0] = '\0'; + pwdev_priv->rtw_wdev = wdev; + pwdev_priv->padapter = padapter; + pwdev_priv->scan_request = NULL; + _rtw_spinlock_init(&pwdev_priv->scan_req_lock); + + pwdev_priv->p2p_enabled = _FALSE; + pwdev_priv->provdisc_req_issued = _FALSE; + + wdev->netdev = pnetdev; + wdev->iftype = NL80211_IFTYPE_MONITOR; + + rtw_cfg80211_preinit_wiphy(padapter, wdev->wiphy); + + ret = wiphy_register(wdev->wiphy); + if (ret < 0) { + printk("Couldn't register wiphy device\n"); + goto out_err_register; + } + + SET_NETDEV_DEV(pnetdev, wiphy_dev(wdev->wiphy)); + + return ret; + + out_err_register: + wiphy_free(wdev->wiphy); + + out_err_new: + rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); + + return ret; + +} + +void rtw_wdev_free(struct wireless_dev *wdev) +{ + struct rtw_wdev_priv *pwdev_priv; + + printk("%s\n", __func__); + + if (!wdev) + return; + + pwdev_priv = wdev_to_priv(wdev); + + printk("%s, scan abort when device remove\n", __func__); + rtw_cfg80211_indicate_scan_done(pwdev_priv, _TRUE); + + if(pwdev_priv->pmon_ndev) + { + printk("%s, unregister monitor interface\n", __func__); + + unregister_netdev(pwdev_priv->pmon_ndev); + + free_netdev(pwdev_priv->pmon_ndev); + } + + + wiphy_unregister(wdev->wiphy); + wiphy_free(wdev->wiphy); + + rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); +} + +#endif //CONFIG_IOCTL_CFG80211 + diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_linux.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_linux.c old mode 100755 new mode 100644 index 73301603f62a5a..f999502064dbd5 --- a/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_linux.c +++ b/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_linux.c @@ -1834,7 +1834,7 @@ _func_enter_; if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); - pwdinfo->find_phase_state_exchange_cnt = 0; + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_FULL); rtw_free_network_queue(padapter, _TRUE); } #endif //CONFIG_P2P @@ -6887,11 +6887,31 @@ static int rtw_wx_set_priv(struct net_device *dev, if((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) && (_rtw_memcmp(&probereq_wpsie[2], wps_oui, 4) ==_TRUE)) { - cp_sz = probereq_wpsie_len>MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN:probereq_wpsie_len; - _rtw_memcpy(pmlmepriv->probereq_wpsie, probereq_wpsie, cp_sz); - pmlmepriv->probereq_wpsie_len = cp_sz; + //_rtw_memcpy(pmlmepriv->probereq_wpsie, probereq_wpsie, cp_sz); + //pmlmepriv->probereq_wpsie_len = cp_sz; + + printk("probe_req_wps_ielen=%d\n", cp_sz); + + if(pmlmepriv->wps_probe_req_ie) + { + u32 free_len = pmlmepriv->wps_probe_req_ie_len; + pmlmepriv->wps_probe_req_ie_len = 0; + rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); + pmlmepriv->wps_probe_req_ie = NULL; + } + + pmlmepriv->wps_probe_req_ie = rtw_malloc(cp_sz); + if ( pmlmepriv->wps_probe_req_ie == NULL) { + printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); + ret = -EINVAL; + goto FREE_EXT; + + } + + _rtw_memcpy(pmlmepriv->wps_probe_req_ie, probereq_wpsie, cp_sz); + pmlmepriv->wps_probe_req_ie_len = cp_sz; } diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/mlme_linux.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/mlme_linux.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c old mode 100755 new mode 100644 index 61e412070c8ffa..4d057a6b47bda5 --- a/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c +++ b/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c @@ -443,6 +443,13 @@ void rtw_proc_init_one(struct net_device *dev) } entry->write_proc = proc_set_rx_signal; + entry = create_proc_read_entry("ampdu_enable", S_IFREG | S_IRUGO, + dir_dev, proc_get_ampdu_enable, dev); + if (!entry) { + DBG_871X("Unable to create_proc_read_entry!\n"); + return; + } + entry->write_proc = proc_set_ampdu_enable; entry = create_proc_read_entry("rssi_disp", S_IFREG | S_IRUGO, dir_dev, proc_get_rssi_disp, dev); @@ -1209,7 +1216,7 @@ u8 rtw_free_drv_sw(_adapter *padapter) } -int netdev_open(struct net_device *pnetdev) +int _netdev_open(struct net_device *pnetdev) { uint status; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); @@ -1360,7 +1367,18 @@ int netdev_open(struct net_device *pnetdev) } +int netdev_open(struct net_device *pnetdev) +{ + int ret; + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; + + _enter_pwrlock(&pwrctrlpriv->lock); + ret = _netdev_open(pnetdev); + _exit_pwrlock(&pwrctrlpriv->lock); + return ret; +} #ifdef CONFIG_IPS int ips_netdrv_open(_adapter *padapter) @@ -1455,7 +1473,7 @@ int pm_netdev_open(struct net_device *pnetdev,u8 bnormal) { int status; if(bnormal) - status = netdev_open(pnetdev); + status = _netdev_open(pnetdev); #ifdef CONFIG_IPS else status = (_SUCCESS == ips_netdrv_open((_adapter *)rtw_netdev_priv(pnetdev)))?(0):(-1); diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/pci_intf.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/pci_intf.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/recv_linux.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/recv_linux.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/rtw_android.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/rtw_android.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/sdio_intf.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/sdio_intf.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c old mode 100755 new mode 100644 index 2e54e745e70ac5..134acdc584f139 --- a/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c +++ b/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c @@ -114,7 +114,6 @@ static struct usb_device_id rtw_usb_id_tbl[] ={ {USB_DEVICE(0x4856, 0x0091)},//NetweeN - Feixun {USB_DEVICE(0x2019, 0x4902)},//Planex - Etop {USB_DEVICE(0x2019, 0xAB2E)},//SW-WF02-AD15 -Abocom - {USB_DEVICE(0x0846, 0x9041)},//Netgear /****** 8188 RU ********/ {USB_DEVICE(0x0BDA, 0x317F)},//Netcore,Netcore @@ -138,7 +137,6 @@ static struct usb_device_id rtw_usb_id_tbl[] ={ {USB_DEVICE(0x2001, 0x3307)},//D-Link - Cameo {USB_DEVICE(0x2001, 0x330A)},//D-Link - Alpha {USB_DEVICE(0x2001, 0x3309)},//D-Link - Alpha - {USB_DEVICE(0x2001, 0x330D)},//D-Link - Alpha(?) {USB_DEVICE(0x0586, 0x341F)},//Zyxel - Abocom {USB_DEVICE(0x7392, 0x7822)},//Edimax - Edimax {USB_DEVICE(0x2019, 0xAB2B)},//Planex - Abocom diff --git a/drivers/net/wireless/rtl8192cu/os_dep/linux/xmit_linux.c b/drivers/net/wireless/rtl8192cu/os_dep/linux/xmit_linux.c old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/rtl8192cu/os_dep/osdep_service.c b/drivers/net/wireless/rtl8192cu/os_dep/osdep_service.c old mode 100755 new mode 100644 index 6e1137909d99be..04cb35fdddfea3 --- a/drivers/net/wireless/rtl8192cu/os_dep/osdep_service.c +++ b/drivers/net/wireless/rtl8192cu/os_dep/osdep_service.c @@ -137,7 +137,7 @@ u8* _rtw_malloc(u32 sz) pbuf = (u8 *)dvr_malloc(sz); else #endif - pbuf = kmalloc(sz, /*GFP_KERNEL*/GFP_ATOMIC); + pbuf = kmalloc(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); #endif diff --git a/drivers/net/wireless/rtl8192cu/wlan0dhcp b/drivers/net/wireless/rtl8192cu/wlan0dhcp old mode 100755 new mode 100644