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recalcirecalci
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Update USBPD definition
Update CH32X035 USBPD Remove USBPD definition from other device headers.
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8 files changed

+659
-682
lines changed

8 files changed

+659
-682
lines changed

‎ch32fun/README.md

+1-1
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
|USART | √ | x |2.4 | x | x | √ | × | × |
3131
|USB |N/A |N/A | √ | x | x |1.8 | × | × |
3232
|USB_HOST |N/A |N/A | √ |N/A |N/A |N/A |N/A |N/A |
33-
|USBPD |N/A |N/A |N/A |N/A |N/A | x | × | × |
33+
|USBPD |N/A |N/A |N/A |N/A |N/A |1.4 | × | × |
3434
|WWWDG | √ | x | √ | x | x | √ | × | × |
3535
|**chxxxhw.h** | √ | x | √ | √ | √ | √ | x | x |
3636
|**minichlink**| √ | x | √ | √ | √ | √ | x | x |

‎ch32fun/ch32v003hw.h

-113
Original file line numberDiff line numberDiff line change
@@ -602,119 +602,6 @@ typedef struct
602602

603603

604604

605-
// AFIO CTLR Bits
606-
#define PB6_FILT_EN (1<<27)
607-
#define PB5_FILT_EN (1<<26)
608-
#define PA4_FILT_EN (1<<25)
609-
#define PA3_FILT_EN (1<<24)
610-
#define UDM_BC_CMPO (1<<19)
611-
#define UDP_BC_CMPO (1<<17)
612-
#define UDM_BC_VSRC (1<<17)
613-
#define UDP_BC_VSRC (1<<16)
614-
#define USBPD_IN_HVT (1<<9)
615-
#define USBPD_PHY_V33 (1<<8)
616-
#define USB_IOEN (1<<7)
617-
#define USB_PHY_V33 (1<<6)
618-
#define UDP_PUE_00 (0b00<<2)
619-
#define UDP_PUE_01 (0b01<<2)
620-
#define UDP_PUE_10 (0b10<<2)
621-
#define UDP_PUE_11 (0b11<<2)
622-
#define UDM_PUE_00 (0b00<<0)
623-
#define UDM_PUE_01 (0b01<<0)
624-
#define UDM_PUE_10 (0b10<<0)
625-
#define UDM_PUE_11 (0b11<<0)
626-
#define UDP_PUE_MASK 0x0000000C
627-
#define UDP_PUE_DISABLE 0x00000000
628-
#define UDP_PUE_35UA 0x00000004
629-
#define UDP_PUE_10K 0x00000008
630-
#define UDP_PUE_1K5 0x0000000C
631-
#define UDM_PUE_MASK 0x00000003
632-
#define UDM_PUE_DISABLE 0x00000000
633-
#define UDM_PUE_35UA 0x00000001
634-
#define UDM_PUE_10K 0x00000002
635-
#define UDM_PUE_1K5 0x00000003
636-
637-
638-
// USB PD Bits
639-
#define IE_TX_END (1<<15)
640-
#define IE_RX_RESET (1<<14)
641-
#define IE_RX_ACT (1<<13)
642-
#define IE_RX_BYTE (1<<12)
643-
#define IE_RX_BIT (1<<11)
644-
#define IE_PD_IO (1<<10)
645-
#define WAKE_POLAR (1<<5)
646-
#define PD_RST_EN (1<<4)
647-
#define PD_DMA_EN (1<<3)
648-
#define CC_SEL (1<<2)
649-
#define PD_ALL_CLR (1<<1)
650-
#define PD_FILT_EN (1<<0)
651-
#define BMC_CLK_CNT_MASK (0xff)
652-
653-
//R8_CONTROL
654-
#define BMC_BYTE_HI (1<<7)
655-
#define TX_BIT_BACK (1<<6)
656-
#define DATA_FLAG (1<<5)
657-
#define RX_STATE_MASK (0x7<<2)
658-
#define RX_STATE_0 (1<<2)
659-
#define RX_STATE_1 (1<<3)
660-
#define RX_STATE_2 (1<<4)
661-
#define BMC_START (1<<1)
662-
#define PD_TX_EN (1<<0)
663-
664-
#define TX_SEL4_MASK (3<<6)
665-
#define TX_SEL4_0 (1<<6)
666-
#define TX_SEL4_1 (1<<7)
667-
668-
#define TX_SEL3_MASK (3<<4)
669-
#define TX_SEL3_0 (1<<4)
670-
#define TX_SEL3_1 (1<<5)
671-
672-
#define TX_SEL2_MASK (3<<2)
673-
#define TX_SEL2_0 (1<<2)
674-
#define TX_SEL2_1 (1<<3)
675-
676-
#define TX_SEL1 (1<<0)
677-
678-
#define BMC_TX_SZ_MASK (0x1ff)
679-
680-
//R8_STATUS
681-
#define IF_TX_END (1<<7)
682-
#define IF_RX_RESET (1<<6)
683-
#define IF_RX_ACT (1<<5)
684-
#define IF_RX_BYTE (1<<4)
685-
#define IF_RX_BIT (1<<3)
686-
#define IFBUF_ERR (1<<2)
687-
#define BMC_AUX_MASK (3<<0)
688-
#define BMC_AUX_1 (1<<1)
689-
#define BMC_AUX_0 (1<<0)
690-
691-
// PORT CC1
692-
#define CC1_CE_MASK (7<<5)
693-
#define CC1_CE_0 (1<<5)
694-
#define CC1_CE_1 (2<<5)
695-
#define CC1_CE_2 (4<<5)
696-
697-
#define CC1_LVE (1<<4)
698-
#define CC1_PU_MASK (3<<2)
699-
#define CC1_PU_DISABLE (0<<2)
700-
#define CC1_PU_330uA (1<<2)
701-
#define CC1_PU_180uA (2<<2)
702-
#define CC1_PU_80uA (3<<2)
703-
#define PA_CC1_AI (1<<0)
704-
705-
#define CC2_CE_MASK (7<<5)
706-
#define CC2_CE_0 (1<<5)
707-
#define CC2_CE_1 (2<<5)
708-
#define CC2_CE_2 (4<<5)
709-
710-
#define CC2_LVE (1<<4)
711-
#define CC2_PU_MASK (3<<2)
712-
#define CC2_PU_DISABLE (0<<2)
713-
#define CC2_PU_330uA (1<<2)
714-
#define CC2_PU_180uA (2<<2)
715-
#define CC2_PU_80uA (3<<2)
716-
#define PA_CC2_AI (1<<0)
717-
718605

719606

720607
/* Peripheral declaration */

‎ch32fun/ch32v10xhw.h

-113
Original file line numberDiff line numberDiff line change
@@ -839,119 +839,6 @@ typedef struct{
839839

840840

841841

842-
// AFIO CTLR Bits
843-
#define PB6_FILT_EN (1<<27)
844-
#define PB5_FILT_EN (1<<26)
845-
#define PA4_FILT_EN (1<<25)
846-
#define PA3_FILT_EN (1<<24)
847-
#define UDM_BC_CMPO (1<<19)
848-
#define UDP_BC_CMPO (1<<17)
849-
#define UDM_BC_VSRC (1<<17)
850-
#define UDP_BC_VSRC (1<<16)
851-
#define USBPD_IN_HVT (1<<9)
852-
#define USBPD_PHY_V33 (1<<8)
853-
#define USB_IOEN (1<<7)
854-
#define USB_PHY_V33 (1<<6)
855-
#define UDP_PUE_00 (0b00<<2)
856-
#define UDP_PUE_01 (0b01<<2)
857-
#define UDP_PUE_10 (0b10<<2)
858-
#define UDP_PUE_11 (0b11<<2)
859-
#define UDM_PUE_00 (0b00<<0)
860-
#define UDM_PUE_01 (0b01<<0)
861-
#define UDM_PUE_10 (0b10<<0)
862-
#define UDM_PUE_11 (0b11<<0)
863-
#define UDP_PUE_MASK 0x0000000C
864-
#define UDP_PUE_DISABLE 0x00000000
865-
#define UDP_PUE_35UA 0x00000004
866-
#define UDP_PUE_10K 0x00000008
867-
#define UDP_PUE_1K5 0x0000000C
868-
#define UDM_PUE_MASK 0x00000003
869-
#define UDM_PUE_DISABLE 0x00000000
870-
#define UDM_PUE_35UA 0x00000001
871-
#define UDM_PUE_10K 0x00000002
872-
#define UDM_PUE_1K5 0x00000003
873-
874-
875-
// USB PD Bits
876-
#define IE_TX_END (1<<15)
877-
#define IE_RX_RESET (1<<14)
878-
#define IE_RX_ACT (1<<13)
879-
#define IE_RX_BYTE (1<<12)
880-
#define IE_RX_BIT (1<<11)
881-
#define IE_PD_IO (1<<10)
882-
#define WAKE_POLAR (1<<5)
883-
#define PD_RST_EN (1<<4)
884-
#define PD_DMA_EN (1<<3)
885-
#define CC_SEL (1<<2)
886-
#define PD_ALL_CLR (1<<1)
887-
#define PD_FILT_EN (1<<0)
888-
#define BMC_CLK_CNT_MASK (0xff)
889-
890-
//R8_CONTROL
891-
#define BMC_BYTE_HI (1<<7)
892-
#define TX_BIT_BACK (1<<6)
893-
#define DATA_FLAG (1<<5)
894-
#define RX_STATE_MASK (0x7<<2)
895-
#define RX_STATE_0 (1<<2)
896-
#define RX_STATE_1 (1<<3)
897-
#define RX_STATE_2 (1<<4)
898-
#define BMC_START (1<<1)
899-
#define PD_TX_EN (1<<0)
900-
901-
#define TX_SEL4_MASK (3<<6)
902-
#define TX_SEL4_0 (1<<6)
903-
#define TX_SEL4_1 (1<<7)
904-
905-
#define TX_SEL3_MASK (3<<4)
906-
#define TX_SEL3_0 (1<<4)
907-
#define TX_SEL3_1 (1<<5)
908-
909-
#define TX_SEL2_MASK (3<<2)
910-
#define TX_SEL2_0 (1<<2)
911-
#define TX_SEL2_1 (1<<3)
912-
913-
#define TX_SEL1 (1<<0)
914-
915-
#define BMC_TX_SZ_MASK (0x1ff)
916-
917-
//R8_STATUS
918-
#define IF_TX_END (1<<7)
919-
#define IF_RX_RESET (1<<6)
920-
#define IF_RX_ACT (1<<5)
921-
#define IF_RX_BYTE (1<<4)
922-
#define IF_RX_BIT (1<<3)
923-
#define IFBUF_ERR (1<<2)
924-
#define BMC_AUX_MASK (3<<0)
925-
#define BMC_AUX_1 (1<<1)
926-
#define BMC_AUX_0 (1<<0)
927-
928-
// PORT CC1
929-
#define CC1_CE_MASK (7<<5)
930-
#define CC1_CE_0 (1<<5)
931-
#define CC1_CE_1 (2<<5)
932-
#define CC1_CE_2 (4<<5)
933-
934-
#define CC1_LVE (1<<4)
935-
#define CC1_PU_MASK (3<<2)
936-
#define CC1_PU_DISABLE (0<<2)
937-
#define CC1_PU_330uA (1<<2)
938-
#define CC1_PU_180uA (2<<2)
939-
#define CC1_PU_80uA (3<<2)
940-
#define PA_CC1_AI (1<<0)
941-
942-
#define CC2_CE_MASK (7<<5)
943-
#define CC2_CE_0 (1<<5)
944-
#define CC2_CE_1 (2<<5)
945-
#define CC2_CE_2 (4<<5)
946-
947-
#define CC2_LVE (1<<4)
948-
#define CC2_PU_MASK (3<<2)
949-
#define CC2_PU_DISABLE (0<<2)
950-
#define CC2_PU_330uA (1<<2)
951-
#define CC2_PU_180uA (2<<2)
952-
#define CC2_PU_80uA (3<<2)
953-
#define PA_CC2_AI (1<<0)
954-
955842

956843

957844
/* Peripheral declaration */

‎ch32fun/ch32v20xhw.h

-112
Original file line numberDiff line numberDiff line change
@@ -1366,118 +1366,6 @@ typedef struct{
13661366

13671367

13681368

1369-
// AFIO CTLR Bits
1370-
#define PB6_FILT_EN (1<<27)
1371-
#define PB5_FILT_EN (1<<26)
1372-
#define PA4_FILT_EN (1<<25)
1373-
#define PA3_FILT_EN (1<<24)
1374-
#define UDM_BC_CMPO (1<<19)
1375-
#define UDP_BC_CMPO (1<<17)
1376-
#define UDM_BC_VSRC (1<<17)
1377-
#define UDP_BC_VSRC (1<<16)
1378-
#define USBPD_IN_HVT (1<<9)
1379-
#define USBPD_PHY_V33 (1<<8)
1380-
#define USB_IOEN (1<<7)
1381-
#define USB_PHY_V33 (1<<6)
1382-
#define UDP_PUE_00 (0b00<<2)
1383-
#define UDP_PUE_01 (0b01<<2)
1384-
#define UDP_PUE_10 (0b10<<2)
1385-
#define UDP_PUE_11 (0b11<<2)
1386-
#define UDM_PUE_00 (0b00<<0)
1387-
#define UDM_PUE_01 (0b01<<0)
1388-
#define UDM_PUE_10 (0b10<<0)
1389-
#define UDM_PUE_11 (0b11<<0)
1390-
#define UDP_PUE_MASK 0x0000000C
1391-
#define UDP_PUE_DISABLE 0x00000000
1392-
#define UDP_PUE_35UA 0x00000004
1393-
#define UDP_PUE_10K 0x00000008
1394-
#define UDP_PUE_1K5 0x0000000C
1395-
#define UDM_PUE_MASK 0x00000003
1396-
#define UDM_PUE_DISABLE 0x00000000
1397-
#define UDM_PUE_35UA 0x00000001
1398-
#define UDM_PUE_10K 0x00000002
1399-
#define UDM_PUE_1K5 0x00000003
1400-
1401-
1402-
// USB PD Bits
1403-
#define IE_TX_END (1<<15)
1404-
#define IE_RX_RESET (1<<14)
1405-
#define IE_RX_ACT (1<<13)
1406-
#define IE_RX_BYTE (1<<12)
1407-
#define IE_RX_BIT (1<<11)
1408-
#define IE_PD_IO (1<<10)
1409-
#define WAKE_POLAR (1<<5)
1410-
#define PD_RST_EN (1<<4)
1411-
#define PD_DMA_EN (1<<3)
1412-
#define CC_SEL (1<<2)
1413-
#define PD_ALL_CLR (1<<1)
1414-
#define PD_FILT_EN (1<<0)
1415-
#define BMC_CLK_CNT_MASK (0xff)
1416-
1417-
//R8_CONTROL
1418-
#define BMC_BYTE_HI (1<<7)
1419-
#define TX_BIT_BACK (1<<6)
1420-
#define DATA_FLAG (1<<5)
1421-
#define RX_STATE_MASK (0x7<<2)
1422-
#define RX_STATE_0 (1<<2)
1423-
#define RX_STATE_1 (1<<3)
1424-
#define RX_STATE_2 (1<<4)
1425-
#define BMC_START (1<<1)
1426-
#define PD_TX_EN (1<<0)
1427-
1428-
#define TX_SEL4_MASK (3<<6)
1429-
#define TX_SEL4_0 (1<<6)
1430-
#define TX_SEL4_1 (1<<7)
1431-
1432-
#define TX_SEL3_MASK (3<<4)
1433-
#define TX_SEL3_0 (1<<4)
1434-
#define TX_SEL3_1 (1<<5)
1435-
1436-
#define TX_SEL2_MASK (3<<2)
1437-
#define TX_SEL2_0 (1<<2)
1438-
#define TX_SEL2_1 (1<<3)
1439-
1440-
#define TX_SEL1 (1<<0)
1441-
1442-
#define BMC_TX_SZ_MASK (0x1ff)
1443-
1444-
//R8_STATUS
1445-
#define IF_TX_END (1<<7)
1446-
#define IF_RX_RESET (1<<6)
1447-
#define IF_RX_ACT (1<<5)
1448-
#define IF_RX_BYTE (1<<4)
1449-
#define IF_RX_BIT (1<<3)
1450-
#define IFBUF_ERR (1<<2)
1451-
#define BMC_AUX_MASK (3<<0)
1452-
#define BMC_AUX_1 (1<<1)
1453-
#define BMC_AUX_0 (1<<0)
1454-
1455-
// PORT CC1
1456-
#define CC1_CE_MASK (7<<5)
1457-
#define CC1_CE_0 (1<<5)
1458-
#define CC1_CE_1 (2<<5)
1459-
#define CC1_CE_2 (4<<5)
1460-
1461-
#define CC1_LVE (1<<4)
1462-
#define CC1_PU_MASK (3<<2)
1463-
#define CC1_PU_DISABLE (0<<2)
1464-
#define CC1_PU_330uA (1<<2)
1465-
#define CC1_PU_180uA (2<<2)
1466-
#define CC1_PU_80uA (3<<2)
1467-
#define PA_CC1_AI (1<<0)
1468-
1469-
#define CC2_CE_MASK (7<<5)
1470-
#define CC2_CE_0 (1<<5)
1471-
#define CC2_CE_1 (2<<5)
1472-
#define CC2_CE_2 (4<<5)
1473-
1474-
#define CC2_LVE (1<<4)
1475-
#define CC2_PU_MASK (3<<2)
1476-
#define CC2_PU_DISABLE (0<<2)
1477-
#define CC2_PU_330uA (1<<2)
1478-
#define CC2_PU_180uA (2<<2)
1479-
#define CC2_PU_80uA (3<<2)
1480-
#define PA_CC2_AI (1<<0)
14811369

14821370

14831371

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