From e312022b1966fe228b8a6539c7bdea1a7422e583 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Kevin=20L=C3=A4ufer?= <laeufer@cornell.edu>
Date: Wed, 11 Dec 2024 14:32:25 -0500
Subject: [PATCH] cond synth: simplify condition

---
 tools/egraphs-cond-synth/src/rewrites.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/egraphs-cond-synth/src/rewrites.rs b/tools/egraphs-cond-synth/src/rewrites.rs
index a3bd427..335a308 100644
--- a/tools/egraphs-cond-synth/src/rewrites.rs
+++ b/tools/egraphs-cond-synth/src/rewrites.rs
@@ -100,7 +100,8 @@ pub fn create_rewrites() -> Vec<ArithRewrite> {
             // note: in this version we set the width of (b + c) on the RHS to be the width of the
             //       result (w_o)
             "(<< ?wo ?wa ?sa ?a ?wo 0 (+ ?wo ?wb 0 ?b ?wc 0 ?c))";
-            if["?wo", "?wa", "?sa", "?wb", "?wc"], |w| w[1] == w[2] && w[0] >= w[1]),
+            // wa == wb && wo >= wa
+            if["?wo", "?wa", "?wb"], |w| w[1] == w[2] && w[0] >= w[1]),
     ]
 }