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Merge tag 'pull-loongarch-20240719' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240719 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZpnSRQAKCRBAov/yOSY+ # 3+dmBACzIzU+nnCI0QANYJhEVekXUoo+UVa+PX4dk7OoACDSgq2nQkAQzUoqhzSj # zjnxTmIevdcUqQ6eU24hNwOT7DEZBk0MIcTZMuG8DRc1wbSo46ORfVGWQkPtMQ25 # ADNS0q/TPnYMtMEfXn2xN/0QrpR99HN8wOVNmYH5/D6/zHMFOw== # =Vo1H # -----END PGP SIGNATURE----- # gpg: Signature made Fri 19 Jul 2024 12:41:09 PM AEST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <[email protected]>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20240719' of https://gitlab.com/gaosong/qemu: hw/loongarch: Modify flash block size to 256K hw/loongarch: Remove unimplemented extioi INT_encode mode target/loongarch/gdbstub: Add vector registers support Signed-off-by: Richard Henderson <[email protected]>
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‎configs/targets/loongarch64-linux-user.mak

Lines changed: 1 addition & 1 deletion
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@@ -1,4 +1,4 @@
11
# Default configuration for loongarch64-linux-user
22
TARGET_ARCH=loongarch64
33
TARGET_BASE_ARCH=loongarch
4-
TARGET_XML_FILES=gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
4+
TARGET_XML_FILES=gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml

‎configs/targets/loongarch64-softmmu.mak

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@ TARGET_ARCH=loongarch64
22
TARGET_BASE_ARCH=loongarch
33
TARGET_KVM_HAVE_GUEST_DEBUG=y
44
TARGET_SUPPORTS_MTTCG=y
5-
TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
5+
TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml
66
# all boards require libfdt
77
TARGET_NEED_FDT=y

‎gdb-xml/loongarch-lasx.xml

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@@ -0,0 +1,60 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2022-2024 Free Software Foundation, Inc.
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4+
Copying and distribution of this file, with or without modification,
5+
are permitted in any medium without royalty provided the copyright
6+
notice and this notice are preserved. -->
7+
8+
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
9+
<feature name="org.gnu.gdb.loongarch.lasx">
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<vector id="v8f32" type="ieee_single" count="8"/>
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<vector id="v4f64" type="ieee_double" count="4"/>
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<vector id="v32i8" type="int8" count="32"/>
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<vector id="v16i16" type="int16" count="16"/>
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<vector id="v8i32" type="int32" count="8"/>
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<vector id="v4i64" type="int64" count="4"/>
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<vector id="v2ui128" type="uint128" count="2"/>
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18+
<union id="lasxv">
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<field name="v8_float" type="v8f32"/>
20+
<field name="v4_double" type="v4f64"/>
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<field name="v32_int8" type="v32i8"/>
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<field name="v16_int16" type="v16i16"/>
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<field name="v8_int32" type="v8i32"/>
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<field name="v4_int64" type="v4i64"/>
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<field name="v2_uint128" type="v2ui128"/>
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</union>
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<reg name="xr0" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr1" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr2" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr3" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr4" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr5" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr6" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr7" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr8" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr9" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr10" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr11" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr12" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr13" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr14" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr15" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr16" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr17" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr18" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr19" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr20" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr21" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr22" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr23" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr24" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr25" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr26" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr27" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr28" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr29" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr30" bitsize="256" type="lasxv" group="lasx"/>
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<reg name="xr31" bitsize="256" type="lasxv" group="lasx"/>
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</feature>

‎gdb-xml/loongarch-lsx.xml

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<?xml version="1.0"?>
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<!-- Copyright (C) 2022-2024 Free Software Foundation, Inc.
3+
4+
Copying and distribution of this file, with or without modification,
5+
are permitted in any medium without royalty provided the copyright
6+
notice and this notice are preserved. -->
7+
8+
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
9+
<feature name="org.gnu.gdb.loongarch.lsx">
10+
<vector id="v4f32" type="ieee_single" count="4"/>
11+
<vector id="v2f64" type="ieee_double" count="2"/>
12+
<vector id="v16i8" type="int8" count="16"/>
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<vector id="v8i16" type="int16" count="8"/>
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<vector id="v4i32" type="int32" count="4"/>
15+
<vector id="v2i64" type="int64" count="2"/>
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17+
<union id="lsxv">
18+
<field name="v4_float" type="v4f32"/>
19+
<field name="v2_double" type="v2f64"/>
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<field name="v16_int8" type="v16i8"/>
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<field name="v8_int16" type="v8i16"/>
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<field name="v4_int32" type="v4i32"/>
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<field name="v2_int64" type="v2i64"/>
24+
<field name="uint128" type="uint128"/>
25+
</union>
26+
27+
<reg name="vr0" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr1" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr2" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr3" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr4" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr5" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr6" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr7" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr8" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr9" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr10" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr11" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr12" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr13" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr14" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr15" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr16" bitsize="128" type="lsxv" group="lsx"/>
44+
<reg name="vr17" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr18" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr19" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr20" bitsize="128" type="lsxv" group="lsx"/>
48+
<reg name="vr21" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr22" bitsize="128" type="lsxv" group="lsx"/>
50+
<reg name="vr23" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr26" bitsize="128" type="lsxv" group="lsx"/>
52+
<reg name="vr25" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr26" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr27" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr28" bitsize="128" type="lsxv" group="lsx"/>
56+
<reg name="vr29" bitsize="128" type="lsxv" group="lsx"/>
57+
<reg name="vr30" bitsize="128" type="lsxv" group="lsx"/>
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<reg name="vr31" bitsize="128" type="lsxv" group="lsx"/>
59+
</feature>

‎include/hw/intc/loongarch_extioi.h

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Original file line numberDiff line numberDiff line change
@@ -50,7 +50,6 @@
5050
#define EXTIOI_HAS_CPU_ENCODE (3)
5151
#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \
5252
| BIT(EXTIOI_HAS_ENABLE_OPTION) \
53-
| BIT(EXTIOI_HAS_INT_ENCODE) \
5453
| BIT(EXTIOI_HAS_CPU_ENCODE))
5554
#define EXTIOI_VIRT_CONFIG (0x4)
5655
#define EXTIOI_ENABLE (1)

‎include/hw/loongarch/virt.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
#define VIRT_FWCFG_BASE 0x1e020000UL
2121
#define VIRT_BIOS_BASE 0x1c000000UL
2222
#define VIRT_BIOS_SIZE (16 * MiB)
23-
#define VIRT_FLASH_SECTOR_SIZE (128 * KiB)
23+
#define VIRT_FLASH_SECTOR_SIZE (256 * KiB)
2424
#define VIRT_FLASH0_BASE VIRT_BIOS_BASE
2525
#define VIRT_FLASH0_SIZE VIRT_BIOS_SIZE
2626
#define VIRT_FLASH1_BASE 0x1d000000UL

‎target/loongarch/gdbstub.c

Lines changed: 71 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -116,8 +116,77 @@ static int loongarch_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n)
116116
return length;
117117
}
118118

119+
#define VREG_NUM 32
120+
#define REG64_LEN 64
121+
122+
static int loongarch_gdb_get_vec(CPUState *cs, GByteArray *mem_buf, int n, int vl)
123+
{
124+
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
125+
CPULoongArchState *env = &cpu->env;
126+
int i, length = 0;
127+
128+
if (0 <= n && n < VREG_NUM) {
129+
for (i = 0; i < vl / REG64_LEN; i++) {
130+
length += gdb_get_reg64(mem_buf, env->fpr[n].vreg.D(i));
131+
}
132+
}
133+
134+
return length;
135+
}
136+
137+
static int loongarch_gdb_set_vec(CPUState *cs, uint8_t *mem_buf, int n, int vl)
138+
{
139+
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
140+
CPULoongArchState *env = &cpu->env;
141+
int i, length = 0;
142+
143+
if (0 <= n && n < VREG_NUM) {
144+
for (i = 0; i < vl / REG64_LEN; i++) {
145+
env->fpr[n].vreg.D(i) = ldq_le_p(mem_buf + 8 * i);
146+
length += 8;
147+
}
148+
}
149+
150+
return length;
151+
}
152+
153+
static int loongarch_gdb_get_lsx(CPUState *cs, GByteArray *mem_buf, int n)
154+
{
155+
return loongarch_gdb_get_vec(cs, mem_buf, n, LSX_LEN);
156+
}
157+
158+
static int loongarch_gdb_set_lsx(CPUState *cs, uint8_t *mem_buf, int n)
159+
{
160+
return loongarch_gdb_set_vec(cs, mem_buf, n, LSX_LEN);
161+
}
162+
163+
static int loongarch_gdb_get_lasx(CPUState *cs, GByteArray *mem_buf, int n)
164+
{
165+
return loongarch_gdb_get_vec(cs, mem_buf, n, LASX_LEN);
166+
}
167+
168+
static int loongarch_gdb_set_lasx(CPUState *cs, uint8_t *mem_buf, int n)
169+
{
170+
return loongarch_gdb_set_vec(cs, mem_buf, n, LASX_LEN);
171+
}
172+
119173
void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs)
120174
{
121-
gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,
122-
gdb_find_static_feature("loongarch-fpu.xml"), 0);
175+
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
176+
CPULoongArchState *env = &cpu->env;
177+
178+
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, FP)) {
179+
gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu,
180+
gdb_find_static_feature("loongarch-fpu.xml"), 0);
181+
}
182+
183+
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LSX)) {
184+
gdb_register_coprocessor(cs, loongarch_gdb_get_lsx, loongarch_gdb_set_lsx,
185+
gdb_find_static_feature("loongarch-lsx.xml"), 0);
186+
}
187+
188+
if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LASX)) {
189+
gdb_register_coprocessor(cs, loongarch_gdb_get_lasx, loongarch_gdb_set_lasx,
190+
gdb_find_static_feature("loongarch-lasx.xml"), 0);
191+
}
123192
}

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