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Qsys_tb.csv
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# system info Qsys_tb on 2017.02.16.15:44:53
system_info:
name,value
DEVICE,5CSEBA6U23I7
DEVICE_FAMILY,Cyclone V
GENERATION_ID,1487231086
#
#
# Files generated for Qsys_tb on 2017.02.16.15:44:53
files:
filepath,kind,attributes,module,is_top
Qsys/testbench/Qsys_tb/simulation/Qsys_tb.v,VERILOG,,Qsys_tb,true
Qsys/testbench/Qsys_tb/simulation/submodules/Qsys.v,VERILOG,,Qsys,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm.sv,SYSTEM_VERILOG,,altera_conduit_bfm,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0002,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0002.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0002,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0003,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0003.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0003,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0004,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0004.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0004,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_avalon_clock_source,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_avalon_clock_source.sv,SYSTEM_VERILOG,,altera_avalon_clock_source,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0005,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0005.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0005,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0006,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0006.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0006,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0007,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0007.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0007,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0008,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0008.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0008,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_avalon_reset_source,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_avalon_reset_source.sv,SYSTEM_VERILOG,,altera_avalon_reset_source,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0009,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0009.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0009,false
Qsys/testbench/Qsys_tb/simulation/submodules/verbosity_pkg.sv,SYSTEM_VERILOG, COMMON_SYSTEMVERILOG_PACKAGE=avalon_vip_verbosity_pkg,altera_conduit_bfm_0010,false
Qsys/testbench/Qsys_tb/simulation/submodules/altera_conduit_bfm_0010.sv,SYSTEM_VERILOG,,altera_conduit_bfm_0010,false
Qsys/testbench/Qsys_tb/simulation/submodules/Qsys_LED.v,VERILOG,,Qsys_LED,false
Qsys/testbench/Qsys_tb/simulation/submodules/Qsys_bts_tmd_connect_state.v,VERILOG,,Qsys_bts_tmd_connect_state,false
Qsys/testbench/Qsys_tb/simulation/submodules/Qsys_buzzer_out.v,VERILOG,,Qsys_buzzer_out,false
Qsys/testbench/Qsys_tb/simulation/submodules/Qsys_car_led.v,VERILOG,,Qsys_car_led,false
Qsys/testbench/Qsys_tb/simulation/submodules/Qsys_car_voltage_data.v,VERILOG,,Qsys_car_voltage_data,false
#
# Map from instance-path to kind of module
instances:
instancePath,module
Qsys_tb.Qsys_inst,Qsys
Qsys_tb.Qsys_inst.LED,Qsys_LED
Qsys_tb.Qsys_inst.bts_tmd_connect_state,Qsys_bts_tmd_connect_state
Qsys_tb.Qsys_inst.buzzer_out,Qsys_buzzer_out
Qsys_tb.Qsys_inst.car_led,Qsys_car_led
Qsys_tb.Qsys_inst.car_voltage_data,Qsys_car_voltage_data
Qsys_tb.Qsys_inst.dc_motor_left,Qsys_dc_motor_left
Qsys_tb.Qsys_inst.dc_motor_right,Qsys_dc_motor_left
Qsys_tb.Qsys_inst.jtag_uart,Qsys_jtag_uart
Qsys_tb.Qsys_inst.mm_clock_crossing_bridge_0,altera_avalon_mm_clock_crossing_bridge
Qsys_tb.Qsys_inst.motor_measure_left,Qsys_motor_measure_left
Qsys_tb.Qsys_inst.motor_measure_right,Qsys_motor_measure_left
Qsys_tb.Qsys_inst.mpu_i2c,i2c_opencores
Qsys_tb.Qsys_inst.pwmonitor_i2c,i2c_opencores
Qsys_tb.Qsys_inst.mpu_int,Qsys_mpu_int
Qsys_tb.Qsys_inst.nios2_gen2_0,Qsys_nios2_gen2_0
Qsys_tb.Qsys_inst.onchip_memory2_0,Qsys_onchip_memory2_0
Qsys_tb.Qsys_inst.pll_0,Qsys_pll_0
Qsys_tb.Qsys_inst.pmonitor_alert,Qsys_pmonitor_alert
Qsys_tb.Qsys_inst.sonic_distance_0,Qsys_sonic_distance_0
Qsys_tb.Qsys_inst.sysid_qsys,Qsys_sysid_qsys
Qsys_tb.Qsys_inst.timer_0,Qsys_timer_0
Qsys_tb.Qsys_inst.uart_bt,Qsys_uart_bt
Qsys_tb.Qsys_inst.mm_interconnect_0,Qsys_mm_interconnect_0
Qsys_tb.Qsys_inst.mm_interconnect_1,Qsys_mm_interconnect_1
Qsys_tb.Qsys_inst.irq_mapper,Qsys_irq_mapper
Qsys_tb.Qsys_inst.irq_synchronizer,altera_irq_clock_crosser
Qsys_tb.Qsys_inst.irq_synchronizer_001,altera_irq_clock_crosser
Qsys_tb.Qsys_inst.rst_controller,altera_reset_controller
Qsys_tb.Qsys_inst.rst_controller_001,altera_reset_controller
Qsys_tb.Qsys_inst.rst_controller_002,altera_reset_controller
Qsys_tb.Qsys_inst.rst_controller_003,altera_reset_controller
Qsys_tb.Qsys_inst_bts_tmd_connect_state_external_connection_bfm,altera_conduit_bfm
Qsys_tb.Qsys_inst_mpu_int_external_connection_bfm,altera_conduit_bfm
Qsys_tb.Qsys_inst_pmonitor_alert_external_connection_bfm,altera_conduit_bfm
Qsys_tb.Qsys_inst_buzzer_out_external_connection_bfm,altera_conduit_bfm_0002
Qsys_tb.Qsys_inst_car_led_external_connection_bfm,altera_conduit_bfm_0003
Qsys_tb.Qsys_inst_car_voltage_data_external_connection_bfm,altera_conduit_bfm_0004
Qsys_tb.Qsys_inst_clk_bfm,altera_avalon_clock_source
Qsys_tb.Qsys_inst_dc_motor_left_conduit_end_bfm,altera_conduit_bfm_0005
Qsys_tb.Qsys_inst_dc_motor_right_conduit_end_bfm,altera_conduit_bfm_0005
Qsys_tb.Qsys_inst_led_external_connection_bfm,altera_conduit_bfm_0006
Qsys_tb.Qsys_inst_motor_measure_left_conduit_end_bfm,altera_conduit_bfm_0007
Qsys_tb.Qsys_inst_motor_measure_right_conduit_end_bfm,altera_conduit_bfm_0007
Qsys_tb.Qsys_inst_mpu_i2c_export_bfm,altera_conduit_bfm_0008
Qsys_tb.Qsys_inst_pwmonitor_i2c_export_bfm,altera_conduit_bfm_0008
Qsys_tb.Qsys_inst_reset_bfm,altera_avalon_reset_source
Qsys_tb.Qsys_inst_sonic_distance_0_conduit_end_bfm,altera_conduit_bfm_0009
Qsys_tb.Qsys_inst_uart_bt_external_interface_bfm,altera_conduit_bfm_0010