Update testing infrastructure, add x86test for io.rs

Author: gz

.travis.yml

@@ -23,7 +23,7 @@ matrix:
 
     # Linux
     - env: TARGET=i686-unknown-linux-gnu DISABLE_TESTS=1
-    - env: TARGET=x86_64-unknown-linux-gnu DISABLE_TESTS=1
+    - env: TARGET=x86_64-unknown-linux-gnu
 
     # OSX
     - env: TARGET=i686-apple-darwin DISABLE_TESTS=1

Cargo.toml

@@ -26,10 +26,12 @@ edition = '2018'
 
 [features]
 performance-counter = ["phf", "phf_codegen", "csv", "serde_json"]
-
-#[[test]]
-#name = "no_std_build"
-#harness = false
+# Note we have to choose between regular tests and x86test at the moment, so we use features
+# (limitation in https://github.com/rust-lang/rust/issues/50297)
+# Run user-space tests, i.e. regular #[test]
+utest = []
+# Run VM tests, i.e., the #[x86test] ones
+vmtest = []
 
 [[test]]
 name = "kvm"
@@ -53,3 +55,4 @@ features = ["core"]
 klogger = { git = "https://github.com/gz/rust-klogger.git", features = ["use_ioports"] }
 x86test = { path = "x86test" }
 libc = "0.2.*"
+

README.md

@@ -21,6 +21,18 @@ Currently supports
 
 This library depends on libcore so it can be used in kernel level code.
 
+## Testing
+
+We use two forms of tests for the crate. Regular tests with `#[test]` than run in as a regular process
+and `#[x86test]` tests that run in a VM (and require a privileged execution environment).
+
+```
+# To execute x86tests run:
+$ RUSTFLAGS="-C relocation-model=dynamic-no-pic -C code-model=kernel" RUST_BACKTRACE=1 cargo test --features vmtest
+
+# To execute the regular tests, run:
+$ cargo test --features utest
+```
 ## Features
 
   * performance-counter: Includes the performance counter information. Note this feature

ci/script.sh

@@ -2,7 +2,7 @@
 
 set -ex
 
-# TODO This is the "test phase", tweak it as you see fit
+# This is the "test phase", tweak it as you see fit
 main() {
     cross build --target $TARGET
     cross build --target $TARGET --release
@@ -11,11 +11,12 @@ main() {
         return
     fi
 
-    cross test --target $TARGET
-    cross test --target $TARGET --release
+    # Run user-space tests
+    cross test --target $TARGET --features utest
+    cross test --target $TARGET --release --features utest
 
-    cross run --target $TARGET
-    cross run --target $TARGET --release
+    # Run KVM tests
+    RUSTFLAGS="-C relocation-model=dynamic-no-pic -C code-model=kernel" RUST_BACKTRACE=1 cross test --target $TARGET --features vmtest
 }
 
 # we don't run the "test phase" when doing deploys

src/bits64/paging.rs

@@ -1165,7 +1165,7 @@ impl PTEntry {
                 is_instruction_fetching_disabled, PTFlags::XD);
 }
 
-#[cfg(test)]
+#[cfg(all(test, feature = "utest"))]
 mod test {
     use super::*;
 

src/io.rs

@@ -42,50 +42,81 @@ pub unsafe fn inl(port: u16) -> u32 {
     ret
 }
 
-/// Write 8-bit array to port
-#[inline]
-pub unsafe fn outsb(port: u16, buf: &[u8]) {
-    asm!("rep outsb (%esi), %dx"
-         :: "{ecx}"(buf.len()), "{dx}"(port), "{esi}"(buf.as_ptr())
-         : "ecx", "edi");
-}
+#[cfg(all(test, feature = "vmtest"))]
+mod x86testing {
+    use super::*;
+    use x86test::*;
 
-/// Read 8-bit array from port
-#[inline]
-pub unsafe fn insb(port: u16, buf: &mut [u8]) {
-    asm!("rep insb %dx, (%edi)"
-         :: "{ecx}"(buf.len()), "{dx}"(port), "{edi}"(buf.as_ptr())
-         : "ecx", "edi" : "volatile");
-}
+    #[x86test(ioport(0x0, 0xaf))]
+    fn check_outb() {
+        unsafe {
+            outb(0x0, 0xaf);
+            // hypervisor will fail here if port 0x0 doesn't see 0xaf
+        }
+    }
 
-/// Write 16-bit array to port
-#[inline]
-pub unsafe fn outsw(port: u16, buf: &[u16]) {
-    asm!("rep outsw (%esi), %dx"
-         :: "{ecx}"(buf.len()), "{dx}"(port), "{esi}"(buf.as_ptr())
-         : "ecx", "edi");
-}
+    #[x86test(ioport(0x0, 0xaf))]
+    #[should_panic]
+    fn check_outb_wrong_value() {
+        unsafe {
+            outb(0x0, 0xff);
+        }
+    }
 
-/// Read 16-bit array from port
-#[inline]
-pub unsafe fn insw(port: u16, buf: &mut [u16]) {
-    asm!("rep insw %dx, (%edi)"
-         :: "{ecx}"(buf.len()), "{dx}"(port), "{edi}"(buf.as_ptr())
-         : "ecx", "edi" : "volatile");
-}
+    #[x86test(ioport(0x1, 0xad))]
+    fn check_inb() {
+        unsafe {
+            kassert!(
+                inb(0x1) == 0xad,
+                "`inb` instruction didn't read the correct value"
+            );
+        }
+    }
 
-/// Write 32-bit array to port
-#[inline]
-pub unsafe fn outsl(port: u16, buf: &[u32]) {
-    asm!("rep outsl (%esi), %dx"
-         :: "{ecx}"(buf.len()), "{dx}"(port), "{esi}"(buf.as_ptr())
-         : "ecx", "edi");
-}
+    #[x86test(ioport(0x2, 0xad))]
+    #[should_panic]
+    fn check_inb_wrong_port() {
+        unsafe {
+            kassert!(
+                inb(0x1) == 0xad,
+                "`inb` instruction didn't read the correct value"
+            );
+        }
+    }
 
-/// Read 32-bit array from port
-#[inline]
-pub unsafe fn insl(port: u16, buf: &mut [u32]) {
-    asm!("rep insl %dx, (%edi)"
-         :: "{ecx}"(buf.len()), "{dx}"(port), "{edi}"(buf.as_ptr())
-         : "ecx", "edi" : "volatile");
+    #[x86test(ioport(0x2, 0x99))]
+    fn check_outw() {
+        unsafe {
+            super::outw(0x2, 0x99);
+            // hypervisor will fail here if port 0x2 doesn't see 0x99
+        }
+    }
+
+    #[x86test(ioport(0x3, 0xfefe))]
+    fn check_inw() {
+        unsafe {
+            kassert!(
+                inw(0x3) == 0xfefe,
+                "`inw` instruction didn't read the correct value"
+            );
+        }
+    }
+
+    #[x86test(ioport(0x5, 0xbeefaaaa))]
+    fn check_outl() {
+        unsafe {
+            outl(0x5, 0xbeefaaaa);
+            // hypervisor will fail here if port 0x5 doesn't see 0xbeefaaaa
+        }
+    }
+
+    #[x86test(ioport(0x4, 0xdeadbeef))]
+    fn check_inl() {
+        unsafe {
+            kassert!(
+                inl(0x4) == 0xdeadbeef,
+                "`inl` instruction didn't read the correct value"
+            );
+        }
+    }
 }

src/irq.rs

@@ -249,16 +249,6 @@ impl fmt::Display for PageFaultError {
     }
 }
 
-#[test]
-fn bit_macro() {
-    assert!(PageFaultError::PK.bits() == 0b100000);
-    assert!(PageFaultError::ID.bits() == 0b10000);
-    assert!(PageFaultError::RSVD.bits() == 0b1000);
-    assert!(PageFaultError::US.bits() == 0b100);
-    assert!(PageFaultError::WR.bits() == 0b10);
-    assert!(PageFaultError::P.bits() == 0b1);
-}
-
 /// Enable Interrupts.
 pub unsafe fn enable() {
     asm!("sti");
@@ -269,11 +259,25 @@ pub unsafe fn disable() {
     asm!("cli");
 }
 
-/// Generate a software interrupt.
-/// This is a macro argument needs to be an immediate.
-#[macro_export]
-macro_rules! int {
+#[cfg(all(test, feature = "utest"))]
+mod test {
+    use super::*;
+    #[test]
+    fn bit_macro() {
+        assert!(PageFaultError::PK.bits() == 0b100000);
+        assert!(PageFaultError::ID.bits() == 0b10000);
+        assert!(PageFaultError::RSVD.bits() == 0b1000);
+        assert!(PageFaultError::US.bits() == 0b100);
+        assert!(PageFaultError::WR.bits() == 0b10);
+        assert!(PageFaultError::P.bits() == 0b1);
+    }
+
+    /// Generate a software interrupt.
+    /// This is a macro argument needs to be an immediate.
+    #[macro_export]
+    macro_rules! int {
     ($x:expr) => {{
         asm!("int $0" :: "N" ($x));
     }};
 }
+}

src/lib.rs

@@ -3,6 +3,8 @@
 #![feature(const_fn, asm, repr_transparent)]
 #![no_std]
 #![cfg_attr(test, allow(unused_features))]
+#![cfg_attr(all(test, feature = "vmtest"), feature(custom_test_frameworks))]
+#![cfg_attr(all(test, feature = "vmtest"), test_runner(x86test::runner::runner))]
 
 #[cfg(target_arch = "x86")]
 pub(crate) use core::arch::x86 as arch;
@@ -54,6 +56,11 @@ mod std {
     pub use core::option;
 }
 
+#[cfg(all(test, feature = "vmtest"))]
+extern crate klogger;
+#[cfg(all(test, feature = "vmtest"))]
+extern crate x86test;
+
 #[derive(Copy, Clone, Debug, Eq, PartialEq)]
 #[repr(u8)]
 /// x86 Protection levels
@@ -83,6 +90,20 @@ pub unsafe fn halt() {
     asm!("hlt" :::: "volatile");
 }
 
+#[cfg(all(test, feature = "vmtest"))]
+mod x86testing {
+    use super::*;
+    use x86test::*;
+
+    #[x86test(should_halt)]
+    fn should_halt() {
+        unsafe { halt() }
+    }
+
+    #[x86test]
+    fn should_not_halt() {}
+}
+
 /// Read Processor ID
 ///
 /// Reads the value of the IA32_TSC_AUX MSR (address C0000103H)
@@ -97,7 +118,7 @@ pub unsafe fn rdpid() -> u64 {
     return pid;
 }
 
-#[cfg(test)]
+#[cfg(all(test, feature = "utest"))]
 mod test {
     use super::*;
 

src/random.rs

@@ -177,7 +177,7 @@ pub unsafe fn rdseed_slice<T: RdSeed>(buffer: &mut [T]) -> bool {
     worked
 }
 
-#[cfg(test)]
+#[cfg(all(test, feature = "utest"))]
 mod test {
     use super::*;
 

src/segmentation.rs

@@ -603,7 +603,7 @@ pub fn gs() -> SegmentSelector {
     SegmentSelector::from_raw(segment)
 }
 
-#[cfg(test)]
+#[cfg(all(test, feature = "utest"))]
 mod test {
     use super::*;
     use crate::Ring;

tests/kvm/bin.rs

@@ -5,16 +5,15 @@
 // RUSTFLAGS="-C relocation-model=dynamic-no-pic -C code-model=kernel" RUST_BACKTRACE=1 cargo test --verbose --test kvm -- --nocapture
 
 extern crate core;
-extern crate x86;
-#[macro_use]
 extern crate klogger;
+extern crate x86;
 
 extern crate x86test;
-use self::x86test::kassert;
-use self::x86test::kpanic;
-use self::x86test::x86test;
-use self::x86test::X86TestFn;
 
+#[cfg(all(test, feature = "vmtest"))]
+use self::x86test::*;
+
+#[cfg(all(test, feature = "vmtest"))]
 #[x86test(ioport(0x1, 0xfe))]
 fn use_the_port() {
     unsafe {
@@ -25,12 +24,14 @@ fn use_the_port() {
     }
 }
 
+#[cfg(all(test, feature = "vmtest"))]
 #[x86test(ram(0x30000000, 0x31000000))]
 fn print_works() {
     sprint!("sprint!, ");
     sprintln!("sprintln! works");
 }
 
+#[cfg(all(test, feature = "vmtest"))]
 #[x86test]
 #[should_panic]
 fn panic_test() {

x86test/Cargo.toml

@@ -21,4 +21,5 @@ x86test-types = { path = "x86test_types", version = "0.0.1" }
 kvm-sys = "0.3.0"
 x86 = "0.19"
 mmap = "0.1.1"
-log = "0.4"
+log = "0.4"
+klogger = { git = "https://github.com/gz/rust-klogger.git", features = ["use_ioports"] }

x86test/src/hypervisor/mod.rs

@@ -257,7 +257,7 @@ pub(crate) fn handle_ioexit(
     printer: &mut SerialPrinter,
 ) -> Result<IoHandleStatus, IoHandleError> {
     let io = unsafe { *run.io() };
-
+    //println!("io = {:?}", io);
     match io.direction {
         IoDirection::In => {
             let mut regs = cpu.get_regs().unwrap();
@@ -269,8 +269,8 @@ pub(crate) fn handle_ioexit(
                 regs.rax = 0x20; // Mark serial line ready to write
                 cpu.set_regs(&regs).unwrap();
                 return Ok(IoHandleStatus::Handled);
-            } else if io.port == meta.ioport_reads.0 {
-                regs.rax = meta.ioport_reads.1 as u64;
+            } else if io.port == meta.ioport_enable.0 {
+                regs.rax = meta.ioport_enable.1 as u64;
                 cpu.set_regs(&regs).unwrap();
                 return Ok(IoHandleStatus::Handled);
             }
@@ -289,6 +289,8 @@ pub(crate) fn handle_ioexit(
                 // The line unsafe { x86::shared::io::outw(0xf4, 0x00); }
                 // is automatically inserted at the end of every test!
                 return Ok(IoHandleStatus::TestSuccessful);
+            } else if io.port == meta.ioport_enable.0 && regs.rax == meta.ioport_enable.1 as u64 {
+                return Ok(IoHandleStatus::Handled);
             } else if io.port == 0xf4 {
                 return Ok(IoHandleStatus::TestPanic(regs.rax as u8));
             }