@@ -323,6 +323,18 @@ bool isDisContRegion (
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return region->getRegion ()->isContiguous (execSize);
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}
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+ // Get a GRF aligned mask
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+
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+ unsigned SpillManagerGRF::grfMask () const
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+ {
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+ unsigned mask = 0 ;
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+ mask = (mask - 1 );
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+ MUST_BE_TRUE (std::log2 (G4_GRF_REG_NBYTES) == (float )((int )(std::log2 (G4_GRF_REG_NBYTES))), " expected integral value" );
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+ unsigned int bits = (unsigned int )std::log2 (G4_GRF_REG_NBYTES);
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+ mask = mask << bits;
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+ return mask;
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+ }
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+
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// Get an hexal word mask with the lower 5 bits zeroed.
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inline unsigned
@@ -770,9 +782,9 @@ SpillManagerGRF::calculateEncAlignedSegment (
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if ( useScratchMsg_ )
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{
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- unsigned hwordLB = regionDisp & hwordMask ();
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- unsigned hwordRB = hwordLB + HWORD_BYTE_SIZE ;
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- unsigned blockSize = HWORD_BYTE_SIZE ;
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+ unsigned hwordLB = regionDisp & grfMask ();
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+ unsigned hwordRB = hwordLB + G4_GRF_REG_NBYTES ;
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+ unsigned blockSize = G4_GRF_REG_NBYTES ;
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while (regionDisp + regionByteSize > hwordRB) {
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hwordRB += blockSize;
@@ -781,7 +793,7 @@ SpillManagerGRF::calculateEncAlignedSegment (
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assert ((hwordRB - hwordLB)/ REG_BYTE_SIZE <= 4 );
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start = hwordLB;
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end = hwordRB;
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- type = hwordMask ();
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+ type = grfMask ();
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}
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else
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{
@@ -1384,7 +1396,6 @@ static unsigned short getSpillRowSizeForSendSrc(
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}
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else
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{
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- assert (filledRegion->getLinearizedStart () % GENX_GRF_REG_SIZ == 0 );
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nRows = (filledRegion->getLinearizedEnd () - filledRegion->getLinearizedStart () + 1 ) / GENX_GRF_REG_SIZ;
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}
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@@ -1408,7 +1419,7 @@ SpillManagerGRF::createSendFillRangeDeclare (
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G4_SrcRegRegion * normalizedSendSrc =
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builder_->createSrcRegRegion (
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filledRegion->getModifier (), Direct, filledRegVar,
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- filledRegion->getRegOff (), SUBREG_ORIGIN , filledRegion->getRegion (),
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+ filledRegion->getRegOff (), filledRegion-> getSubRegOff () , filledRegion->getRegion (),
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filledRegion->getType ());
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unsigned short width = REG_BYTE_SIZE / filledRegion->getElemSize ();
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assert (REG_BYTE_SIZE % filledRegion->getElemSize () == 0 );
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