Skip to content

Commit d5bef0c

Browse files
pratikasharigcbot
pratikashar
authored and
igcbot
committed
Fix outdated comment.
Fix outdated comment.
1 parent 84186bc commit d5bef0c

16 files changed

+74
-16
lines changed

‎IGC/Compiler/CISACodeGen/CISABuilder.cpp

+9-1
Original file line numberDiff line numberDiff line change
@@ -7419,7 +7419,10 @@ namespace IGC
74197419

74207420
LSC_ADDR_TYPE CEncoder::getLSCAddrType(const ResourceDescriptor* resource)
74217421
{
7422-
return getLSCAddrType(resource->m_surfaceType);
7422+
if (resource->m_isThreadArg)
7423+
return LSC_ADDR_TYPE_ARG;
7424+
else
7425+
return getLSCAddrType(resource->m_surfaceType);
74237426
}
74247427

74257428
LSC_ADDR_TYPE CEncoder::getLSCAddrType(e_predefSurface surfaceType)
@@ -7477,6 +7480,11 @@ namespace IGC
74777480
{
74787481
globalOffsetOpnd = nullptr;
74797482
}
7483+
else if (addr.type == LSC_ADDR_TYPE_ARG)
7484+
{
7485+
globalOffsetOpnd = nullptr;
7486+
addr.size = LSC_ADDR_SIZE_32b;
7487+
}
74807488
else
74817489
{
74827490
globalOffsetOpnd = GetVISALSCSurfaceOpnd(resource->m_surfaceType, resource->m_resource);

‎IGC/Compiler/CISACodeGen/CISACodeGen.h

+6-1
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,12 @@ namespace IGC
167167
{
168168
CVariable* m_resource;
169169
e_predefSurface m_surfaceType;
170-
ResourceDescriptor() : m_resource(nullptr), m_surfaceType(ESURFACE_NORMAL) {}
170+
// this flag is set whenever addrspace is set to ADDRESS_SPACE_THREAD_ARG
171+
// to access thread arguments. we need to lower such messages
172+
// using special addressing mode.
173+
bool m_isThreadArg = false;
174+
ResourceDescriptor() : m_resource(nullptr), m_surfaceType(ESURFACE_NORMAL),
175+
m_isThreadArg(false) {}
171176
};
172177

173178
struct SamplerDescriptor

‎IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

+3
Original file line numberDiff line numberDiff line change
@@ -19610,6 +19610,9 @@ ResourceDescriptor EmitPass::GetResourceVariable(Value* resourcePtr)
1961019610

1961119611
bufType = DecodeAS4GFXResource(as, directIndexing, bufferIndex);
1961219612

19613+
if (as == ADDRESS_SPACE_THREAD_ARG)
19614+
resource.m_isThreadArg = true;
19615+
1961319616
if (IsBindless(bufType) || !directIndexing)
1961419617
{
1961519618
if (isa<IntToPtrInst>(resourcePtr))

‎IGC/Compiler/CISACodeGen/helper.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ namespace IGC
7979
}
8080
else if (bufType == STATELESS_A32)
8181
{
82-
return ADDRESS_SPACE_A32;
82+
return ADDRESS_SPACE_THREAD_ARG;
8383
}
8484
else if (auto *CI = dyn_cast<ConstantInt>(&bufIdx))
8585
{
@@ -110,7 +110,7 @@ namespace IGC
110110
{
111111
return SLM;
112112
}
113-
else if (addrSpace == ADDRESS_SPACE_A32)
113+
else if (addrSpace == ADDRESS_SPACE_THREAD_ARG)
114114
{
115115
return STATELESS_A32;
116116
}
@@ -207,7 +207,7 @@ namespace IGC
207207
return SLM;
208208
case ADDRESS_SPACE_GLOBAL:
209209
return STATELESS;
210-
case ADDRESS_SPACE_A32:
210+
case ADDRESS_SPACE_THREAD_ARG:
211211
return STATELESS_A32;
212212
default:
213213
break;

‎IGC/Compiler/CodeGenContext.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -974,7 +974,7 @@ namespace IGC
974974
getModule()->getDataLayout().getPointerSizeInBits(AS);
975975
break;
976976
case ADDRESS_SPACE_LOCAL:
977-
case ADDRESS_SPACE_A32:
977+
case ADDRESS_SPACE_THREAD_ARG:
978978
pointerSizeInRegister = 32;
979979
break;
980980
case ADDRESS_SPACE_PRIVATE:

‎IGC/Compiler/CodeGenPublicEnums.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -115,7 +115,7 @@ namespace IGC
115115
ADDRESS_SPACE_CONSTANT = 2,
116116
ADDRESS_SPACE_LOCAL = 3,
117117
ADDRESS_SPACE_GENERIC = 4,
118-
ADDRESS_SPACE_A32 = 5,
118+
ADDRESS_SPACE_THREAD_ARG = 5,
119119

120120
ADDRESS_SPACE_GLOBAL_OR_PRIVATE = 20,
121121

‎IGC/Compiler/Optimizer/OpenCLPasses/WIFuncs/WIFuncResolution.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -333,7 +333,7 @@ llvm::Value* LowerImplicitArgIntrinsics::BuildLoadInst(llvm::CallInst& CI, unsig
333333
unsigned int AddrSpace = ADDRESS_SPACE_GLOBAL;
334334
if (m_ctx->platform.isProductChildOf(IGFX_XE_HP_SDV))
335335
{
336-
AddrSpace = ADDRESS_SPACE_A32;
336+
AddrSpace = ADDRESS_SPACE_THREAD_ARG;
337337
}
338338

339339
llvm::Value* LoadedData = nullptr;

‎visa/BuildIRImpl.cpp

+4-3
Original file line numberDiff line numberDiff line change
@@ -2670,8 +2670,9 @@ G4_SendDescRaw* IR_Builder::createLscMsgDesc(
26702670
// promote the immediate BTI to the descriptor
26712671
exDesc |= surfaceImm << 24;
26722672
surface = nullptr;
2673-
}
2674-
else if (
2673+
} else if (addr.type == LSC_ADDR_TYPE_ARG) {
2674+
MUST_BE_TRUE(false, "caller should have converted LSC_ADDR_TYPE_ARG to ...BTI");
2675+
} else if (
26752676
addr.type == LSC_ADDR_TYPE_BSS ||
26762677
addr.type == LSC_ADDR_TYPE_SS)
26772678
{
@@ -2781,7 +2782,7 @@ G4_InstSend *IR_Builder::createLscSendInst(
27812782
if (surface && surface->isSrcRegRegion()) {
27822783
if (emitA0RegDef)
27832784
{
2784-
// This path is taken when caller hasnt defined a0.2 register for use
2785+
// This path is taken when caller hasn't defined a0.2 register for use
27852786
// as ext msg descriptor of lsc. Currently, spill module defines a0.2
27862787
// once per BB and reuses it in all spill msgs for that BB. Without this
27872788
// check, each spill/fill msg would get its own computation of a0.2

‎visa/CISA.l

+1
Original file line numberDiff line numberDiff line change
@@ -1082,6 +1082,7 @@ flat {return LSC_AM_FLAT;}
10821082
bti {return LSC_AM_BTI;}
10831083
ss {return LSC_AM_SS;}
10841084
bss {return LSC_AM_BSS;}
1085+
arg {return LSC_AM_ARG;}
10851086

10861087
".none" {
10871088
CISAlval.lsc_fence_op = LSC_FENCE_OP_NONE;

‎visa/CISA.y

+3-1
Original file line numberDiff line numberDiff line change
@@ -593,6 +593,7 @@ std::vector<attr_gen_struct*> AttrOptVar;
593593
%token LSC_AM_BTI
594594
%token LSC_AM_BSS
595595
%token LSC_AM_SS
596+
%token LSC_AM_ARG
596597
//
597598
%token <lsc_fence_op> LSC_FENCE_OP_TYPE
598599
%token <lsc_scope> LSC_FENCE_SCOPE
@@ -1132,7 +1133,7 @@ MovInstruction:
11321133
Predicate MOV_OP SatModOpt ExecSize VecDstOperand_A VecSrcOperand_G_I_IMM_A_AO
11331134
{
11341135
pBuilder->CISA_create_mov_instruction(
1135-
$1, $2, $4.emask, $4.exec_size, $3,
1136+
$1, $2, $4.emask, $4.exec_size, $3,
11361137
$5.cisa_gen_opnd, $6.cisa_gen_opnd, CISAlineno);
11371138
}
11381139
|
@@ -2003,6 +2004,7 @@ LscAddrImmScaleOpt:
20032004
LscAddrModelOpt:
20042005
%empty {$$ = {LSC_ADDR_TYPE_FLAT,nullptr};}
20052006
| LSC_AM_FLAT {$$ = {LSC_ADDR_TYPE_FLAT,nullptr};}
2007+
| LSC_AM_ARG {$$ = {LSC_ADDR_TYPE_ARG,nullptr};}
20062008
| LscRegAddrModel
20072009

20082010
LscRegAddrModel:

‎visa/IsaDisassembly.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -2683,6 +2683,7 @@ class LscInstFormatter {
26832683
case LSC_ADDR_TYPE_BSS: ss << "bss"; break;
26842684
case LSC_ADDR_TYPE_SS: ss << "ss"; break;
26852685
case LSC_ADDR_TYPE_BTI: ss << "bti"; break;
2686+
case LSC_ADDR_TYPE_ARG: ss << "arg"; break;
26862687
default: formatBadEnum(addrType); break;
26872688
}
26882689
switch (addrType) {

‎visa/IsaVerification.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -3512,6 +3512,7 @@ struct LscInstVerifier {
35123512

35133513
switch (addrType) {
35143514
case LSC_ADDR_TYPE_FLAT:
3515+
case LSC_ADDR_TYPE_ARG:
35153516
verify(sfid != LSC_TGM, ".tgm may not use flat address model");
35163517
switch (vo.tag & 0x7) {
35173518
case OPERAND_IMMEDIATE:

‎visa/Optimizer.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -8708,10 +8708,10 @@ bool Optimizer::foldPseudoAndOr(G4_BB* bb, INST_LIST_ITER& ii)
87088708
auto getStartAddrInst = [this, &instBuffer, r0, rtail](int subreg)
87098709
{
87108710
// (W) and (1) r127.2<1>:ud r0.0<0;1,0>:ud 0xFFFFFFC0
8711-
uint32_t GRFMask = 0x3F;
87128711
auto src0 = builder.createSrc(r0->getRegVar(), 0, 0,
87138712
builder.getRegionScalar(), Type_UD);
8714-
auto src1 = builder.createImm(~GRFMask, Type_UD);
8713+
const uint32_t ArgOffsetMask = 0xFFFFFFC0;
8714+
auto src1 = builder.createImm(ArgOffsetMask, Type_UD);
87158715
auto dst = builder.createDst(rtail->getRegVar(), 0, subreg, 1, Type_UD);
87168716
auto andInst = builder.createBinOp(G4_and, g4::SIMD1,
87178717
dst, src0, src1, InstOpt_WriteEnable, false);

‎visa/VISAKernelImpl.cpp

+3-2
Original file line numberDiff line numberDiff line change
@@ -741,9 +741,10 @@ void VISAKernelImpl::createReservedKeywordSet() {
741741
// specification
742742
reservedNames.insert("FILE");
743743
reservedNames.insert("LOC");
744-
reservedNames.insert("flat");
745-
reservedNames.insert("bti");
744+
reservedNames.insert("arg");
746745
reservedNames.insert("bss");
746+
reservedNames.insert("bti");
747+
reservedNames.insert("flat");
747748
reservedNames.insert("ss");
748749
}
749750

‎visa/VisaToG4/TranslateSendLdStLsc.cpp

+32
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,10 @@ static G4_Operand *lscTryPromoteSurfaceImmToExDesc(
4343
exDesc |= surfaceImm;
4444
surface = nullptr;
4545
}
46+
} else if (addrModel == LSC_ADDR_TYPE_ARG) {
47+
MUST_BE_TRUE(false, "caller should have fixed this");
48+
exDesc |= 0xFF << 24;
49+
surface = nullptr;
4650
} else {
4751
// flat address type
4852
MUST_BE_TRUE(surface->isNullReg() ||
@@ -142,6 +146,34 @@ int IR_Builder::translateLscUntypedInst(
142146

143147
const static uint32_t BYTES_PER_REG = COMMON_ISA_GRF_REG_SIZE;
144148

149+
if (addrInfo.type == LSC_ADDR_TYPE_ARG) {
150+
// Translate argument loads to platform specific logic
151+
MUST_BE_TRUE(addrInfo.size == LSC_ADDR_SIZE_32b,
152+
"lsc_load... arg[...] must be :a32");
153+
//
154+
// (W) and (1) TMP0:ud r0.0:ud 0xFFFFFFC0:ud
155+
// (W) add (1) TMP1:ud TMP0:ud src0Addr:ud
156+
// ... load.ugm.a32... bti[255][TMP]
157+
G4_Declare *argBase = createTempVar(1, Type_UD, Even_Word);
158+
auto andDst = createDst(argBase->getRegVar(), 0, 0, 1, Type_UD);
159+
auto andSrc0 = createSrc(getBuiltinR0()->getRegVar(), 0, 0,
160+
getRegionScalar(),Type_UD);
161+
auto andSrc1 = createImm(0xFFFFFFC0, Type_UD);
162+
(void)createBinOp(G4_and, g4::SIMD1,
163+
andDst, andSrc0, andSrc1, InstOpt_WriteEnable, true);
164+
auto addDst = createDst(src0Addr->getBase(), src0Addr->getRegOff(),
165+
src0Addr->getSubRegOff(), 1, Type_UD);
166+
auto addSrc0 = createSrc(src0Addr->getBase(), src0Addr->getRegOff(),
167+
src0Addr->getSubRegOff(), src0Addr->getRegion(), src0Addr->getType());
168+
auto addSrc1 =
169+
createSrc(argBase->getRegVar(), 0, 0, getRegionScalar(), Type_UD);
170+
(void)createBinOp(G4_add, g4::SIMD1,
171+
addDst, addSrc0, addSrc1, InstOpt_WriteEnable, true);
172+
//
173+
addrInfo.type = LSC_ADDR_TYPE_BTI;
174+
surface = createImm(0xFF, Type_UD);
175+
}
176+
145177
// send descriptor
146178
uint32_t desc = 0;
147179
uint32_t exDesc = 0;

‎visa/include/visa_igc_common_header.h

+3
Original file line numberDiff line numberDiff line change
@@ -729,6 +729,9 @@ enum LSC_ADDR_TYPE {
729729
LSC_ADDR_TYPE_BSS, // bindless surface state offset
730730
LSC_ADDR_TYPE_SS, // surface state offset
731731
LSC_ADDR_TYPE_BTI, // binding table interface (legacy)
732+
//
733+
// Pseudo address types
734+
LSC_ADDR_TYPE_ARG, // built-in surface access to kernel arguments
732735
};
733736

734737
//

0 commit comments

Comments
 (0)