Skip to content

Firtool Release 1.75.0

Compare
Choose a tag to compare
@albertchen-sifive albertchen-sifive released this 16 May 01:49
· 991 commits to main since this release
481cb60

What's Changed

  • [FIRRTL] Canoncializations of not( cmp ) by @darthscsi in #6957
  • Fix invalid rewriter API usages by @7FM in #6960
  • [NFC] LLVM Bump by @darthscsi in #6963
  • [HW] Moved and renamed arc/inlineModules to hw/flattenModules by @dobios in #6964
  • [firtool] btor2 integration by @dobios in #6947
  • [ExportVerilog] Ensure DivS/ModS are signed regardless of context. by @dtzSiFive in #6966
  • [FIRRTL][FIRParser] Add deprecation warning about printf/when-encoding. by @dtzSiFive in #6792
  • [FIRRTL] Error if asked to add a port to a public module. by @dtzSiFive in #6936
  • [Seq] Fix compreg printer printing two spaces by @Moxinilian in #6978
  • [FIRRTL] Drop dead ScalaClassAnnotation. by @dtzSiFive in #6981
  • [FIRRTL] Add inline convention to layers by @seldridge in #6980
  • [SMT] Add quantifier support to LLVM lowering by @maerhart in #6973
  • [Arc] Hoist reset value in CompReg when lowering for simulation by @Moxinilian in #6972
  • [LTL to Core] Add lowering for AssertProperty operations by @dobios in #6974
  • [NFCI] Document division and the rational for the handling of divide by zero by @darthscsi in #6962
  • [FIRRTL] docs: fullasync annotation targets signal not module. by @dtzSiFive in #6986
  • [firtool] Integrate AssertProperty lowering into BTOR2 pipeline by @dobios in #6975
  • [FIRRTL][InferResets] Fix fullasyncreset diag to use right name. by @dtzSiFive in #6987
  • [FIRRTL][Dedup] Alter dedup group handling, avoid exponential behavior. by @dtzSiFive in #6985
  • [CombToArith] Fix coarsening of division by zero UB by @maerhart in #6945
  • [Pipeline] Verify >0 result types for LatencyOp by @mortbopet in #6992
  • [DC] Add merge lowering by @mortbopet in #6943
  • [Handshake] Add merge decomposition pattern by @mortbopet in #6934
  • [CAPI][Moore] Remove deprecated types by @hovind in #6994
  • [FIRRTL][LowerAnnotations] Reject non-local fullasyncreset anno's. by @dtzSiFive in #6988
  • [NFC][clang-tidy] Disallow global 'using' directives in headers by @fzi-hielscher in #6998
  • [FIRRTL][SFCCompat] Fix tests and handling of fullasyncreset on non-port. by @dtzSiFive in #6984
  • [pycde] Disallow structs with zero fields by @teqdruid in #7000
  • [ImportVerilog] Fix unknown name caused by local variables. by @hailongSun2000 in #6995
  • [firtool] Add FlattenModulesPass to the btor2 emission pipeline by @dobios in #6999
  • [FIRRTL][NFC] Drop use of intmodule's in tests. by @dtzSiFive in #7008
  • [FIRRTL][LowerIntrinsics] Add stat and preserve if no changes. by @dtzSiFive in #6911
  • [FIRRTL] AnnoTarget: use LLVM style casts by @youngar in #7002
  • LLVM Bump by @dobios in #6993
  • [HW][LegalizeModules] Avoid segmentation fault by @hovind in #7013
  • [FIRRTL] Make input probes illegal by @dtzSiFive in #6921
  • [FIRRTL] Don't prefix an empty label for unclocked assume. by @dtzSiFive in #7016
  • [CAPI] Add circt-capi target and build it in CI by @fabianschuiki in #7017
  • [docs] Add cmake flags that reduce memory usage by @dobios in #7018
  • [HWToSMT][circt-lec] Resolve transitive !smt.bool -> i1 -> !smt.bv<1> casts. by @fzi-hielscher in #7006
  • [ARC][CAPI] Add basic C API for initializing ARC by @devins2518 in #6997
  • [Moore] Make simple bit vectors a proper MLIR type by @fabianschuiki in #7011
  • [AddSeqMemPorts] Add hierpathop to verbatim, instead of raw instance path by @prithayan in #7014
  • [docs] Add basic pass tutorial by @dobios in #7012
  • [FIRRTL] Add condition expansion for ExpandWhens on Property intrinsics by @dobios in #7021
  • [OM] Add IsolatedFromAbove to OMClass by @uenoku in #7020
  • [ESI][Runtime] Python wheel now provides cpp support by @teqdruid in #7001
  • cmake: circt install directory for CAPI by @dtzSiFive in #7028
  • [ESI][Runtime] Remove C++ includes from wheels by @teqdruid in #7032
  • [OM] Separates OM object fields verifier to a dedicated pass by @uenoku in #7026
  • [SV] Add sv.reserve_names op to disallow names by @teqdruid in #7024
  • [ESI][Runtime] Don't pull down JSON dependency if already defined by @teqdruid in #7033
  • [CombToSMT] Make result of div-by-zero undefined by @maerhart in #7025

Full Changelog: firtool-1.74.0...firtool-1.75.0