Update dependencies: rtfm->rtic, rustcrypto

Author: nickray

.cargo/config

@@ -1,11 +1,11 @@
 [target.thumbv8m.main-none-eabi]
-runner = "gdb-multiarch -q -x jlink.gdb"
+runner = "arm-none-eabi-gdb -q -x jlink.gdb"
 rustflags = [
   "-C", "link-arg=-Tlink.x",
 ]
 
 [target.thumbv8m.main-none-eabihf]
-runner = "gdb-multiarch -q -x jlink.gdb"
+runner = "arm-none-eabi-gdb -q -x jlink.gdb"
 rustflags = [
   "-C", "link-arg=-Tlink.x",
 ]

CHANGELOG.md

@@ -28,7 +28,7 @@ Architectural changes:
 - move from "single file per peripheral" to split between
   HAL wrappers for peripherals, and actual drivers
 - get rid of a lot of references/lifetimes which don't
-  cooperate with RTFM
+  cooperate with RTIC
 
 The clock tree will definitely need some more work.
 It's a conundrum between compile-time vs runtime checks,

Cargo.toml

@@ -16,21 +16,21 @@ build = "build.rs"
 circle-ci = { repository = "nickray/lpc55-hal" }
 
 [dependencies]
-bare-metal = "0.2"
-block-buffer = "0.7.3"
-block-cipher = "0.7.0"
+bare-metal = "1"
+block-buffer = "0.9.0"
+block-cipher = "0.8.0"
 cortex-m = "0.6"
 cortex-m-semihosting = "0.3"
-digest = "0.8.1"
+digest = "0.9.0"
 embedded-hal = { version = "0.2", features = ["unproven"] }
-generic-array = "0.13.2"
+generic-array = "0.14.3"
 lpc55-pac = "0.1.0"
 
-nb = "0.1"
+nb = "1"
 # no-panic = "0.1.12"
 # nom = { version = "^5", default-features = false }
 cortex-m-funnel = { version = "0.1.0-alpha.1", optional = true }
-cortex-m-rtfm = { version = "0.5.1", optional = true }
+cortex-m-rtic = { version = "0.5.1", optional = true }
 # littlefs2 = { path = "../littlefs2", optional = true }
 littlefs2 = { git = "https://github.com/nickray/littlefs2", branch = "closures-instead-of-ub", optional = true }
 ufmt = { version = "0.1.0", optional = true }
@@ -43,20 +43,20 @@ aligned = "0.3.2"
 # salty = { path = "../salty", features = ["haase"] }
 
 [dev-dependencies]
-aes-soft = "0.3"
+aes-soft = "0.4"
 cortex-m-rt = "0.6"
-cortex-m-rtfm = "0.5.1"
+cortex-m-rtic = "0.5.1"
 cortex-m-semihosting = "0.3"
-ga14 = { package = "generic-array", version = "0.14" }
+# ga14 = { package = "generic-array", version = "0.14" }
 # digest = { version = "0.8", default-features = false }
 heapless = "0.5"
 panic-halt  = "0.2"
 panic-semihosting = { version = "0.5", features = ["jlink-quirks"] }
 # salty = { path = "../salty", features = ["haase"] }
 # salty = { path = "../salty", features = ["tweetnacl"] }
-sha2 = { version = "0.8.2", default-features = false }
+sha2 = { version = "0.9.1", default-features = false }
 ssd1306 = "0.3.0-alpha.2"
-sha-1 = { version = "0.8.2", default-features = false }
+sha-1 = { version = "0.9.1", default-features = false }
 # ssd1306 = { git = "https://github.com/jamwaffles/ssd1306.git", branch = "70x42-ish" }
 # ssd1306 = { path = "../ssd1306-tiny" }
 
@@ -70,7 +70,7 @@ default = ["rt"]
 littlefs = ["littlefs2"]
 logging = ["cortex-m-funnel", "ufmt"]
 rt = ["lpc55-pac/rt"]
-rtfm-peripherals = ["cortex-m-rtfm"]
+rtic-peripherals = ["cortex-m-rtic"]
 # no longer a HAL feature, just for the usb examples
 highspeed-usb-example = []
 # # Boards

Makefile

@@ -5,9 +5,9 @@ build-both:
 clean:
 	rm -rf venv
 
-view-rtfm-expansion:
-	rustfmt target/rtfm-expansion.rs
-	vi target/rtfm-expansion.rs
+view-rtic-expansion:
+	rustfmt target/rtic-expansion.rs
+	vi target/rtic-expansion.rs
 
 # turn off the LEDs and whatnot
 darkness:

README.md

@@ -17,7 +17,7 @@ over platform-dependencies, allowing firmware and drivers to be quite portable.
 
 It also implements the [`usb-device`][usb-device] framework.
 
-Moreover, this library is compatible with the Cortex-M implementation of [RTFM][cortex-m-rtfm],
+Moreover, this library is compatible with the Cortex-M implementation of [RTIC][cortex-m-rtic],
 a concurrency framework supporting preemptive multitasking with minimal footprint.
 
 ## Status
@@ -34,7 +34,7 @@ Next up will be:
 
 See also the low-level companion library [LPC55S6x PAC][lpc55s6x-pac].
 
-This HAL is intended to work with `cortex-m-rtfm` v0.5.
+This HAL is intended to work with `cortex-m-rtic` v0.5.
 
 ## Documentation
 
@@ -61,7 +61,7 @@ After flashing [J-Link firmware][jlink-fw] on the on-board LPCXpresso V2 debugge
 make jlink
 
 # in another terminal
-make run-example EXAMPLE=rtfm_led  # or any other example
+make run-example EXAMPLE=rtic_led  # or any other example
 ```
 
 ## Setup
@@ -92,7 +92,7 @@ from the various [STM32 HALs][stm32-rs].
 [cortex-m33]: https://developer.arm.com/ip-products/processors/cortex-m/cortex-m33
 [embedded-hal]: https://lib.rs/embedded-hal
 [usb-device]: https://lib.rs/usb-device
-[cortex-m-rtfm]: https://lib.rs/cortex-m-rtfm
+[cortex-m-rtic]: https://lib.rs/cortex-m-rtic
 [lpc55s6x-pac]: https://lib.rs/lpc55s6x-pac
 [lpc8xx-hal]: https://github.com/lpc-rs/lpc8xx-hal
 [stm32-rs]: https://github.com/stm32-rs

examples/aes.rs

@@ -14,11 +14,10 @@ use hal::prelude::*;
 #[allow(unused_imports)]
 use lpc55_hal as hal;
 
-use aes_soft::block_cipher_trait::BlockCipher as _;
-use aes_soft::block_cipher_trait::generic_array::GenericArray as GA12;
+use aes_soft::block_cipher::{BlockCipher, NewBlockCipher};
 
 use block_cipher::BlockCipher as _;
-use ga14::GenericArray as GA14;
+use generic_array::GenericArray;
 
 use cortex_m_semihosting::{dbg, hprintln};
 
@@ -29,37 +28,36 @@ fn main() -> ! {
     let mut hashcrypt = hal::Hashcrypt::from(dp.HASHCRYPT).enabled(&mut syscon);
 
     let raw_key = [0u8; 32];
-    let key12 = GA12::from_slice(&raw_key);
+    let key = GenericArray::from_slice(&raw_key);
 
     let raw_block = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
-    let block12 = GA12::clone_from_slice(&raw_block);
-    let block14 = GA14::clone_from_slice(&raw_block);
+    let block = GenericArray::clone_from_slice(&raw_block);
 
     //
     // via software
     //
-    let mut sw_block = block12.clone();
-    let cipher = aes_soft::Aes256::new(&key12);
+    let mut sw_block = block.clone();
+    let cipher = aes_soft::Aes256::new(&key);
 
     let (sw_cyc_enc, _) = hal::count_cycles(|| {
         cipher.encrypt_block(&mut sw_block);
     });
     hprintln!("encrypting with aes-soft took {} cycles", sw_cyc_enc).unwrap();
 
-    let sw_encrypted_block: [u8; 16] = sw_block.as_ref().try_into().unwrap();
+    let sw_encrypted_block: [u8; 16] = sw_block[..].try_into().unwrap();
 
     let (sw_cyc_dec, _) = hal::count_cycles(|| {
         cipher.decrypt_block(&mut sw_block);
     });
     hprintln!("decrypting with aes-soft took {} cycles", sw_cyc_dec).unwrap();
 
     // check sw decrypt⚬encrypt = id
-    assert_eq!(sw_block, block12);
+    assert_eq!(sw_block, block);
 
     //
     // via hardware
     //
-    let mut hw_block = block14.clone();
+    let mut hw_block = block.clone();
     let cipher = hashcrypt.aes256(&raw_key);
 
     cipher.prime_for_encryption();
@@ -85,7 +83,7 @@ fn main() -> ! {
     hprintln!("speedup: {}x", sw_cyc_dec / hw_cyc_dec).unwrap();
 
     // check hw decrypt⚬encrypt = id
-    assert_eq!(hw_block, block14);
+    assert_eq!(hw_block, block);
 
 
     // // Finally, PUF key

examples/late.rs

@@ -21,7 +21,7 @@ use heapless::{
 use lpc55_hal as hal;
 use panic_semihosting as _;
 
-#[rtfm::app(device = hal::raw)]
+#[rtic::app(device = hal::raw)]
 const APP: () = {
     // Late resources
     struct Resources {
@@ -46,7 +46,7 @@ const APP: () = {
                 hprintln!("received message: {}", byte).unwrap();
             // cortex_m::asm::wfi();
             } else {
-                rtfm::pend(Interrupt::ADC0);
+                rtic::pend(Interrupt::ADC0);
             }
         }
     }

examples/rtfm_led.rs

@@ -15,7 +15,7 @@ use hal::{
 
 type RedLed = hal::Pin<pins::Pio1_6, pin::state::Gpio<pin::gpio::direction::Output>>;
 
-#[rtfm::app(device = crate::hal::raw, peripherals = true)]
+#[rtic::app(device = crate::hal::raw, peripherals = true)]
 const APP: () = {
     struct Resources {
         led: RedLed,

examples/sha.rs

@@ -7,7 +7,7 @@ use cortex_m_rt::entry;
 use cortex_m_semihosting::dbg;
 
 use lpc55_hal as hal;
-use hal::traits::digest::{FixedOutput, Input};
+use hal::traits::digest::{FixedOutput, Update};
 
 #[entry]
 fn main() -> ! {
@@ -32,15 +32,15 @@ fn main() -> ! {
 
         let (hw_cyc, hw_result) = hal::count_cycles(|| {
             let mut hw_sha1 = hashcrypt.sha1();
-            hw_sha1.input(msg);
-            hw_sha1.fixed_result()
+            hw_sha1.update(msg);
+            hw_sha1.finalize_fixed()
         });
         hw_cycles = hw_cyc;
 
         let (sw_cyc, sw_result) = hal::count_cycles(|| {
             let mut sw_sha1: sha1::Sha1 = Default::default();
-            sw_sha1.input(msg);
-            sw_sha1.fixed_result()
+            sw_sha1.update(msg);
+            sw_sha1.finalize_fixed()
         });
         sw_cycles = sw_cyc;
         assert_eq!(hw_result, sw_result);
@@ -55,15 +55,15 @@ fn main() -> ! {
 
         let (hw_cyc, hw_result) = hal::count_cycles(|| {
             let mut hw_sha256 = hashcrypt.sha256();
-            hw_sha256.input(msg);
-            hw_sha256.fixed_result()
+            hw_sha256.update(msg);
+            hw_sha256.finalize_fixed()
         });
         hw_cycles = hw_cyc;
 
         let (sw_cyc, sw_result) = hal::count_cycles(|| {
             let mut sw_sha256: sha2::Sha256 = Default::default();
-            sw_sha256.input(msg);
-            sw_sha256.fixed_result()
+            sw_sha256.update(msg);
+            sw_sha256.finalize_fixed()
         });
         sw_cycles = sw_cyc;
 

src/drivers/aes.rs

@@ -1,7 +1,6 @@
 use core::convert::TryInto;
 
 use aligned::{A4, Aligned};
-use block_buffer::byteorder::{ByteOrder, BE};
 
 use crate::{
     peripherals::hashcrypt::Hashcrypt,
@@ -169,7 +168,7 @@ impl<'a, Size: KeySize> Aes<'a, Size> {
         }
 
         for i in 0..4 {
-            BE::write_u32_into(&[self.digest0[i].read().bits()], &mut block.as_mut_slice()[4*i..4*i + 4]);
+            block.as_mut_slice()[4*i..4*i + 4].copy_from_slice(&self.digest0[i].read().bits().to_be_bytes());
         }
     }
 }

src/drivers/flash.rs

@@ -236,6 +236,7 @@ enum FlashCommands {
     ReportEcc= 0xD,
 }
 
+#[cfg(feature = "littlefs")]
 // const BASE_OFFSET: usize = 0x0007_d000;
 const BASE_OFFSET: usize = 0x0008_9800;
 

src/drivers/sha.rs

@@ -1,12 +1,12 @@
 use core::marker::PhantomData;
 
 use aligned::{A4, Aligned};
-use block_buffer::{byteorder::{ByteOrder, BE}, BlockBuffer};
+use block_buffer::BlockBuffer;
 
 use crate::{
     peripherals::hashcrypt::Hashcrypt,
     traits::{
-        digest::{BlockInput, FixedOutput, Input /*, Reset*/},
+        digest::{BlockInput, FixedOutputDirty, Update /*, Reset*/},
         digest::generic_array::{GenericArray, typenum::{U20, U32, U64}},
     },
     typestates::init_state::Enabled,
@@ -78,36 +78,34 @@ impl<Size: OutputSize> BlockInput for Sha<'_, Size> {
     type BlockSize = BlockSize;
 }
 
-impl<Size: OutputSize> FixedOutput for Sha<'_, Size> {
+impl<Size: OutputSize> FixedOutputDirty for Sha<'_, Size> {
     type OutputSize = Size;
 
-    fn fixed_result(mut self) -> GenericArray<u8, Self::OutputSize> {
+    fn finalize_into_dirty(&mut self, out: &mut GenericArray<u8, Self::OutputSize>) {
         self.finish();
         // cf `hashcrypt_get_data` ~line 315 of `fsl_hashcrypt.c`
-        let mut out = GenericArray::<u8, Self::OutputSize>::default();
         for i in 0..Size::to_usize() / 4 {
-            BE::write_u32_into(&[self.inner.raw.digest0[i].read().bits()], &mut out.as_mut_slice()[4*i..4*i + 4]);
+            out.as_mut_slice()[4*i..4*i + 4].copy_from_slice(&self.inner.raw.digest0[i].read().bits().to_be_bytes());
         }
-        out
     }
 }
 
-impl<Size: OutputSize> Input for Sha<'_, Size> {
-    fn input<B: AsRef<[u8]>>(&mut self, input: B) {
-        self.input(input.as_ref());
+impl<Size: OutputSize> Update for Sha<'_, Size> {
+    fn update(&mut self, data: impl AsRef<[u8]>) {
+        self.update(data.as_ref());
     }
 }
 
 // the actual implementation
 
 impl<Size: OutputSize> Sha<'_, Size> {
-    fn input(&mut self, input: &[u8]) {
+    fn update(&mut self, data: &[u8]) {
         // Assumes that input.len() can be converted to u64 without overflow
-        self.len += (input.len() as u64) << 3;
+        self.len += (data.len() as u64) << 3;
         // need to convince compiler we're using buffer and peripheral
         // independently, and not doing a double &mut
         let peripheral = &mut self.inner;
-        self.buffer.input(input, |input| Self::process_block(peripheral, input));
+        self.buffer.input_block(data, |data| Self::process_block(peripheral, data));
     }
 
     // relevant code is ~line 800 in fsl_hashcrypt.c
@@ -130,7 +128,7 @@ impl<Size: OutputSize> Sha<'_, Size> {
     fn finish(&mut self) {
         let peripheral = &mut self.inner;
         let l = self.len;
-        self.buffer.len64_padding::<BE, _>(l, |block| Self::process_block(peripheral, block));
+        self.buffer.len64_padding_be(l, |block| Self::process_block(peripheral, block));
         while peripheral.raw.status.read().digest().is_not_ready() {
             continue;
         }

src/drivers/usbd.rs

@@ -119,7 +119,7 @@ where
 
     pub fn clear_interrupt(&mut self) {
         // clear interrupt, otherwise in an interrupt-driven setting
-        // like RTFM the idle loop will get starved.
+        // like RTIC the idle loop will get starved.
         interrupt::free(|cs| {
             // set device address to 0
             let usb = self.usb_regs.borrow(cs);

src/drivers/usbd/endpoint_list.rs

@@ -48,7 +48,7 @@ pub struct Instance {
     pub(crate) _marker: PhantomData<*const EndpointList>,
 }
 
-// #[cfg(feature = "rtfm")]
+// #[cfg(feature = "rtic")]
 unsafe impl Send for Instance {}
 unsafe impl Send for EndpointList {}