README.md

learning_fpga

Project containing tests for learning FPGA/VHDL.

Hardware

• FPGA chip: EP4CE6E22C8N. (datasheet in mouser)
• Dev board: Cyclone IV. "RZ EasyFPGA A2.2" (banggood link, with information in chineese)

Software

• Intel Quartus FPGA Lite 21.1 (download link)

links

• compatible code related interesting projects
  • VGA using same board
  • Some Translations of the chineese information and examples for the board, in Verilog
  • Information in Portuguese, with example in vhdl
  • FPGA designs with VHDL

Demos:

Testing VGA driver

Log:

• Learn VHDL (in progress)

  • hello world: blinking led (+keyboard) : https://github.com/naelolaiz/learning_fpga/tree/main/blink_led
  • driver for 7 segments display
    • basic handling and mux for 4 digits on a simple counter: https://github.com/naelolaiz/learning_fpga/tree/main/7segments/counter
    • extended handling with alphanumeric chars, strings and scrolling: https://github.com/naelolaiz/learning_fpga/tree/main/7segments/text
    • (in progress) simple clock application using entities for compositions: https://github.com/naelolaiz/learning_fpga/tree/main/7segments/clock
      • create reusable entity for digits and connect instances in cascade.
      • create reusable entity for a timer. Use it as clock for the first digit.
      • create reusable entity for a time counter (instatiating a timer inside). Use it for handling the CableSelect on the multiplexed digits.
      • allow two view modes HHMM/MMSS. Change it with a button.
        • use a debouncer for the button (this is the only code that is not mine. It is copied from https://nandland.com/project-4-debounce-a-switch/). I copied it because I knew that it was there, and I was focused on other functionalities. TODO: create my own version.
      • allow setting the time by increasing the numbers with a second button.
        • the speed should be fast, and should depend on the current view mode.
      • allow setting the time by decreasing the numbers with a third button. Update digit entity accordingly.
      • TODO:
        • make the middle dot on the second display to blink. At different intervals depending on the view mode (0.5 sec to change state -period 1hz- for HHMM, 0.25 ? sec to change state in MMSS)
        • add alarm
        • milliseconds view
        • improve set time interface (dynamic speed for increasing/decreasing time)
        • cleanup
        • simplify code to remove redundant timers

• create a CI github action to compile a vhdl file with ghdl : https://github.com/naelolaiz/learning_fpga/blob/main/.github/workflows/ci.yml

  • TODO: make other vhdl files compatible. At least " Clock" (they don't currently compile because of missing configurations and probably different standards used?)

• create a CI github infrastructure allowing:

  • automatically run a simulation, and generate a .png file with the simulation signals view in gtkwave
  • automatically create .svg diagram files for the selected .vhd files
  • all done in https://github.com/naelolaiz/hdltools and https://github.com/naelolaiz/fpga_tutorial.
    • TODO: merge here! DONE!
    • TODO: clean up

• TODO:

  • create a simple game with the buttons and the 7 segments display (snake / space invaders)
    • learn how to generate random numbers with the FPGA
  • create a vga text driver
    • adapt 7 segment created entities to use VGA as display (clock, game, ...)
  • create an i2s driver
    • create / find a FFT implementation to
      • create a spectral analyzer (i2s, fft, vga)
      • (+IFFT, +DSP algorithms) create an FX/DSP module
        • (+bluetooth/BLE driver) extend module with wireless audio

• Learn Verilog (TODO)

more links

• https://projectf.io/tutorials/
  • https://projectf.io/recommended-fpga-sites/
  • https://projectf.io/howto/