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sergeykhbrsergeykhbr
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[*] Update SystemC model after rtlgen upgrade to support multiple reset and clock signals in one module. This functionality allows to generate async. clock-domain-crossing modules without limitation
[!] Fix 'not all signals in the sensitivity list' of PLIC module warnings [*] Naming convention of register process and reset function were updated
1 parent adefeb9 commit 70ede88

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8 files changed

+287
-245
lines changed

8 files changed

+287
-245
lines changed

‎sc/rtl/misclib/apb_prci.cpp

+38-38
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ apb_prci::apb_prci(sc_module_name name,
4242
VENDOR_OPTIMITECH,
4343
OPTIMITECH_PRCI);
4444
pslv0->i_clk(i_clk);
45-
pslv0->i_nrst(r.sys_nrst);
45+
pslv0->i_nrst(rh.sys_nrst);
4646
pslv0->i_mapinfo(i_mapinfo);
4747
pslv0->o_cfg(o_cfg);
4848
pslv0->i_apbi(i_apbi);
@@ -51,9 +51,9 @@ apb_prci::apb_prci(sc_module_name name,
5151
pslv0->o_req_addr(wb_req_addr);
5252
pslv0->o_req_write(w_req_write);
5353
pslv0->o_req_wdata(wb_req_wdata);
54-
pslv0->i_resp_valid(r.resp_valid);
55-
pslv0->i_resp_rdata(r.resp_rdata);
56-
pslv0->i_resp_err(r.resp_err);
54+
pslv0->i_resp_valid(rh.resp_valid);
55+
pslv0->i_resp_rdata(rh.resp_rdata);
56+
pslv0->i_resp_err(rh.resp_err);
5757

5858
SC_METHOD(comb);
5959
sensitive << i_pwrreset;
@@ -66,16 +66,16 @@ apb_prci::apb_prci(sc_module_name name,
6666
sensitive << wb_req_addr;
6767
sensitive << w_req_write;
6868
sensitive << wb_req_wdata;
69-
sensitive << r.sys_rst;
70-
sensitive << r.sys_nrst;
71-
sensitive << r.dbg_nrst;
72-
sensitive << r.sys_locked;
73-
sensitive << r.ddr_locked;
74-
sensitive << r.resp_valid;
75-
sensitive << r.resp_rdata;
76-
sensitive << r.resp_err;
77-
78-
SC_METHOD(registers);
69+
sensitive << rh.sys_rst;
70+
sensitive << rh.sys_nrst;
71+
sensitive << rh.dbg_nrst;
72+
sensitive << rh.sys_locked;
73+
sensitive << rh.ddr_locked;
74+
sensitive << rh.resp_valid;
75+
sensitive << rh.resp_rdata;
76+
sensitive << rh.resp_err;
77+
78+
SC_METHOD(rhegisters);
7979
sensitive << i_pwrreset;
8080
sensitive << i_clk.pos();
8181
}
@@ -98,14 +98,14 @@ void apb_prci::generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd) {
9898
sc_trace(o_vcd, o_dbg_nrst, o_dbg_nrst.name());
9999
sc_trace(o_vcd, i_apbi, i_apbi.name());
100100
sc_trace(o_vcd, o_apbo, o_apbo.name());
101-
sc_trace(o_vcd, r.sys_rst, pn + ".r_sys_rst");
102-
sc_trace(o_vcd, r.sys_nrst, pn + ".r_sys_nrst");
103-
sc_trace(o_vcd, r.dbg_nrst, pn + ".r_dbg_nrst");
104-
sc_trace(o_vcd, r.sys_locked, pn + ".r_sys_locked");
105-
sc_trace(o_vcd, r.ddr_locked, pn + ".r_ddr_locked");
106-
sc_trace(o_vcd, r.resp_valid, pn + ".r_resp_valid");
107-
sc_trace(o_vcd, r.resp_rdata, pn + ".r_resp_rdata");
108-
sc_trace(o_vcd, r.resp_err, pn + ".r_resp_err");
101+
sc_trace(o_vcd, rh.sys_rst, pn + ".rh_sys_rst");
102+
sc_trace(o_vcd, rh.sys_nrst, pn + ".rh_sys_nrst");
103+
sc_trace(o_vcd, rh.dbg_nrst, pn + ".rh_dbg_nrst");
104+
sc_trace(o_vcd, rh.sys_locked, pn + ".rh_sys_locked");
105+
sc_trace(o_vcd, rh.ddr_locked, pn + ".rh_ddr_locked");
106+
sc_trace(o_vcd, rh.resp_valid, pn + ".rh_resp_valid");
107+
sc_trace(o_vcd, rh.resp_rdata, pn + ".rh_resp_rdata");
108+
sc_trace(o_vcd, rh.resp_err, pn + ".rh_resp_err");
109109
}
110110

111111
if (pslv0) {
@@ -118,11 +118,11 @@ void apb_prci::comb() {
118118

119119
vb_rdata = 0;
120120

121-
v = r;
121+
vh = rh;
122122

123-
v.sys_rst = (i_pwrreset.read() || (!i_sys_locked.read()) || i_dmireset.read());
124-
v.sys_nrst = (!(i_pwrreset.read() || (!i_sys_locked.read()) || i_dmireset.read()));
125-
v.dbg_nrst = (!(i_pwrreset.read() || (!i_sys_locked.read())));
123+
vh.sys_rst = (i_pwrreset.read() || (!i_sys_locked.read()) || i_dmireset.read());
124+
vh.sys_nrst = (!(i_pwrreset.read() || (!i_sys_locked.read()) || i_dmireset.read()));
125+
vh.dbg_nrst = (!(i_pwrreset.read() || (!i_sys_locked.read())));
126126

127127
// Registers access:
128128
switch (wb_req_addr.read()(11, 2)) {
@@ -131,8 +131,8 @@ void apb_prci::comb() {
131131
vb_rdata[1] = i_ddr_locked;
132132
break;
133133
case 1: // 0x04: reset status
134-
vb_rdata[0] = r.sys_nrst;
135-
vb_rdata[1] = r.dbg_nrst;
134+
vb_rdata[0] = rh.sys_nrst;
135+
vb_rdata[1] = rh.dbg_nrst;
136136
if (w_req_valid.read() == 1) {
137137
if (w_req_write.read() == 1) {
138138
// todo:
@@ -143,24 +143,24 @@ void apb_prci::comb() {
143143
break;
144144
}
145145

146-
v.resp_valid = w_req_valid;
147-
v.resp_rdata = vb_rdata;
148-
v.resp_err = 0;
146+
vh.resp_valid = w_req_valid;
147+
vh.resp_rdata = vb_rdata;
148+
vh.resp_err = 0;
149149

150150
if (!async_reset_ && i_pwrreset.read() == 1) {
151-
apb_prci_r_reset(v);
151+
apb_prci_rh_reset(vh);
152152
}
153153

154-
o_sys_rst = r.sys_rst;
155-
o_sys_nrst = r.sys_nrst;
156-
o_dbg_nrst = r.dbg_nrst;
154+
o_sys_rst = rh.sys_rst;
155+
o_sys_nrst = rh.sys_nrst;
156+
o_dbg_nrst = rh.dbg_nrst;
157157
}
158158

159-
void apb_prci::registers() {
159+
void apb_prci::rhegisters() {
160160
if (async_reset_ && i_pwrreset.read() == 1) {
161-
apb_prci_r_reset(r);
161+
apb_prci_rh_reset(rh);
162162
} else {
163-
r = v;
163+
rh = vh;
164164
}
165165
}
166166

‎sc/rtl/misclib/apb_prci.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ SC_MODULE(apb_prci) {
3838
sc_out<apb_out_type> o_apbo; // APB Bridge to Slave interface
3939

4040
void comb();
41-
void registers();
41+
void rhegisters();
4242

4343
SC_HAS_PROCESS(apb_prci);
4444

@@ -51,7 +51,7 @@ SC_MODULE(apb_prci) {
5151
private:
5252
bool async_reset_;
5353

54-
struct apb_prci_registers {
54+
struct apb_prci_rhegisters {
5555
sc_signal<bool> sys_rst;
5656
sc_signal<bool> sys_nrst;
5757
sc_signal<bool> dbg_nrst;
@@ -60,9 +60,9 @@ SC_MODULE(apb_prci) {
6060
sc_signal<bool> resp_valid;
6161
sc_signal<sc_uint<32>> resp_rdata;
6262
sc_signal<bool> resp_err;
63-
} v, r;
63+
} vh, rh;
6464

65-
void apb_prci_r_reset(apb_prci_registers &iv) {
65+
void apb_prci_rh_reset(apb_prci_rhegisters &iv) {
6666
iv.sys_rst = 0;
6767
iv.sys_nrst = 0;
6868
iv.dbg_nrst = 0;

‎sc/rtl/misclib/plic.h

+69-42
Original file line numberDiff line numberDiff line change
@@ -51,13 +51,13 @@ SC_MODULE(plic) {
5151
bool async_reset_;
5252

5353
struct plic_context_type {
54-
sc_uint<4> priority_th;
55-
sc_bv<1024> ie; // interrupt enable per context
56-
sc_bv<(4 * 1024)> ip_prio; // interrupt pending priority per context
57-
sc_uint<16> prio_mask; // pending interrupts priorites
58-
sc_uint<4> sel_prio; // the most available priority
59-
sc_uint<10> irq_idx; // currently selected most prio irq
60-
sc_uint<10> irq_prio; // currently selected prio level
54+
sc_signal<sc_uint<4>> priority_th;
55+
sc_signal<sc_bv<1024>> ie; // interrupt enable per context
56+
sc_signal<sc_bv<(4 * 1024)>> ip_prio; // interrupt pending priority per context
57+
sc_signal<sc_uint<16>> prio_mask; // pending interrupts priorites
58+
sc_signal<sc_uint<4>> sel_prio; // the most available priority
59+
sc_signal<sc_uint<10>> irq_idx; // currently selected most prio irq
60+
sc_signal<sc_uint<10>> irq_prio; // currently selected prio level
6161
};
6262

6363

@@ -141,6 +141,15 @@ plic<ctxmax, irqmax>::plic(sc_module_name name,
141141
sensitive << r.src_priority;
142142
sensitive << r.pending;
143143
sensitive << r.ip;
144+
for (int i = 0; i < ctxmax; i++) {
145+
sensitive << r.ctx[i].priority_th;
146+
sensitive << r.ctx[i].ie;
147+
sensitive << r.ctx[i].ip_prio;
148+
sensitive << r.ctx[i].prio_mask;
149+
sensitive << r.ctx[i].sel_prio;
150+
sensitive << r.ctx[i].irq_idx;
151+
sensitive << r.ctx[i].irq_prio;
152+
}
144153
sensitive << r.rdata;
145154

146155
SC_METHOD(registers);
@@ -196,7 +205,13 @@ void plic<ctxmax, irqmax>::comb() {
196205
sc_uint<CFG_SYSBUS_DATA_BITS> vrdata;
197206
sc_uint<10> vb_irq_idx[ctxmax]; // Currently selected most prio irq
198207
sc_uint<10> vb_irq_prio[ctxmax]; // Currently selected prio level
199-
plic_context_type vb_ctx[ctxmax];
208+
sc_uint<4> vb_ctx_priority_th[ctxmax];
209+
sc_bv<1024> vb_ctx_ie[ctxmax];
210+
sc_bv<(4 * 1024)> vb_ctx_ip_prio[ctxmax];
211+
sc_uint<16> vb_ctx_prio_mask[ctxmax];
212+
sc_uint<4> vb_ctx_sel_prio[ctxmax];
213+
sc_uint<10> vb_ctx_irq_idx[ctxmax];
214+
sc_uint<10> vb_ctx_irq_prio[ctxmax];
200215
sc_bv<(4 * 1024)> vb_src_priority;
201216
sc_bv<1024> vb_pending;
202217
sc_uint<ctxmax> vb_ip;
@@ -210,13 +225,25 @@ void plic<ctxmax, irqmax>::comb() {
210225
vb_irq_prio[i] = 0;
211226
}
212227
for (int i = 0; i < ctxmax; i++) {
213-
vb_ctx[i].priority_th = 0;
214-
vb_ctx[i].ie = 0;
215-
vb_ctx[i].ip_prio = 0;
216-
vb_ctx[i].prio_mask = 0;
217-
vb_ctx[i].sel_prio = 0;
218-
vb_ctx[i].irq_idx = 0;
219-
vb_ctx[i].irq_prio = 0;
228+
vb_ctx_priority_th[i] = 0;
229+
}
230+
for (int i = 0; i < ctxmax; i++) {
231+
vb_ctx_ie[i] = 0;
232+
}
233+
for (int i = 0; i < ctxmax; i++) {
234+
vb_ctx_ip_prio[i] = 0;
235+
}
236+
for (int i = 0; i < ctxmax; i++) {
237+
vb_ctx_prio_mask[i] = 0;
238+
}
239+
for (int i = 0; i < ctxmax; i++) {
240+
vb_ctx_sel_prio[i] = 0;
241+
}
242+
for (int i = 0; i < ctxmax; i++) {
243+
vb_ctx_irq_idx[i] = 0;
244+
}
245+
for (int i = 0; i < ctxmax; i++) {
246+
vb_ctx_irq_prio[i] = 0;
220247
}
221248
vb_src_priority = 0;
222249
vb_pending = 0;
@@ -243,10 +270,10 @@ void plic<ctxmax, irqmax>::comb() {
243270
vb_src_priority = r.src_priority;
244271
vb_pending = r.pending;
245272
for (int i = 0; i < ctxmax; i++) {
246-
vb_ctx[i].priority_th = r.ctx[i].priority_th;
247-
vb_ctx[i].ie = r.ctx[i].ie;
248-
vb_ctx[i].irq_idx = r.ctx[i].irq_idx;
249-
vb_ctx[i].irq_prio = r.ctx[i].irq_prio;
273+
vb_ctx_priority_th[i] = r.ctx[i].priority_th;
274+
vb_ctx_ie[i] = r.ctx[i].ie;
275+
vb_ctx_irq_idx[i] = r.ctx[i].irq_idx;
276+
vb_ctx_irq_prio[i] = r.ctx[i].irq_prio;
250277
}
251278

252279
for (int i = 1; i < irqmax; i++) {
@@ -258,28 +285,28 @@ void plic<ctxmax, irqmax>::comb() {
258285
for (int n = 0; n < ctxmax; n++) {
259286
for (int i = 0; i < irqmax; i++) {
260287
if ((r.pending.read()[i] == 1)
261-
&& (r.ctx[n].ie[i] == 1)
262-
&& (r.src_priority.read()((4 * i) + 4 - 1, (4 * i)).to_int() > r.ctx[n].priority_th)) {
263-
vb_ctx[n].ip_prio((4 * i) + 4 - 1, (4 * i)) = r.src_priority.read()((4 * i) + 4 - 1, (4 * i));
264-
vb_ctx[n].prio_mask[r.src_priority.read()((4 * i) + 4 - 1, (4 * i)).to_int()] = 1;
288+
&& (r.ctx[n].ie.read()[i] == 1)
289+
&& (r.src_priority.read()((4 * i) + 4 - 1, (4 * i)).to_int() > r.ctx[n].priority_th.read())) {
290+
vb_ctx_ip_prio[n]((4 * i) + 4 - 1, (4 * i)) = r.src_priority.read()((4 * i) + 4 - 1, (4 * i));
291+
vb_ctx_prio_mask[n][r.src_priority.read()((4 * i) + 4 - 1, (4 * i)).to_int()] = 1;
265292
}
266293
}
267294
}
268295

269296
// Select max priority in each context
270297
for (int n = 0; n < ctxmax; n++) {
271298
for (int i = 0; i < 16; i++) {
272-
if (r.ctx[n].prio_mask[i] == 1) {
273-
vb_ctx[n].sel_prio = i;
299+
if (r.ctx[n].prio_mask.read()[i] == 1) {
300+
vb_ctx_sel_prio[n] = i;
274301
}
275302
}
276303
}
277304

278305
// Select max priority in each context
279306
for (int n = 0; n < ctxmax; n++) {
280307
for (int i = 0; i < irqmax; i++) {
281-
if (r.ctx[n].sel_prio.or_reduce()
282-
&& (r.ctx[n].ip_prio((4 * i) + 4 - 1, (4 * i)) == r.ctx[n].sel_prio)) {
308+
if (r.ctx[n].sel_prio.read().or_reduce()
309+
&& (r.ctx[n].ip_prio.read()((4 * i) + 4 - 1, (4 * i)) == r.ctx[n].sel_prio)) {
283310
// Most prio irq and prio level
284311
vb_irq_idx[n] = i;
285312
vb_irq_prio[n] = r.ctx[n].sel_prio;
@@ -288,8 +315,8 @@ void plic<ctxmax, irqmax>::comb() {
288315
}
289316

290317
for (int n = 0; n < ctxmax; n++) {
291-
vb_ctx[n].irq_idx = vb_irq_idx[n];
292-
vb_ctx[n].irq_prio = vb_irq_prio[n];
318+
vb_ctx_irq_idx[n] = vb_irq_idx[n];
319+
vb_ctx_irq_prio[n] = vb_irq_prio[n];
293320
vb_ip[n] = vb_irq_idx[n].or_reduce();
294321
}
295322

@@ -327,13 +354,13 @@ void plic<ctxmax, irqmax>::comb() {
327354
&& (wb_req_addr.read()(11, 7) < ctxmax)) {
328355
// First 32 context of 15867 support only
329356
// 0x002000,0x002080,...,0x200000
330-
vrdata = r.ctx[wb_req_addr.read()(11, 7)].ie((64 * wb_req_addr.read()(6, 3)) + 64 - 1, (64 * wb_req_addr.read()(6, 3))).to_uint64();
357+
vrdata = r.ctx[wb_req_addr.read()(11, 7)].ie.read()((64 * wb_req_addr.read()(6, 3)) + 64 - 1, (64 * wb_req_addr.read()(6, 3))).to_uint64();
331358
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
332359
if (wb_req_wstrb.read()(3, 0).or_reduce() == 1) {
333-
vb_ctx[wb_req_addr.read()(11, 7)].ie((64 * wb_req_addr.read()(6, 3)) + 32 - 1, (64 * wb_req_addr.read()(6, 3))) = wb_req_wdata.read()(31, 0);
360+
vb_ctx_ie[wb_req_addr.read()(11, 7)]((64 * wb_req_addr.read()(6, 3)) + 32 - 1, (64 * wb_req_addr.read()(6, 3))) = wb_req_wdata.read()(31, 0);
334361
}
335362
if (wb_req_wstrb.read()(7, 4).or_reduce() == 1) {
336-
vb_ctx[wb_req_addr.read()(11, 7)].ie(((64 * wb_req_addr.read()(6, 3)) + 32) + 32 - 1, ((64 * wb_req_addr.read()(6, 3)) + 32)) = wb_req_wdata.read()(63, 32);
363+
vb_ctx_ie[wb_req_addr.read()(11, 7)](((64 * wb_req_addr.read()(6, 3)) + 32) + 32 - 1, ((64 * wb_req_addr.read()(6, 3)) + 32)) = wb_req_wdata.read()(63, 32);
337364
}
338365
}
339366
} else if ((wb_req_addr.read()(21, 12) >= 0x200) && (wb_req_addr.read()(20, 12) < ctxmax)) {
@@ -344,15 +371,15 @@ void plic<ctxmax, irqmax>::comb() {
344371
vrdata(41, 32) = r.ctx[rctx_idx].irq_idx;
345372
// claim/ complete. Reading clears pending bit
346373
if (r.ip.read()[rctx_idx] == 1) {
347-
vb_pending[r.ctx[rctx_idx].irq_idx] = 0;
374+
vb_pending[r.ctx[rctx_idx].irq_idx.read()] = 0;
348375
}
349376
if ((w_req_valid.read() == 1) && (w_req_write.read() == 1)) {
350377
if (wb_req_wstrb.read()(3, 0).or_reduce() == 1) {
351-
vb_ctx[rctx_idx].priority_th = wb_req_wdata.read()(3, 0);
378+
vb_ctx_priority_th[rctx_idx] = wb_req_wdata.read()(3, 0);
352379
}
353380
if (wb_req_wstrb.read()(7, 4).or_reduce() == 1) {
354381
// claim/ complete. Reading clears pedning bit
355-
vb_ctx[rctx_idx].irq_idx = 0;
382+
vb_ctx_irq_idx[rctx_idx] = 0;
356383
}
357384
}
358385
} else {
@@ -365,13 +392,13 @@ void plic<ctxmax, irqmax>::comb() {
365392
v.pending = vb_pending;
366393
v.ip = vb_ip;
367394
for (int n = 0; n < ctxmax; n++) {
368-
v.ctx[n].priority_th = vb_ctx[n].priority_th;
369-
v.ctx[n].ie = vb_ctx[n].ie;
370-
v.ctx[n].ip_prio = vb_ctx[n].ip_prio;
371-
v.ctx[n].prio_mask = vb_ctx[n].prio_mask;
372-
v.ctx[n].sel_prio = vb_ctx[n].sel_prio;
373-
v.ctx[n].irq_idx = vb_ctx[n].irq_idx;
374-
v.ctx[n].irq_prio = vb_ctx[n].irq_prio;
395+
v.ctx[n].priority_th = vb_ctx_priority_th[n];
396+
v.ctx[n].ie = vb_ctx_ie[n];
397+
v.ctx[n].ip_prio = vb_ctx_ip_prio[n];
398+
v.ctx[n].prio_mask = vb_ctx_prio_mask[n];
399+
v.ctx[n].sel_prio = vb_ctx_sel_prio[n];
400+
v.ctx[n].irq_idx = vb_ctx_irq_idx[n];
401+
v.ctx[n].irq_prio = vb_ctx_irq_prio[n];
375402
}
376403

377404
if (!async_reset_ && i_nrst.read() == 0) {

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