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flake8 v6 fixes
1 parent e10793c commit 44a4b1f

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7 files changed

+85
-63
lines changed

7 files changed

+85
-63
lines changed

‎.flake8

+54-32
Original file line numberDiff line numberDiff line change
@@ -1,37 +1,59 @@
11
[flake8]
2-
exclude = __init__.py
32
#############################################################
43
# Note: Comamnd to remove white space at the end of lines
54
# $ find . -type f -name "*.py" -print0 | xargs -0 sed -i 's/\s*$//g'
65
#############################################################
7-
# E116 unexpected indentation (comment)
8-
# E128 continuation line under-indented for visual indent
9-
# E131 continuation line unaligned for hanging indent
10-
# E201 whitespace after '('
11-
# E202 whitespace before ')'
12-
# E203 whitespace before ':'
13-
# E211 whitespace before '('
14-
# E221 multiple spaces before operator
15-
# E222 multiple spaces after operator
16-
# E225 missing whitespace around operator
17-
# E226 missing whitespace around arithmetic operator
18-
# E227 missing whitespace around bitwise or shift operator
19-
# E228 missing whitespace around modulo operator
20-
# E231 missing whitespace after ','
21-
# E241 multiple spaces after ','
22-
# E251 unexpected spaces around keyword / parameter equals
23-
# E261 at least two spaces before inline comment
24-
# E262 inline comment should start with '# '
25-
# E265 block comment should start with '# '
26-
# E266 too many leading '#' for block comment
27-
# E272 multiple spaces before keyword
28-
# E302 expected 2 blank lines, found 1
29-
# E303 too many blank lines
30-
# E305 expected 2 blank lines after class or function definition
31-
# E306 expected 1 blank line before a nested definition, found 0
32-
# E501 line too long
33-
#############################################################
34-
ignore = E116,E128,E131,\
35-
E201,E202,E203,E211,E221,E222,E225,E226,E227,E228,E231,E241,E251,E261,E262,E265,E266,E272,\
36-
E302,E303,E305,E306,\
37-
E501
6+
exclude = __init__.py
7+
extend-ignore =
8+
# E116: unexpected indentation (comment)
9+
E116,
10+
# E128: continuation line under-indented for visual indent
11+
E128,
12+
# E131: continuation line unaligned for hanging indent
13+
E131,
14+
# E201: whitespace after '('
15+
E201,
16+
# E202: whitespace before ')'
17+
E202,
18+
# E203: whitespace before ':'
19+
E203,
20+
# E211: whitespace before '('
21+
E211,
22+
# E221: multiple spaces before operator
23+
E221,
24+
# E222: multiple spaces after operator
25+
E222,
26+
# E225: missing whitespace around operator
27+
E225,
28+
# E226: missing whitespace around arithmetic operator
29+
E226,
30+
# E227: missing whitespace around bitwise or shift operator
31+
E227,
32+
# E228: missing whitespace around modulo operator
33+
E228,
34+
# E231: missing whitespace after ','
35+
E231,
36+
# E241: multiple spaces after ','
37+
E241,
38+
# E251: unexpected spaces around keyword / parameter equals
39+
E251,
40+
# E261: at least two spaces before inline comment
41+
E261,
42+
# E262: inline comment should start with '# '
43+
E262,
44+
# E265: block comment should start with '# '
45+
E265,
46+
# E266: too many leading '#' for block comment
47+
E266,
48+
# E272: multiple spaces before keyword
49+
E272,
50+
# E302: expected 2 blank lines, found 1
51+
E302,
52+
# E303: too many blank lines
53+
E303,
54+
# E305: expected 2 blank lines after class or function definition
55+
E305,
56+
# E306: expected 1 blank line before a nested definition, found 0
57+
E306,
58+
# E501: line too long
59+
E501

‎python/surf/devices/micron/_AxiMicronMt28ew.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -196,7 +196,7 @@ def _eraseCmd(self, address):
196196
self._writeToFlash(address,0x30)
197197
while True:
198198
status = self._readFromFlash(address)
199-
if( (status&0x80) != 0 ):
199+
if ( (status&0x80) != 0 ):
200200
break
201201

202202
def writeProm(self):

‎python/surf/devices/micron/_AxiMicronN25Q.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -291,7 +291,7 @@ def writeProm(self):
291291

292292
# Check for leftover data
293293
if ( (wordCnt != 0) or (byteCnt != 0) ):
294-
while(wordCnt != 64):
294+
while (wordCnt != 64):
295295
# Pack the bytes into a 32-bit word
296296
if ( byteCnt==0 ):
297297
wrd = (0xFF) << (8*(3-byteCnt))
@@ -373,7 +373,7 @@ def readCmd(self, address):
373373
self.setCmd(self.READ_MASK|self.READ_3BYTE_CMD|0x103)
374374

375375
def setPromStatusReg(self, value):
376-
if(self._addrMode):
376+
if (self._addrMode):
377377
self.setAddrReg((value&0xFF)<<24)
378378
self.setCmd(self.WRITE_MASK|self.STATUS_REG_WR_CMD|0x1)
379379
else:

‎python/surf/devices/micron/_AxiMicronP30.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -193,14 +193,14 @@ def _eraseCmd(self, address):
193193
# Get the status register
194194
status = self._readFromFlash(address,0x70)
195195
# Check for erasing failure
196-
if( (status&0x20) != 0 ):
196+
if ( (status&0x20) != 0 ):
197197
# Unlock the Block
198198
self._writeToFlash(address,0x60,0xD0)
199199
# Reset the status register
200200
self._writeToFlash(address,0x50,0x50)
201201
# Send the erase command
202202
self._writeToFlash(address,0x20,0xD0)
203-
elif( (status&0x80) != 0 ):
203+
elif ( (status&0x80) != 0 ):
204204
break
205205
# Lock the Block
206206
self._writeToFlash(address,0x60,0x01)

‎python/surf/devices/silabs/_Si5345Lite.py

+13-13
Original file line numberDiff line numberDiff line change
@@ -89,19 +89,19 @@ def LoadCsvFile(arg):
8989
##############################
9090
self._pages = {
9191
0: silabs.Si5345Page0(offset=(0x000<<2),simpleDisplay=simpleDisplay,expand=False), # 0x0000 - 0x03FF
92-
1: silabs.Si5345Page1(offset=(0x100<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x0400 - 0x07FF
93-
2: silabs.Si5345Page2(offset=(0x200<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x0800 - 0x0BFF
94-
3: silabs.Si5345Page3(offset=(0x300<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x0C00 - 0x0FFF
95-
4: silabs.Si5345Page4(offset=(0x400<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x1000 - 0x13FF
96-
5: silabs.Si5345Page5(offset=(0x500<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x1400 - 0x17FF
97-
98-
6: silabs.Si5345PageBase(name='Page6',offset=(0x600<<2),expand=False,hidden=not(advanceUser)), # 0x1800 - 0x1BFF
99-
7: silabs.Si5345PageBase(name='Page7',offset=(0x700<<2),expand=False,hidden=not(advanceUser)), # 0x1C00 - 0x1FFF
100-
8: silabs.Si5345PageBase(name='Page8',offset=(0x800<<2),expand=False,hidden=not(advanceUser)), # 0x2000 - 0x23FF
101-
102-
9: silabs.Si5345Page9(offset=(0x900<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x2400 - 0x27FF
103-
10: silabs.Si5345PageA(offset=(0xA00<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x2800 - 0x2BFF
104-
11: silabs.Si5345PageB(offset=(0xB00<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not(advanceUser),liteVersion=liteVersion), # 0x2C00 - 0x2FFF
92+
1: silabs.Si5345Page1(offset=(0x100<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x0400 - 0x07FF
93+
2: silabs.Si5345Page2(offset=(0x200<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x0800 - 0x0BFF
94+
3: silabs.Si5345Page3(offset=(0x300<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x0C00 - 0x0FFF
95+
4: silabs.Si5345Page4(offset=(0x400<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x1000 - 0x13FF
96+
5: silabs.Si5345Page5(offset=(0x500<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x1400 - 0x17FF
97+
98+
6: silabs.Si5345PageBase(name='Page6',offset=(0x600<<2),expand=False,hidden=not (advanceUser)), # 0x1800 - 0x1BFF
99+
7: silabs.Si5345PageBase(name='Page7',offset=(0x700<<2),expand=False,hidden=not (advanceUser)), # 0x1C00 - 0x1FFF
100+
8: silabs.Si5345PageBase(name='Page8',offset=(0x800<<2),expand=False,hidden=not (advanceUser)), # 0x2000 - 0x23FF
101+
102+
9: silabs.Si5345Page9(offset=(0x900<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x2400 - 0x27FF
103+
10: silabs.Si5345PageA(offset=(0xA00<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x2800 - 0x2BFF
104+
11: silabs.Si5345PageB(offset=(0xB00<<2),simpleDisplay=simpleDisplay,expand=False,hidden=not (advanceUser),liteVersion=liteVersion), # 0x2C00 - 0x2FFF
105105
}
106106

107107
# Add Pages

‎python/surf/devices/silabs/_Si5394Lite.py

+12-12
Original file line numberDiff line numberDiff line change
@@ -102,18 +102,18 @@ def LoadCsvFile(arg):
102102
##############################
103103
self._pages = {
104104
0: silabs.Si5345Page0(offset=(0x000<<2),simpleDisplay=simpleDisplay,expand=False),
105-
1: silabs.Si5345PageBase(name='Page1',offset=(0x100<<2),expand=False,hidden=not(advanceUser)),
106-
2: silabs.Si5345PageBase(name='Page2',offset=(0x200<<2),expand=False,hidden=not(advanceUser)),
107-
3: silabs.Si5345PageBase(name='Page3',offset=(0x300<<2),expand=False,hidden=not(advanceUser)),
108-
4: silabs.Si5345PageBase(name='Page4',offset=(0x400<<2),expand=False,hidden=not(advanceUser)),
109-
5: silabs.Si5345PageBase(name='Page5',offset=(0x500<<2),expand=False,hidden=not(advanceUser)),
110-
6: silabs.Si5345PageBase(name='Page6',offset=(0x600<<2),expand=False,hidden=not(advanceUser)),
111-
7: silabs.Si5345PageBase(name='Page7',offset=(0x700<<2),expand=False,hidden=not(advanceUser)),
112-
8: silabs.Si5345PageBase(name='Page8',offset=(0x800<<2),expand=False,hidden=not(advanceUser)),
113-
9: silabs.Si5345PageBase(name='Page9',offset=(0x900<<2),expand=False,hidden=not(advanceUser)),
114-
10: silabs.Si5345PageBase(name='PageA',offset=(0xA00<<2),expand=False,hidden=not(advanceUser)),
115-
11: silabs.Si5345PageBase(name='PageB',offset=(0xB00<<2),expand=False,hidden=not(advanceUser)),
116-
12: silabs.Si5345PageBase(name='PageC',offset=(0xC00<<2),expand=False,hidden=not(advanceUser)),
105+
1: silabs.Si5345PageBase(name='Page1',offset=(0x100<<2),expand=False,hidden=not (advanceUser)),
106+
2: silabs.Si5345PageBase(name='Page2',offset=(0x200<<2),expand=False,hidden=not (advanceUser)),
107+
3: silabs.Si5345PageBase(name='Page3',offset=(0x300<<2),expand=False,hidden=not (advanceUser)),
108+
4: silabs.Si5345PageBase(name='Page4',offset=(0x400<<2),expand=False,hidden=not (advanceUser)),
109+
5: silabs.Si5345PageBase(name='Page5',offset=(0x500<<2),expand=False,hidden=not (advanceUser)),
110+
6: silabs.Si5345PageBase(name='Page6',offset=(0x600<<2),expand=False,hidden=not (advanceUser)),
111+
7: silabs.Si5345PageBase(name='Page7',offset=(0x700<<2),expand=False,hidden=not (advanceUser)),
112+
8: silabs.Si5345PageBase(name='Page8',offset=(0x800<<2),expand=False,hidden=not (advanceUser)),
113+
9: silabs.Si5345PageBase(name='Page9',offset=(0x900<<2),expand=False,hidden=not (advanceUser)),
114+
10: silabs.Si5345PageBase(name='PageA',offset=(0xA00<<2),expand=False,hidden=not (advanceUser)),
115+
11: silabs.Si5345PageBase(name='PageB',offset=(0xB00<<2),expand=False,hidden=not (advanceUser)),
116+
12: silabs.Si5345PageBase(name='PageC',offset=(0xC00<<2),expand=False,hidden=not (advanceUser)),
117117
}
118118

119119
# Add Pages

‎python/surf/devices/ti/_Dac38J84.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ def __init__(self,
3838
mode = "RW",
3939
number = 126,
4040
stride = 4,
41-
hidden = not(debug),
41+
hidden = not (debug),
4242
verify = False, # DO NOT Verify all registers by default
4343
overlapEn = True,
4444
)

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