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mb/system76: Enable dGPUs
Change-Id: I4ca91ff631dd4badbfba72e69651f03753323a54 Signed-off-by: Tim Crawford <[email protected]>
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76 files changed

+703
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‎src/mainboard/system76/addw1/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ config BOARD_SPECIFIC_OPTIONS
77
select BOARD_ROMSIZE_KB_16384
88
select DRIVERS_GENERIC_CBFS_SERIAL
99
select DRIVERS_GENERIC_CBFS_UUID
10+
select DRIVERS_GFX_NVIDIA
1011
select DRIVERS_I2C_HID
1112
select DRIVERS_I2C_TAS5825M
1213
select EC_SYSTEM76_EC

‎src/mainboard/system76/addw1/Makefile.mk

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
## SPDX-License-Identifier: GPL-2.0-only
22

3-
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
3+
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
44

55
bootblock-y += bootblock.c
66
bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c

‎src/mainboard/system76/addw1/acpi/mainboard.asl

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,19 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#include <variant/gpio.h>
4+
35
#define EC_GPE_SCI 0x03 /* GPP_K3 */
46
#define EC_GPE_SWI 0x06 /* GPP_K6 */
57
#include <ec/system76/ec/acpi/ec.asl>
68

79
Scope (\_SB) {
810
#include "sleep.asl"
11+
Scope (PCI0) {
12+
Device (PEGP) {
13+
Name (_ADR, CONFIG_DRIVERS_GFX_NVIDIA_BRIDGE << 16)
14+
#include <drivers/gfx/nvidia/acpi/coffeelake.asl>
15+
}
16+
}
917
}
1018

1119
Scope (\_GPE) {

‎src/mainboard/system76/addw1/devicetree.cb

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,12 @@ chip soc/intel/cannonlake
5555
# PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)
5656
register "PcieClkSrcUsage[8]" = "0x40"
5757
register "PcieClkSrcClkReq[8]" = "8"
58+
chip drivers/gfx/nvidia
59+
device pci 00.0 on end # VGA controller
60+
device pci 00.1 on end # Audio device
61+
device pci 00.2 on end # USB xHCI Host controller
62+
device pci 00.3 on end # USB Type-C UCSI controller
63+
end
5864
end
5965
device ref igpu on end
6066
device ref dptf on

‎src/mainboard/system76/addw1/romstage.c

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#include <drivers/gfx/nvidia/gpu.h>
34
#include <soc/cnl_memcfg_init.h>
45
#include <soc/romstage.h>
6+
#include <variant/gpio.h>
57

68
static const struct cnl_mb_cfg memcfg = {
79
.spd[0] = {
@@ -20,5 +22,17 @@ static const struct cnl_mb_cfg memcfg = {
2022

2123
void mainboard_memory_init_params(FSPM_UPD *memupd)
2224
{
25+
const struct nvidia_gpu_config config = {
26+
.power_gpio = DGPU_PWR_EN,
27+
.reset_gpio = DGPU_RST_N,
28+
.enable = true,
29+
};
30+
31+
// Enable dGPU power
32+
nvidia_set_power(&config);
33+
34+
// Set primary display to internal graphics
35+
memupd->FspmConfig.PrimaryDisplay = 0;
36+
2337
cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg);
2438
}

‎src/mainboard/system76/tgl-h/include/variant/gpio.h renamed to ‎src/mainboard/system76/addw1/variants/addw1/include/variant/gpio.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,16 @@
33
#ifndef VARIANT_GPIO_H
44
#define VARIANT_GPIO_H
55

6+
#include <soc/gpio.h>
7+
8+
#define DGPU_RST_N GPP_F22
9+
#define DGPU_PWR_EN GPP_F23
10+
#define DGPU_GC6 GPP_C12
11+
#define DGPU_SSID 0x65d11558
12+
13+
#ifndef __ACPI__
614
void variant_configure_early_gpios(void);
715
void variant_configure_gpios(void);
16+
#endif
817

918
#endif

‎src/mainboard/system76/addw1/variants/addw2/include/variant/gpio.h

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef VARIANT_GPIO_H
4+
#define VARIANT_GPIO_H
5+
6+
#include <soc/gpio.h>
7+
8+
#define DGPU_RST_N GPP_F22
9+
#define DGPU_PWR_EN GPP_F23
10+
#define DGPU_GC6 GPP_C12
11+
#define DGPU_SSID 0x65e11558
12+
13+
#ifndef __ACPI__
14+
void variant_configure_early_gpios(void);
15+
void variant_configure_gpios(void);
16+
#endif
17+
18+
#endif

‎src/mainboard/system76/adl/Kconfig

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,10 +35,12 @@ config BOARD_SYSTEM76_GALP6
3535

3636
config BOARD_SYSTEM76_GAZE17_3050
3737
select BOARD_SYSTEM76_ADL_COMMON
38+
select DRIVERS_GFX_NVIDIA
3839
select EC_SYSTEM76_EC_DGPU
3940

4041
config BOARD_SYSTEM76_GAZE17_3060_B
4142
select BOARD_SYSTEM76_ADL_COMMON
43+
select DRIVERS_GFX_NVIDIA
4244
select EC_SYSTEM76_EC_DGPU
4345
select MAINBOARD_USES_IFD_GBE_REGION
4446

@@ -48,11 +50,15 @@ config BOARD_SYSTEM76_LEMP11
4850

4951
config BOARD_SYSTEM76_ORYP9
5052
select BOARD_SYSTEM76_ADL_COMMON
53+
select DRIVERS_GFX_NVIDIA
54+
select DRIVERS_GFX_NVIDIA_DYNAMIC_BOOST
5155
select DRIVERS_I2C_TAS5825M
5256
select EC_SYSTEM76_EC_DGPU
5357

5458
config BOARD_SYSTEM76_ORYP10
5559
select BOARD_SYSTEM76_ADL_COMMON
60+
select DRIVERS_GFX_NVIDIA
61+
select DRIVERS_GFX_NVIDIA_DYNAMIC_BOOST
5662
select EC_SYSTEM76_EC_DGPU
5763

5864
if BOARD_SYSTEM76_ADL_COMMON
@@ -107,6 +113,12 @@ config CONSOLE_POST
107113
config D3COLD_SUPPORT
108114
default n
109115

116+
config DRIVERS_GFX_NVIDIA_DYNAMIC_BOOST_TPP
117+
default 45 if BOARD_SYSTEM76_ORYP9 || BOARD_SYSTEM76_ORYP10
118+
119+
config DRIVERS_GFX_NVIDIA_DYNAMIC_BOOST_MAX
120+
default 25 if BOARD_SYSTEM76_ORYP9 || BOARD_SYSTEM76_ORYP10
121+
110122
config FMDFILE
111123
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/board.fmd"
112124

‎src/mainboard/system76/adl/Makefile.mk

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Original file line numberDiff line numberDiff line change
@@ -2,6 +2,10 @@
22

33
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
44

5+
ifeq ($(CONFIG_DRIVERS_GFX_NVIDIA),y)
6+
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
7+
endif
8+
59
bootblock-y += bootblock.c
610
bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c
711

‎src/mainboard/system76/adl/acpi/mainboard.asl

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#if CONFIG(DRIVERS_GFX_NVIDIA)
4+
#include <variant/gpio.h>
5+
#endif
6+
37
#define EC_GPE_SCI 0x6E
48
#define EC_GPE_SWI 0x6B
59
#include <ec/system76/ec/acpi/ec.asl>
@@ -8,5 +12,11 @@ Scope (\_SB) {
812
#include "sleep.asl"
913
Scope (PCI0) {
1014
#include "backlight.asl"
15+
16+
#if CONFIG(DRIVERS_GFX_NVIDIA)
17+
Scope (PEG2) {
18+
#include <drivers/gfx/nvidia/acpi/tigerlake.asl>
19+
}
20+
#endif
1121
}
1222
}

‎src/mainboard/system76/adl/variants/gaze17-3050/include/variant/gpio.h

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef VARIANT_GPIO_H
4+
#define VARIANT_GPIO_H
5+
6+
#include <soc/gpio.h>
7+
8+
#define DGPU_RST_N GPP_B2
9+
#define DGPU_PWR_EN GPP_A14
10+
#define DGPU_GC6 GPP_F13
11+
#define DGPU_SSID 0x866d1558
12+
13+
#endif

‎src/mainboard/system76/adl/variants/gaze17-3050/overridetree.cb

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,10 @@ chip soc/intel/alderlake
4040
.clk_req = 3,
4141
.flags = PCIE_RP_LTR,
4242
}"
43+
chip drivers/gfx/nvidia
44+
device pci 00.0 on end # VGA controller
45+
device pci 00.1 on end # Audio device
46+
end
4347
end
4448
device ref pcie4_0 on
4549
# PCIe PEG0 x4, Clock 0 (SSD2)

‎src/mainboard/system76/adl/variants/gaze17-3050/romstage.c

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Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#include <drivers/gfx/nvidia/gpu.h>
34
#include <soc/meminit.h>
45
#include <soc/romstage.h>
6+
#include <variant/gpio.h>
57

68
void mainboard_memory_init_params(FSPM_UPD *mupd)
79
{
@@ -17,6 +19,14 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
1719
};
1820
const bool half_populated = false;
1921

22+
const struct nvidia_gpu_config config = {
23+
.power_gpio = DGPU_PWR_EN,
24+
.reset_gpio = DGPU_RST_N,
25+
.enable = true,
26+
};
27+
// Enable dGPU power
28+
nvidia_set_power(&config);
29+
2030
// Set primary display to internal graphics
2131
mupd->FspmConfig.PrimaryDisplay = 0;
2232

‎src/mainboard/system76/adl/variants/gaze17-3060-b/include/variant/gpio.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef VARIANT_GPIO_H
4+
#define VARIANT_GPIO_H
5+
6+
#include <soc/gpio.h>
7+
8+
#define DGPU_RST_N GPP_B2
9+
#define DGPU_PWR_EN GPP_A14
10+
#define DGPU_GC6 GPP_F13
11+
#define DGPU_SSID 0x867c1558
12+
13+
#endif

‎src/mainboard/system76/adl/variants/gaze17-3060-b/overridetree.cb

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,10 @@ chip soc/intel/alderlake
4040
.clk_req = 3,
4141
.flags = PCIE_RP_LTR,
4242
}"
43+
chip drivers/gfx/nvidia
44+
device pci 00.0 on end # VGA controller
45+
device pci 00.1 on end # Audio device
46+
end
4347
end
4448
device ref igpu on
4549
# DDIA is eDP

‎src/mainboard/system76/adl/variants/gaze17-3060-b/romstage.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#include <drivers/gfx/nvidia/gpu.h>
34
#include <soc/meminit.h>
45
#include <soc/romstage.h>
6+
#include <variant/gpio.h>
57

68
void mainboard_memory_init_params(FSPM_UPD *mupd)
79
{
@@ -17,6 +19,14 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
1719
};
1820
const bool half_populated = false;
1921

22+
const struct nvidia_gpu_config config = {
23+
.power_gpio = DGPU_PWR_EN,
24+
.reset_gpio = DGPU_RST_N,
25+
.enable = true,
26+
};
27+
// Enable dGPU power
28+
nvidia_set_power(&config);
29+
2030
// Set primary display to internal graphics
2131
mupd->FspmConfig.PrimaryDisplay = 0;
2232

‎src/mainboard/system76/adl/variants/oryp10/include/variant/gpio.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef VARIANT_GPIO_H
4+
#define VARIANT_GPIO_H
5+
6+
#include <soc/gpio.h>
7+
8+
#define DGPU_RST_N GPP_B2
9+
#define DGPU_PWR_EN GPP_A14
10+
#define DGPU_GC6 GPP_A7
11+
#define DGPU_SSID 0x65f51558
12+
13+
#endif

‎src/mainboard/system76/adl/variants/oryp10/overridetree.cb

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,10 @@ chip soc/intel/alderlake
2525
.clk_req = 3,
2626
.flags = PCIE_RP_LTR,
2727
}"
28+
chip drivers/gfx/nvidia
29+
device pci 00.0 on end # VGA controller
30+
device pci 00.1 on end # Audio device
31+
end
2832
end
2933
device ref igpu on
3034
register "ddi_portA_config" = "1"

‎src/mainboard/system76/adl/variants/oryp10/romstage.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#include <drivers/gfx/nvidia/gpu.h>
34
#include <soc/meminit.h>
45
#include <soc/romstage.h>
6+
#include <variant/gpio.h>
57

68
void mainboard_memory_init_params(FSPM_UPD *mupd)
79
{
@@ -20,6 +22,14 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
2022
};
2123
const bool half_populated = false;
2224

25+
const struct nvidia_gpu_config config = {
26+
.power_gpio = DGPU_PWR_EN,
27+
.reset_gpio = DGPU_RST_N,
28+
.enable = true,
29+
};
30+
// Enable dGPU power
31+
nvidia_set_power(&config);
32+
2333
// Set primary display to internal graphics
2434
mupd->FspmConfig.PrimaryDisplay = 0;
2535

‎src/mainboard/system76/adl/variants/oryp9/include/variant/gpio.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef VARIANT_GPIO_H
4+
#define VARIANT_GPIO_H
5+
6+
#include <soc/gpio.h>
7+
8+
#define DGPU_RST_N GPP_B2
9+
#define DGPU_PWR_EN GPP_A14
10+
#define DGPU_GC6 GPP_A7
11+
#define DGPU_SSID 0x65f51558
12+
13+
#endif

‎src/mainboard/system76/adl/variants/oryp9/overridetree.cb

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,10 @@ chip soc/intel/alderlake
2525
.clk_req = 3,
2626
.flags = PCIE_RP_LTR,
2727
}"
28+
chip drivers/gfx/nvidia
29+
device pci 00.0 on end # VGA controller
30+
device pci 00.1 on end # Audio device
31+
end
2832
end
2933
device ref igpu on
3034
register "ddi_portA_config" = "1"

‎src/mainboard/system76/adl/variants/oryp9/romstage.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22

3+
#include <drivers/gfx/nvidia/gpu.h>
34
#include <soc/meminit.h>
45
#include <soc/romstage.h>
6+
#include <variant/gpio.h>
57

68
void mainboard_memory_init_params(FSPM_UPD *mupd)
79
{
@@ -17,6 +19,14 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
1719
};
1820
const bool half_populated = false;
1921

22+
const struct nvidia_gpu_config config = {
23+
.power_gpio = DGPU_PWR_EN,
24+
.reset_gpio = DGPU_RST_N,
25+
.enable = true,
26+
};
27+
// Enable dGPU power
28+
nvidia_set_power(&config);
29+
2030
// Set primary display to internal graphics
2131
mupd->FspmConfig.PrimaryDisplay = 0;
2232

‎src/mainboard/system76/bonw14/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ config BOARD_SPECIFIC_OPTIONS
77
select BOARD_ROMSIZE_KB_16384
88
select DRIVERS_GENERIC_CBFS_SERIAL
99
select DRIVERS_GENERIC_CBFS_UUID
10+
select DRIVERS_GFX_NVIDIA
1011
select DRIVERS_I2C_HID
1112
select DRIVERS_I2C_TAS5825M
1213
select EC_SYSTEM76_EC

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