SoundWire: start adding BPT/BRA support #5266
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The Bulk Register Access protocol was left as a TODO topic since 2018. It's time to document this protocol and the design of its Linux support. Signed-off-by: Pierre-Louis Bossart <[email protected]>
The register definitions are missing a BULK_ENABLE bitfield which must be set for DP0. In addition, the existing mapping from PDI to Data Port is 1:1. That's fine for PCM streams which are by construction in one direction only. The BTP/BRA protocol is bidirectional and relies on DP0 only, which breaks the 1:1 mapping. DP0 MUST be mapped to both PDI0 and PDI1, with PDI1 taking care of the TX direction and PDI1 of the RX direction. Signed-off-by: Pierre-Louis Bossart <[email protected]>
In the existing definition of sdw_stream_runtime, the 'type' member is never set and defaults to PCM. To prepare for the BPT/BRA support, we need to special-case streams and make use of the 'type'. No functional change for now, the implicit PCM type is now explicit. Signed-off-by: Pierre-Louis Bossart <[email protected]>
BPT/BRA need to be special cased, i.e. there's no point in using the bandwidth allocation since the entire frame can be used. Signed-off-by: Pierre-Louis Bossart <[email protected]>
For BPT support, we want to allocate the entire audio payload and bypass the allocation based on PCM/PDM parameters. Signed-off-by: Pierre-Louis Bossart <[email protected]>
DP0 (Data Port 0) is very similar to regular data ports, with minor tweaks we can reuse the same code. Signed-off-by: Pierre-Louis Bossart <[email protected]>
Add definitions and helpers for the BPT/BRA protocol. Peripheral drivers (aka ASoC codec drivers) can use this API to send bulk data such as firmware or tables. The design intent is however NOT to directly use this API but to rely on an intermediate regmap layer. The API is only available when no other audio streams have been allocated, and only one BTP/BRA stream is allowed per link. To avoid the addition of yet another lock, the refcount tests are handled in the stream master_runtime alloc/free routines where the bus_lock is already held. Another benefit of this approach is that the same bus_lock is used to handle runtime and port linked lists, which reduces the potential for misaligned configurations. In addition to exclusion with audio streams, BPT transfers have a lot of overhead, specifically registers writes are needed to enable transport in DP0. Most DMAs don't handle too well very small data sets and they may have alignment limitations. The size and alignment requirements are for now not handled by the core but must be checked by platform-specific drivers. Signed-off-by: Pierre-Louis Bossart <[email protected]>
Add a convenience pointer to the 'sdw_bus' structure. BPT is a dedicated stream which will typically not be handled by DAIs or dailinks. Since there's only one BPT stream per link, storing the pointer at the link level seems rather natural. Signed-off-by: Pierre-Louis Bossart <[email protected]>
The Cadence IP expects a specific format (detailed in the Documentation). Add helpers to copy the data into the DMA buffer. The crc8 table is for now only used by the Cadence driver. This table might be moved to a common module at a later point if needed by other controller implementations. Signed-off-by: Pierre-Louis Bossart <[email protected]>
Mirror abstraction added for master ops. Signed-off-by: Pierre-Louis Bossart <[email protected]>
Add SoundWire BPT DMA helpers as a separate module to avoid circular dependencies. For now this assumes no link DMA, only coupled mode. Signed-off-by: Pierre-Louis Bossart <[email protected]>
This is needed to be shared between open/send_async/close. Signed-off-by: Pierre-Louis Bossart <[email protected]>
Add support for BTP API using Cadence and hda-sdw-bpt helpers. Signed-off-by: Pierre-Louis Bossart <[email protected]>
Add code to show what codec drivers will need to do to enable BPT/BRA transfers. The only difference is to set the 'command_type' file to '1'. A zero-value will rely on regular read/write commands in Column0. Signed-off-by: Pierre-Louis Bossart <[email protected]>
DP0 is required for BPT/BRA transport. Signed-off-by: Pierre-Louis Bossart <[email protected]>
When the firmware is involved, the data can be transferred with a CHAIN_DMA on LNL+. The CHAIN_DMA needs to be programmed before the DMAs per the documentation. The states are not exactly symmetrical, on stop we must do a PAUSE and RESET. The FIFO size of 10ms was determined experimentally. With the minimum of 2ms, errors were reported by the codec, likely because of xruns. The code flow deals with the two TX and RX CHAIN_DMAs in symmetrical ways, i.e. alloc TX alloc RX enable TX enable RX disable RX disable TX free RX free TX Signed-off-by: Pierre-Louis Bossart <[email protected]>
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bardliao
commented
Dec 11, 2024
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| imp_def_interrupts = dpn_prop->imp_def_interrupts; | ||
| simple_ch_prep_sm = dpn_prop->simple_ch_prep_sm; |
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Need ch_prep_timeout = dpn_prop->ch_prep_timeout;?
bardliao
commented
Dec 11, 2024
| @@ -2124,7 +2165,8 @@ int sdw_stream_add_slave(struct sdw_slave *slave, | |||
| if (ret) | |||
| goto unlock; | |||
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| ret = sdw_slave_port_config(slave, s_rt, port_config); | |||
| ret = sdw_slave_port_config(slave, s_rt, port_config, | |||
| stream->type == SDW_STREAM_BPT ? true : false); | |||
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Simply to stream->type == SDW_STREAM_BPT?
bardliao
commented
Dec 12, 2024
| dev_err(bus->dev, "%s: Master runtime alloc failed for stream:%s: %d\n", | ||
| __func__, stream->name, ret); | ||
| goto unlock; | ||
| } |
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Should we merge the if (IS_ERR(m_rt)) and the if (!m_rt) case?
bardliao
commented
Dec 12, 2024
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| total -= SDW_CDNS_BRA_DATA_CRC; | ||
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| total -= SDW_CDNS_BRA_FOOTER_RESP; |
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Should we check if allocated_bytes_per_frame > these headers? I.e. total > 0
bardliao
commented
Dec 12, 2024
bardliao
commented
Dec 12, 2024
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This is a rebase version of #4679
I removed the removal of
select' statements at a higher level.in the SND_SOC_SOF_HDA_LINK_BASELINE config in af779a3 which I think it is removed by accident.