diff --git a/src/audio/chain_dma.c b/src/audio/chain_dma.c
index d2cc14230ea9..9aba9a74e92a 100644
--- a/src/audio/chain_dma.c
+++ b/src/audio/chain_dma.c
@@ -547,7 +547,7 @@ static int chain_task_init(struct comp_dev *dev, uint8_t host_dma_id, uint8_t li
 	dir = (cd->stream_direction == SOF_IPC_STREAM_PLAYBACK) ?
 		DMA_DIR_MEM_TO_DEV : DMA_DIR_DEV_TO_MEM;
 
-	cd->dma_link = dma_get(dir, DMA_CAP_HDA, DMA_DEV_HDA, DMA_ACCESS_SHARED);
+	cd->dma_link = dma_get(dir, SOF_DMA_CAP_HDA, DMA_DEV_HDA, DMA_ACCESS_SHARED);
 	if (!cd->dma_link) {
 		dma_put(cd->dma_host);
 		comp_err(dev, "chain_task_init(): dma_get() returned NULL");
diff --git a/src/audio/dai-zephyr.c b/src/audio/dai-zephyr.c
index 58499b8a699f..bce7d0c32409 100644
--- a/src/audio/dai-zephyr.c
+++ b/src/audio/dai-zephyr.c
@@ -1292,7 +1292,7 @@ static int dai_comp_trigger_internal(struct dai_data *dd, struct comp_dev *dev,
 		 * Only applies to non HD-DMA links as HD-DMA read/write pointer
 		 * is not reset during stop/config/start
 		 */
-		if (!(dd->dai->dma_caps & DMA_CAP_HDA))
+		if (!(dd->dai->dma_caps & SOF_DMA_CAP_HDA))
 			audio_stream_reset(&dd->dma_buffer->stream);
 
 		/* only start the DAI if we are not XRUN handling */
diff --git a/src/lib/dai.c b/src/lib/dai.c
index 4e48641679a7..7f68860d8287 100644
--- a/src/lib/dai.c
+++ b/src/lib/dai.c
@@ -175,30 +175,30 @@ static void dai_set_device_params(struct dai *d)
 	case SOF_DAI_INTEL_SSP:
 		d->dma_dev = DMA_DEV_SSP;
 #ifdef CONFIG_DMA_INTEL_ADSP_GPDMA
-		d->dma_caps = DMA_CAP_GP_LP | DMA_CAP_GP_HP;
+		d->dma_caps = SOF_DMA_CAP_GP_LP | SOF_DMA_CAP_GP_HP;
 #else
-		d->dma_caps = DMA_CAP_HDA;
+		d->dma_caps = SOF_DMA_CAP_HDA;
 #endif
 		break;
 	case SOF_DAI_INTEL_DMIC:
 		d->dma_dev = DMA_DEV_DMIC;
 #ifdef CONFIG_DMA_INTEL_ADSP_GPDMA
-		d->dma_caps = DMA_CAP_GP_LP | DMA_CAP_GP_HP;
+		d->dma_caps = SOF_DMA_CAP_GP_LP | SOF_DMA_CAP_GP_HP;
 #else
-		d->dma_caps = DMA_CAP_HDA;
+		d->dma_caps = SOF_DMA_CAP_HDA;
 #endif
 		break;
 	case SOF_DAI_INTEL_ALH:
 		d->dma_dev = DMA_DEV_ALH;
 #ifdef CONFIG_DMA_INTEL_ADSP_GPDMA
-		d->dma_caps = DMA_CAP_GP_LP | DMA_CAP_GP_HP;
+		d->dma_caps = SOF_DMA_CAP_GP_LP | SOF_DMA_CAP_GP_HP;
 #else
-		d->dma_caps = DMA_CAP_HDA;
+		d->dma_caps = SOF_DMA_CAP_HDA;
 #endif
 		break;
 	case SOF_DAI_INTEL_HDA:
 		d->dma_dev = DMA_DEV_HDA;
-		d->dma_caps = DMA_CAP_HDA;
+		d->dma_caps = SOF_DMA_CAP_HDA;
 		break;
 	default:
 		break;
diff --git a/zephyr/include/sof/lib/dma.h b/zephyr/include/sof/lib/dma.h
index ee283fd95aa9..4a6d08fc13c6 100644
--- a/zephyr/include/sof/lib/dma.h
+++ b/zephyr/include/sof/lib/dma.h
@@ -69,16 +69,16 @@ struct comp_buffer;
 #define DMA_DIR_DEV_TO_DEV	BIT(5) /**< dev to dev copy */
 
 /* DMA capabilities bitmasks used to define the type of DMA */
-#define DMA_CAP_HDA		BIT(0) /**< HDA DMA */
-#define DMA_CAP_GP_LP		BIT(1) /**< GP LP DMA */
-#define DMA_CAP_GP_HP		BIT(2) /**< GP HP DMA */
-#define DMA_CAP_BT              BIT(3) /**< BT DMA */
-#define DMA_CAP_SP              BIT(4) /**< SP DMA */
-#define DMA_CAP_DMIC            BIT(5) /**< ACP DMA DMIC > */
-#define DMA_CAP_SP_VIRTUAL      BIT(6) /**< SP VIRTUAL DMA */
-#define DMA_CAP_HS_VIRTUAL      BIT(7) /**< HS VIRTUAL DMA */
-#define DMA_CAP_HS		BIT(8) /**< HS DMA */
-#define DMA_CAP_SW		BIT(9) /**< SW DMA */
+#define SOF_DMA_CAP_HDA	BIT(0) /**< HDA DMA */
+#define SOF_DMA_CAP_GP_LP	BIT(1) /**< GP LP DMA */
+#define SOF_DMA_CAP_GP_HP	BIT(2) /**< GP HP DMA */
+#define SOF_DMA_CAP_BT		BIT(3) /**< BT DMA */
+#define SOF_DMA_CAP_SP		BIT(4) /**< SP DMA */
+#define SOF_DMA_CAP_DMIC	BIT(5) /**< ACP DMA DMIC > */
+#define SOF_DMA_CAP_SP_VIRTUAL	BIT(6) /**< SP VIRTUAL DMA */
+#define SOF_DMA_CAP_HS_VIRTUAL	BIT(7) /**< HS VIRTUAL DMA */
+#define SOF_DMA_CAP_HS		BIT(8) /**< HS DMA */
+#define SOF_DMA_CAP_SW		BIT(9) /**< SW DMA */
 
 /* DMA dev type bitmasks used to define the type of DMA */
 
diff --git a/zephyr/lib/dma.c b/zephyr/lib/dma.c
index 4d734026f322..3e9ef240dadd 100644
--- a/zephyr/lib/dma.c
+++ b/zephyr/lib/dma.c
@@ -26,7 +26,7 @@ SHARED_DATA struct dma dma[] = {
 	.plat_data = {
 		.dir		= DMA_DIR_MEM_TO_MEM | DMA_DIR_MEM_TO_DEV |
 				  DMA_DIR_DEV_TO_MEM | DMA_DIR_DEV_TO_DEV,
-		.caps		= DMA_CAP_GP_LP,
+		.caps		= SOF_DMA_CAP_GP_LP,
 		.devs		= DMA_DEV_SSP | DMA_DEV_DMIC |
 				  DMA_DEV_ALH,
 		.channels	= 8,
@@ -40,7 +40,7 @@ SHARED_DATA struct dma dma[] = {
 	.plat_data = {
 		.dir		= DMA_DIR_MEM_TO_MEM | DMA_DIR_MEM_TO_DEV |
 				  DMA_DIR_DEV_TO_MEM | DMA_DIR_DEV_TO_DEV,
-		.caps		= DMA_CAP_GP_LP,
+		.caps		= SOF_DMA_CAP_GP_LP,
 		.devs		= DMA_DEV_SSP | DMA_DEV_DMIC |
 				  DMA_DEV_ALH,
 		.channels	= 8,
@@ -53,7 +53,7 @@ SHARED_DATA struct dma dma[] = {
 {	/* Host In DMAC */
 	.plat_data = {
 		.dir		= DMA_DIR_LMEM_TO_HMEM,
-		.caps		= DMA_CAP_HDA,
+		.caps		= SOF_DMA_CAP_HDA,
 		.devs		= DMA_DEV_HOST,
 		.channels	= DT_PROP(DT_NODELABEL(hda_host_in), dma_channels),
 		.period_count	= HDA_DMA_BUFFER_PERIOD_COUNT,
@@ -65,7 +65,7 @@ SHARED_DATA struct dma dma[] = {
 {	/* Host out DMAC */
 	.plat_data = {
 		.dir		= DMA_DIR_HMEM_TO_LMEM,
-		.caps		= DMA_CAP_HDA,
+		.caps		= SOF_DMA_CAP_HDA,
 		.devs		= DMA_DEV_HOST,
 		.channels	= DT_PROP(DT_NODELABEL(hda_host_out), dma_channels),
 		.period_count	= HDA_DMA_BUFFER_PERIOD_COUNT,
@@ -77,7 +77,7 @@ SHARED_DATA struct dma dma[] = {
 {	/* Link In DMAC */
 	.plat_data = {
 		.dir		= DMA_DIR_DEV_TO_MEM,
-		.caps		= DMA_CAP_HDA,
+		.caps		= SOF_DMA_CAP_HDA,
 #if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30)
 		.devs		= DMA_DEV_HDA | DMA_DEV_SSP |
 					  DMA_DEV_DMIC | DMA_DEV_ALH,
@@ -94,7 +94,7 @@ SHARED_DATA struct dma dma[] = {
 {	/* Link out DMAC */
 	.plat_data = {
 		.dir		= DMA_DIR_MEM_TO_DEV,
-		.caps		= DMA_CAP_HDA,
+		.caps		= SOF_DMA_CAP_HDA,
 #if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30)
 		.devs		= DMA_DEV_HDA | DMA_DEV_SSP |
 					  DMA_DEV_DMIC | DMA_DEV_ALH,