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| 1 | +.. SPDX-License-Identifier: BSD-3-Clause |
| 2 | + Copyright(c) 2019 Intel Corporation. |
| 3 | +
|
| 4 | +IPN3KE Poll Mode Driver |
| 5 | +======================= |
| 6 | + |
| 7 | +The ipn3ke PMD (librte_pmd_ipn3ke) provides poll mode driver support |
| 8 | +for Intel® FPGA PAC(Programmable Acceleration Card) N3000 based on |
| 9 | +the Intel Ethernet Controller X710/XXV710 and Intel Arria 10 FPGA. |
| 10 | + |
| 11 | +In this card, FPGA is an acceleration bridge between network interface |
| 12 | +and the Intel Ethernet Controller. Although both FPGA and Ethernet |
| 13 | +Controllers are connected to CPU with PCIe Gen3x16 Switch, all the |
| 14 | +packet RX/TX is handled by Intel Ethernet Controller. So from application |
| 15 | +point of view the data path is still the legacy Intel Ethernet Controller |
| 16 | +X710/XXV710 PMD. Besides this, users can enable more acceleration |
| 17 | +features by FPGA IP. |
| 18 | + |
| 19 | +Prerequisites |
| 20 | +------------- |
| 21 | + |
| 22 | +- Identifying your adapter using `Intel Support |
| 23 | + <http://www.intel.com/support>`_ and get the latest NVM/FW images. |
| 24 | + |
| 25 | +- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment. |
| 26 | + |
| 27 | +- To get better performance on Intel platforms, please follow the "How to get best performance with NICs on Intel platforms" |
| 28 | + section of the :ref:`Getting Started Guide for Linux <linux_gsg>`. |
| 29 | + |
| 30 | + |
| 31 | +Pre-Installation Configuration |
| 32 | +------------------------------ |
| 33 | + |
| 34 | +Config File Options |
| 35 | +~~~~~~~~~~~~~~~~~~~ |
| 36 | + |
| 37 | +The following options can be modified in the ``config`` file. |
| 38 | + |
| 39 | +- ``CONFIG_RTE_LIBRTE_IPN3KE_PMD`` (default ``y``) |
| 40 | + |
| 41 | + Toggle compilation of the ``librte_pmd_ipn3ke`` driver. |
| 42 | + |
| 43 | +Runtime Config Options |
| 44 | +~~~~~~~~~~~~~~~~~~~~~~ |
| 45 | + |
| 46 | +- ``AFU name`` |
| 47 | + |
| 48 | + AFU name identifies which AFU is used by IPN3KE. The AFU name format is "Port|BDF", |
| 49 | + Each FPGA can be divided into four blocks at most. "Port" identifies which FPGA block |
| 50 | + the AFU bitstream belongs to, but currently only 0 IPN3KE support. "BDF" means FPGA PCIe BDF. |
| 51 | + For example:: |
| 52 | + |
| 53 | + --vdev 'ipn3ke_cfg0,afu=0|b3:00.0' |
| 54 | + |
| 55 | +- ``FPGA Acceleration list`` |
| 56 | + |
| 57 | + For IPN3KE FPGA can provide different bitstream, different bitstream includes different |
| 58 | + Acceleration, so users need to identify which Acceleration is used. Current IPN3KE can |
| 59 | + support TM and Flow Acceleration, for example:: |
| 60 | + |
| 61 | + --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow}' |
| 62 | + |
| 63 | +- ``I40e PF name list`` |
| 64 | + |
| 65 | + Users need to bind FPGA LineSidePort to FVL PF. So I40e PF name list should be involved in |
| 66 | + startup command. For example:: |
| 67 | + |
| 68 | + --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow},i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' |
| 69 | + |
| 70 | +Driver compilation and testing |
| 71 | +------------------------------ |
| 72 | + |
| 73 | +Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>` |
| 74 | +for details. |
| 75 | + |
| 76 | +Sample Application Notes |
| 77 | +------------------------ |
| 78 | + |
| 79 | +Packet TX/RX with FPGA Pass-through image |
| 80 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 81 | + |
| 82 | +FPGA Pass-through bitstream is original FPGA Image. |
| 83 | + |
| 84 | +To start ``testpmd``, and add I40e PF to FPGA network port: |
| 85 | + |
| 86 | +.. code-block:: console |
| 87 | +
|
| 88 | + ./app/testpmd -l 0-15 -n 4 --vdev 'ifpga_rawdev_cfg0,ifpga=b3:00.0,port=0' --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' -- -i --no-numa --port-topology=loop |
| 89 | +
|
| 90 | +HQoS and flow acceleration |
| 91 | +~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 92 | + |
| 93 | +HQoS and flow acceleration bitstream is used to offloading HQoS and flow classifier. |
| 94 | + |
| 95 | +To start ``testpmd``, and add I40e PF to FPGA network port, enable FPGA HQoS and Flow Acceleration: |
| 96 | + |
| 97 | +.. code-block:: console |
| 98 | +
|
| 99 | + ./app/testpmd -l 0-15 -n 4 --vdev 'ifpga_rawdev_cfg0,ifpga=b3:00.0,port=0' --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow},i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' -- -i --no-numa --forward-mode=macswap |
| 100 | +
|
| 101 | +Limitations or Known issues |
| 102 | +--------------------------- |
| 103 | + |
| 104 | +19.05 limitation |
| 105 | +~~~~~~~~~~~~~~~~ |
| 106 | + |
| 107 | +Ipn3ke code released in 19.05 is for evaluation only. |
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