ASIC designer with interest in Embedded and EDA tools
- Prague
- in/ondrej-ille-20a71b90
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CTU-CAN-FD
CTU-CAN-FD PublicThis is a mirror repository for official CTU CAN FD repository:
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Reg_Map_Gen
Reg_Map_Gen PublicRegister map generator for VHDL digital designs and Embedded Systems.
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iso-16845-compliance-tests
iso-16845-compliance-tests PublicCycle accurate C++ model of CAN bus according to ISO11898-2015 and compliance tests according to ISO16845-2016.
C++ 3
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llhd
llhd PublicForked from fabianschuiki/llhd
Low Level Hardware Description — A foundation for building hardware design tools.
Rust
161 contributions in the last year
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Contribution activity
April 2025
Opened 1 pull request in 1 repository
nickg/nvc
1
open
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Parse System Verilog always blocks.
This contribution was made on Apr 2
Reviewed 1 pull request in 1 repository
Blebowski/CTU-CAN-FD
1 pull request
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Update ctucanfd_base.c
This contribution was made on Apr 2