Fix riscv assembler

riscv64-asm.c: asm_opcode: add return asm_parse_regvar: add abi register names riscv64-tok.h: add abi register names
FitzRoyX · Jun 7, 2022 · cd627c6 · cd627c6
1 parent afc1362
commit cd627c6
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Showing 2 changed files with 6 additions and 3 deletions.
diff --git a/riscv64-asm.c b/riscv64-asm.c
@@ -643,6 +643,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token)
     case TOK_ASM_sltu:
     case TOK_ASM_sltiu:
         asm_data_processing_opcode(s1, token);
+	return;
 
     case TOK_ASM_lb:
     case TOK_ASM_lh:
@@ -712,9 +713,13 @@ ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str)
 ST_FUNC int asm_parse_regvar (int t)
 {
     if (t >= TOK_ASM_x0 && t <= TOK_ASM_pc) { /* register name */
+	if (t >= TOK_ASM_zero && t <= TOK_ASM_t6)
+	    return t - TOK_ASM_zero;
         switch (t) {
+            case TOK_ASM_s0:
+                return 8;
             case TOK_ASM_pc:
-                return -1; // TODO: Figure out where it can be used after all
+	        tcc_error("PC register not implemented.");
             default:
                 return t - TOK_ASM_x0;
         }

diff --git a/riscv64-tok.h b/riscv64-tok.h
@@ -41,7 +41,6 @@
 /* register macros */
 
  DEF_ASM(zero)
-/*
  DEF_ASM(ra)
  DEF_ASM(sp)
  DEF_ASM(gp)
@@ -75,7 +74,6 @@
  DEF_ASM(t6)
 
  DEF_ASM(s0) // = x8
-*/
 
  DEF_ASM(pc)