Update repo user docs (openhwgroup#841)

* Clarify scope of Verilator model Signed-off-by: Mike Thompson <[email protected]> * Update repo user docs Signed-off-by: Mike Thompson <[email protected]> * Update repo user docs Signed-off-by: Mike Thompson <[email protected]> * CORE-V not COREV Signed-off-by: Mike Thompson <[email protected]>
JeanRochCoulon · Apr 6, 2022 · 48af8da · 48af8da
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diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
@@ -1,6 +1,22 @@
-# Styleguides
+# Contributing
+New Contributors are always welcome.
 
-See [style-guidlines](https://github.com/pulp-platform/style-guidelines)
+Note that Contributors are required to be covered by an [Eclipse Contributor Agreement](https://www.eclipse.org/legal/ECA.php).
+Contributors are encouraged, but not required, to be a [member](https://www.openhwgroup.org/membership/) of the OpenHW Group.
+
+## The Mechanics
+1. From GitHub: [fork](https://help.github.com/articles/fork-a-repo/) the [cva6](https://github.com/openhwgroup/cva6) repository
+2. Clone repository: `git clone https://github.com/[your_github_username]/cva6`
+3. Create your feature branch: `git checkout -b <my_branch>.`<br> Please uniquify your branch name.
+See the [Git Cheats](https://github.com/openhwgroup/core-v-verif/blob/master/GitCheats.md) for a useful nomenclature.
+4. Make your edits...
+5. Commit your changes: `git commit -m 'Add some feature'`
+6. Push feature branch: `git push origin <my_branch>`
+7. From GitHub: submit a pull request
+
+## Coding Style
+
+For RTL coding, the OpenHW Group has adopted the [lowRISC Style Guides](https://github.com/lowRISC/style-guides/).
 
 ## Git Considerations
 

diff --git a/README.md b/README.md
@@ -8,32 +8,35 @@ It has configurable size, separate TLBs, a hardware PTW and branch-prediction (b
 
 ![](docs/_static/ariane_overview.png)
 
-## New Directory Structure:
-The directory structure has been changed to cleanly separate the [CVA6 RISC-V CPU](#cva6-risc-v-cpu) core from the COREV-APU [FPGA Emulation](#corev-apu-fpga-emulation).
+## Directory Structure:
+The directory structure separates the [CVA6 RISC-V CPU](#cva6-risc-v-cpu) core from the [CORE-V-APU FPGA Emulation Platform](#corev-apu-fpga-emulation).
 Files, directories and submodules under `cva6` are for the core _only_ and should not have any dependencies on the APU.
 Files, directories and submodules under `corev_apu` are for the FPGA Emulation platform.
 The CVA6 core can be compiled stand-alone, and obviously the APU is dependent on the core.
 
-#### ci
-Scriptware for CI (unchanged).
+The top-level directories of this repo:
+* **ci**: Scriptware for CI.
+* **common**: Source code used by both the CVA6 Core and the COREV APU. Subdirectories from here are `local` for common files that are hosted in this repo and `submodules` that are hosted in other repos.
+* **core**: Source code for the CVA6 Core only. There should be no sources in this directory used to build anything other than the CVA6 core.
+* **corev_apu**: Source code for the CVA6 APU, exclusive of the CVA6 core. There should be no sources in this directory used to build the CVA6 core.
+* **docs**: Documentation.
+* **scripts**: General scriptware.
 
-#### common
-Source code used by both the CVA6 Core and the COREV APU.
-Subdirectories from here are `local` for common files that are hosted in this repo and `submodules` that are hosted in other repos.
+## Verification
+The verification environment for the CVA6 is _not_ in this Repository.
 
-#### core
-Source code for the CVA6 Core only.
-There should be no sources in this directory used to build anything other than the CVA6 core.
+The verification environment for this core as well as other cores in the OpenHW Group CORE-V family is at the
+[core-v-verif](https://github.com/openhwgroup/core-v-verif) repository on GitHub.
 
-#### corev_apu
-Source code for the CVA6 APU, exclusive of the CVA6 core.
-There should be no sources in this directory used to build the CVA6 core.
+The Makefiles supported in the **core-v-verif** project automatically clone the appropriate version of the **CVA6**  RTL sources.
 
-#### docs
-Documentation (unchanged).
+## Contributing
+We highly appreciate community contributions.
+<br><br>To ease the work of reviewing contributions, please review [CONTRIBUTING](https://github.com/openhwgroup/cva6/blob/master/CONTRIBUTING.md).
 
-#### scripts
-General scriptware (unchanged).
+## Issues and Troubleshooting
+If you find any problems or issues with CVA6 or the documentation, please check out the [issue tracker](https://github.com/openhwgroup/cva6/issues)
+and create a new issue if your problem is not yet tracked.
 
 ## Publication
 
@@ -54,8 +57,8 @@ If you use CVA6 in your academic work you can cite us:
 }
 ```
 
-Table of Contents
-=================
+CVA6 User Documentation
+=======================
 
    * [CVA6 RISC-V CPU](#cva6-risc-v-cpu)
    * [Table of Contents](#table-of-contents)