[tracing] VCS and Verilator support of waveform dumps. (openhwgroup#965)

Usage of the macros: * If defined, VM_TRACE enables tracing. If macro VM_TRACE_FST is not defined (the default), waveform generation will use VCD format. If the command-line option -v FILE or --vcd=FILE is given to the compiled simulator, the VCD output will be written to file named FILE in the current working dir of the verilated simulator. If no -v/--vcd= option is given on cmdline, or an FST-specific trace option is used, the simulator will generate a VCD trace according to the settings in the RTL code. * if VM_TRACE_FST is defined as well, then FST format is used instead of VCD. If the command line option -f FILE or --fst=FILE is given to the simulator, the trace will be stored in file FILE in the current working dir of the verilated simulator. If no -f/--fst= option is given, or a VCD-specific trace option is used, the simulator will generate an FST trace according to the settings in the RTL code.
JeanRochCoulon · Sep 27, 2022 · 871be7c · 871be7c
1 parent b9cfd53
commit 871be7c
Show file tree

Hide file tree

Showing 2 changed files with 38 additions and 8 deletions.
diff --git a/Makefile b/Makefile
@@ -586,7 +586,7 @@ verilate_command := $(verilator)
                     $(filter-out %.vhd, $(ariane_pkg))                                                           \
                     $(filter-out core/fpu_wrap.sv, $(filter-out %.vhd, $(src)))                                  \
                     $(copro_src)                                                                                 \
-                    +define+$(defines)                                                                           \
+                    +define+$(defines)$(if $(TRACE_FAST),+VM_TRACE)$(if $(TRACE_COMPACT),+VM_TRACE+VM_TRACE_FST) \
                     common/local/util/sram.sv                                                                    \
                     corev_apu/tb/common/mock_uart.sv                                                             \
                     +incdir+corev_apu/axi_node                                                                   \
@@ -605,8 +605,10 @@ verilate_command := $(verilator)
                     $(if ($(PRELOAD)!=""), -DPRELOAD=1,)                                                         \
                     $(if $(DROMAJO), -DDROMAJO=1,)                                                               \
                     $(if $(PROFILE),--stats --stats-vars --profile-cfuncs,)                                      \
-                    $(if $(DEBUG),--trace --trace-structs,)                                                      \
-                    -LDFLAGS "-L$(RISCV)/lib -L$(SPIKE_ROOT)/lib -Wl,-rpath,$(RISCV)/lib -Wl,-rpath,$(SPIKE_ROOT)/lib -lfesvr$(if $(PROFILE), -g -pg,) $(if $(DROMAJO), -L../corev_apu/tb/dromajo/src -ldromajo_cosim,) -lpthread" \
+                    $(if $(DEBUG), --trace-structs,)                                                             \
+                    $(if $(TRACE_COMPACT), --trace-fst $(VERILATOR_ROOT)/include/verilated_fst_c.cpp)            \
+                    $(if $(TRACE_FAST), --trace $(VERILATOR_ROOT)/include/verilated_vcd_c.cpp,)                  \
+                    -LDFLAGS "-L$(RISCV)/lib -L$(SPIKE_ROOT)/lib -Wl,-rpath,$(RISCV)/lib -Wl,-rpath,$(SPIKE_ROOT)/lib -lfesvr$(if $(PROFILE), -g -pg,) $(if $(DROMAJO), -L../corev_apu/tb/dromajo/src -ldromajo_cosim,) -lpthread $(if $(TRACE_COMPACT), -lz,)" \
                     -CFLAGS "$(CFLAGS)$(if $(PROFILE), -g -pg,) $(if $(DROMAJO), -DDROMAJO=1,) -DVL_DEBUG"       \
                     -Wall --cc  --vpi                                                                            \
                     $(list_incdir) --top-module ariane_testharness                                               \

diff --git a/corev_apu/tb/ariane_tb.cpp b/corev_apu/tb/ariane_tb.cpp
@@ -18,7 +18,11 @@
 #include "Variane_testharness.h"
 #include "verilator.h"
 #include "verilated.h"
+#if VM_TRACE_FST
+#include "verilated_fst_c.h"
+#else
 #include "verilated_vcd_c.h"
+#endif
 #include "Variane_testharness__Dpi.h"
 
 #include <stdio.h>
@@ -82,6 +86,7 @@ EMULATOR DEBUG OPTIONS (only supported in debug build -- try `make debug`)\n",
 #endif
   fputs("\
   -v, --vcd=FILE,          Write vcd trace to FILE (or '-' for stdout)\n\
+  -f, --fst=FILE,          Write fst trace to FILE\n\
   -p,                      Print performance statistic at end of test\n\
 ", stdout);
   // fputs("\n" PLUSARG_USAGE_OPTIONS, stdout);
@@ -95,12 +100,14 @@ EMULATOR DEBUG OPTIONS (only supported in debug build -- try `make debug`)\n",
 #if VM_TRACE
 "  - run a bare metal test to generate a VCD waveform:\n"
 "    %s -v rv64ui-p-add.vcd $RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add\n"
+"  - run a bare metal test to generate an FST waveform:\n"
+"    %s -f rv64ui-p-add.fst $RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-add\n"
 #endif
 "  - run an ELF (you wrote, called 'hello') using the proxy kernel:\n"
 "    %s pk hello\n",
          program_name, program_name, program_name
 #if VM_TRACE
-         , program_name
+         , program_name, program_name
 #endif
          );
 }
@@ -131,6 +138,7 @@ int main(int argc, char **argv) {
   uint16_t rbb_port = 0;
 #if VM_TRACE
   FILE * vcdfile = NULL;
+  char * fst_fname = NULL;
   uint64_t start = 0;
 #endif
   char ** htif_argv = NULL;
@@ -147,12 +155,13 @@ int main(int argc, char **argv) {
 #if VM_TRACE
       {"vcd",         required_argument, 0, 'v' },
       {"dump-start",  required_argument, 0, 'x' },
+      {"fst",         required_argument, 0, 'f' },
 #endif
       HTIF_LONG_OPTIONS
     };
     int option_index = 0;
 #if VM_TRACE
-    int c = getopt_long(argc, argv, "-chpm:s:r:v:Vx:", long_options, &option_index);
+    int c = getopt_long(argc, argv, "-chpm:s:r:v:f:Vx:", long_options, &option_index);
 #else
     int c = getopt_long(argc, argv, "-chpm:s:r:V", long_options, &option_index);
 #endif
@@ -180,6 +189,10 @@ int main(int argc, char **argv) {
         }
         break;
       }
+      case 'f': {
+        fst_fname = optarg;
+        break;
+      }
       case 'x': start = atoll(optarg);      break;
 #endif
       // Process legacy '+' EMULATOR arguments by replacing them with
@@ -293,12 +306,26 @@ int main(int argc, char **argv) {
 
 #if VM_TRACE
   Verilated::traceEverOn(true); // Verilator must compute traced signals
+#if VM_TRACE_FST
+  std::unique_ptr<VerilatedFstC> tfp(new VerilatedFstC());
+  if (fst_fname) {
+    std::cerr << "Starting FST waveform dump into file '" << fst_fname << "'...\n";
+    top->trace(tfp.get(), 99);  // Trace 99 levels of hierarchy
+    tfp->open(fst_fname);
+  }
+  else
+    std::cerr << "No explicit FST file name supplied, using RTL defaults.\n";
+#else
   std::unique_ptr<VerilatedVcdFILE> vcdfd(new VerilatedVcdFILE(vcdfile));
   std::unique_ptr<VerilatedVcdC> tfp(new VerilatedVcdC(vcdfd.get()));
   if (vcdfile) {
+    std::cerr << "Starting VCD waveform dump ...\n";
     top->trace(tfp.get(), 99);  // Trace 99 levels of hierarchy
     tfp->open("");
   }
+  else
+    std::cerr << "No explicit VCD file name supplied, using RTL defaults.\n";
+#endif
 #endif
 
   for (int i = 0; i < 10; i++) {
@@ -307,11 +334,13 @@ int main(int argc, char **argv) {
     top->rtc_i = 0;
     top->eval();
 #if VM_TRACE
+    if (vcdfile || fst_fname)
       tfp->dump(static_cast<vluint64_t>(main_time * 2));
 #endif
     top->clk_i = 1;
     top->eval();
 #if VM_TRACE
+    if (vcdfile || fst_fname)
       tfp->dump(static_cast<vluint64_t>(main_time * 2 + 1));
 #endif
     main_time++;
@@ -332,15 +361,14 @@ int main(int argc, char **argv) {
     top->clk_i = 0;
     top->eval();
 #if VM_TRACE
-    // dump = tfp && trace_count >= start;
-    // if (dump)
+    if (vcdfile || fst_fname)
       tfp->dump(static_cast<vluint64_t>(main_time * 2));
 #endif
 
     top->clk_i = 1;
     top->eval();
 #if VM_TRACE
-    // if (dump)
+    if (vcdfile || fst_fname)
       tfp->dump(static_cast<vluint64_t>(main_time * 2 + 1));
 #endif
     // toggle RTC