-
Notifications
You must be signed in to change notification settings - Fork 6
SPI Protocol
This page is for capturing design decisions about the SPI protocol as it evolves. Ultimately it can become project documentation. Details of proposed and supported messages are in the link.
Messages communicate runtime commands to the core such as a move segment, and set parameter values (global configuration parameters). Some parameters may be changed during runtime (in-cycle), and some cannot (out-of-cycle).
Message direction is always from the host (SPI master) to the core (SPI slave). The host drives the SPI clock and populates the forward channel. The core responds synchronously on the reverse channel.
Message packets consist of a 32 bit header word followed by a payload. The forward channel header is a control word. The reverse channel header is a status word. The rest of the message is the payload, which may be composed of one or more 32bit or 64bit words, depending on the message type specified in the header.
| SPI | Header | Payload |
|---|---|---|
| Forward channel | Control word | Payload set by message type in control word |
| Reverse channel | Status word | Payload set by message type in control word |
Message types: The most-significant byte of a control word contains the message type. The remaining 24 bits of the control word, the payload, and the status are defined by the message type. Message types are numbered from 0x01 to 0xFF (255 types). By convention runtime messages start at 0x01 and count upwards; parameter messages start at 0xFF and count downwards. If these ever collide then some refactoring will be necessary. We could also divide the space up by the MSB, with 0x01 - 07F being runtime, and 0x80 to oxFF being params.
FPGA initialization is not technically a message, but it's worth noting that some parameter values may be 'hard-wired' at init time and cannot be changed later. Init may also include default values for params that can be changed later.
- SPI Mode 0
- 1 byte (SPI unit of transfer): Most significant bit first
- 32 bit word (4 bytes) : Little endian; e.g. 0xdeadbeef -> 0xef, 0xbe, 0xad, 0xde
- 64 bit word (2 32-bit words : Little endian; least significant word first
- Packet (n-words): Header first followed by n-word arguments
- Maximum SPI clock is: ____MHz
Go here For a summary and details of proposed/supported messages