Use an isb as a pause instruction on arm64 platforms. #441
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In other projects spinlock implementations and focused testing we've found that an isb pauses execution for about the same time as an x86 pause instruction. The yield instruction behaves as a nop and thus doesn't pause the CPU at all which leads to both more contention on the lock that is being spun on and also a much lower spin-time vs. x86 for the same spin loop constants. Given this is userspace code, using a wfe isn't advisable.
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It would be great if someone could test or prove out this is helpful with the contention levels expected in KeyDB usage. I'm proposing this change based on what we've seen in other applications that spin. |
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Thanks! Is ISB available on all aarch64 architectures or do we need a more specific ifdef? |
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it is available starting in armv8.0 so all. It's an instruction synch barrier, so it stops the front end until the backend empties but it's the most reliable instruction we've found until one that is available in Arm v8.6 |
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In other projects spinlock implementations and focused testing we've
found that an isb pauses execution for about the same time as an x86
pause instruction. The yield instruction behaves as a nop and thus
doesn't pause the CPU at all which leads to both more contention on the
lock that is being spun on and also a much lower spin-time vs. x86 for
the same spin loop constants. Given this is userspace code, using a wfe
isn't advisable.