This CPU was made as a project for university purposes. It is a minimalistic implementation of the MIPS32 standard.
Use with caution! This implementation is tested for Altera Stratix Cyclone IV devices but DOES NOT resolve all hazards! As mentioned, this was done as the final project for the Digital Design and Computer Architecture lecture at the TU Vienna. It is not recommended to use this design for anything but looking into the basics of CPU design. Do not copy this code for your own assignment!