[feat] Add aarch64 and riscv dcache manage #210
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equation314
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Dec 9, 2024
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Currently Could you abstract a unified set of icache and dcache management APIs? And clarify the difference between flush and invalidate. For example, these APIs might be like:
Where |
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equation314
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Jan 2, 2025
| /// Performs a cache operation on a cache level. | ||
| /// https://developer.arm.com/documentation/ddi0601/2024-12/AArch64-Instructions/DC-CISW--Data-or-unified-Cache-line-Clean-and-Invalidate-by-Set-Way | ||
| #[inline] | ||
| fn dcache_level(op: CacheOp, level: u64) { |
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Flushing the entire D-cache is hardly ever used, so we will not implement it to avoid this cumbersome function.
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before enable mmu we need to flush all cache, or will cause error. tested on phytium.
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Add dcache invalidate flush api.