Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[verible-verilog-format] lexer-parser error on long lines: code after parens / braces is missing in code dumped after the error message #2319

Open
ckale-openai opened this issue Jan 4, 2025 · 3 comments
Labels
rejects-valid syntax If the parser wrongly rejects syntactically valid code (according to SV-2017).

Comments

@ckale-openai
Copy link

Describe the bug

If you follow the repro instructions below, you'll hit this error message. If you compare it against the original source, you'll find that the function arguments to fn3 have gone missing in the code dumped after the error message. I presume that might be triggering the failure on the ; on the next statement. Changing various parts of the repro code (e.g. changing the long function name with a shorter one) makes the failure disappear.

repro.svh: Error lex/parsing-ing formatted output.  Please file a bug.
First error: token: ";" at 7:10:; problematic formatter output is
class c;

  virtual task t();
    fn1(.arg1(fn2(.arg2(pkg::this_is_the_song_that_doesnt_end_it_just_goes_on_and_on_my_friends())
        ))).fn3(

    fn4();

  endtask : t

endclass : c
<<EOF>>

To Reproduce

  1. Copy the text below into a file, say repro.svh.
  2. Run verible-verilog-format --inplace repro.svh
class c;

  virtual task t();
    fn1(.arg1(fn2(.arg2(pkg::this_is_the_song_that_doesnt_end_it_just_goes_on_and_on_my_friends())))).fn3(arg3);

    fn4();

  endtask : t

endclass : c

Include any options used.
--inplace

Actual behavior:

It rejected valid code.

Expected behavior

This code should not result in a "Error lex/parsing-ing formatted output. Please file a bug." error.

@ckale-openai ckale-openai added the rejects-valid syntax If the parser wrongly rejects syntactically valid code (according to SV-2017). label Jan 4, 2025
@ckale-openai
Copy link
Author

Here's another repro with a similar symptom:

module repro;

  initial begin
    uvm_config_db#(virtual some_name_if #(
        .A(a::payload_t),
        .B(b)))::set(
          null, "*x_y*", "bar", x_if);
  end

endmodule

Error message: (note the missing arguments to the set() call in the dumped code).

repro2.svh: Error lex/parsing-ing formatted output.  Please file a bug.
First error: token: "end" at 6:3-5:; problematic formatter output is
module repro;

  initial begin
    uvm_config_db#(virtual some_name_if #(.A(a::payload_t), .B(b)))::set(

  end

endmodule
<<EOF>>

@ckale-openai
Copy link
Author

And another one, this time just concatenating a long string with another one (reducing the length of the string makes the failure go away):

module m;

  initial begin
    static string path = {"This is a string that doesn't end; Yes, it goes on and on, my friend", "bar"};
  end

endmodule : m

Error message: (note the missing strings after the opening brace)

repro3.svh: Error lex/parsing-ing formatted output.  Please file a bug.
First error: token: "end" at 5:3-5:; problematic formatter output is
module m;

  initial begin
    static string path = {
  end

endmodule : m
<<EOF>>

@ckale-openai
Copy link
Author

Overall the only commonality I observed between the repros is that they were relatively long lines of code, and shortening them made the failure disappear.

@ckale-openai ckale-openai changed the title [verible-verilog-format] lexer-parser error on nested+chained function calls: function argument and closing paren is missing in code dumped after the error message [verible-verilog-format] lexer-parser error on long lines: code after parens / braces is missing in code dumped after the error message Jan 4, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
rejects-valid syntax If the parser wrongly rejects syntactically valid code (according to SV-2017).
Projects
None yet
Development

No branches or pull requests

1 participant