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CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems
README.md

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🔗 chipsalliance.org | 📫 [email protected]

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.

The CHIPS Alliance hosts multiple open source Projects, which are Workgroups.

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  1. chisel chisel Public

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  2. rocket-chip rocket-chip Public

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  3. verible verible Public

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Repositories

Showing 10 of 109 repositories
  • caliptra-sw Public

    Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

    chipsalliance/caliptra-sw’s past year of commit activity
    Rust 108 Apache-2.0 52 123 55 Updated Mar 22, 2025
  • t1 Public
    chipsalliance/t1’s past year of commit activity
    Scala 258 Apache-2.0 34 20 29 Updated Mar 22, 2025
  • chisel Public

    Chisel: A Modern Hardware Design Language

    chipsalliance/chisel’s past year of commit activity
    Scala 4,204 Apache-2.0 617 327 (1 issue needs help) 152 Updated Mar 22, 2025
  • verilator Public Forked from verilator/verilator

    Verilator open-source SystemVerilog simulator and lint system

    chipsalliance/verilator’s past year of commit activity
    C++ 35 LGPL-3.0 649 0 0 Updated Mar 22, 2025
  • sv-tests-results Public

    Output of the sv-tests runs.

    chipsalliance/sv-tests-results’s past year of commit activity
    HTML 5 3 0 0 Updated Mar 22, 2025
  • caliptra-rtl Public

    HW Design Collateral for Caliptra RoT IP

    chipsalliance/caliptra-rtl’s past year of commit activity
    SystemVerilog 84 Apache-2.0 47 88 12 Updated Mar 22, 2025
  • caliptra-ss Public

    HW Design Collateral for Caliptra Subsystem, which comprises Caliptra RoT IP and additional manufacturer controls.

    chipsalliance/caliptra-ss’s past year of commit activity
    SystemVerilog 12 Apache-2.0 9 37 13 Updated Mar 22, 2025
  • caliptra-mcu-sw Public

    Caliptra MCU Software

    chipsalliance/caliptra-mcu-sw’s past year of commit activity
    Rust 10 Apache-2.0 2 13 2 Updated Mar 21, 2025
  • sv-tests Public

    Test suite designed to check compliance with the SystemVerilog standard.

    chipsalliance/sv-tests’s past year of commit activity
    SystemVerilog 309 ISC 78 47 (5 issues need help) 26 Updated Mar 21, 2025
  • rocket-chip Public

    Rocket Chip Generator

    chipsalliance/rocket-chip’s past year of commit activity
    Scala 3,382 1,154 241 63 Updated Mar 21, 2025
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