[RISC-V] Optimize emitLoadImmediate further

[fuad1502]

In this PR:

• Change loading of remainder bits (e.g. bits loaded after lui + addiw) in 12 bits chunks instead of using "add / subtract" mode. This yields a simpler implementation (therefore hopefully increases throughput) and more optimized code in some cases ([RISC-V] Optimize loading 64 bit constant with new algorithm implementation and using emitDataConst #113250 (comment)).
• Better detect instances where utilizing srli would reduce the number of instructions generated, and vice versa, where utilizing srli would increase the number of instructions generated.
• Increase throughput.

TODO:

• Try to formulate better test condition for utilizing srli, or alternatively, calculate both paths and choose the one with fewer instructions.
• Determine whether guarding certain paths in this function with comp->opts.OptimizationEnabled() will be beneficial to JIT performance.
• Measure throughput change.
• Add comments on why it's safe to +1 previous instruction immediate values.
• Fix comment formatting ([RISC-V] Optimize loading 64 bit constant with new algorithm implementation and using emitDataConst #113250 (comment))

Part of #84834, cc @dotnet/samsung

[risc-vv]

efbf6e5 is being scheduled for building and testing

GIT: efbf6e56fb8ada049fc017736b9056ed51d67ede
REPO: fuad1502/runtime
BRANCH: riscv-jit-opt/new-load-imm-algo

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