tune cl patch

eebssk1 · Nov 21, 2024 · e707ae1 · e707ae1
1 parent 2152e92
commit e707ae1
Show file tree

Hide file tree

Showing 7 changed files with 30 additions and 30 deletions.
diff --git a/patch/cl/0106-intel_idle-tweak-cpuidle-cstates.patch b/patch/cl/0106-intel_idle-tweak-cpuidle-cstates.patch
@@ -22,7 +22,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
  		.exit_latency = 10,
 -		.target_residency = 20,
-+		.target_residency = 120,
++		.target_residency = 100,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -31,7 +31,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 33,
 -		.target_residency = 100,
-+		.target_residency = 900,
++		.target_residency = 800,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -40,7 +40,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 133,
 -		.target_residency = 400,
-+		.target_residency = 1000,
++		.target_residency = 900,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -49,7 +49,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 166,
 -		.target_residency = 500,
-+		.target_residency = 1500,
++		.target_residency = 1400,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -58,7 +58,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 300,
 -		.target_residency = 900,
-+		.target_residency = 2000,
++		.target_residency = 1800,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -67,7 +67,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 600,
 -		.target_residency = 1800,
-+		.target_residency = 5000,
++		.target_residency = 3500,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -76,7 +76,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 2600,
 -		.target_residency = 7700,
-+		.target_residency = 9000,
++		.target_residency = 8000,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -85,7 +85,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
  		.exit_latency = 10,
 -		.target_residency = 20,
-+		.target_residency = 90,
++		.target_residency = 100,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -94,7 +94,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 40,
 -		.target_residency = 100,
-+		.target_residency = 900,
++		.target_residency = 800,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -103,7 +103,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 133,
 -		.target_residency = 400,
-+		.target_residency = 1200,
++		.target_residency = 1300,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -112,7 +112,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 166,
 -		.target_residency = 500,
-+		.target_residency = 1900,
++		.target_residency = 1800,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -148,7 +148,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
  		.exit_latency = 10,
 -		.target_residency = 20,
-+		.target_residency = 120,
++		.target_residency = 100,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -157,7 +157,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 70,
 -		.target_residency = 100,
-+		.target_residency = 1000,
++		.target_residency = 900,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -166,7 +166,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 85,
 -		.target_residency = 200,
-+		.target_residency = 600,
++		.target_residency = 500,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -175,7 +175,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 124,
 -		.target_residency = 800,
-+		.target_residency = 3000,
++		.target_residency = 2400,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -184,7 +184,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 200,
 -		.target_residency = 800,
-+		.target_residency = 3200,
++		.target_residency = 3000,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -193,7 +193,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 480,
 -		.target_residency = 5000,
-+		.target_residency = 9000,
++		.target_residency = 8000,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -211,7 +211,7 @@ index 0b66e25c0e2d..406b41b387d5 100644
  		.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
  		.exit_latency = 10,
 -		.target_residency = 20,
-+		.target_residency = 300,
++		.target_residency = 120,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -225,7 +225,7 @@ https://clearlinux.org
  		.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
  		.exit_latency = 4,
 -		.target_residency = 4,
-+		.target_residency = 40,
++		.target_residency = 24,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -234,7 +234,7 @@ https://clearlinux.org
  		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
  		.exit_latency = 170,
 -		.target_residency = 600,
-+		.target_residency = 900,
++		.target_residency = 800,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
@@ -243,7 +243,7 @@ https://clearlinux.org
  					   CPUIDLE_FLAG_UNUSABLE,
  		.exit_latency = 2,
 -		.target_residency = 4,
-+		.target_residency = 40,
++		.target_residency = 24,
  		.enter = &intel_idle,
  		.enter_s2idle = intel_idle_s2idle, },
  	{
diff --git a/patch/cl/0125-nvme-workaround.patch b/patch/cl/0125-nvme-workaround.patch
@@ -16,7 +16,7 @@ index 0abd772c57f0..9129a2179f25 100644
  MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
 
 -static unsigned long default_ps_max_latency_us = 100000;
-+static unsigned long default_ps_max_latency_us = 200;
++static unsigned long default_ps_max_latency_us = 25000;
  module_param(default_ps_max_latency_us, ulong, 0644);
  MODULE_PARM_DESC(default_ps_max_latency_us,
  		 "max power saving latency for new devices; use PM QOS to change per device");

diff --git a/patch/cl/better_idle_balance.patch b/patch/cl/better_idle_balance.patch
@@ -5,7 +5,7 @@
  		update_next_balance(sd, &next_balance);
 
 -		if (this_rq->avg_idle < curr_cost + sd->max_newidle_lb_cost)
-+		if (this_rq->avg_idle/2 < curr_cost + sd->max_newidle_lb_cost)
++		if (this_rq->avg_idle * 4 / 5 < curr_cost + sd->max_newidle_lb_cost)
  			break;
 
  		if (sd->flags & SD_BALANCE_NEWIDLE) {
diff --git a/patch/cl/ratelimit-sched-yield.patch b/patch/cl/ratelimit-sched-yield.patch
@@ -22,7 +22,7 @@ running the right things
 +
 +	/* rate limit yielding to something sensible */
 +	
-+	if (!time_after(jiffies, per_cpu(last_yield, cpu)))
++	if (unlikely(!time_after(jiffies, per_cpu(last_yield, cpu))))
 +		return;
 +	
 +	per_cpu(last_yield, cpu) = jiffies;

diff --git a/patch/cl/scale.patch b/patch/cl/scale.patch
@@ -7,7 +7,7 @@ index b69979c9ced5..7eadbafc006b 100644
 
  	x = __this_cpu_add_return(stats_updates, abs(val));
 -	if (unlikely(x > MEMCG_CHARGE_BATCH)) {
-+	if (unlikely(x > MEMCG_CHARGE_BATCH * 64)) {
++	if (unlikely(x > MEMCG_CHARGE_BATCH * 2)) {
  		/*
  		 * If stats_flush_threshold exceeds the threshold
  		 * (>num_online_cpus()), cgroup stats update will be triggered
@@ -35,7 +35,7 @@ index c893721ff5b1..d0877878bcdb 100644
 +	 * unbound. Limit the update rate to at most once per ms.
 +	 */
 +	now = sched_clock_cpu(cpu_of(rq_of(cfs_rq)));
-+	if (now - cfs_rq->last_update_tg_load_avg < NSEC_PER_MSEC)
++	if (now - cfs_rq->last_update_tg_load_avg < (NSEC_PER_MSEC * 3 / 4) )
 +		return;
 +
 +	delta = cfs_rq->avg.load_avg - cfs_rq->tg_load_avg_contrib;

diff --git a/patch/cl/slack.patch b/patch/cl/slack.patch
@@ -5,7 +5,7 @@
  	INIT_CPU_TIMERS(init_task)
  	.pi_lock	= __RAW_SPIN_LOCK_UNLOCKED(init_task.pi_lock),
 -	.timer_slack_ns = 50000, /* 50 usec default slack */
-+	.timer_slack_ns = 1000, /* 1 usec default slack */
++	.timer_slack_ns = 15000, /* 15 usec default slack */
  	.thread_pid	= &init_struct_pid,
  	.thread_group	= LIST_HEAD_INIT(init_task.thread_group),
  	.thread_node	= LIST_HEAD_INIT(init_signals.thread_head),
diff --git a/patch/cl/tcptuning.patch b/patch/cl/tcptuning.patch
@@ -5,12 +5,12 @@
  #define TCP_FIN_TIMEOUT_MAX (120 * HZ) /* max TCP_LINGER2 value (two minutes) */
 
 -#define TCP_DELACK_MAX	((unsigned)(HZ/5))	/* maximal time to delay before sending an ACK */
-+#define TCP_DELACK_MAX	((unsigned)(HZ/20))	/* maximal time to delay before sending an ACK */
++#define TCP_DELACK_MAX	((unsigned)(HZ/7))	/* maximal time to delay before sending an ACK */
  #if HZ >= 100
 -#define TCP_DELACK_MIN	((unsigned)(HZ/25))	/* minimal time to delay before sending an ACK */
 -#define TCP_ATO_MIN	((unsigned)(HZ/25))
-+#define TCP_DELACK_MIN	((unsigned)(HZ/40))	/* minimal time to delay before sending an ACK */
-+#define TCP_ATO_MIN	((unsigned)(HZ/40))
++#define TCP_DELACK_MIN	((unsigned)(HZ/33))	/* minimal time to delay before sending an ACK */
++#define TCP_ATO_MIN	((unsigned)(HZ/33))
  #else
  #define TCP_DELACK_MIN	4U
  #define TCP_ATO_MIN	4U