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[LoongArch][NFC] Improve csrxchg instrinsic test case (#141060)
Took xry's idea [^1] to improve the csrxchg instrinsic test case. [^1]: #141037 (comment)
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llvm/test/CodeGen/LoongArch/csrxchg-intrinsic.ll

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,11 @@ entry:
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}
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;; Check that the rj operand of csrxchg is not R1.
16-
define i32 @csrxchg_w_rj_not_r1() {
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define i32 @csrxchg_w_rj_not_r1(i32 %0) {
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; CHECK-NOT: csrxchg ${{[a-z]*}}, $r1, 0
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; CHECK-NOT: csrxchg ${{[a-z]*}}, $ra, 0
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entry:
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%0 = tail call i32 asm "", "=r,r,i,{r4},{r5},{r6},{r7},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},{r16},{r17},{r18},{r19},{r20},{r23},{r24},{r25},{r26},{r27},{r28},{r29},{r30},{r31},0"(i32 4, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
21-
%1 = tail call i32 @llvm.loongarch.csrxchg.w(i32 %0, i32 4, i32 0)
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%2 = tail call i32 asm "", "=r,r,i,{r4},{r5},{r6},{r7},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},{r16},{r17},{r18},{r19},{r20},{r23},{r24},{r25},{r26},{r27},{r28},{r29},{r30},{r31},0"(i32 4, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 %1)
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ret i32 %2
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%2 = tail call i32 asm "", "={$r1},{$r1}"(i32 0)
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%3 = tail call i32 @llvm.loongarch.csrxchg.w(i32 %0, i32 %2, i32 0)
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ret i32 %3
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}

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