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Pull requests: m-labs/misoc
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Implement Wishbone Burst Support for Memory Controller
#151
opened Oct 10, 2024 by
occheung
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Streaming FIFO: Signals Read/Write Availability using Watermarks
#150
opened Oct 10, 2024 by
occheung
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spi2: allow optional CS pin in SPIInterface
#109
opened Jun 22, 2021 by
drewrisinger
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1 task done
csr: Proposal to accept CSRs with the same name owned by different submodules
#103
opened Oct 30, 2020 by
HarryMakes
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Updated in the last three days: updated:>2024-11-25.