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Squashed 'security' changes from c161ed9..c35483a (#702)
c35483a Merge pull request Xilinx#179 from liyuanz/next dfc3cd2 fix description.json (Xilinx#180) 7f4febd update mk 53416f6 fix error in allocation pragma (Xilinx#178) 8ef77fa 2022.2 HMAC-SHA384 2in1 and ECDSA NIST P-384 (Xilinx#177) 489a68f add poseidon252 kernel and testcase (Xilinx#174) bf96fd0 fix typo in tutorial.rst (Xilinx#176) 4e9d830 Merge pull request Xilinx#172 from yuanqian/update_doc_next 386656d fix bug 2ced06d fix description.json, remove vck190 from platform_property (Xilinx#175) 9118e6d missing vitis_hw_build (Xilinx#166) d22b630 update bdf2371 Merge pull request Xilinx#173 from liyuanz/next dd3a1fb add mem 518370f update doc in next branch for porta; f2b1ce6 Merge pull request Xilinx#171 from liyuanz/next e4416f7 update mk e735446 Merge pull request Xilinx#168 from changg/22.2_mks a9b9570 Merge pull request Xilinx#167 from giorgiob/patch-2 8bd73a7 22.2 mk update e1df4e8 u2_ platform name update 4715bf5 change 2022.1_stable_latest to 2022.2_stable_latest c616562 fix typos in tutorial (Xilinx#163) Co-authored-by: sdausr <[email protected]>
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Original file line number | Diff line number | Diff line change |
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@Library('pipeline-library')_ | ||
VitisLibPipeline (branch: 'next', libname: 'xf_security', TARGETS: 'hls_csim:hls_cosim:vivado_syn:vitis_sw_emu:vitis_hw_emu:vitis_hw_build', | ||
upstream_dependencies: 'xf_utils_hw,next,../utils', | ||
devtest: 'RunDeploy.sh', TOOLVERSION: '2022.1_stable_latest', mail_on:'daily:PR') | ||
devtest: 'RunDeploy.sh', TOOLVERSION: '2022.2_stable_latest', mail_on:'daily:PR') |
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