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implement block linking + some refactoring
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currently only supported for x64
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@RSDuck
RSDuck committed Apr 26, 2020
1 parent 5d0f244 commit 3787bab
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Showing 18 changed files with 4,871 additions and 150 deletions.
2 changes: 2 additions & 0 deletions .gitignore
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Original file line number Diff line number Diff line change
Expand Up @@ -9,3 +9,5 @@ melon_grc.h
cmake-build
cmake-build-debug
.idea

*.exe
37 changes: 20 additions & 17 deletions src/ARM.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -206,15 +206,15 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
if (addr & 0x2)
{
NextInstr[0] = CodeRead32(addr-2, true) >> 16;
Cycles += CodeCycles;
Cycles -= CodeCycles;
NextInstr[1] = CodeRead32(addr+2, false);
Cycles += CodeCycles;
Cycles -= CodeCycles;
}
else
{
NextInstr[0] = CodeRead32(addr, true);
NextInstr[1] = NextInstr[0] >> 16;
Cycles += CodeCycles;
Cycles -= CodeCycles;
}

CPSR |= 0x20;
Expand All @@ -227,9 +227,9 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
if (newregion != oldregion) SetupCodeMem(addr);

NextInstr[0] = CodeRead32(addr, true);
Cycles += CodeCycles;
Cycles -= CodeCycles;
NextInstr[1] = CodeRead32(addr+4, false);
Cycles += CodeCycles;
Cycles -= CodeCycles;

CPSR &= ~0x20;
}
Expand Down Expand Up @@ -272,7 +272,7 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)

NextInstr[0] = CodeRead16(addr);
NextInstr[1] = CodeRead16(addr+2);
Cycles += NDS::ARM7MemTimings[CodeCycles][0] + NDS::ARM7MemTimings[CodeCycles][1];
Cycles -= NDS::ARM7MemTimings[CodeCycles][0] + NDS::ARM7MemTimings[CodeCycles][1];

CPSR |= 0x20;
}
Expand All @@ -285,7 +285,7 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)

NextInstr[0] = CodeRead32(addr);
NextInstr[1] = CodeRead32(addr+4);
Cycles += NDS::ARM7MemTimings[CodeCycles][2] + NDS::ARM7MemTimings[CodeCycles][3];
Cycles -= NDS::ARM7MemTimings[CodeCycles][2] + NDS::ARM7MemTimings[CodeCycles][3];

CPSR &= ~0x20;
}
Expand Down Expand Up @@ -544,7 +544,7 @@ void ARMv5::Execute()
}*/
if (IRQ) TriggerIRQ();

NDS::ARM9Timestamp += Cycles;
NDS::ARM9Timestamp -= Cycles;
Cycles = 0;
}

Expand Down Expand Up @@ -584,14 +584,16 @@ void ARMv5::ExecuteJIT()
return;
}

ARMJIT::JitBlockEntry block = ARMJIT::LookUpBlock<0>(instrAddr);
// hack so Cycles <= 0 becomes Cycles < 0
Cycles = NDS::ARM9Target - NDS::ARM9Timestamp - 1;

ARMJIT::JitBlockEntry block = ARMJIT::LookUpBlockEntry(ARMJIT::TranslateAddr<0>(instrAddr));
if (block)
Cycles += block();
ARM_Dispatch(this, block);
else
ARMJIT::CompileBlock(this);

NDS::ARM9Timestamp += Cycles;
Cycles = 0;
NDS::ARM9Timestamp = NDS::ARM9Target - (Cycles + 1);

if (StopExecution)
{
Expand Down Expand Up @@ -685,7 +687,7 @@ void ARMv4::Execute()
}*/
if (IRQ) TriggerIRQ();

NDS::ARM7Timestamp += Cycles;
NDS::ARM7Timestamp -= Cycles;
Cycles = 0;
}

Expand Down Expand Up @@ -725,14 +727,15 @@ void ARMv4::ExecuteJIT()
return;
}

ARMJIT::JitBlockEntry block = ARMJIT::LookUpBlock<1>(instrAddr);
Cycles = NDS::ARM7Target - NDS::ARM7Timestamp - 1;

ARMJIT::JitBlockEntry block = ARMJIT::LookUpBlockEntry(ARMJIT::TranslateAddr<1>(instrAddr));
if (block)
Cycles += block();
ARM_Dispatch(this, block);
else
ARMJIT::CompileBlock(this);

NDS::ARM7Timestamp += Cycles;
Cycles = 0;
NDS::ARM7Timestamp = NDS::ARM7Target - (Cycles + 1);

// TODO optimize this shit!!!
if (StopExecution)
Expand Down
32 changes: 16 additions & 16 deletions src/ARM.h
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Original file line number Diff line number Diff line change
Expand Up @@ -185,14 +185,14 @@ class ARMv5 : public ARM
{
// code only. always nonseq 32-bit for ARM9.
s32 numC = (R[15] & 0x2) ? 0 : CodeCycles;
Cycles += numC;
Cycles -= numC;
}

void AddCycles_CI(s32 numI)
{
// code+internal
s32 numC = (R[15] & 0x2) ? 0 : CodeCycles;
Cycles += numC + numI;
Cycles -= numC + numI;
}

void AddCycles_CDI()
Expand All @@ -203,9 +203,9 @@ class ARMv5 : public ARM
s32 numD = DataCycles;

//if (DataRegion != CodeRegion)
Cycles += std::max(numC + numD - 6, std::max(numC, numD));
Cycles -= std::max(numC + numD - 6, std::max(numC, numD));
//else
// Cycles += numC + numD;
// Cycles -= numC + numD;
}

void AddCycles_CD()
Expand All @@ -215,9 +215,9 @@ class ARMv5 : public ARM
s32 numD = DataCycles;

//if (DataRegion != CodeRegion)
Cycles += std::max(numC + numD - 6, std::max(numC, numD));
Cycles -= std::max(numC + numD - 6, std::max(numC, numD));
//else
// Cycles += numC + numD;
// Cycles -= numC + numD;
}

void GetCodeMemRegion(u32 addr, NDS::MemRegion* region);
Expand Down Expand Up @@ -375,13 +375,13 @@ class ARMv4 : public ARM
void AddCycles_C()
{
// code only. this code fetch is sequential.
Cycles += NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?1:3];
Cycles -= NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?1:3];
}

void AddCycles_CI(s32 num)
{
// code+internal. results in a nonseq code fetch.
Cycles += NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2] + num;
Cycles -= NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2] + num;
}

void AddCycles_CDI()
Expand All @@ -393,21 +393,21 @@ class ARMv4 : public ARM
if ((DataRegion >> 4) == 0x02) // mainRAM
{
if (CodeRegion == 0x02)
Cycles += numC + numD;
Cycles -= numC + numD;
else
{
numC++;
Cycles += std::max(numC + numD - 3, std::max(numC, numD));
Cycles -= std::max(numC + numD - 3, std::max(numC, numD));
}
}
else if (CodeRegion == 0x02)
{
numD++;
Cycles += std::max(numC + numD - 3, std::max(numC, numD));
Cycles -= std::max(numC + numD - 3, std::max(numC, numD));
}
else
{
Cycles += numC + numD + 1;
Cycles -= numC + numD + 1;
}
}

Expand All @@ -420,17 +420,17 @@ class ARMv4 : public ARM
if ((DataRegion >> 4) == 0x02)
{
if (CodeRegion == 0x02)
Cycles += numC + numD;
Cycles -= numC + numD;
else
Cycles += std::max(numC + numD - 3, std::max(numC, numD));
Cycles -= std::max(numC + numD - 3, std::max(numC, numD));
}
else if (CodeRegion == 0x02)
{
Cycles += std::max(numC + numD - 3, std::max(numC, numD));
Cycles -= std::max(numC + numD - 3, std::max(numC, numD));
}
else
{
Cycles += numC + numD;
Cycles -= numC + numD;
}
}
};
Expand Down
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