MGS-7676 [#imx-2976] 0068-CL891407-KERNEL-SPACE-6.4.11_22Q2_NXP-Limit…

…-the-chip 6.4.11_22Q2_NXP: Limit the chip range who supports USC reset function. Signed-off-by: IPD_SCM <[email protected]> Signed-off-by: Yuan Tian <[email protected]> (cherry picked from commit e07bf23) Acked-by: Jason Liu <[email protected]>
nxp-imx · Oct 10, 2024 · 569b33a · 569b33a
1 parent efd1883
commit 569b33a
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Showing 4 changed files with 15 additions and 5 deletions.
diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c
@@ -1940,6 +1940,11 @@ gckHARDWARE_Construct(IN gckOS Os, IN gckKERNEL Kernel, OUT gckHARDWARE *Hardwar
 
     _SetHardwareOptions(hardware);
 
+    if (hardware->identity.chipModel == 0x7000 && hardware->identity.chipRevision == 0x6214
+        && hardware->identity.customerID == 0x30) {
+        hardware->supportUscReset = gcvTRUE;
+    }
+
     hardware->hasQchannel = gckHARDWARE_IsFeatureAvailable(hardware, gcvFEATURE_Q_CHANNEL_SUPPORT);
 
     /* Bypass Qchannel power management. */

diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.h b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.h
@@ -235,6 +235,8 @@ struct _gckHARDWARE {
     gctUINT32                   devID;
 
     gctBOOL                     largeVA;
+
+    gctBOOL                     supportUscReset;
 };
 
 gceSTATUS

diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_waitlink_fe.c b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_waitlink_fe.c
@@ -526,6 +526,8 @@ gckWLFE_Link(IN gckHARDWARE Hardware,
     gcmkASSERT(Hardware->wlFE);
 
     if (Logical != gcvNULL) {
+        gctSIZE_T prefetchCount;
+
         if (*Bytes < 8) {
             /* Command queue too small. */
             gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
@@ -544,12 +546,14 @@ gckWLFE_Link(IN gckHARDWARE Hardware,
         /* Compute number of 64-byte aligned bytes to fetch. */
         bytes = gcmALIGN(address + FetchSize, 64) - address;
 
+        prefetchCount = (Hardware->supportUscReset) ? (bytes >> 3) | 0x100 : (bytes >> 3);
+
         /* Append LINK(bytes / 8), FetchAddress. */
         link = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) ==
  32) ? ~0U : (~(~0U << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) ==
  32) ? ~0U : (~(~0U << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) |
                     ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) ==
- 32) ? ~0U : (~(~0U << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) ((bytes >> 3) | 0x100) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) ==
+ 32) ? ~0U : (~(~0U << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (prefetchCount) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) ==
  32) ? ~0U : (~(~0U << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
 
         gcmkONERROR(gckOS_WriteMemory(Hardware->os, logical, link));

diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c
@@ -2989,13 +2989,12 @@ gckCOMMAND_Commit(IN gckCOMMAND Command, IN gcsHAL_SUBCOMMIT *SubCommit,
 #endif
 
 #if gcdCONTEXT_SWITCH_FORCE_USC_RESET
-        if (Command->currPid && Command->currPid != ProcessId
+        if (Command->kernel->hardware->supportUscReset
+            && Command->currPid && Command->currPid != ProcessId
 #if gcdLOCAL_MEMORY_USAGE
             && SubCommit->useLocalMem
 #endif
-            && Command->kernel->hardware->type == gcvHARDWARE_3D
-            && gckHARDWARE_IsFeatureAvailable(Command->kernel->hardware, gcvFEATURE_BLT_ENGINE)
-            && gckHARDWARE_IsFeatureAvailable(Command->kernel->hardware, gcvFEATURE_SECURITY))
+            && Command->kernel->hardware->type == gcvHARDWARE_3D)
             switchSecurityMode = gcvTRUE;
 #endif