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1 change: 1 addition & 0 deletions src/drivers/intel/ish/ish.c
Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_LNL_ISHB,
PCI_DID_INTEL_MTL_ISHB,
PCI_DID_INTEL_ARL_ISHB,
PCI_DID_INTEL_ARP_S_ISHB,
PCI_DID_INTEL_CNL_ISHB,
PCI_DID_INTEL_CML_ISHB,
PCI_DID_INTEL_TGL_ISHB,
Expand Down
2 changes: 2 additions & 0 deletions src/include/cpu/intel/cpu_ids.h
Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,8 @@
#define CPUID_LUNARLAKE_A0_1 0xb06d0
#define CPUID_LUNARLAKE_A0_2 0xb06d1
#define CPUID_ARROWLAKE_H_A0 0xc0652
#define CPUID_ARROWLAKE_S_A0 0xc0660
#define CPUID_ARROWLAKE_S_B0 0xc0662
#define CPUID_PANTHERLAKE_A0 0xc06c0
#define CPUID_SNOWRIDGE_A0 0x80660
#define CPUID_SNOWRIDGE_A1 0x80661
Expand Down
146 changes: 146 additions & 0 deletions src/include/device/pci_ids.h
Original file line number Diff line number Diff line change
Expand Up @@ -2183,6 +2183,7 @@
#define PCI_DID_INTEL_TGL_H_ISHB 0x43fc
#define PCI_DID_INTEL_MTL_ISHB 0x7e45
#define PCI_DID_INTEL_ARL_ISHB 0x7745
#define PCI_DID_INTEL_ARP_S_ISHB 0x7f78
#define PCI_DID_INTEL_ADL_N_ISHB 0x54fc
#define PCI_DID_INTEL_ADL_P_ISHB 0x51fc
#define PCI_DID_INTEL_LNL_ISHB 0xa845
Expand Down Expand Up @@ -3145,6 +3146,70 @@
#define PCI_DID_INTEL_ARL_H_ESPI_0 0x7202
#define PCI_DID_INTEL_ARL_H_ESPI_1 0x7702
#define PCI_DID_INTEL_ARL_U_ESPI_0 0x7203
#define PCI_DID_INTEL_ARL_S_ESPI_0 0xae00
#define PCI_DID_INTEL_ARL_S_ESPI_1 0xae01
#define PCI_DID_INTEL_ARL_S_ESPI_2 0xae02
#define PCI_DID_INTEL_ARL_S_ESPI_3 0xae03
#define PCI_DID_INTEL_ARL_S_ESPI_4 0xae04
#define PCI_DID_INTEL_ARL_S_ESPI_5 0xae05
#define PCI_DID_INTEL_ARL_S_ESPI_6 0xae06
#define PCI_DID_INTEL_ARL_S_ESPI_7 0xae07
#define PCI_DID_INTEL_ARL_S_ESPI_8 0xae08
#define PCI_DID_INTEL_ARL_S_ESPI_9 0xae09
#define PCI_DID_INTEL_ARL_S_ESPI_10 0xae0a
#define PCI_DID_INTEL_ARL_S_ESPI_11 0xae0b
#define PCI_DID_INTEL_ARL_S_ESPI_12 0xae0c
#define PCI_DID_INTEL_ARL_S_ESPI_13 0xae0d
#define PCI_DID_INTEL_ARL_S_ESPI_14 0xae0e
#define PCI_DID_INTEL_ARL_S_ESPI_15 0xae0f
#define PCI_DID_INTEL_ARL_S_ESPI_16 0xae10
#define PCI_DID_INTEL_ARL_S_ESPI_17 0xae11
#define PCI_DID_INTEL_ARL_S_ESPI_18 0xae12
#define PCI_DID_INTEL_ARL_S_ESPI_19 0xae13
#define PCI_DID_INTEL_ARL_S_ESPI_20 0xae14
#define PCI_DID_INTEL_ARL_S_ESPI_21 0xae15
#define PCI_DID_INTEL_ARL_S_ESPI_22 0xae16
#define PCI_DID_INTEL_ARL_S_ESPI_23 0xae17
#define PCI_DID_INTEL_ARL_S_ESPI_24 0xae18
#define PCI_DID_INTEL_ARL_S_ESPI_25 0xae19
#define PCI_DID_INTEL_ARL_S_ESPI_26 0xae1a
#define PCI_DID_INTEL_ARL_S_ESPI_27 0xae1b
#define PCI_DID_INTEL_ARL_S_ESPI_28 0xae1c
#define PCI_DID_INTEL_ARL_S_ESPI_29 0xae1d
#define PCI_DID_INTEL_ARL_S_ESPI_30 0xae1e
#define PCI_DID_INTEL_ARL_S_ESPI_31 0xae1f
#define PCI_DID_INTEL_ARP_S_ESPI_0 0x7f00
#define PCI_DID_INTEL_ARP_S_ESPI_1 0x7f01
#define PCI_DID_INTEL_ARP_S_ESPI_2 0x7f02
#define PCI_DID_INTEL_ARP_S_ESPI_3 0x7f03
#define PCI_DID_INTEL_ARP_S_ESPI_4 0x7f04
#define PCI_DID_INTEL_ARP_S_ESPI_5 0x7f05
#define PCI_DID_INTEL_ARP_S_ESPI_6 0x7f06
#define PCI_DID_INTEL_ARP_S_ESPI_7 0x7f07
#define PCI_DID_INTEL_ARP_S_ESPI_8 0x7f08
#define PCI_DID_INTEL_ARP_S_ESPI_9 0x7f09
#define PCI_DID_INTEL_ARP_S_ESPI_10 0x7f0a
#define PCI_DID_INTEL_ARP_S_ESPI_11 0x7f0b
#define PCI_DID_INTEL_ARP_S_ESPI_12 0x7f0c
#define PCI_DID_INTEL_ARP_S_ESPI_13 0x7f0d
#define PCI_DID_INTEL_ARP_S_ESPI_14 0x7f0e
#define PCI_DID_INTEL_ARP_S_ESPI_15 0x7f0f
#define PCI_DID_INTEL_ARP_S_ESPI_16 0x7f10
#define PCI_DID_INTEL_ARP_S_ESPI_17 0x7f11
#define PCI_DID_INTEL_ARP_S_ESPI_18 0x7f12
#define PCI_DID_INTEL_ARP_S_ESPI_19 0x7f13
#define PCI_DID_INTEL_ARP_S_ESPI_20 0x7f14
#define PCI_DID_INTEL_ARP_S_ESPI_21 0x7f15
#define PCI_DID_INTEL_ARP_S_ESPI_22 0x7f16
#define PCI_DID_INTEL_ARP_S_ESPI_23 0x7f17
#define PCI_DID_INTEL_ARP_S_ESPI_24 0x7f18
#define PCI_DID_INTEL_ARP_S_ESPI_25 0x7f19
#define PCI_DID_INTEL_ARP_S_ESPI_26 0x7f1a
#define PCI_DID_INTEL_ARP_S_ESPI_27 0x7f1b
#define PCI_DID_INTEL_ARP_S_ESPI_28 0x7f1c
#define PCI_DID_INTEL_ARP_S_ESPI_29 0x7f1d
#define PCI_DID_INTEL_ARP_S_ESPI_30 0x7f1e
#define PCI_DID_INTEL_ARP_S_ESPI_31 0x7f1f
#define PCI_DID_INTEL_RPP_P_ESPI_0 0x5180
#define PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1 0x5181
#define PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2 0x5182
Expand Down Expand Up @@ -3617,6 +3682,34 @@
#define PCI_DID_INTEL_ARL_SOC_PCIE_RP7 0x773e
#define PCI_DID_INTEL_ARL_SOC_PCIE_RP8 0x773f
#define PCI_DID_INTEL_ARL_SOC_PCIE_RP9 0x774d
#define PCI_DID_INTEL_ARL_S_PCIE_RP13 0xae4d
#define PCI_DID_INTEL_ARL_S_PCIE_RP14 0xae4e
#define PCI_DID_INTEL_ARL_S_PCIE_RP15 0xae4f

#define PCI_DID_INTEL_ARP_S_PCIE_RP1 0x7f38
#define PCI_DID_INTEL_ARP_S_PCIE_RP2 0x7f39
#define PCI_DID_INTEL_ARP_S_PCIE_RP3 0x7f3a
#define PCI_DID_INTEL_ARP_S_PCIE_RP4 0x7f3b
#define PCI_DID_INTEL_ARP_S_PCIE_RP5 0x7f3c
#define PCI_DID_INTEL_ARP_S_PCIE_RP6 0x7f3d
#define PCI_DID_INTEL_ARP_S_PCIE_RP7 0x7f3e
#define PCI_DID_INTEL_ARP_S_PCIE_RP8 0x7f3f
#define PCI_DID_INTEL_ARP_S_PCIE_RP9 0x7f30
#define PCI_DID_INTEL_ARP_S_PCIE_RP10 0x7f31
#define PCI_DID_INTEL_ARP_S_PCIE_RP11 0x7f32
#define PCI_DID_INTEL_ARP_S_PCIE_RP12 0x7f33
#define PCI_DID_INTEL_ARP_S_PCIE_RP13 0x7f34
#define PCI_DID_INTEL_ARP_S_PCIE_RP14 0x7f35
#define PCI_DID_INTEL_ARP_S_PCIE_RP15 0x7f36
#define PCI_DID_INTEL_ARP_S_PCIE_RP16 0x7f37
#define PCI_DID_INTEL_ARP_S_PCIE_RP17 0x7f40
#define PCI_DID_INTEL_ARP_S_PCIE_RP18 0x7f41
#define PCI_DID_INTEL_ARP_S_PCIE_RP19 0x7f42
#define PCI_DID_INTEL_ARP_S_PCIE_RP20 0x7f43
#define PCI_DID_INTEL_ARP_S_PCIE_RP21 0x7f44
#define PCI_DID_INTEL_ARP_S_PCIE_RP22 0x7f45
#define PCI_DID_INTEL_ARP_S_PCIE_RP23 0x7f46
#define PCI_DID_INTEL_ARP_S_PCIE_RP24 0x7f47

#define PCI_DID_INTEL_RPL_P_PCIE_RP1 0xa74d
#define PCI_DID_INTEL_RPL_P_PCIE_RP2 0xa70d
Expand Down Expand Up @@ -3779,6 +3872,8 @@
#define PCI_DID_INTEL_ADP_M_SATA_3 0x282a
#define PCI_DID_INTEL_MTL_SATA 0x7e63
#define PCI_DID_INTEL_ARL_SATA 0x7763
#define PCI_DID_INTEL_ARP_S_SATA_1 0x7f62
#define PCI_DID_INTEL_ARP_S_SATA_2 0x7f66
#define PCI_DID_INTEL_RPP_P_SATA_1 0x51d3
#define PCI_DID_INTEL_RPP_P_SATA_2 0x51d7
#define PCI_DID_INTEL_RPP_S_SATA 0x7a62
Expand Down Expand Up @@ -3809,6 +3904,8 @@
#define PCI_DID_INTEL_MTL_IOE_M_PMC 0x7ebe
#define PCI_DID_INTEL_MTL_IOE_P_PMC 0x7ece
#define PCI_DID_INTEL_ARL_SOC_PMC 0x7721
#define PCI_DID_INTEL_ARL_IOE_S_PMC 0xae21
#define PCI_DID_INTEL_ARP_S_PMC 0x7f21
#define PCI_DID_INTEL_RPP_P_PMC 0x51a1
#define PCI_DID_INTEL_RPP_S_PMC 0x7a21
#define PCI_DID_INTEL_LNL_PMC 0xa821
Expand Down Expand Up @@ -3945,6 +4042,13 @@
#define PCI_DID_INTEL_ARL_I2C4 0x7750
#define PCI_DID_INTEL_ARL_I2C5 0x7751

#define PCI_DID_INTEL_ARP_S_I2C0 0x7f4c
#define PCI_DID_INTEL_ARP_S_I2C1 0x7f4d
#define PCI_DID_INTEL_ARP_S_I2C2 0x7f4e
#define PCI_DID_INTEL_ARP_S_I2C3 0x7f4f
#define PCI_DID_INTEL_ARP_S_I2C4 0x7f7a
#define PCI_DID_INTEL_ARP_S_I2C5 0x7f7b

#define PCI_DID_INTEL_LNL_I2C0 0xa878
#define PCI_DID_INTEL_LNL_I2C1 0xa879
#define PCI_DID_INTEL_LNL_I2C2 0xa87a
Expand Down Expand Up @@ -4048,6 +4152,11 @@
#define PCI_DID_INTEL_ARL_UART1 0x7726
#define PCI_DID_INTEL_ARL_UART2 0x7752

#define PCI_DID_INTEL_ARP_S_UART0 0x7f28
#define PCI_DID_INTEL_ARP_S_UART1 0x7f29
#define PCI_DID_INTEL_ARP_S_UART2 0x7f5c
#define PCI_DID_INTEL_ARP_S_UART3 0x7f5d

#define PCI_DID_INTEL_LNL_UART0 0xa825
#define PCI_DID_INTEL_LNL_UART1 0xa826
#define PCI_DID_INTEL_LNL_UART2 0xa852
Expand Down Expand Up @@ -4158,6 +4267,13 @@
#define PCI_DID_INTEL_ARL_GSPI1 0x7730
#define PCI_DID_INTEL_ARL_GSPI2 0x7746

#define PCI_DID_INTEL_ARL_S_HWSEQ_SPI 0xae23
#define PCI_DID_INTEL_ARP_S_HWSEQ_SPI 0x7f24
#define PCI_DID_INTEL_ARP_S_GSPI0 0x7f2a
#define PCI_DID_INTEL_ARP_S_GSPI1 0x7f2b
#define PCI_DID_INTEL_ARP_S_GSPI2 0x7f5e
#define PCI_DID_INTEL_ARP_S_GSPI3 0x7f5f

#define PCI_DID_INTEL_LNL_HWSEQ_SPI 0xa823
#define PCI_DID_INTEL_LNL_GSPI0 0xa827
#define PCI_DID_INTEL_LNL_GSPI1 0xa830
Expand Down Expand Up @@ -4318,6 +4434,7 @@
#define PCI_DID_INTEL_MTL_P_GT2_5 0x7dd5
#define PCI_DID_INTEL_ARL_H_GT2_1 0x7d51
#define PCI_DID_INTEL_ARL_H_GT2_2 0x7dd1
#define PCI_DID_INTEL_ARL_HX_GT2 0x7d67
#define PCI_DID_INTEL_RPL_HX_GT1 0xa788
#define PCI_DID_INTEL_RPL_HX_GT2 0xa78b
#define PCI_DID_INTEL_RPL_HX_GT3 0x4688
Expand Down Expand Up @@ -4469,6 +4586,9 @@
#define PCI_DID_INTEL_MTL_P_ID_5 0x7d16
#define PCI_DID_INTEL_ARL_H_ID_1 0x7d06
#define PCI_DID_INTEL_ARL_H_ID_2 0x7d20
#define PCI_DID_INTEL_ARL_HX_ID_1 0x7d1c
#define PCI_DID_INTEL_ARL_HX_ID_2 0x7d2d
#define PCI_DID_INTEL_ARL_HX_ID_3 0x7d2f
#define PCI_DID_INTEL_RPL_HX_ID_1 0xa702
#define PCI_DID_INTEL_RPL_HX_ID_2 0xa729
#define PCI_DID_INTEL_RPL_HX_ID_3 0xa728
Expand Down Expand Up @@ -4525,6 +4645,8 @@
#define PCI_DID_INTEL_ADP_M_N_SMBUS 0x54a3
#define PCI_DID_INTEL_MTL_SMBUS 0x7e22
#define PCI_DID_INTEL_ARL_SMBUS 0x7722
#define PCI_DID_INTEL_ARL_S_SMBUS 0xae22
#define PCI_DID_INTEL_ARP_S_SMBUS 0x7f22
#define PCI_DID_INTEL_RPP_P_SMBUS 0x51a3
#define PCI_DID_INTEL_RPP_S_SMBUS 0x7a23
#define PCI_DID_INTEL_LNL_SMBUS 0xa822
Expand Down Expand Up @@ -4569,6 +4691,7 @@
#define PCI_DID_INTEL_MTL_M_TCSS_XHCI 0x7eb0
#define PCI_DID_INTEL_MTL_P_TCSS_XHCI 0x7ec0
#define PCI_DID_INTEL_ARL_XHCI 0x777d
#define PCI_DID_INTEL_ARP_S_XHCI 0x7f6e
#define PCI_DID_INTEL_RPP_P_TCSS_XHCI 0xa71e
#define PCI_DID_INTEL_RPP_S_XHCI 0x7a60
#define PCI_DID_INTEL_LNL_XHCI 0xa87d
Expand Down Expand Up @@ -4603,6 +4726,8 @@
#define PCI_DID_INTEL_MTL_IOE_M_P2SB 0x7eb8
#define PCI_DID_INTEL_MTL_IOE_P_P2SB 0x7ec8
#define PCI_DID_INTEL_ARL_SOC_P2SB 0x7720
#define PCI_DID_INTEL_ARL_IOE_S_P2SB 0xae20
#define PCI_DID_INTEL_ARP_S_P2SB 0x7f20
#define PCI_DID_INTEL_RPP_P_P2SB 0x51a0
#define PCI_DID_INTEL_RPP_S_P2SB 0x7a20
#define PCI_DID_INTEL_LNL_P2SB 0xa820
Expand All @@ -4627,6 +4752,8 @@
#define PCI_DID_INTEL_MTL_IOE_M_SRAM 0x7ebf
#define PCI_DID_INTEL_MTL_IOE_P_SRAM 0x7ecf
#define PCI_DID_INTEL_ARL_SOC_SRAM 0x777f
#define PCI_DID_INTEL_ARL_SOC_S_SRAM 0xae7f
#define PCI_DID_INTEL_ARP_S_SRAM 0x7f27
#define PCI_DID_INTEL_LNL_SRAM 0xa87f
#define PCI_DID_INTEL_PTL_H_SRAM 0xe47f
#define PCI_DID_INTEL_PTL_U_H_SRAM 0xe37f
Expand Down Expand Up @@ -4689,6 +4816,8 @@

#define PCI_DID_INTEL_ARL_AUDIO 0x7728

#define PCI_DID_INTEL_ARP_S_AUDIO 0x7f50

#define PCI_DID_INTEL_LNL_AUDIO_1 0xa828
#define PCI_DID_INTEL_LNL_AUDIO_2 0xa829
#define PCI_DID_INTEL_LNL_AUDIO_3 0xa82a
Expand Down Expand Up @@ -4760,6 +4889,13 @@
#define PCI_DID_INTEL_RPP_S_CSE3 0x7a6d
#define PCI_DID_INTEL_MTL_CSE0 0x7e70
#define PCI_DID_INTEL_ARL_CSE0 0x7770
#define PCI_DID_INTEL_ARL_S_CSE0 0xae70
#define PCI_DID_INTEL_ARL_S_CSE1 0xae71
#define PCI_DID_INTEL_ARL_S_CSE2 0xae74
#define PCI_DID_INTEL_ARP_S_CSE0 0x7f68
#define PCI_DID_INTEL_ARP_S_CSE1 0x7f69
#define PCI_DID_INTEL_ARP_S_CSE2 0x7f6c
#define PCI_DID_INTEL_ARP_S_CSE3 0x7f6d
#define PCI_DID_INTEL_LNL_CSE0 0xa870
#define PCI_DID_INTEL_PTL_H_CSE0 0xe470
#define PCI_DID_INTEL_PTL_U_H_CSE0 0xe370
Expand Down Expand Up @@ -4788,6 +4924,7 @@
#define PCI_DID_INTEL_MTL_M_TCSS_XDCI 0x7eb1
#define PCI_DID_INTEL_MTL_P_TCSS_XDCI 0x7ec1
#define PCI_DID_INTEL_ARL_XDCI 0x777e
#define PCI_DID_INTEL_ARP_S_XDCI 0x7f6f
#define PCI_DID_INTEL_PTL_H_XDCI 0xe47e
#define PCI_DID_INTEL_PTL_U_H_XDCI 0xe37e

Expand Down Expand Up @@ -4899,6 +5036,7 @@
#define PCI_DID_INTEL_JSL_DTT 0x4E03
#define PCI_DID_INTEL_ADL_DTT 0x461d
#define PCI_DID_INTEL_MTL_DTT 0x7d03
#define PCI_DID_INTEL_ARL_S_DTT 0xad03
#define PCI_DID_INTEL_RPL_DTT 0xa71d
#define PCI_DID_INTEL_PTL_DTT 0xb01d

Expand Down Expand Up @@ -4944,6 +5082,7 @@
#define PCI_DID_INTEL_MTL_CNVI_WIFI_2 0x7e42
#define PCI_DID_INTEL_MTL_CNVI_WIFI_3 0x7e43
#define PCI_DID_INTEL_ARL_CNVI_WIFI 0x7740
#define PCI_DID_INTEL_ARP_S_CNVI_WIFI 0x7f70
#define PCI_DID_INTEL_RPL_S_CNVI_WIFI_0 0x7a70
#define PCI_DID_INTEL_RPL_S_CNVI_WIFI_1 0x7a71
#define PCI_DID_INTEL_RPL_S_CNVI_WIFI_2 0x7a72
Expand Down Expand Up @@ -4980,13 +5119,16 @@
#define PCI_DID_INTEL_ADP_N_PMC_CRASHLOG_SRAM 0x54ef
#define PCI_DID_INTEL_TGP_PMC_CRASHLOG_SRAM 0xa0ef
#define PCI_DID_INTEL_MTL_CRASHLOG_SRAM 0x7d0d
#define PCI_DID_INTEL_ARL_S_CRASHLOG_SRAM 0xad0d
#define PCI_DID_INTEL_RPL_CPU_CRASHLOG_SRAM 0xa77d
#define PCI_DID_INTEL_RPP_S_PMC_CRASHLOG_SRAM 0x7a27
#define PCI_DID_INTEL_PTL_PUNIT_CRASHLOG_SRAM 0xb07d

/* Intel Trace Hub */
#define PCI_DID_INTEL_MTL_TRACEHUB 0x7e24
#define PCI_DID_INTEL_ARL_TRACEHUB 0x7724
#define PCI_DID_INTEL_ARL_S_TRACEHUB 0xae24
#define PCI_DID_INTEL_ARP_S_TRACEHUB 0x7f26
#define PCI_DID_INTEL_RPL_TRACEHUB 0xa76f
#define PCI_DID_INTEL_PTL_H_TRACEHUB 0xe424
#define PCI_DID_INTEL_PTL_U_H_TRACEHUB 0xe324
Expand All @@ -5013,6 +5155,10 @@
#define PCI_DID_INTEL_ARL_THC0_2 0x7749
#define PCI_DID_INTEL_ARL_THC1_1 0x774a
#define PCI_DID_INTEL_ARL_THC1_2 0x774b
#define PCI_DID_INTEL_ARP_S_THC0_1 0x7f58
#define PCI_DID_INTEL_ARP_S_THC0_2 0x7f59
#define PCI_DID_INTEL_ARP_S_THC1_1 0x7f5a
#define PCI_DID_INTEL_ARP_S_THC1_2 0x7f5b

#define PCI_VID_COMPUTONE 0x8e0e
#define PCI_DID_COMPUTONE_IP2EX 0x0291
Expand Down
14 changes: 14 additions & 0 deletions src/mainboard/system76/mtl/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,16 @@ config BOARD_SYSTEM76_MTL_COMMON
select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP

config BOARD_SYSTEM76_BONW16
select BOARD_SYSTEM76_MTL_COMMON
select DRIVERS_GFX_NVIDIA
select DRIVERS_GFX_NVIDIA_DYNAMIC_BOOST
select DRIVERS_INTEL_DTBT
select EC_SYSTEM76_EC_DGPU
select PCIEXP_HOTPLUG
select SOC_INTEL_METEORLAKE_U_H # TODO: Arrow Lake-HX
select SOC_INTEL_ARROWLAKE_PCH_S

config BOARD_SYSTEM76_DARP10
select BOARD_SYSTEM76_MTL_COMMON
select EC_SYSTEM76_EC_FAN2
Expand Down Expand Up @@ -73,6 +83,7 @@ config MAINBOARD_DIR
default "system76/mtl"

config VARIANT_DIR
default "bonw16" if BOARD_SYSTEM76_BONW16
default "darp10" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B
default "darp11" if BOARD_SYSTEM76_DARP11 || BOARD_SYSTEM76_DARP11_B
default "lemp13" if BOARD_SYSTEM76_LEMP13 || BOARD_SYSTEM76_LEMP13_B
Expand All @@ -81,6 +92,7 @@ config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"

config MAINBOARD_PART_NUMBER
default "bonw16" if BOARD_SYSTEM76_BONW16
default "darp10" if BOARD_SYSTEM76_DARP10
default "darp10-b" if BOARD_SYSTEM76_DARP10_B
default "darp11" if BOARD_SYSTEM76_DARP11
Expand All @@ -89,10 +101,12 @@ config MAINBOARD_PART_NUMBER
default "lemp13-b" if BOARD_SYSTEM76_LEMP13_B

config MAINBOARD_SMBIOS_PRODUCT_NAME
default "Bonobo WS" if BOARD_SYSTEM76_BONW16
default "Darter Pro" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B || BOARD_SYSTEM76_DARP11 || BOARD_SYSTEM76_DARP11_B
default "Lemur Pro" if BOARD_SYSTEM76_LEMP13 || BOARD_SYSTEM76_LEMP13_B

config MAINBOARD_VERSION
default "bonw16" if BOARD_SYSTEM76_BONW16
default "darp10" if BOARD_SYSTEM76_DARP10
default "darp10-b" if BOARD_SYSTEM76_DARP10_B
default "darp11" if BOARD_SYSTEM76_DARP11
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3 changes: 3 additions & 0 deletions src/mainboard/system76/mtl/Kconfig.name
Original file line number Diff line number Diff line change
@@ -1,5 +1,8 @@
## SPDX-License-Identifier: GPL-2.0-only

config BOARD_SYSTEM76_BONW16
bool "bonw16"

config BOARD_SYSTEM76_DARP10
bool "darp10"

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12 changes: 12 additions & 0 deletions src/mainboard/system76/mtl/variants/bonw16/board.fmd
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FLASH 32M {
SI_DESC 16K
SI_ME 10472K
SI_BIOS@16M 16M {
RW_MRC_CACHE 64K
SMMSTORE(PRESERVE) 256K
WP_RO {
FMAP 4K
COREBOOT(CBFS)
}
}
}
2 changes: 2 additions & 0 deletions src/mainboard/system76/mtl/variants/bonw16/board_info.txt
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Board name: bonw16
Release year: 2025
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