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Tools: Topology2: Intel: Add pre-processing to SDW DMIC capture
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This patch adds to all topologies with SDW DMIC the module
copier to in ALH copier pipeline after the IIR equalizer. The
module copier allows to duplicate the stream for several
post-processing pipelines as analogy with mixin/mixout in
playback pipelines.

When SDW_DMIC_ENHANCED_CAPTURE is set "true" in topology build
the multi-microphone beamformer (TDFB) and dynamic range
control (DRC) components are added to host pipeline.

The capture pre-processing is enabled for PC topology
sof-lnl-rt722-l0.tplg. The beamformer is set for a narrow
opening stereo image suitable for notebook user voice
enhance. The DRC is set for a default DMIC level boost.

Signed-off-by: Seppo Ingalsuo <[email protected]>
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@singalsu
singalsu committed Nov 14, 2024
1 parent 9a88c16 commit 86e992c
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Showing 3 changed files with 135 additions and 6 deletions.
2 changes: 2 additions & 0 deletions tools/topology/topology2/cavs-sdw.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -83,6 +83,8 @@ Define {
EFX_SPK_IIR_PARAMS passthrough
EFX_SPK_FIR_PARAMS passthrough
EFX_SPK_DRC_PARAMS passthrough
EFX_DMIC_TDFB_PARAMS passthrough
EFX_DMIC_DRC_PARAMS passthrough
}

# override defaults with platform-specific config
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136 changes: 131 additions & 5 deletions tools/topology/topology2/platform/intel/sdw-dmic-generic.conf
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Original file line number Diff line number Diff line change
@@ -1,15 +1,19 @@
# route and pipeline index start from pcm id * 10

<include/components/tdfb.conf>

Define {
SDW_DMIC_CAPTURE_PCM_NAME "Microphone"
SDW_DMIC_STREAM 'SDW3-Capture'
SDW_DMIC_BE_ID 4
SDW_DMIC_PASSTHROUGH "false"
SDW_DMIC_ENHANCED_CAPTURE "false"
SDW_DMIC_HOST_PIPELINE_ID 40
}

Object.Dai.ALH [
{
dai_index 40
dai_index $SDW_DMIC_HOST_PIPELINE_ID
id $SDW_DMIC_BE_ID
direction "capture"
name $SDW_DMIC_STREAM
Expand All @@ -27,7 +31,7 @@ Object.Dai.ALH [
Object.Pipeline {
host-gateway-capture [
{
index 40
index $SDW_DMIC_HOST_PIPELINE_ID

Object.Widget.host-copier.1 {
stream_name "sdw dmic"
Expand All @@ -37,6 +41,83 @@ Object.Pipeline {
]
}

IncludeByKey.SDW_DMIC_ENHANCED_CAPTURE {
"true" {
Object.Widget.tdfb.1 {
index $SDW_DMIC_HOST_PIPELINE_ID
Object.Control {
bytes."1" {
name '$SDW_DMIC_CAPTURE_PCM_NAME Capture TDFB bytes'
max 16384
IncludeByKey.EFX_DMIC_TDFB_PARAMS {
"line2_pass" "include/components/tdfb/line2_pass.conf"
"line2_generic_pm10deg" "include/components/tdfb/line2_generic_pm10deg_48khz.conf"
"line2_50mm" "include/components/tdfb/line2_50mm_pm0_30_90deg_48khz.conf"
"line2_68mm" "include/components/tdfb/line2_68mm_pm0_30_90deg_48khz.conf"
"line2_74mm" "include/components/tdfb/line2_74mm_pm0_30_90deg_48khz.conf"
"line4_pass" "include/components/tdfb/line4_pass.conf"
"line4to2_pass" "include/components/tdfb/line4to2_pass.conf"
"line4_generic_pm10deg" "include/components/tdfb/line4_generic_pm10deg_48khz.conf"
"line4_28mm" "include/components/tdfb/line2_28mm_pm0_30_90deg_48khz.conf"
}
}
mixer."1" {
name '$SDW_DMIC_CAPTURE_PCM_NAME Capture TDFB beam switch'
}
enum."1" {
name '$SDW_DMIC_CAPTURE_PCM_NAME Capture TDFB angle set enum'
}
}
num_input_audio_formats 1
num_output_audio_formats 1
Object.Base.input_audio_format [
{
in_bit_depth 32
in_valid_bit_depth 32
}
]
Object.Base.output_audio_format [
{
out_channels 2
out_rate $DMIC0_RATE
out_bit_depth 32
out_valid_bit_depth 32
}
]
}

Object.Widget.drc.1 {
index $SDW_DMIC_HOST_PIPELINE_ID
Object.Control {
bytes."1" {
name '$SDW_DMIC_CAPTURE_PCM_NAME Capture DRC bytes'
IncludeByKey.EFX_DMIC_DRC_PARAMS {
"passthrough" "include/components/drc/passthrough.conf"
"dmic_default" "include/components/drc/dmic_default.conf"
}
}
mixer."1" {
name '$SDW_DMIC_CAPTURE_PCM_NAME Capture DRC switch'
}
}
num_input_audio_formats 1
num_output_audio_formats 1
Object.Base.input_audio_format [
{
in_bit_depth 32
in_valid_bit_depth 32
}
]
Object.Base.output_audio_format [
{
out_bit_depth 32
out_valid_bit_depth 32
}
]
}
}
}

Object.Widget {
alh-copier [
{
Expand Down Expand Up @@ -100,6 +181,25 @@ Object.Widget {
}
}
]
Object.Widget.module-copier [
{
stream_name $DMIC0_NAME
num_input_audio_formats 1
num_output_audio_formats 1
Object.Base.input_audio_format [
{
in_bit_depth 32
in_valid_bit_depth 32
}
]
Object.Base.output_audio_format [
{
out_bit_depth 32
out_valid_bit_depth 32
}
]
}
]
}
}
}
Expand Down Expand Up @@ -138,9 +238,35 @@ IncludeByKey.SDW_DMIC_PASSTHROUGH {
sink "eqiir.41.0"
}
{
source "eqiir.41.0"
sink "host-copier.4.capture"
source "eqiir.41.0"
sink "module-copier.41.0"
}
]
]
IncludeByKey.SDW_DMIC_ENHANCED_CAPTURE {
"true" {
Object.Base.route [
{
source "module-copier.41.0"
sink "tdfb.40.1"
}
{
source "tdfb.40.1"
sink "drc.40.1"
}
{
source "drc.40.1"
sink "host-copier.4.capture"
}
]
}
"false" {
Object.Base.route [
{
source "module-copier.41.0"
sink "host-copier.4.capture"
}
]
}
}
}
}
3 changes: 2 additions & 1 deletion tools/topology/topology2/production/tplg-targets-ace2.cmake
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Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,8 @@ SDW_JACK_OUT_STREAM=Playback-SimpleJack,SDW_JACK_IN_STREAM=Capture-SimpleJack"
SDW_AMP_FEEDBACK=false,SDW_SPK_STREAM=Playback-SmartAmp,SDW_DMIC_STREAM=Capture-SmartMic,\
SDW_JACK_OUT_STREAM=Playback-SimpleJack,SDW_JACK_IN_STREAM=Capture-SimpleJack,\
EFX_SPK_IIR_PARAMS=highpass_100hz_0db_48khz,EFX_SPK_DRC_PARAMS=speaker_default,\
SDW_SPK_ENHANCED_PLAYBACK=true"
EFX_DMIC_TDFB_PARAMS=line2_generic_pm10deg,EFX_DMIC_DRC_PARAMS=dmic_default.conf,\
SDW_SPK_ENHANCED_PLAYBACK=true,SDW_DMIC_ENHANCED_CAPTURE=true"

"cavs-sdw\;sof-lnl-rt712-l2-rt1320-l1\;PLATFORM=lnl,SDW_DMIC=1,NUM_SDW_AMP_LINKS=2,\
SDW_AMP_FEEDBACK=false,SDW_SPK_STREAM=Playback-SmartAmp,SDW_DMIC_STREAM=Capture-SmartMic,\
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