merge dev

altairsim/srcsim/simcfg.c

@@ -33,7 +33,6 @@
  * 03-JAN-2025 changed colors configuration to RGB-triple
  */
 
-#include <stddef.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
@@ -90,10 +89,10 @@ void config(void)
 			if (!strcmp(t1, "sio0_upper_case")) {
 				switch (*t2) {
 				case '0':
-					sio0_upper_case = 0;
+					sio0_upper_case = false;
 					break;
 				case '1':
-					sio0_upper_case = 1;
+					sio0_upper_case = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -102,10 +101,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio1_upper_case")) {
 				switch (*t2) {
 				case '0':
-					sio1_upper_case = 0;
+					sio1_upper_case = false;
 					break;
 				case '1':
-					sio1_upper_case = 1;
+					sio1_upper_case = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -114,10 +113,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio2_upper_case")) {
 				switch (*t2) {
 				case '0':
-					sio2_upper_case = 0;
+					sio2_upper_case = false;
 					break;
 				case '1':
-					sio2_upper_case = 1;
+					sio2_upper_case = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -126,10 +125,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio0_strip_parity")) {
 				switch (*t2) {
 				case '0':
-					sio0_strip_parity = 0;
+					sio0_strip_parity = false;
 					break;
 				case '1':
-					sio0_strip_parity = 1;
+					sio0_strip_parity = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -138,10 +137,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio1_strip_parity")) {
 				switch (*t2) {
 				case '0':
-					sio1_strip_parity = 0;
+					sio1_strip_parity = false;
 					break;
 				case '1':
-					sio1_strip_parity = 1;
+					sio1_strip_parity = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -150,10 +149,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio2_strip_parity")) {
 				switch (*t2) {
 				case '0':
-					sio2_strip_parity = 0;
+					sio2_strip_parity = false;
 					break;
 				case '1':
-					sio2_strip_parity = 1;
+					sio2_strip_parity = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -162,10 +161,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio0_drop_nulls")) {
 				switch (*t2) {
 				case '0':
-					sio0_drop_nulls = 0;
+					sio0_drop_nulls = false;
 					break;
 				case '1':
-					sio0_drop_nulls = 1;
+					sio0_drop_nulls = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -174,10 +173,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio1_drop_nulls")) {
 				switch (*t2) {
 				case '0':
-					sio1_drop_nulls = 0;
+					sio1_drop_nulls = false;
 					break;
 				case '1':
-					sio1_drop_nulls = 1;
+					sio1_drop_nulls = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -186,10 +185,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio2_drop_nulls")) {
 				switch (*t2) {
 				case '0':
-					sio2_drop_nulls = 0;
+					sio2_drop_nulls = false;
 					break;
 				case '1':
-					sio2_drop_nulls = 1;
+					sio2_drop_nulls = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);
@@ -198,10 +197,10 @@ void config(void)
 			} else if (!strcmp(t1, "sio0_revision")) {
 				switch (*t2) {
 				case '0':
-					sio0_revision = 0;
+					sio0_revision = false;
 					break;
 				case '1':
-					sio0_revision = 1;
+					sio0_revision = true;
 					break;
 				default:
 					LOGW(TAG, "invalid value for %s: %s", t1, t2);

altairsim/srcsim/simctl.c

@@ -318,13 +318,13 @@ static void step_clicked(int state, int val)
 /*
  * Single step through the machine cycles after first M1
  */
-int wait_step(void)
+bool wait_step(void)
 {
-	int ret = 0;
+	bool ret = false;
 
 	if (cpu_state != ST_SINGLE_STEP) {
 		cpu_bus &= ~CPU_M1;
-		m1_step = 0;
+		m1_step = false;
 		return ret;
 	}
 
@@ -345,11 +345,11 @@ int wait_step(void)
 		fp_clock++;
 		fp_sampleData();
 		sleep_for_ms(1);
-		ret = 1;
+		ret = true;
 	}
 
 	cpu_bus &= ~CPU_M1;
-	m1_step = 0;
+	m1_step = false;
 	return ret;
 }
 
@@ -386,15 +386,15 @@ static void reset_clicked(int state, int val)
 		reset = 1;
 		cpu_state |= ST_RESET;
 		IFF = 0;
-		m1_step = 0;
+		m1_step = false;
 		break;
 	case FP_SW_CENTER:
 		if (reset) {
 			/* reset CPU */
 			reset_cpu();
 			if (reset == 2)
 				if (!R_flag)
-					PC = _boot_switch[M_flag];
+					PC = _boot_switch[M_value];
 			reset = 0;
 			cpu_state &= ~ST_RESET;
 
@@ -412,7 +412,7 @@ static void reset_clicked(int state, int val)
 		/* reset CPU and I/O devices */
 		reset = 2;
 		cpu_state |= ST_RESET;
-		m1_step = 0;
+		m1_step = false;
 		IFF = 0;
 		reset_io();
 		break;
@@ -537,7 +537,7 @@ static void int_clicked(int state, int val)
 
 	switch (state) {
 	case FP_SW_UP:
-		int_int = 1;
+		int_int = true;
 		break;
 	case FP_SW_DOWN:
 		fp_led_address = boot_switch;

altairsim/srcsim/simctl.h

@@ -7,11 +7,14 @@
 #ifndef SIMCTL_INC
 #define SIMCTL_INC
 
+#include "sim.h"
+#include "simdefs.h"
+
 extern int boot_switch;			/* boot address for switch */
 
 extern void mon(void);
 
-extern int wait_step(void);
+extern bool wait_step(void);
 extern void wait_int_step(void);
 
 #endif /* !SIMCTL_INC */

altairsim/srcsim/simio.c

@@ -36,7 +36,6 @@
 #include <errno.h>
 #include <fcntl.h>
 #include <signal.h>
-#include <stddef.h>
 #include <sys/time.h>
 #include <unistd.h>
 
@@ -81,13 +80,13 @@ static BYTE io_no_card_in(void);
 static int printer;		/* fd for file "printer.txt" */
 static BYTE hwctl_lock = 0xff;	/* lock status hardware control port */
 
-struct unix_connectors ucons[NUMUSOC]; /* socket connections for SIO's */
+unix_connector_t ucons[NUMUSOC]; /* socket connections for SIO's */
 
 /*
  *	This array contains function pointers for every
  *	input I/O port (0 - 255), to do the required I/O.
  */
-BYTE (*const port_in[256])(void) = {
+in_func_t *const port_in[256] = {
 	[  0] = altair_sio0_status_in,	/* SIO 0 connected to console */
 	[  1] = altair_sio0_data_in,	/*  "  */
 	[  2] = lpt_status_in,		/* printer status */
@@ -117,7 +116,7 @@ BYTE (*const port_in[256])(void) = {
  *	This array contains function pointers for every
  *	output I/O port (0 - 255), to do the required I/O.
  */
-void (*const port_out[256])(BYTE data) = {
+out_func_t *const port_out[256] = {
 	[  0] = altair_sio0_status_out,	/* SIO 0 connected to console */
 	[  1] = altair_sio0_data_out,	/*  "  */
 	[  2] = lpt_status_out,		/* printer status */
@@ -247,7 +246,7 @@ static void int_timer(int sig)
 {
 	UNUSED(sig);
 
-	int_int = 1;
+	int_int = true;
 	int_data = 0xff;	/* RST 38H for IM 0 */
 }
 

altairsim/srcsim/simio.h

@@ -13,10 +13,10 @@
 
 #define IO_DATA_UNUSED	0xff	/* data returned on unused ports */
 
-extern struct unix_connectors ucons[NUMUSOC];
+extern unix_connector_t ucons[NUMUSOC];
 
-extern BYTE (*const port_in[256])(void);
-extern void (*const port_out[256])(BYTE data);
+extern in_func_t *const port_in[256];
+extern out_func_t *const port_out[256];
 
 extern void init_io(void);
 extern void exit_io(void);

altairsim/srcsim/simmem.c

@@ -17,7 +17,6 @@
  * 29-AUG-2021 new memory configuration sections
  */
 
-#include <stddef.h>
 #include <stdlib.h>
 #include <string.h>
 
@@ -34,7 +33,7 @@
 #include "log.h"
 static const char *TAG = "memory";
 
-struct memmap memconf[MAXMEMSECT][MAXMEMMAP] 	/* memory map */
+memmap_t memconf[MAXMEMSECT][MAXMEMMAP] 	/* memory map */
 	= { { { MEM_RW, 0, 0x100, NULL } } };	/* default config to 64K RAM only */
 WORD _boot_switch[MAXMEMSECT];			/* boot address for switch */
 
@@ -57,10 +56,10 @@ void init_memory(void)
 	strcat(fn, "/");
 	pfn = &fn[strlen(fn)];
 
-	if (!memconf[M_flag][0].size) {
+	if (!memconf[M_value][0].size) {
 		LOGW(TAG, "The [MEMORY %d] section appears missing or empty, "
-		     "setting memory map to default", M_flag + 1);
-		M_flag = 0;
+		     "setting memory map to default", M_value + 1);
+		M_value = 0;
 	}
 
 	/* initialize memory page table, no memory available */
@@ -69,58 +68,58 @@ void init_memory(void)
 
 	/* set memory configuration from system.conf */
 	for (i = 0; i < MAXMEMMAP; i++) {
-		if (memconf[M_flag][i].size) {
+		if (memconf[M_value][i].size) {
 
-			for (j = 0; j < memconf[M_flag][i].size; j++)
-				p_tab[memconf[M_flag][i].spage + j] = memconf[M_flag][i].type;
+			for (j = 0; j < memconf[M_value][i].size; j++)
+				p_tab[memconf[M_value][i].spage + j] = memconf[M_value][i].type;
 
-			switch (memconf[M_flag][i].type) {
+			switch (memconf[M_value][i].type) {
 			case MEM_RW:
 				/* fill memory content with some initial value */
-				for (j = memconf[M_flag][i].spage << 8;
-				     j < (memconf[M_flag][i].spage + memconf[M_flag][i].size) << 8;
+				for (j = memconf[M_value][i].spage << 8;
+				     j < (memconf[M_value][i].spage + memconf[M_value][i].size) << 8;
 				     j++) {
-					if (m_flag >= 0) {
-						memory[j] = m_flag;
+					if (m_value >= 0) {
+						memory[j] = m_value;
 					} else {
 						memory[j] = (BYTE) (rand() % 256);
 					}
 				}
 
 				LOG(TAG, "RAM %04XH - %04XH\r\n",
-				    memconf[M_flag][i].spage << 8,
-				    ((memconf[M_flag][i].spage + memconf[M_flag][i].size) << 8) - 1);
+				    memconf[M_value][i].spage << 8,
+				    ((memconf[M_value][i].spage + memconf[M_value][i].size) << 8) - 1);
 				break;
 
 			case MEM_RO:
 				/* fill the ROM's with 0xff in case no firmware loaded */
-				for (j = memconf[M_flag][i].spage;
-				     j < (memconf[M_flag][i].spage + memconf[M_flag][i].size);
+				for (j = memconf[M_value][i].spage;
+				     j < (memconf[M_value][i].spage + memconf[M_value][i].size);
 				     j++) {
 					memset(&memory[j << 8], 0xff, 256);
 				}
 
 				LOG(TAG, "ROM %04XH - %04XH %s\r\n\r\n",
-				    memconf[M_flag][i].spage << 8,
-				    ((memconf[M_flag][i].spage + memconf[M_flag][i].size) << 8) - 1,
-				    memconf[M_flag][i].rom_file ? memconf[M_flag][i].rom_file : "");
+				    memconf[M_value][i].spage << 8,
+				    ((memconf[M_value][i].spage + memconf[M_value][i].size) << 8) - 1,
+				    memconf[M_value][i].rom_file ? memconf[M_value][i].rom_file : "");
 
 				/* load firmware into ROM if specified */
-				if (memconf[M_flag][i].rom_file) {
-					strcpy(pfn, memconf[M_flag][i].rom_file);
-					load_file(fn, memconf[M_flag][i].spage << 8,
-						  memconf[M_flag][i].size << 8);
+				if (memconf[M_value][i].rom_file) {
+					strcpy(pfn, memconf[M_value][i].rom_file);
+					load_file(fn, memconf[M_value][i].spage << 8,
+						  memconf[M_value][i].size << 8);
 				}
 				break;
 			}
 		}
 	}
 
 	/* set preferred start of boot ROM if specified */
-	if (_boot_switch[M_flag]) {
-		LOG(TAG, "Boot switch address at %04XH\r\n", _boot_switch[M_flag]);
-		boot_switch = _boot_switch[M_flag];
-		PC = _boot_switch[M_flag];
+	if (_boot_switch[M_value]) {
+		LOG(TAG, "Boot switch address at %04XH\r\n", _boot_switch[M_value]);
+		boot_switch = _boot_switch[M_value];
+		PC = _boot_switch[M_value];
 	} else {
 		PC = 0x0000;
 	}