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Fix issues identified in TSIP on RX72N #8201

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Description

Fix issues in TSIP Decryption and Verification while testing on RX72N

Testing

Tested on Custom RX72N board

Checklist

  • added tests
  • updated/added doxygen
  • updated appropriate READMEs
  • Updated manual and documentation

@wolfSSL-Bot
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Can one of the admins verify this patch?

@dgarske dgarske self-assigned this Nov 18, 2024
@dgarske dgarske requested review from miyazakh and dgarske November 18, 2024 23:13
@dgarske
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dgarske commented Nov 18, 2024

Hi @gauravks ,

Thank you for the PR and email. We will review and I'll coordinate a contributor agreement if needed directly.

Thanks,
David Garske, wolfSSL

@@ -3599,6 +3599,10 @@ static int RsaPrivateDecryptEx(const byte* in, word32 inLen, byte* out,
ret = wc_CryptoCb_RsaPad(in, inLen, out,
&outLen, rsa_type, key, rng, &padding);
if (ret != WC_NO_ERR_TRACE(CRYPTOCB_UNAVAILABLE)) {
if (ret < 0) {
break;
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Check indent here. Might be tabs vs. spaces.

@@ -250,13 +250,13 @@ int wc_tsip_RsaFunction(wc_CryptoInfo* info, TsipUserCtx* tuc)
return BAD_FUNC_ARG;
}
if (ret == 0) {
info->pk.rsa.outLen = cipher.data_length;
*(info->pk.rsa.outLen) = cipher.data_length;
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Same. Check indent here. Might be tabs vs. spaces.

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@miyazakh miyazakh left a comment

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Thanks for the fix. I have one miner request.

hashData.pdata = (uint8_t*)info->pk.rsa.in;
hashData.data_length = info->pk.rsa.inLen;
hashData.pdata = (uint8_t*)info->pk.rsa.out;
hashData.data_length = info->pk.rsa.outLen;
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This should be *(info->pk.rsa.outLen) as well.

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dgarske commented Nov 20, 2024

Thank you @gauravks . Closing in favor of #8206 Please give the new PR a try.

@dgarske dgarske closed this Nov 20, 2024
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4 participants