dts: st: u3: stm32u385rgtxq: add missing sa1_fs_a pins #301
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create pins manually since STM32U385RGTxQ.xml file doesn't have definitions for these pins. Signed-off-by: Fabrice DJIATSA <[email protected]>
This was referenced Aug 4, 2025
erwango
requested changes
Aug 18, 2025
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| /omit-if-no-ref/ sai1_fs_a_pb9: sai1_fs_a_pb9 { | ||
| pinmux = <STM32_PINMUX('B', 9, AF13)>; | ||
| }; | ||
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| /omit-if-no-ref/ sai1_fs_a_pe4: sai1_fs_a_pe4 { | ||
| pinmux = <STM32_PINMUX('E', 4, AF13)>; | ||
| }; |
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How to be sure they won't be erased at next generation ?
To be safe, I'd rather raise an issue on CubeMx side and define those on board size while waiting for the fix
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This PR adds some missing SAI1 signals.
We observed that the STM32U385RGTxQ.xml file (https://github.com/STMicroelectronics/STM32_open_pin_data/blob/master/mcu/STM32U385RGTxQ.xml) contains only one pin definition. However, the Nucleo U385RG Q datasheet (https://www.st.com/resource/en/datasheet/stm32u385cg.pdf, page 85) shows additional signals available on AF13.
Currently, there is not enough time to investigate other U3_*.xml files or create an issue in the STM32_open_pin_data repository.
These changes are required to resolve issues encountered in the I2S sample ( zephyrproject-rtos/zephyr#94082)