Skip to content

Conversation

maass-hamburg
Copy link
Member

flush pending irq before enableing the irq.

In the litex soc, if an irq is not enabled, it will it can still be registered and will be pending
if it occurs, it will just not be send to the cpu
until the irq is enabled.

The litex bios uses the spi controller without irq support and therefore doesn't reset the irq pending register

flush pending irq before enableing the irq.

In the litex soc, if an irq is not enabled, it will
it can still be registered and will be pending
if it occurs, it will just not be send to the cpu
until the irq is enabled.

Signed-off-by: Fin Maaß <[email protected]>
Copy link

@maass-hamburg maass-hamburg added the bug The issue is a bug, or the PR is fixing a bug label Aug 28, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
area: SPI SPI bus bug The issue is a bug, or the PR is fixing a bug platform: LiteX size: XS A PR changing only a single line of code
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants