Add field grouping ScalaDoc for ArbiterIO (chipsalliance#2208)

* Update Arbiter.scala * Update src/main/scala/chisel3/util/Arbiter.scala changed group name Co-authored-by: Megan Wachs <[email protected]> * minor changes on grouping ArbiterIO * removed unmatched closing brace * Remove groupdesc from Arbiter.scala * Added groupdesc to Aggregate.scala * Update Arbiter.scala * Update core/src/main/scala/chisel3/Aggregate.scala Co-authored-by: Megan Wachs <[email protected]> * Update Arbiter.scala * Update src/main/scala/chisel3/util/Arbiter.scala Added suugestions. Co-authored-by: Megan Wachs <[email protected]> * added suggestions from review * added suggestions from review * Resolved conflicts * update Arbiter.scala * Update core/src/main/scala/chisel3/Aggregate.scala deleted groudesc for ArbiterIO Co-authored-by: Megan Wachs <[email protected]> * Update Scaladoc syntax * removed some lines * Better documentation * Removed @param and @gen * Update core/src/main/scala/chisel3/Aggregate.scala Co-authored-by: Megan Wachs <[email protected]> * Update src/main/scala/chisel3/util/Arbiter.scala Co-authored-by: Megan Wachs <[email protected]> * Added groupdesc to ArbiterIO * Update src/main/scala/chisel3/util/Arbiter.scala Co-authored-by: Megan Wachs <[email protected]> * Update core/src/main/scala/chisel3/Aggregate.scala Co-authored-by: Megan Wachs <[email protected]> * Update Arbiter.scala * Update src/main/scala/chisel3/util/Arbiter.scala Co-authored-by: Megan Wachs <[email protected]> * Update Arbiter.scala Co-authored-by: Megan Wachs <[email protected]>
zylin · Nov 3, 2021 · 6145512 · 6145512
1 parent a79f575
commit 6145512
Showing 1 changed file with 13 additions and 0 deletions.
diff --git a/src/main/scala/chisel3/util/Arbiter.scala b/src/main/scala/chisel3/util/Arbiter.scala
@@ -10,15 +10,28 @@ import chisel3.internal.naming.chiselName  // can't use chisel3_ version because
 
 /** IO bundle definition for an Arbiter, which takes some number of ready-valid inputs and outputs
   * (selects) at most one.
+  * @groupdesc Signals The actual hardware fields of the Bundle
   *
   * @param gen data type
   * @param n number of inputs
   */
 class ArbiterIO[T <: Data](private val gen: T, val n: Int) extends Bundle {
   // See github.com/freechipsproject/chisel3/issues/765 for why gen is a private val and proposed replacement APIs.
 
+/** Input data, one per potential sender
+  * 
+  * @group Signals
+  */
   val in  = Flipped(Vec(n, Decoupled(gen)))
+/** Output data after arbitration
+  *
+  * @group Signals
+  */
   val out = Decoupled(gen)
+/** One-Hot vector indicating which output was chosen
+  *
+  * @group Signals
+  */
   val chosen = Output(UInt(log2Ceil(n).W))
 }