Implement Wishbone Burst Support for Memory Controller

[occheung]

Description

Burst access is handled as the following:

• Memory controller waits for DFI to confirm read success before ack back.
  • while waiting from the main memory, the controller read the next address unless the page boundary is found/end of burst.
• Write bursts are always ack'd immediately, once a DFI instruction is issued.
• Address are pre-emptively incremented after issuing each DFI instruction, without inputs from the bus master.
• Burst will not cross page boundary. The controller always return the state back to IDLE.
• Memory controller issues refresh instruction if a burst may cause an un-timely refresh. No need to do this now.

To support burst access, the wishbone arbiter shall not release grant to masters during a burst.

[sbourdeauducq]

Memory controller issues refresh instruction if a burst may cause an un-timely refresh.

Is this really necessary? AFAIK SDRAM only cares about the average refresh rate and can tolerate considerable jitter. Did you check the datasheet or JEDEC standard?

[sbourdeauducq]

legitimate

[occheung]

Memory controller issues refresh instruction if a burst may cause an un-timely refresh.

Is this really necessary? AFAIK SDRAM only cares about the average refresh rate and can tolerate considerable jitter. Did you check the datasheet or JEDEC standard?

The timer does not reset until a refresh is issued. If we have very long burst consistently (page size burst would take 1us), then the state machine may be issuing a refresh too late with the timer not being compensated. The frequency will be significantly off.

What about we let the timer underflow back to reset, and simply have a flag that records the underflow. Trigger a refresh from IDLE if the flag was set, and reset the flag after refresh. We are assuming maximum burst time << refresh period in this case.

Otherwise a pending refresh count with a suitable bit width should do.

[sbourdeauducq]

What about we let the timer underflow back to reset, and simply have a flag that records the underflow.

Yes, that would be the right way of doing this. I thought it was like that already but I may be mistaken.